CN101365131A - Simplified code table for variable length decoding by AVS video decoder suitable for VLSI implementation and implementing method - Google Patents
Simplified code table for variable length decoding by AVS video decoder suitable for VLSI implementation and implementing method Download PDFInfo
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Abstract
The invention discloses a simplified code table for variable length decoding of an AVS video decoder suitable for VLSI implementation, and an implementation method. The simplified code table is a one-dimensional array which has the dimension of 19*29*2 equal to 1102 bytes deduced from nineteen variable length code tables of a standard appendix A and takes 'level' and 'run' as elements. The decoding method for the code tables comprises the following two steps of accessing the one-dimensional array code table and evaluating a non-zero quantization coefficient 'level' and a run 'run' according to an index address; and judging parity of 'trans coeff' and determining the plus or the minus of the 'level'; when the 'trans coeff' is less than an end mark, if the 'trans coeff' is an odd number, choosing the negative value for the 'level'; when the 'trans coeff' is bigger than the end mark, if the 'trans coeff' is an even number, choosing the negative value for the 'level'. Nineteen elements correspond to nineteen tables, so that the different blocks can be handled by uniform logic, so as achieve the purposes of simplifying the logic and eliminating excessive storage and calculation to a large limit.
Description
Technical field
The present invention relates to VLSI and realize the video coding and decoding technology field, specifically, relate to a kind of simplification code table and implementation method of AVS Video Decoder variable length decoding of the VLSI of being suitable for realization.
Background technology
Along with the development of video coding and decoding technology, produced the standard of many coding and decoding videos: MPEG1/2/4, H.263/4, VC-1/AVS.AVS is the standard that China has independent intellectual property right, with h.264 than, performance is suitable, patent charge is low, implementation complexity is low, and certain competitive advantage is arranged, participate in many chip manufacturings commercial city.In design AVS chip, need be optimized: reduce memory bandwidth, reduce the sheet stored, reduce operand, reduce programmed logic etc., to reach the purpose of pick up speed, saving resource to the AVS algorithm.
The main task of AVS Video Decoder variable length decoding solves the nonzero coefficient behind the residual matrix change quantization exactly from the binary code stream of compression.This process is in two steps: 1, binary code stream is resolved to conversion coefficient; 2, conversion coefficient (trans_coeff) is decoded into nonzero coefficient (level, run).The first step adopts the index Columbus sign indicating number to resolve, and standard to describe gets simple and clear, does not consider here.The decode procedure in second step that standard provides is more abstract, the nineteen code table that the standard that identifying code is described provides: VLC0_Intra, VLC1_Intra, VLC2_Intra, VLC3_Intra, VLC4_Intra, VLC5_Intra, VLC6_Intra, VLC0_Inter, VLC1_Inter, VLC2_Inter, VLC3_Inter, VLC4_Inter, VLC5_Inter, VLC6_Inter, VLC0_Chroma, VLC1_Chroma, VLC2_Chroma, VLC3_Chroma, the shared storage of VLC4_Chroma is huge, needs the sheet stored of 7 * 26 * 27+7 * 26 * 27+5 * 26 * 27=13338 byte, must optimize.
Analyze the big reason of the shared storage of nineteen code table that identifying code is described, what be exactly that decoder uses is the code table of encoder.During coding the nonzero coefficient behind the change quantization is carried out the zigzag counting, obtain (level, run), so that (level run) tables look-up for index, and a step is found trans_coeff, and this is very suitable to encoder.But to decoder is very inappropriate, also use the code table of encoder during decoding, identifying code level and the run of circulating respectively that just have to, the code table that travels through 13338 bytes generates the code table of 7 * 64 * 2+7 * 64 * 2+5 * 64 * 2=2432 byte, make that the code table of 2432 bytes can be index with trans_coeff, one the step find (level, run).So far as if problem can solve, such as, 13338 byte code tables and the computing that traversal 13338 bytecode tables generate 2432 byte code tables are all thrown away, directly make the code table of decoder of 2432 byte code tables, both removed a lot of redundant storage, removed a lot of redundant operations again, such VLD should be fine.Examine 2432 byte code tables, redundant storage is still arranged; Examine identifying code, redundant operation is still arranged, be necessary to continue to optimize.Little sheet stored, little arithmetic logic all is highly significant concerning chip.
Summary of the invention
The objective of the invention is to, the simplification code table and the implementation method of the AVS Video Decoder variable length decoding that a kind of VLSI of being suitable for realizes is provided, the redundant storage and the redundant operation problem that exist when overcoming present variable length decoding.
In order to realize the foregoing invention purpose, technical scheme of the present invention is as follows:
Here both that is not suitable for 13338 byte code tables of encoder, and also that is not by the 2432 byte code tables that are suitable for decoder that program generates, and the calculating process that is generated 2432 byte code tables by 13338 bytecode tables is also thrown away.
Here the one-dimension array code table VLD_table[1102 that provide a size that is gone out by the nineteen code table direct derivation of standard appendix A is 1102 bytes].The derivation of this one-dimension array code table comprises the steps:
Step 1: one with the standard appendix A is abscissa with level, is ordinate with run, is the rectangular code table of content with trans_coeff, be rewritten as one by trans_coeff to (level, the mapping table that 29 elements are arranged run).
Step 2: the mapping table of step 1 is changed into one, with trans_coeff〉〉 1 be index, so that { leve, run} are content, and size is the two-dimensional array of 2 bytes of 29 x.
Step 3: with the two-dimensional array of step 2, be transformed into the one-dimension array of 58 bytes by its storage order, level is placed on even address, and run is placed on the odd address.
Step 4: the nineteen code table of standard appendix A according to the nineteen one-dimension array that above-mentioned steps generates, according to the sequencing that the standard appendix A provides, is successively placed in the one-dimension array of 19 * a 29 * 2=1102 byte.
According to the composition of above-mentioned one-dimension array code table, the addressing method of above-mentioned code table comprises the steps:
Step 1: according to block type (blocktype): luminance block (0), interframe luminance block (7), chrominance block (14) in the frame, initialization address addr_vld=0,406,812,7 * 29 * 2=406 respectively, 14 * 29 * 2=812.
Step 2: according to current table number tablenum, computation index address idx=addr_vld+tablenum * 58.
Step 3:, continue the computation index address according to the conversion coefficient trans_coeff that parses.Trans_coeff is during less than end mark, idx+=((trans_coeff〉〉 1)＜＜1); Trans_coeff is greater than end mark, idx+=(((trans_coeff-1)〉〉 1)＜＜1).
Adopt above-mentioned one-dimension array code table and addressing method thereof, with conversion coefficient trans_coeff, (this coding/decoding method comprises the steps: for level, method run) to be decoded into nonzero coefficient
Step 1: according to the index address idx that above-mentioned addressing method calculates, visit one-dimension array code table is obtained the non-zero quantized coefficients level and the distance of swimming run thereof of residual matrix.level＝VLD_table[idx]，run＝VLD_table[idx+1]。
Step 2: judge the parity of trans_coeff, the sign of decision level.Trans_coeff is during less than end mark, if trans_coeff is an odd number, then level gets negative value.Trans_coeff is during greater than end mark, if trans_coeff is an even number, then level gets negative value.
Be not equal to end of block character at trans_coeff, and trans_coeff is less than under 59 the situation, just use the code table of above-mentioned 1102 bytes, trans_coeff was more than or equal to 59 o'clock, can use one is that the size of index is the one-dimension array table ref_abs_level[219 of 219 bytes with run], the addressing of this table also divided for three steps: the first step, according to blocktype, initialization address addr_ref=0,65,150; Second step, according to tablenum, calculate idx=addr_ref+max_run[blocktype+0]+...+max_run[blocktype+tablenum-1]+tablenum; The 3rd step, according to trans_coeff, calculate idx+=((trans_coeff-59)〉〉 1).It is identical with standard to adopt this code table and addressing method thereof to solve the method for level, run, repeats no more.
In the nineteen code table of standard appendix A, first table of first table of first table of luminance block, interframe luminance block, chrominance block does not all have end mark in the frame, we are made as the maximum of short type with their end mark, form an end mark table eob_pos[19 that 19 elements are arranged with all the other 16 end marks].The maximum run value of nineteen table is formed the maximum run value table max_run[19 of a nineteen element].Columbus rank table golomb_grad[19 of a nineteen element is formed on the rank of the index Columbus sign indicating number of nineteen table].
Adopt simplification code table of the present invention and implementation method, nineteen element correspondence the nineteen table, so just can handle different piece classes by unified logic, reaches the purpose of simplifying logic, eliminates redundant storage and redundant operation to greatest extent.
Description of drawings
Figure 1A: level, the run of luminance block and the mapping table VLC0_Intra of trans_coeff in the frame.
Figure 1B: by Figure 1A derive by the mapping table of trans_coeff to level, run.
Fig. 1 C: by Figure 1B derive with trans_coeff 1 be the two-dimensional array of index.
Fig. 1 D: the one-dimension array of deriving by Fig. 1 C.
Fig. 2 A: level, the run of luminance block and the mapping table VLC1_Intra of trans_coeff in the frame.
Fig. 2 B: by Fig. 2 A derive by the mapping table of trans_coeff to level, run.
Fig. 2 C: by Fig. 2 B derive with trans_coeff 1 be the two-dimensional array of index.
Fig. 2 D: the one-dimension array of deriving by Fig. 2 C.
Fig. 3: the 1102 byte code tables of the level of corresponding nineteen table, run.
Fig. 4 A: the RefAbsLevel table of corresponding nineteen table.
Fig. 4 B: the end mark table of corresponding nineteen table.
Fig. 4 C: the maximum run value table of corresponding nineteen table.
Fig. 4 D: the index Columbus sign indicating number rank table of corresponding nineteen table.
Fig. 5 A: the flow chart that adopts little code table to decode.
Fig. 5 B: the variable length decoding process that one 8 x is 8.
The hardware multithreading pipelined architecture of Fig. 5 C:AVS Video Decoder.
Embodiment
According to Figure 1A to Fig. 5 C, provide preferred embodiment of the present invention, and described in detail below, enable to understand better function of the present invention, characteristics.
Figure 1A is first Table V LC0_Intra in the nineteen code table that provides of standard appendix A, and it is listed in here, is as example the foundation that 1102 byte code tables are derived to be described.Figure 1B be according to Figure 1A derive by trans_coeff to (level, run) mapping table, can find that trans_coeff is even number entirely, from 0 to 56, trans_coeff so〉〉 1, be exactly from 0 to 28 continuous integral number, so very naturally by Figure 1B derive shown in Fig. 1 C with trans_coeff 1 be index, so that { level, run} are the two-dimensional array of content.With the two-dimensional array of Fig. 1 C,, write as the one-dimension array of described 58 bytes of Fig. 1 D by its storage order.The one-dimension array of 58 bytes of Fig. 1 D constitutes 58 data of first row of 1102 byte code tables shown in Figure 3.
Fig. 2 A is second Table V LC1_Intra in the nineteen code table that provides of standard appendix A, and it also is listed in here, is in order to illustrate further the foundation that 1102 byte code tables are derived.Fig. 2 B be according to Fig. 2 A derive by trans_coeff to (level, run) mapping table, former numbers the 0,2,4, the 6th of trans_coeff, even number, the back 9,11,13......55, the 57th, odd number, we find trans_coeff〉〉 1 remain from 0 to 28 continuous integral number, so just can by Fig. 2 B derive shown in Fig. 2 C with trans_coeff 1 be index, so that { level, run} are the two-dimensional array of content.With the two-dimensional array of Fig. 2 C,, write as the one-dimension array of described 58 bytes of Fig. 2 D by its storage order.The one-dimension array of Fig. 2 D constitutes 58 data of second row of 1102 byte code tables shown in Figure 3.
By that analogy, we can by the 3rd, the 4th of the standard appendix A, to the nineteen code table, derive the third line, fourth line of Fig. 3, up to 58 data of every row of the 19 row, so just derived the one-dimension array code table of 19 * 58=1102 byte.
Fig. 3 is the one-dimension array code table of one 1102 byte, the addressing of this array code table divided for three steps finished: the first step, according to the type of luminance block, interframe luminance block, chrominance block in the frame, difference initialization address addr_vld=0,406 (7 * 29 * 2), 812 ((7+7) * 29 * 2); Second the step, according to current table number tablenum (corresponding to VLC0_Intra, VLC1_Intra ... among the VLC4_Chroma 0,1,2,3,4,5,6), the index address addr_vld tablenum 58 that advances; The conversion coefficient trans_coeff that the 3rd step, basis parse, if trans_coeff is less than end mark, then addr_vld advance ((trans_coeff〉〉 1)＜＜1) individual byte, if trans_coeff is greater than end mark, then addr_vld advance (((trans_coeff-1)〉〉 1)＜＜1) individual byte, take out level in this address, run is taken out in next address.
Fig. 4 A is the table according to 219 bytes that are optimized to the mapping of RefAbsLevel by run of the nineteen table of standard appendix A.This table is more than or equal to 59 o'clock at trans_coeff, trans_coeff is decoded into (level uses in the time of run), and the addressing of this table also divided for three steps: the first step, according to the type of luminance block, interframe luminance block, chrominance block in the frame, difference initialization address addr_ref=0,65,150; Second step, according to blocktype, tablenum, max_run, the addr_ref max_run[blocktype+0 that advances]+...+max_run[blocktype+tablenum-1]+tablenum; The 3rd step, according to trans_coeff, the addr_ref run=(trans_coeff-59) that advances〉1.
The end mark of the corresponding nineteen table of Fig. 4 B, first table of first table of first table of luminance block, interframe luminance block, chrominance block does not all have end mark in the frame, we are made as the maximum of short type with them, table look-up logic: trans_coeff less than end mark with simplification, it all is even number, greater than end mark, all be odd number.
The maximum run value of the corresponding nineteen table of Fig. 4 C, the rank of the index Columbus sign indicating number of the corresponding nineteen table of Fig. 4 D, nineteen element correspondence the nineteen table, so just can handle different piece classes by unified logic, reaches the purpose of simplifying logic.
The flow process that Fig. 5 A adopts 1102 byte code tables to decode: the trans_coeff that the index Columbus sign indicating number is parsed compares with corresponding end mark, if less than end mark, according to its addressing rules, take out (level, run), judging whether odd number of level, is then negate; (level run), judges whether even number of level, is then negate otherwise according to its addressing rules, take out.
Fig. 5 B is one 8 * 8 a variable length decoding process, and the input of this process is block type (blocktype) and one section binary code stream (bstr), and output is one group of (level, run) value.This process was made up of following several steps:
The first step, initialization.For the visit of unified code table, the value VLD_INTRA of blocktype, VLD_INTER, VLD_CHROMA are defined as 0,7,14 respectively; Owing to all show during the decoding of the piece of each type, so table number tablenum is initialized as 0 from its first; According to the value of blocktype, initialization addressing address addr_vld=0,406,812, addr_ref=0,65,150, the rank grad=golomb_grad[blocktype+tablenum of index Columbus sign indicating number], the i=0 of current i the conversion coefficient of separating.
Second step, the analytic trnasformation coefficient.trans_coeff＝ce_v(grad，bstr)。According to the resolution rules of index Columbus sign indicating number, be easy to parse conversion coefficient.
In the 3rd step, judge whether conversion coefficient is end mark.If conversion coefficient is an end mark, then the variable length decoding of this 8x8 piece finishes, and this also is the unique correct outlet of this decode procedure.If conversion coefficient is not an end mark, whether judge conversion coefficient less than 59, if go on foot, otherwise carried out for the 5th step less than carrying out the 4th.
The 4th step, search 1102 bytecode Table V LD_table, obtain that (level run), puts into corresponding array, and this is the process of Fig. 5 A just also, changes for the 6th step then over to.
The 5th step, search 219 byte code table ref_abs_level, obtain that (level run), puts into corresponding array, enters for the 6th step then.
The 6th step, the rank grad of modification table number tablenum and index Columbus sign indicating number, i++ jumped to for second step.
Fig. 5 C is the AVS hardware decoders multithreading pipelined architecture that we provide, VLD is the phase I of these three stages, four thread pipeline structures as can be seen, VLD imports binary code stream, export non-null matrix in the IQ/IDCT of next stage, the prediction matrix of IntraPred or MC, the residual matrix addition with behind the IDCT obtains restructuring matrix, through Deblocking, the image that obtains exporting.
The front provides the description to preferred embodiment, so that any technical staff in this area can use or utilize the present invention.To this preferred embodiment, those skilled in the art can make various modifications or conversion on the basis that does not break away from the principle of the invention.Should be appreciated that these modifications or conversion do not break away from protection scope of the present invention.
Claims (7)
1. a simplification code table that is suitable for the AVS Video Decoder variable length decoding of VLSI realization is characterized in that this code table is the one-dimension array VLD_table[1102 of 19 * 29 * 2=1102 byte].
2. the simplification code table that is suitable for the AVS Video Decoder variable length decoding that VLSI realizes as claimed in claim 1 is characterized in that, described one-dimension array is that the nineteen variable length code table from the standard appendix A draws by the following method:
Step 1: one with the standard appendix A is abscissa with level, is ordinate with run, is the rectangular code table of content with trans_coeff, be rewritten as one by trans_coeff to (level, the mapping table that 29 elements are arranged run);
Step 2: the mapping table of step 1 is changed into one with trans_coeff〉〉 1 be index, so that { leve, run} are content, and size is the two-dimensional array of 29 * 2 bytes;
Step 3: with the two-dimensional array in the step 2, be transformed into the one-dimension array of 58 bytes by its storage order, level is placed on even address, and run is placed on the odd address.
Step 4: will according to the sequencing that appendix A provides, be successively placed in the one-dimension array of 19 * a 29 * 2=1102 byte by the nineteen code table of standard appendix A according to the nineteen one-dimension array that above-mentioned steps generates.
3. the simplification code table that is suitable for the AVS Video Decoder variable length decoding of VLSI realization as claimed in claim 2, it is characterized in that, Trans_coeff was more than or equal to 59 o'clock, using one is the table that RefAbsLevel asked in index with run, this table is an one-dimension array that 219 bytes are arranged, and the addressing of this one-dimension array comprises the steps:
Step 1: according to block type (blocktype): luminance block (0), interframe luminance block (7), chrominance block (14) in the frame, initialization address addr_ref=0,65,150;
Step 2: according to current label tablenum, computation index address idx=addr_ref+max_run[blocktype+0]+...+max_run[blocktype+tablenum-1]+tablenum;
Step 3: according to conversion coefficient trans_coeff, calculating idx+=((trans_coeff-59)〉〉 1).
4. the simplification code table that is suitable for the AVS Video Decoder variable length decoding of VLSI realization as claimed in claim 1 is characterized in that the addressing method of described one-dimension array code table comprises the steps:
Step 1: according to block type (blocktype): luminance block (0), interframe luminance block (7), chrominance block (14) in the frame, initialization address addr_vld=0,406,812,7 * 29 * 2=406 respectively, 14 * 29 * 2=812;
Step 2: according to current table number tablenum, computation index address idx=addr_vld+tablenum*58;
Step 3:, continue the computation index address according to the current conversion coefficient trans_coeff that parses; As trans_coeff during less than end mark, index address idx+=((trans_coeff〉〉 1)＜＜1); As trans_coeff during greater than end mark, index address idx+=(((trans_coeff-1)〉〉 1)＜＜1).
5. adopt as code table as described in the claim 4 method that conversion coefficient trans_coeff is decoded into nonzero coefficient, it is characterized in that this coding/decoding method comprises the steps:
Step 1: according to described index address, visit one-dimension array code table is obtained the non-zero quantized coefficients level and the distance of swimming run thereof of residual matrix, level=VLD_table[idx wherein], run=VLD_table[idx+1].
Step 2: judge the parity of trans_coeff, the sign of decision level; Trans_coeff is during less than end mark, if trans_coeff is an odd number, then level gets negative value; Trans_coeff is during greater than end mark, if trans_coeff is an even number, then level gets negative value.
6. coding/decoding method as claimed in claim 5 is characterized in that, described end mark belongs to an one-dimension array that the nineteen element is arranged, the end mark of the nineteen code table of the corresponding standard appendix A of the nineteen element of this one-dimension array; Code table VLC0_Intra, VLC0_Inter, VLC0_Chroma do not have end mark, and establishing its end mark is 32767, keep unified logic determines with other code table.
7. coding/decoding method as claimed in claim 6 is characterized in that, described unified logic determines is meant that the trans_coeff of brightness in the frame, interframe brightness, colourity is decoded into level, has common programmed logic during run.
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| CN108055541A (en) * | 2011-11-07 | 2018-05-18 | 杜比国际公司 | For coding and decoding the method for image, coding and decoding equipment |
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| US11277630B2 (en) | 2011-11-07 | 2022-03-15 | Dolby International Ab | Method of coding and decoding images, coding and decoding device and computer programs corresponding thereto |
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