CN101354642A - Method for speedup executing repetitive instructions and microcontroller thereof - Google Patents
Method for speedup executing repetitive instructions and microcontroller thereof Download PDFInfo
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- CN101354642A CN101354642A CNA2007101300605A CN200710130060A CN101354642A CN 101354642 A CN101354642 A CN 101354642A CN A2007101300605 A CNA2007101300605 A CN A2007101300605A CN 200710130060 A CN200710130060 A CN 200710130060A CN 101354642 A CN101354642 A CN 101354642A
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- 230000003252 repetitive effect Effects 0.000 title claims description 172
- 230000015654 memory Effects 0.000 claims abstract description 81
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- 230000004087 circulation Effects 0.000 claims description 114
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Abstract
The invention relates to a method for accelerating the execution of a repeatable command and a microcontroller thereof. The microcontroller comprises a command internal memory, a command buffer memory unit, a command selection unit, a frequency selection unit and a command processing unit, wherein the command internal memory is used for storing a program and consequently providing a program command, and the program comprises at least one repeatable command loop; the command buffer memory unit is used for temporarily storing the repeatable command loop; the command selection unit is connected with the command internal memory and the command buffer memory unit for fetching the program command from the internal memory or fetching the repeatable command loop from the command buffer memory unit for output; the frequency selection unit is used for switching over between a first frequency and a second frequency, and the second frequency is higher than the first frequency; and the command processing unit is connected with the command buffer memory unit, the command selection unit and the frequency selection unit for copying the repeatable command loop to the command buffer memory unit for temporary storage and fetching the program command or the repeatable command loop through controlling the command selection unit. The microcontroller can process the repeatable command at a high speed and improve the efficiency of command execution.
Description
Technical field
The present invention relates to a kind of microcontroller, but particularly a kind of method of speedup executing repetitive instructions and microcontroller thereof.
Background technology
The execution flow process of general microcontroller is nothing more than acquisition, Instruction decoding, execution and the data access of instruction.Because along with the lifting of microcontroller manufacturing process ability, frequency of operation has not been the bottleneck place of instruction executive circuit, and influence the microcontroller task performance, be often in the acquisition of programmed instruction.
Microcontroller can capture instruction in the instruction storage assembly when carrying out instruction.And instruct the storage assembly to be flash memory (FLASH) and the electronics formula ROM (read-only memory) (EEPROM) of erasing at present in the use the most widely, because aforementioned instruction storage assembly frequency speed is 45ns ~ 70ns at most, such speed is being used in the face of complicated day by day microcontroller, to be difficult to cooperate the operating rate of present microcontroller, and have a strong impact on the task performance that microcontroller is carried out.
For solving the above problems, prior art provides that instruction prestores, branch prediction ... improve the method that microcontroller is carried out efficient of carrying out.Yet existing method is used for the microcontroller of complexity for squeezing out the execution usefulness of microcontroller as far as possible, and its effect that shows is real in limited.
Summary of the invention
Problem to be solved by this invention is, the instruction of repeatability in the program is temporary in the temporary faster assembly of an access speed, in program is carried out, when desire continues to carry out the instruction of repeatability, just will instruct and in being stored in temporary assembly, capture, and carry out frequently with the work of high frequency, improving the speed of handling repetitive instructions, and the task performance carried out of microcontroller.
For reaching above-mentioned purpose, the invention provides a kind of microcontroller of speedup executing repetitive instructions, comprising:
One instruction internal memory is used to store a program, and so that a programmed instruction to be provided, this program comprises at least one repetitive instructions circulation;
One instruction buffer unit is used for temporary this repetitive instructions circulation;
One Instruction Selection unit is connected in this instruction internal memory and this instruction buffer unit, exports to capture this programmed instruction in this instruction internal memory or to capture this repetitive instructions circulation in this instruction buffer unit;
One frequency selected cell is used for the switching between a first frequency and a second frequency, and wherein this second frequency is higher than this first frequency; And
One instruction process unit, connect this Instructions Cache unit, this Instruction Selection unit and this frequency selected cell, this instruction process unit is duplicated this repetitive instructions, and to be circulated to this Instructions Cache unit temporary, and capture this programmed instruction or the circulation of this repetitive instructions by controlling this Instruction Selection unit;
Wherein work as this instruction process unit and will repeat this repetitive instructions circulation time, control this Instruction Selection unit and capture this repetitive instructions in this instruction buffer unit and circulate to carry out, and control this frequency selected cell and provide this second frequency to process this repetitive instructions circulation; And this instruction process unit do not have and repeats this repetitive instructions circulation time, controls this Instruction Selection unit and captures this programmed instruction in this instruction internal memory and carry out, and control this frequency selected cell and provide this first frequency to process this programmed instruction.
The invention also discloses a kind of microcontroller of speedup executing repetitive instructions, comprising:
One instruction internal memory is used to store a program, and so that a programmed instruction to be provided, this program comprises at least one repetitive instructions circulation;
One data-carrier store comprises:
One conventional data storer is used for storage data; And
One compound scratch-pad memory is used for storage data or temporary this repetitive instructions circulation;
One Instruction Selection unit is connected in this instruction internal memory and this instruction buffer unit, exports to capture this programmed instruction in this instruction internal memory or to capture this repetitive instructions circulation in this instruction buffer unit;
One frequency selected cell is used for the switching between a first frequency and a second frequency, and wherein this second frequency is higher than this first frequency; And
One instruction process unit, connect this compound scratch-pad memory, this Instruction Selection unit and this frequency selected cell, duplicating this repetitive instructions, to be circulated to this compound scratch-pad memory temporary, and capture this programmed instruction or this repetitive instructions and circulate and carry out by controlling this Instruction Selection unit;
Wherein work as this instruction process unit and will repeat this repetitive instructions circulation time, control this Instruction Selection unit and capture this repetitive instructions in this compound buffer unit and circulate to carry out, and control this frequency selected cell and provide this second frequency to process this repetitive instructions circulation; And this instruction process unit do not have and repeats this repetitive instructions circulation time, controls this Instruction Selection unit and captures this programmed instruction in this instruction internal memory and carry out, and control this frequency selected cell and provide this first frequency to process this programmed instruction.
The invention also discloses a kind of method of speedup executing repetitive instructions, comprising:
(a) programmed instruction of acquisition one program in an instruction internal memory, wherein this program comprises at least one repetitive instructions circulation;
(b) process this programmed instruction and determine whether the starting position of this repetitive instructions circulation, if this programmed instruction is not the starting position of repetitive instructions circulation, then continue by next programmed instruction that captures this program in this instruction internal memory;
(c) if this instruction for the starting position of this repetitive instructions circulation, then copies this instruction to one instruction buffer unit, wherein the access speed of this instruction buffer unit is faster than this instruction internal memory;
(d) capture next programmed instruction of this program;
(e) process this programmed instruction and determine whether the end position of this repetitive instructions circulation, if the end position that this programmed instruction does not circulate for this repetitive instructions then copies this programmed instruction and returns step (d);
(f), then judge whether to continue to carry out this repetitive instructions circulation if this programmed instruction is the end position of repeated instruction cycle;
(g) carry out this repetitive instructions circulation if be judged as continuation, duplicate this programmed instruction to this Instructions Cache unit, and frequency of operation is switched to a second frequency by a first frequency, wherein this second frequency is higher than this first frequency; And
(h) capture this repetitive instructions circulation in this instruction buffer unit, and carry out this repetitive instructions circulation with this second frequency.
Microcontroller of the present invention can the high speed processing repetitive instructions, promotes the efficient that instruction is carried out.
Description of drawings
Fig. 1 is the functional block diagram of microcontroller first preferred embodiment of the present invention;
Fig. 2 is a programmed instruction structural representation of the present invention;
Fig. 3 is the functional block diagram of microcontroller second preferred embodiment of the present invention; And
Fig. 4 is the method flow diagram of speedup executing repetitive instructions of the present invention.
Wherein, Reference numeral:
Instructions Cache unit 14 frequency selected cells 15
Data-carrier store 24 data selection unit 26
Embodiment
See also shown in Figure 1, functional block diagram for microcontroller first preferred embodiment of the present invention, microcontroller 10 can be used for speedup executing repetitive instructions, and it comprises an instruction process unit 11, an Instruction Selection unit 12, instruction internal memory 13, an Instructions Cache unit 14 and a frequency selected cell 15.Its medium frequency selected cell 15 is subjected to instruction process unit 11 controls, and so that the frequency of operation of a first frequency and second frequency to be provided, wherein second frequency is higher than first frequency.13 of internal memories of instruction are the instructions that is used to store a program, handle for instruction process unit 11; Wherein this program has comprised at least one repetitive instructions circulation, some subroutine instructions that often repeat in the program just.When instruction process unit 11 is processed the repetitive instructions circulation time, the instruction in the repetitive instructions circulation is copied to instruction buffer unit 14 keep in.Instruction Selection unit 12 link order internal memories 13 and instruction buffer unit 14, and be subjected to the control of instruction process unit 11, select capturing program instruction in instruction internal memory 13, process for instruction process unit 11; Or the circulation of acquisition repetitive instructions is processed for instruction process unit 11 in instruction buffer unit 14.The access speed of aforementioned Instructions Cache unit 14 is faster than instruction internal memory 13.
And instruction process unit 11 is according to the special instruction in the program, to judge repetitive instructions round-robin position end to end.Please then consult shown in Figure 2ly, be programmed instruction structural representation of the present invention, the fixing subprogram of algorithm is arranged in the original program; Its subprogram content, then writes operational data again and deposit internal memory to return, and ending is the skip instruction of the formula of having ready conditions, and sets up the beginning with regard to this subprogram of rebound, is false just to continue down to carry out this original program through the algorithm computing for reading operational data.
Yet the present invention is one repetitive instructions loop start instruction of the beginning of subroutine definition earlier, and this be the starting position of repeated instruction cycle with notification instruction processing unit 11, and necessary opening entry order code is to Instructions Cache unit 14; Ending in subroutine defines one repetitive instructions circulation terminal point instruction again, and this repetitive instructions circulation terminal point instruction comprises repetitive instructions cycle criterion instruction, wherein repetitive instructions cycle criterion instruction has a skip instruction condition, it can define according to the formula of the having ready conditions skip instruction of original subroutine ending, and but this be the end position of repeated instruction cycle by repetitive instructions circulation terminal point instruction notification instruction processing unit 11, and judges whether that continuing to carry out repetitive instructions circulates; If satisfy the skip instruction condition in the repetitive instructions cycle criterion instruction, instruction process unit 11 is just handled the repetitive instructions circulation that is stored in the Instructions Cache unit 14 with second frequency; If the skip instruction condition in the discontented lumping weight renaturation instruction cycle decision instruction, then instruction process unit 11 just steering order selected cell 12 in following one programmed instruction of instruction internal memory 13 acquisitions, and with following one programmed instruction of first frequency processing.
Then see also shown in Figure 3, functional block diagram for microcontroller second preferred embodiment of the present invention, microcontroller 20 can be used for speedup executing repetitive instructions, and it comprises an instruction process unit 11, an Instruction Selection unit 12, an instruction internal memory 13, a frequency selected cell 15, a data-carrier store 24 and a data selection unit 26.Its medium frequency selected cell 15 is subjected to instruction process unit 11 control, and so that the frequency of operation of a first frequency and a second frequency to be provided, and second frequency is higher than first frequency.13 of internal memories of instruction are the instructions that is used to store a program, handle for instruction process unit 11; Wherein this program has comprised at least one repetitive instructions circulation, some subroutine instructions that often repeat in the program just.
Data-carrier store 24 comprises a conventional data storer 241 and a compound scratch-pad memory 242, and its conventional data storer 241 is used for storage data, does the access of data for instruction process unit 11; And compound scratch-pad memory 242 is handled for instruction process unit 11 except being used for storage data and doing the access of data for instruction process unit 11, also can be used for temporary repetitive instructions round-robin instruction; Wherein when compound scratch-pad memory 242 is used for keeping in the instruction of repetitive instructions round-robin, just do not provide instruction process unit 11 to carry out the action of data accesses.The access speed of data-carrier store 24 is faster than instruction internal memory 13.
And instruction process unit 11 is judged and is same as the related description of above-mentioned Fig. 2 in repetitive instructions round-robin position and judge whether the principle that continues to carry out end to end, repeats no more.
Hold above-mentioned principle of work, then see also shown in Figure 4ly, be the method flow diagram of speedup executing repetitive instructions of the present invention.At first instruction process unit 11 captures a programmed instruction (such as Fig. 4 step S401) in instruction internal memory 13, then just with this programmed instruction decoding and judge whether it is the starting position (such as Fig. 4 step S403) of repetitive instructions circulation, if this programmed instruction is not the starting position of repetitive instructions circulation, then return step S401; If this programmed instruction is the starting position of repetitive instructions circulation, then copy this instruction to instruction buffer unit 14 (such as Fig. 4 step S405); Instruction process unit 11 is again from instruction internal memory 13 acquisition lower one programmed instruction (such as Fig. 4 step S407) then; Then instruction process unit 11 is just deciphered the programmed instruction that captures among the step S407 and is judged whether it is the end position (such as Fig. 4 step S409) of repetitive instructions circulation; If this programmed instruction is not the end position of repetitive instructions circulation, then return step S405; If this programmed instruction is the end position of repetitive instructions circulation, just then judge whether to continue to carry out repetitive instructions circulation (such as Fig. 4 step S411) according to this programmed instruction; Carry out the repetitive instructions circulation if be judged as end according to this programmed instruction, just return step S401; Carry out the repetitive instructions circulation if be judged as continuation according to this programmed instruction, just instruction process unit 11 copies this programmed instruction to instruction buffer unit 14 (such as Fig. 4 step S413); Then instruction process unit 11 just controlled frequency selected cell 15 operating frequency is switched to high frequency (such as Fig. 4 step S415), (such as Fig. 4 step S417) carried out in the instructions of control instruction selected cell 12 14 acquisition repetitive instructions circulations in the instruction buffer unit then.
When carrying out the instruction of repetitive instructions circulation, instruction process unit 11 is with the Instruction decoding of repetitive instructions circulation and judge whether to finish repetitive instructions circulation (such as Fig. 4 step S419); If judged result is carried out the repetitive instructions circulation for continuing, just return step S417; If judged result is carried out the repetitive instructions circulation for finishing, instruction process unit 11 controlled frequency selected cells 15 switch back original operating frequency (such as Fig. 4 step S421) with operating frequency, just then return step S401.
And the Instructions Cache unit 14 described in the preceding method flow process also can be the compound scratch-pad memory 242 in the data-carrier store 24, shown in Fig. 3 microcontroller second preferred embodiment of the present invention.
In sum, microcontroller one program all captures instruction by the instruction internal memory when just beginning to carry out, and the access speed of instruction internal memory is slower, so instruction is in the lower execution of working at a slow speed.When carrying out the repetitive instructions circulation time, just with the repetitive instructions recycling storage in access speed faster in instruction buffer unit (or compound scratch-pad memory), and continuing to carry out the repetitive instructions circulation time, be convenient to the instruction of acquisition repetitive instructions circulation in the instruction buffer unit (or compound scratch-pad memory), and operating frequency is switched to high frequency process the repetitive instructions circulation; This mode can effectively be accelerated the speed that microcontroller is carried out repetitive instructions.
Above-mentioned only sharp for the present invention's better enforcement wherein, be not to limit practical range of the present invention; All equivalences of doing according to claims of the present invention change and revise, and are all claim of the present invention and contain.
Claims (11)
1, a kind of microcontroller of speedup executing repetitive instructions is characterized in that, comprising:
One instruction internal memory is used to store a program, and so that a programmed instruction to be provided, this program comprises at least one repetitive instructions circulation;
One instruction buffer unit is used for temporary this repetitive instructions circulation;
One Instruction Selection unit is connected in this instruction internal memory and this instruction buffer unit, exports to capture this programmed instruction in this instruction internal memory or to capture this repetitive instructions circulation in this instruction buffer unit;
One frequency selected cell is used for the switching between a first frequency and a second frequency, and wherein this second frequency is higher than this first frequency; And
One instruction process unit, connect this Instructions Cache unit, this Instruction Selection unit and this frequency selected cell, this instruction process unit is duplicated this repetitive instructions, and to be circulated to this Instructions Cache unit temporary, and capture this programmed instruction or the circulation of this repetitive instructions by controlling this Instruction Selection unit;
Wherein work as this instruction process unit and will repeat this repetitive instructions circulation time, control this Instruction Selection unit and capture this repetitive instructions in this instruction buffer unit and circulate to carry out, and control this frequency selected cell and provide this second frequency to process this repetitive instructions circulation; And this instruction process unit do not have and repeats this repetitive instructions circulation time, controls this Instruction Selection unit and captures this programmed instruction in this instruction internal memory and carry out, and control this frequency selected cell and provide this first frequency to process this programmed instruction.
2, the microcontroller of speedup executing repetitive instructions as claimed in claim 1 is characterized in that, this repetitive instructions circulation comprises:
The instruction of one repetitive instructions loop start is located at this repetitive instructions circulation beginning place, for this repetitive instructions round-robin starting position of this instruction process unit identification; And
One repetitive instructions circulation terminal point instruction, comprise a repetitive instructions cycle criterion instruction, this repetitive instructions circulation end is located in this repetitive instructions circulation terminal point instruction, judge whether to continue to carry out this repetitive instructions circulation for this instruction process unit, and the end position of this repetitive instructions circulation of identification;
By making this instruction process unit when processing this program, can recognize this repetitive instructions circulation, to be stored in this instruction buffer unit.
3, the microcontroller of speedup executing repetitive instructions as claimed in claim 1 is characterized in that, the access speed of this Instructions Cache unit is instructed internal memory faster than this.
4, a kind of microcontroller of speedup executing repetitive instructions is characterized in that, comprising:
One instruction internal memory is used to store a program, and so that a programmed instruction to be provided, this program comprises at least one repetitive instructions circulation;
One data-carrier store comprises:
One conventional data storer is used for storage data; And
One compound scratch-pad memory is used for storage data or temporary this repetitive instructions circulation;
One Instruction Selection unit is connected in this instruction internal memory and this instruction buffer unit, exports to capture this programmed instruction in this instruction internal memory or to capture this repetitive instructions circulation in this instruction buffer unit;
One frequency selected cell is used for the switching between a first frequency and a second frequency, and wherein this second frequency is higher than this first frequency; And
One instruction process unit, connect this compound scratch-pad memory, this Instruction Selection unit and this frequency selected cell, duplicating this repetitive instructions, to be circulated to this compound scratch-pad memory temporary, and capture this programmed instruction or this repetitive instructions and circulate and carry out by controlling this Instruction Selection unit;
Wherein work as this instruction process unit and will repeat this repetitive instructions circulation time, control this Instruction Selection unit and capture this repetitive instructions in this compound buffer unit and circulate to carry out, and control this frequency selected cell and provide this second frequency to process this repetitive instructions circulation; And this instruction process unit do not have and repeats this repetitive instructions circulation time, controls this Instruction Selection unit and captures this programmed instruction in this instruction internal memory and carry out, and control this frequency selected cell and provide this first frequency to process this programmed instruction.
5, the microcontroller of speedup executing repetitive instructions as claimed in claim 4, it is characterized in that, also comprise a data selection unit, when this compound scratch-pad memory is used for storage data, this instruction process unit is controlled this data selection unit acquisition data in this conventional data storer or this compound scratch-pad memory, to carry out the data access operation.
6, the microcontroller of speedup executing repetitive instructions as claimed in claim 4 is characterized in that, this repetitive instructions circulation comprises:
The instruction of one repetitive instructions loop start is located at this repetitive instructions circulation beginning place, for this repetitive instructions round-robin starting position of this instruction process unit identification; And
One repetitive instructions circulation terminal point instruction, comprise a repetitive instructions cycle criterion instruction, this repetitive instructions circulation end is located in this repetitive instructions circulation terminal point instruction, judge whether to continue to carry out this repetitive instructions circulation for this instruction process unit, and the end position of this repetitive instructions circulation of identification;
By making this instruction process unit when processing this program, can recognize this repetitive instructions circulation, to be stored in this instruction buffer unit.
7, the microcontroller of speedup executing repetitive instructions as claimed in claim 4 is characterized in that, the access speed of this data-carrier store is instructed internal memory faster than this.
8, a kind of method of speedup executing repetitive instructions is characterized in that, step comprises:
(a) programmed instruction of acquisition one program in an instruction internal memory, wherein this program comprises at least one repetitive instructions circulation;
(b) process this programmed instruction and determine whether the starting position of this repetitive instructions circulation, if this programmed instruction is not the starting position of repetitive instructions circulation, then continue by next programmed instruction that captures this program in this instruction internal memory;
(c) if this instruction for the starting position of this repetitive instructions circulation, then copies this instruction to one instruction buffer unit, wherein the access speed of this instruction buffer unit is faster than this instruction internal memory;
(d) capture next programmed instruction of this program;
(e) process this programmed instruction and determine whether the end position of this repetitive instructions circulation, if the end position that this programmed instruction does not circulate for this repetitive instructions then copies this programmed instruction and returns step (d);
(f), then judge whether to continue to carry out this repetitive instructions circulation if this programmed instruction is the end position of repeated instruction cycle;
(g) carry out this repetitive instructions circulation if be judged as continuation, duplicate this programmed instruction to this Instructions Cache unit, and frequency of operation is switched to a second frequency by a first frequency, wherein this second frequency is higher than this first frequency; And
(h) capture this repetitive instructions circulation in this instruction buffer unit, and carry out this repetitive instructions circulation with this second frequency.
9, the method for speedup executing repetitive instructions as claimed in claim 8 is characterized in that, also comprises a step (i), judges whether to finish to carry out this repetitive instructions circulation; If yes, then operating frequency is switched this first frequency and return next programmed instruction that this instruction internal memory captures this program; If NO, then continue at this instruction buffer unit and capture this repetitive instructions circulation, carry out this repetitive instructions circulation with this second frequency.
10, the method for speedup executing repetitive instructions as claimed in claim 8 is characterized in that, step (f) also comprises, if do not continue to carry out this repetitive instructions circulation, then returns the next instruction that this instruction internal memory captures this programmed instruction.
11, the method for speedup executing repetitive instructions as claimed in claim 8, it is characterized in that, this repetitive instructions circulation comprises repetitive instructions loop start instruction, is located at this repetitive instructions circulation beginning place, for the judgement of this repetitive instructions round-robin starting position; And repetitive instructions circulation terminal point instruction, be located at this repetitive instructions loop ends place, and comprise repetitive instructions cycle criterion instruction, judge, and the judgement of this repetitive instructions round-robin end position for continuing or finish to carry out this repetitive instructions round-robin.
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| CN2007101300605A CN101354642B (en) | 2007-07-25 | 2007-07-25 | Method for speeding up executing repetitive instructions and microcontroller thereof |
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| CN2007101300605A CN101354642B (en) | 2007-07-25 | 2007-07-25 | Method for speeding up executing repetitive instructions and microcontroller thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101986263A (en) * | 2010-11-25 | 2011-03-16 | 中国人民解放军国防科学技术大学 | Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution |
| CN111782272A (en) * | 2020-07-16 | 2020-10-16 | 中国人民解放军国防科技大学 | Execution control method and device for repeated program in VLIW processor |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6003128A (en) * | 1997-05-01 | 1999-12-14 | Advanced Micro Devices, Inc. | Number of pipeline stages and loop length related counter differential based end-loop prediction |
| JP3778774B2 (en) * | 2000-05-12 | 2006-05-24 | 松下電器産業株式会社 | Data processing device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101986263A (en) * | 2010-11-25 | 2011-03-16 | 中国人民解放军国防科学技术大学 | Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution |
| CN101986263B (en) * | 2010-11-25 | 2012-08-22 | 中国人民解放军国防科学技术大学 | Method and microprocessor for supporting single instruction stream and multi-instruction stream dynamic switching execution |
| CN111782272A (en) * | 2020-07-16 | 2020-10-16 | 中国人民解放军国防科技大学 | Execution control method and device for repeated program in VLIW processor |
| CN111782272B (en) * | 2020-07-16 | 2022-08-19 | 中国人民解放军国防科技大学 | Execution control method and device for repeated program in VLIW processor |
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