CN101334709A - Method and device for high-speed storage and reading data - Google Patents
Method and device for high-speed storage and reading data Download PDFInfo
- Publication number
- CN101334709A CN101334709A CNA2008101173549A CN200810117354A CN101334709A CN 101334709 A CN101334709 A CN 101334709A CN A2008101173549 A CNA2008101173549 A CN A2008101173549A CN 200810117354 A CN200810117354 A CN 200810117354A CN 101334709 A CN101334709 A CN 101334709A
- Authority
- CN
- China
- Prior art keywords
- sdram
- data
- read
- sdram controller
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The implementation mode of the invention provides a method and a device for storing or reading data at a high speed, belonging to the computer field and the storage field; the method comprises the following steps: a read/write command is sent to an SDRAM controller by a PCI bus to read/store the data, and the SDRAM controller controls a synchronous and dynamic random access memory to store/read the data; the specific implementation mode of the invention also provides a method and a device for data transmission, and the device for storing/reading data at a high speed; the methods and the devices can reduce the time of reading/storing the data of a computer system, thus increasing the speed of storing/reading data and improving the performance of the computer system.
Description
Technical field
The present invention relates to computing machine and field of storage, relate in particular to the method and the device of a kind of high speed storing or reading of data.
Background technology
Along with development of science and technology, computer system we daily life and work in playing the part of more and more important role, and the quality of computer system performance will directly affect our live and work.Computer system by processing subsystem and input and output (Input Output, IO) subsystem is formed, its performance is by the performance decision of these two subsystems.
In realizing process of the present invention, the inventor finds prior art, and there are the following problems:
The storage system of IO subsystem of the prior art is to send read/write command by the IO subsystem to disk to carry out reading or storing of data, so this storage system with disk as storage medium, principle of work according to disk can be known, disk is by after magnetic head is moved to assigned address, just with data storage or read, and the data that need to read in a period of time are the data of noncontinuity, magnetic head just needs frequent shift position so, this will expend a large amount of time, thereby influence the reading and writing data speed of computer system, cause performance of computer systems to reduce.
Summary of the invention
Embodiment of the present invention provides a kind of high speed storing or method that reads and device, and described method and apparatus can high speed storing or reading of data, and then improves the reading and writing data/storage speed of computer system, improves performance of computer systems.
The method that the specific embodiment of the present invention provides a kind of high speed storing or reads, described method comprises:
Send read/write command by pci bus to the synchronous DRAM sdram controller and read/store data, described sdram controller is controlled SDRAM and is carried out data storage/read.
The device that the specific embodiment of the present invention also provides a kind of high speed storing or reads, described device comprises:
Sdram controller is used to control synchronous DRAM SDRAM and carries out data storage or read;
Control module is used for sending read/write command by pci bus to described sdram controller and reads or store data.
The specific embodiment of the invention also provides a kind of data transmission method, comprising:
Detect the power supply state of primary power;
When detecting primary power when unusual, start standby power supply and power;
Send order to sdram controller, the indication sdram controller reads the data among the SDRAM;
With the data storage that reads to the backup diskette of described SDRAM.
The specific embodiment of the invention also provides a kind of data transmission device, comprising:
Sdram controller is used to control synchronous DRAM SDRAM and carries out data storage or read;
Detecting unit is used to detect the power supply state of primary power;
Start unit is used for starting standby power supply when unusual detecting primary power;
Control module is used for sending order to sdram controller, and the indication sdram controller reads the data among the SDRAM, and with the data storage that reads to the backup diskette of described SDRAM.
By the above-mentioned technical scheme that provides as can be seen, the technical scheme of the embodiment of the invention reads or stores data by sending read/write command to sdram controller, the data read or the storage of this sdram controller control synchronous DRAM, thereby storage medium is replaced with synchronous DRAM, improve the speed of storage or reading of data, and then improved the reading and writing data speed of computer system, improved performance of computer systems.
Description of drawings
The process flow diagram of the method for a kind of high speed storing that Fig. 1 provides for the embodiment of the invention 1.
The process flow diagram of the method that a kind of high speed that Fig. 2 provides for the embodiment of the invention 2 reads.
The process flow diagram of the method for the data transmission under a kind of abnormal conditions that Fig. 3 provides for the embodiment of the invention 3.
The process flow diagram of a kind of data transmission method that Fig. 4 provides for the embodiment of the invention 4
The structural drawing of a kind of high speed storing that Fig. 5 provides for the specific embodiment of the invention or the device of reading of data.
The structural drawing of a kind of data transmission device that Fig. 6 provides for the specific embodiment of the invention.
Embodiment
Embodiment of the present invention provides a kind of method of high speed storing, this method replaces to synchronous DRAM (Synchronous Dynamic Random Access Memory with the disk in the computer system, SDRAM), and use SDRAM to store data, the technical scheme of its specific implementation is, by communication interface able to programme (Programmable Communications Interface, PCI) bus sends read/write command to sdram controller and reads or store data, and sdram controller control SDRAM carries out data storage or reads.Because the specific embodiment of the present invention reads or stores data by sending read/write command to sdram controller, and control SDRAM by sdram controller and carry out data storage or read, thereby the Medium Replacement of storage has been become SDRAM, principle of work according to SDRAM can be known, the data read or the storage time that storage medium are replaced with the computer system behind the SDRAM will significantly reduce, thereby improved the speed of storage or reading of data, improved performance of computer systems.
For better describing the described method of embodiment of the present invention, existing 1 pair of the specific embodiment of the present invention in conjunction with the accompanying drawings describes:
Embodiment 1: present embodiment is with the storage data instance, the method of a kind of high speed storing data that the specific embodiment of the present invention provides, the technology scene of present embodiment is, computer system in the present embodiment comprises, sdram controller, SDRAM, uninterrupted power source, backup diskette, I/O processor (IOProcessor, IOP), for the convenience of narrating, present embodiment is selected the 81348IOP of Intel company for use, and the block architecture diagram of this model IOP that the structure of 81348IOP can be announced referring to Intel company also can be selected other IOP certainly in actual conditions.In the computer system in the present embodiment annexation of each parts can for, the internal memory of IOP (Memory) controller is provided with the internal memory of 256M; The peripheral bus of IOP (Peripheral Bus Interface, PBI) bus is provided with a slice Flash and a slice CPLD (Complex Programmable Logic Device, CPLD), wherein Flash is used to deposit Basic Input or Output System (BIOS) (Basic Input Output System, BIOS) and application program, CPLD is used for loading to sdram controller, at present embodiment, sdram controller can be veneer power-on and power-off control and field programmable gate array (Field Programmable Gate Array, FPGA), certainly in actual conditions, this sdram controller also can be other sdram controller, as long as can be controlled SDRAM and carry out data read/storage.Two FPGA are set on the PCI of IOP, in actual conditions, also FPGA can be connected on the interface of other buses of IOP, as the PBI interface, every FPGA goes out two sdram controllers, and each sdram controller is hung 16 SDRAM.(Peripheral Component Interconnect Express PCIE) is connected with module outside the system data is provided for IOP high-speed peripheral parts interconnected.Embodiment 1 described method comprises following operation as shown in Figure 1:
The data that module will be stored outside step 11, the system send to IOP;
The data that step 12, IOP will store by pci bus send to FPGA, and send after the destination address of write order being modified as the address of FPGA;
After step 13, FPGA receive this write order, control SDRAM will need the data storage of storing.
Concrete grammar in the performing step 13 can for, after FPGA received write order, FPGA carries out direct memory access to the assigned address of SDRAM, and (Direct Memory Access, DMA) operation write data.
The embodiment of the invention 1 is by sending write order to FPGA, control SDRAM stored data after FPGA received write order, thereby the Medium Replacement that will store data has become SDRAM, principle of work according to SDRAM can be known, become the time data memory of the computer system behind the SDRAM to significantly reduce the Medium Replacement of storage data, thereby improved the speed of storage data, improved performance of computer systems.
Embodiment 2: present embodiment is with the example that is read as of data, the method that present embodiment 2 provides a kind of high speed reads to fetch data, the technology scene of present embodiment is, identical in computer system that present embodiment uses and the computer system among the connected mode of each parts and the embodiment 1, suppose that IOP need read the data of SDRAM storage, the method that this enforcement 2 provides comprises as shown in Figure 2:
Step 21, IOP send after the destination address of read command being modified as the address of FPGA;
After step 22, FPGA receive this read command, control SDRAM reading of data;
Realize this step concrete grammar can for, after FPGA received read command, FPGA carried out the dma operation reading of data to the assigned address of SDRAM
Step 23, FPGA send to IOP with these data by pci bus.
The embodiment of the invention 2 is by sending read command to FPGA, FPGA controls the SDRAM reading of data after receiving this read command, thereby the Medium Replacement of reading of data has been become SDRAM, principle of work according to SDRAM can be known, become the data read time of the computer system behind the SDRAM to significantly reduce the Medium Replacement of reading of data, thereby improved the speed of reading of data, improved performance of computer systems.
Embodiment 3, present embodiment provides the method for the data transmission under a kind of abnormal conditions, the technology scene of present embodiment is, computer system in the present embodiment comprises, sdram controller, SDRAM, uninterrupted power source, backup diskette, I/O processor (IO Processor, IOP), wherein the model of IOP is identical with embodiment 1, sdram controller, SDRAM with and all identical with the annexation of IOP with embodiment 1, system for serial small computer interface (Small Computer System Interface at IOP, SCSI) interface (Serial Attached SCSI, SAS) Link is provided with backup diskette, and the UART interface of IOP connects uninterrupted power source.The abnormal conditions of supposing present embodiment can restore electricity behind the outage certain hour for power supply, and the method that present embodiment provides comprises as shown in Figure 3:
Whether the power supply state in step 31, the dynamo-electric source of uninterrupted power source detection computations is unusual, power under the normal situation detecting power supply, continue to detect the power supply state of power supply, under the situation that detects the primary power abnormal electrical power supply, start standby power supply and power, and carry out step 32～38;
Step 32, IOP send read command to FPGA;
After step 33, FPGA receive read command, control the SDRAM reading of data, and the data that read are sent to IOP by pci bus;
After step 34, IOP will receive these data, to the backup diskette transmission write order of this SDRAM;
Realize this step method can for, the destination address of write order is modified as the address of backup diskette;
After step 35, backup diskette receive write order, back up this data.
Need to prove, backup diskette in step 34,35 is in the present embodiment for being arranged on the backup diskette in the computer system, and in actual conditions, also can be arranged on the disk of far-end, simultaneously, also can be the shared far-end disk of a plurality of computer systems, this is provided with the cost that is provided with that can save backup diskette greatly.
Whether step 36, detection power supply restore electricity, and are detecting under the situation about restoring electricity, carry out step 37～and 38, otherwise end operation;
Step 37, IOP send read command to the backup diskette of this SDRAM, after backup diskette receives read command, read the Backup Data of storage, and the Backup Data that reads is sent to IOP;
Step 38, IOP send to FPGA with Backup Data by pci bus, and send write order to FPGA, after FPGA receives write order, and control SDRAM store backup data.
Present embodiment 3 is because under the situation of power supply abnormal electrical power supply, data are backuped in the backup diskette, when the power supply service restoration, again Backup Data is returned in the SDRAM from backup diskette, thus the loss of data of having avoided the data of Volatile media SDRAM to cause owing to abnormal electrical power supply.
Need to prove, method among the embodiment 1,2,3 can be according to the actual conditions combination in any, during as needs reading of data and storage data, then need the method for embodiment 1,2 is combined, as the needs reading of data, when storing data and when cutting off the power supply, preserving data, then need embodiment 1,2,3 is combined, when preserving data during as needs reading of data and outage, then need embodiment 2,3 is combined, when preserving data during as needs storage data and outage, then need embodiment 1,3 is combined.
The method that embodiment of the present invention provides reads or stores data by sending read/write command to sdram controller, and control SDRAM by sdram controller and carry out data storage or read, thereby the Medium Replacement of storage has been become SDRAM, make data read or storage time that storage medium is replaced with the computer system behind the SDRAM to significantly reduce, thereby improved the speed of storage or reading of data, improved performance of computer systems.
Embodiment 4, present embodiment 4 also provide a kind of data transmission method, and the technology scene of present embodiment is identical with the technology scene of embodiment 1, as shown in Figure 4, comprising:
The power supply state of step 41, detection primary power; Detecting primary power when unusual, carry out following step, otherwise detect the power supply state of primary power;
Step 42, startup standby power supply are powered;
Standby power supply in this step can be electric supply installations such as dry cell, UPS, and the specific embodiment of the invention is not limited to the concrete form of standby power supply.
Step 43, send order to sdram controller, the indication sdram controller reads the data among the SDRAM;
Sending to sdram controller in this step ordered and can be sent order by pci bus to sdram controller by IOP, and this order can be specially read command.
Step 44, with the data storage that reads to the backup diskette of described SDRAM.
Optionally, said method can also comprise the steps:
Step 45, when detecting primary power and restore electricity, reading of data from this backup diskette;
The method of finishing this step can be specially, and IOP sends the data that backup diskette is read in read command to backup diskette.
Step 46, send order to sdram controller, the indication sdram controller with the data storage that reads in SDRAM.
Finish this step method can for, IOP sends write order by pci bus to sdram controller, the indication sdram controller with the data storage that reads in SDRAM.
The method of the data transmission that present embodiment 4 provides, under the situation that detects the primary power abnormal electrical power supply, start the standby power supply power supply, and the data that will be stored in SDRAM backup in the backup diskette, thereby avoided the SDRAM loss of data that occurs owing to the primary power abnormal electrical power supply.
Embodiments of the present invention also provide the device of a kind of high speed storing or reading of data, and this device can be provided with to be liked also can be independent of the computer system individualism in the computer system.
The described system of invention embodiment as shown in Figure 5, comprising: sdram controller 51 is used to control synchronous DRAM SDRAM and carries out data storage or read; Control module 52 is used for sending read/write command by pci bus to described sdram controller and reads or store data.
Optionally, above-mentioned control module 52 can comprise: modified module 521 is used for the destination address of read/write command is modified as the address of described sdram controller; Sending module 522 is used for amended read/write command is sent.
Optionally, said apparatus can also comprise: detecting unit 53 is used to detect the electric power thus supplied of power supply; Uninterrupted power source 54 is used for detecting under the situation of power cut-off at described detecting unit 53, gives described device power supply; Backup diskette 55 is used for detecting under the situation of primary power source de-energizes at described detecting unit 53, backs up the data of described SDRAM storage by the order that receives control module 52 transmissions.
Optionally, said apparatus also comprises: passback unit 56, be used for detecting under the situation of power up power supply at described detecting unit, and described backup diskette backed up data is returned to SDRAM.
The device that the specific embodiment of the invention provides, send read/write command by control module 52 to sdram controller and read or store data, and control SDRAM by sdram controller 51 and carry out data storage or read, thereby the Medium Replacement of storage has been become SDRAM, make data read or storage time that storage medium is replaced with the computer system behind the SDRAM to significantly reduce, thereby improved the speed of storage or reading of data, improved performance of computer systems.
The specific embodiment of the invention also provides a kind of data transmission device, and this installs as shown in Figure 6, comprising:
Optionally, detect primary power at detecting unit 62 and recover just often, control module 64 also is used for from this backup diskette reading of data, and sends order to sdram controller, the indication sdram controller with the data storage that reads in SDRAM.
The data transmission device that the specific embodiment of the invention provides is by data read or the storage of sdram controller 61 control SDRAM, and when detecting unit 62 detects the primary power abnormal electrical power supply, start standby power supply by start unit 63, and backup in the backup diskette of SDRAM, thereby avoided the SDRAM loss of data that occurs owing to the primary power abnormal electrical power supply by the data of control module 64 with SDRAM storage.
It will be appreciated by those skilled in the art that accompanying drawing is the synoptic diagram of a preferred embodiment, module in the accompanying drawing or flow process might not be that enforcement the present invention is necessary.
It will be appreciated by those skilled in the art that the unit in the device among the embodiment can be distributed in the device of embodiment according to the embodiment description, also can carry out respective change and be arranged in the one or more devices that are different from present embodiment.A unit can be merged in the unit of the foregoing description, also can further split into a plurality of modules.
The invention described above embodiment sequence number is not represented the quality of embodiment just to description.
The scheme of the content record of claim also is the protection domain of the embodiment of the invention.
One of ordinary skill in the art will appreciate that all or part of processing in the foregoing description method is to instruct relevant hardware to finish by program, described program can be stored in a kind of computer-readable recording medium.
In sum, the technical scheme that the specific embodiment of the invention provides has the data read/storage time that reduces computer system, thereby has improved the speed of storage or reading of data, has improved performance of computer systems.
The above; only be the preferable embodiment of the present invention; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the embodiment of the invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.
Claims (13)
1, the method for a kind of high speed storing or reading of data is characterized in that, described method comprises:
Send read/write command by communication interface pci bus able to programme to the synchronous DRAM sdram controller and read/store data, described sdram controller is controlled SDRAM and is carried out data storage/read.
2, method according to claim 1 is characterized in that, describedly send read/write command to sdram controller and store/reading of data is specially:
Send after the destination address of read/write command being modified as the address of described sdram controller.
3, method according to claim 1 is characterized in that, described method also comprises:
Under the situation that detects primary power source de-energizes, by the uninterrupted power source power supply, and the data that described SDRAM is stored backup in the backup diskette.
4, method according to claim 3 is characterized in that, described method also comprises:
When detecting under the situation that primary power restores electricity, the data in the described backup diskette are returned to described SDRAM.
5, the device of a kind of high speed storing or reading of data is characterized in that, described device comprises:
Sdram controller is used to control synchronous DRAM SDRAM and carries out data storage or read;
Control module is used for sending read/write command by communication interface pci bus able to programme to described sdram controller and reads or store data.
6, device according to claim 5 is characterized in that, described control module comprises:
Modified module is used for the destination address of read/write command is modified as the address of described sdram controller;
Sending module is used for amended read/write command is sent.
7, device according to claim 5 is characterized in that, described device also comprises:
Detecting unit is used to detect the electric power thus supplied of primary power;
Uninterrupted power source is used for detecting under the situation of power cut-off at described detecting unit, gives described device power supply;
Backup diskette is used for detecting under the situation of primary power source de-energizes at described detecting unit, backs up the data of described SDRAM storage by the order that receives described control module transmission.
8, device according to claim 7 is characterized in that, described device also comprises:
The passback unit is used for detecting under the situation of power up power supply at described detecting unit, and described backup diskette backed up data is returned to SDRAM.
9, a kind of data transmission method is characterized in that, comprising:
Detect the power supply state of primary power;
When detecting primary power when unusual, start standby power supply and power;
Send order to sdram controller, the indication sdram controller reads the data among the SDRAM;
With the data storage that reads to the backup diskette of described SDRAM.
10, method according to claim 9 is characterized in that, described step to sdram controller transmission order comprises: send read command by communication interface pci bus able to programme to sdram controller.
11, method according to claim 9 is characterized in that, also comprises:
Recover just often reading of data from described backup diskette when detecting primary power;
Send order to sdram controller, the indication sdram controller with the data storage that reads in SDRAM.
12, a kind of data transmission device is characterized in that, comprising:
Sdram controller is used to control synchronous DRAM SDRAM and carries out data storage or read;
Detecting unit is used to detect the power supply state of primary power;
Start unit is used for starting standby power supply when unusual detecting primary power;
Control module is used for sending order to sdram controller, and the indication sdram controller reads the data among the SDRAM, and with the data storage that reads to the backup diskette of described SDRAM.
13, device according to claim 12, it is characterized in that detecting the primary power recovery just often, described control module also is used for from described backup diskette reading of data, and send order to sdram controller, the indication sdram controller with the data storage that reads in SDRAM.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101173549A CN101334709A (en) | 2008-07-29 | 2008-07-29 | Method and device for high-speed storage and reading data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008101173549A CN101334709A (en) | 2008-07-29 | 2008-07-29 | Method and device for high-speed storage and reading data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101334709A true CN101334709A (en) | 2008-12-31 |
Family
ID=40197333
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008101173549A Pending CN101334709A (en) | 2008-07-29 | 2008-07-29 | Method and device for high-speed storage and reading data |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101334709A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102646024A (en) * | 2011-02-17 | 2012-08-22 | 纬创资通股份有限公司 | Multi-hard-disk read-write management method and system and electronic device |
| CN106462114A (en) * | 2014-04-25 | 2017-02-22 | 利奇德股份有限公司 | Power handling in a scalable storage system |
| CN107636601A (en) * | 2015-06-24 | 2018-01-26 | 英特尔公司 | The NVDIMM solutions aided in using standard DRAM and integration holder processor with platform |
-
2008
- 2008-07-29 CN CNA2008101173549A patent/CN101334709A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102646024A (en) * | 2011-02-17 | 2012-08-22 | 纬创资通股份有限公司 | Multi-hard-disk read-write management method and system and electronic device |
| CN102646024B (en) * | 2011-02-17 | 2015-02-18 | 纬创资通股份有限公司 | Multi-hard-disk read-write management method and system and electronic device |
| CN106462114A (en) * | 2014-04-25 | 2017-02-22 | 利奇德股份有限公司 | Power handling in a scalable storage system |
| CN106462114B (en) * | 2014-04-25 | 2019-10-01 | 利奇德股份有限公司 | Electric power processing in scalable storage |
| CN107636601A (en) * | 2015-06-24 | 2018-01-26 | 英特尔公司 | The NVDIMM solutions aided in using standard DRAM and integration holder processor with platform |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8607076B2 (en) | Circuit apparatus with memory and power control responsive to circuit-based deterioration characteristics | |
| CN101286086B (en) | Hard disk power down protection method, device and hard disk, and hard disk power down protection system | |
| US8635494B2 (en) | Backup and restoration for a semiconductor storage device | |
| CN106873725A (en) | Component carrying device, change-over panel and the method for refreshing memory cache | |
| CN103049070A (en) | Cache data power failure protection method and computer equipment | |
| CN107122316B (en) | SOC power supply method and SOC | |
| CN106155943B (en) | A kind of method and device of the power down protection of dual control storage equipment | |
| JP2011170589A (en) | Storage control device, storage device, and storage control method | |
| CN103092765B (en) | Solid-state memory system, device and method for writing data | |
| CN105653345A (en) | Method and device supporting data nonvolatile random access | |
| CN102902602A (en) | Method and device for data hot backup as well as storage system | |
| US20160350028A1 (en) | Managing data using a number of non-volatile memory arrays | |
| CN103049407B (en) | Date storage method, Apparatus and system | |
| KR100827287B1 (en) | Semiconductor secondary memory unit and data saving method using the same | |
| CN102591746A (en) | Data reconstruction method and storage equipment | |
| CN115273922A (en) | Abnormal power-down protection device for domestic double-control disk array | |
| CN101334709A (en) | Method and device for high-speed storage and reading data | |
| US20190340089A1 (en) | Method and apparatus to provide uninterrupted operation of mission critical distributed in-memory applications | |
| KR101512741B1 (en) | Network-capable RAID controller for a semiconcuctor Storage Device | |
| KR20120012950A (en) | Hybrid raid controller | |
| CN113050896A (en) | Domestic Feiteng server supporting NVDIMM and data protection method | |
| US20170249248A1 (en) | Data backup | |
| CN115480628A (en) | Chip port control method and computer system | |
| CN104598844A (en) | Power failure protection method and device for preventing corruption of system files of solid-state disk | |
| US9697097B2 (en) | Storage system and method for controlling storage system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Open date: 20081231 |