CN101334708B - 具有写屏障敏感命令和写屏障不敏感命令的存储设备 - Google Patents
具有写屏障敏感命令和写屏障不敏感命令的存储设备 Download PDFInfo
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- CN101334708B CN101334708B CN2008100926160A CN200810092616A CN101334708B CN 101334708 B CN101334708 B CN 101334708B CN 2008100926160 A CN2008100926160 A CN 2008100926160A CN 200810092616 A CN200810092616 A CN 200810092616A CN 101334708 B CN101334708 B CN 101334708B
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- 230000004888 barrier function Effects 0.000 title claims abstract description 113
- 238000000034 method Methods 0.000 claims description 18
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- 238000005457 optimization Methods 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 5
- 230000009471 action Effects 0.000 claims description 4
- 238000013500 data storage Methods 0.000 claims 5
- 230000008707 rearrangement Effects 0.000 description 7
- 238000012545 processing Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 210000000056 organ Anatomy 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0674—Disk device
- G06F3/0676—Magnetic disk device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/823,441 | 2007-06-27 | ||
US11/823,441 US8006047B2 (en) | 2007-06-27 | 2007-06-27 | Storage device with write barrier sensitive write commands and write barrier insensitive commands |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101334708A CN101334708A (zh) | 2008-12-31 |
CN101334708B true CN101334708B (zh) | 2011-03-23 |
Family
ID=39787883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008100926160A Expired - Fee Related CN101334708B (zh) | 2007-06-27 | 2008-04-16 | 具有写屏障敏感命令和写屏障不敏感命令的存储设备 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8006047B2 (zh) |
EP (1) | EP2015167A2 (zh) |
CN (1) | CN101334708B (zh) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100146205A1 (en) * | 2008-12-08 | 2010-06-10 | Seagate Technology Llc | Storage device and method of writing data |
US8671258B2 (en) | 2009-03-27 | 2014-03-11 | Lsi Corporation | Storage system logical block address de-allocation management |
US20100250830A1 (en) * | 2009-03-27 | 2010-09-30 | Ross John Stenfort | System, method, and computer program product for hardening data stored on a solid state disk |
US8433843B2 (en) * | 2009-03-31 | 2013-04-30 | Qualcomm Incorporated | Method for protecting sensitive data on a storage device having wear leveling |
US20110004718A1 (en) * | 2009-07-02 | 2011-01-06 | Ross John Stenfort | System, method, and computer program product for ordering a plurality of write commands associated with a storage device |
US9792074B2 (en) * | 2009-07-06 | 2017-10-17 | Seagate Technology Llc | System, method, and computer program product for interfacing one or more storage devices with a plurality of bridge chips |
GB2474446A (en) | 2009-10-13 | 2011-04-20 | Advanced Risc Mach Ltd | Barrier requests to maintain transaction order in an interconnect with multiple paths |
US9645752B1 (en) | 2014-04-07 | 2017-05-09 | Western Digital Technologies, Inc. | Identification of data committed to non-volatile memory by use of notification commands |
US9632711B1 (en) * | 2014-04-07 | 2017-04-25 | Western Digital Technologies, Inc. | Processing flush requests by utilizing storage system write notifications |
US9411513B2 (en) * | 2014-05-08 | 2016-08-09 | Unisys Corporation | Sensitive data file attribute |
US10152237B2 (en) | 2016-05-05 | 2018-12-11 | Micron Technology, Inc. | Non-deterministic memory protocol |
US10534540B2 (en) * | 2016-06-06 | 2020-01-14 | Micron Technology, Inc. | Memory protocol |
US10585624B2 (en) | 2016-12-01 | 2020-03-10 | Micron Technology, Inc. | Memory protocol |
US11003602B2 (en) | 2017-01-24 | 2021-05-11 | Micron Technology, Inc. | Memory protocol with command priority |
US20180239532A1 (en) * | 2017-02-23 | 2018-08-23 | Western Digital Technologies, Inc. | Techniques for performing a non-blocking control sync operation |
US10372351B2 (en) * | 2017-02-23 | 2019-08-06 | Western Digital Technologies, Inc. | Techniques for non-blocking control information and data synchronization by a data storage device |
US10635613B2 (en) | 2017-04-11 | 2020-04-28 | Micron Technology, Inc. | Transaction identification |
CN110033799A (zh) | 2018-01-12 | 2019-07-19 | 三星电子株式会社 | 基于屏障命令按顺序存储数据的存储设备 |
KR102262209B1 (ko) * | 2018-02-09 | 2021-06-09 | 한양대학교 산학협력단 | 더미 입출력 요청을 이용한 배리어 명령 전달 방법 및 그 장치 |
KR20200076946A (ko) | 2018-12-20 | 2020-06-30 | 삼성전자주식회사 | 스토리지 장치의 데이터 기입 방법 및 이를 수행하는 스토리지 장치 |
KR102226184B1 (ko) * | 2020-02-25 | 2021-03-10 | 한국과학기술원 | 디스크 배열을 위한 캐시베리어 명령 처리 방법 및 이를 위한 장치 |
US11474741B1 (en) * | 2020-06-30 | 2022-10-18 | Amazon Technologies, Inc. | Storage device write barriers |
US11360708B1 (en) * | 2020-06-30 | 2022-06-14 | Amazon Technologies, Inc. | Storage device write barriers |
US11816349B2 (en) | 2021-11-03 | 2023-11-14 | Western Digital Technologies, Inc. | Reduce command latency using block pre-erase |
CN114281245A (zh) | 2021-11-26 | 2022-04-05 | 三星(中国)半导体有限公司 | 同步写方法及装置、存储系统、电子设备 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7089272B1 (en) * | 2003-06-18 | 2006-08-08 | Sun Microsystems, Inc. | Specializing write-barriers for objects in a garbage collected heap |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6490642B1 (en) * | 1999-08-12 | 2002-12-03 | Mips Technologies, Inc. | Locked read/write on separate address/data bus using write barrier |
US6973554B2 (en) * | 2003-04-23 | 2005-12-06 | Microsoft Corporation | Systems and methods for multiprocessor scalable write barrier |
US7747659B2 (en) * | 2004-01-05 | 2010-06-29 | International Business Machines Corporation | Garbage collector with eager read barrier |
JP2006139548A (ja) * | 2004-11-12 | 2006-06-01 | Hitachi Global Storage Technologies Netherlands Bv | メディア・ドライブ及びそのコマンド実行方法 |
US7457921B2 (en) * | 2005-02-23 | 2008-11-25 | Microsoft Corporation | Write barrier for data storage integrity |
US7574565B2 (en) * | 2006-01-13 | 2009-08-11 | Hitachi Global Storage Technologies Netherlands B.V. | Transforming flush queue command to memory barrier command in disk drive |
CN101046755B (zh) * | 2006-03-28 | 2011-06-15 | 郭明南 | 一种计算机自动内存管理的系统及方法 |
-
2007
- 2007-06-27 US US11/823,441 patent/US8006047B2/en not_active Expired - Fee Related
-
2008
- 2008-02-25 EP EP08003387A patent/EP2015167A2/en not_active Withdrawn
- 2008-04-16 CN CN2008100926160A patent/CN101334708B/zh not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7089272B1 (en) * | 2003-06-18 | 2006-08-08 | Sun Microsystems, Inc. | Specializing write-barriers for objects in a garbage collected heap |
Also Published As
Publication number | Publication date |
---|---|
US8006047B2 (en) | 2011-08-23 |
CN101334708A (zh) | 2008-12-31 |
US20090006787A1 (en) | 2009-01-01 |
EP2015167A2 (en) | 2009-01-14 |
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GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: HGST NETHERLANDS BV Free format text: FORMER NAME: HITACHI GLOBAL STORAGE TECH |
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CP01 | Change in the name or title of a patent holder |
Address after: Amsterdam Patentee after: Hitachi Global Storage Technologies Netherlands B. V. Address before: Amsterdam Patentee before: Hitachi Global Storage Tech |
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TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20190117 Address after: American California Patentee after: Western Digital Technologies, Inc. Address before: Amsterdam Patentee before: Hitachi Global Storage Technologies Netherlands B. V. |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110323 Termination date: 20200416 |