CN101320957B - Control device of primary winding segmenting structure permanent magnet synchronous linear electric motor - Google Patents
Control device of primary winding segmenting structure permanent magnet synchronous linear electric motor Download PDFInfo
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- CN101320957B CN101320957B CN2008100649825A CN200810064982A CN101320957B CN 101320957 B CN101320957 B CN 101320957B CN 2008100649825 A CN2008100649825 A CN 2008100649825A CN 200810064982 A CN200810064982 A CN 200810064982A CN 101320957 B CN101320957 B CN 101320957B
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Abstract
A control device of a primary winding segmental structure permanent magnet synchronization linear motor, belongs to the motor control technical field, which solves the problems of longer elementariness, large inductance, high loss and low efficiency of the long elementariness and short sublevel type straight line synchronous machine, which includes a straight line movement apparatus and a processor, a straight line movement interface, two frequency converter drives, two signal separations. The straight line movement differential signal output end of the straight line movement apparatus is converted into the straight line movement signal through the straight line movement interface circuit module and respectively connected with the input end of a first straight line movement signal and a second straight line movement signal. Two driving signal output ends of the processor module are respectively connected with the driving signal input ends of two inverter driving modules. The invention realizes the excellent control on the straight line motor, and has the advantages of low power dissipation and high reliability.
Description
Technical field
The invention belongs to the electric machines control technology field, be specifically related to a kind of control device of primary winding segmenting structure linear synchronous motor.
Background technology
Linear electric motors do not need intermediate conversion mechanism and electric energy are directly changed into the required mechanical energy of rectilinear motion, reach soon in the high thrust system in response speed to be widely used.Compare with the motor of other type,, have application promise in clinical practice in actual applications because linear synchronous generator has higher efficient and power factor; And development along with permanent magnetic material, particularly after high performance permanent magnetic materials NdFeB occurs, permanent magnet linear synchronous motor (PMLSM) because of its energy index height, characteristics such as loss is little, response speed is fast when comparing with other high speed and precision systems, tool has an enormous advantage.All have a wide range of applications in fields such as Digit Control Machine Tool, rapid transit, electromagnetic launch and elevator system.Permanent magnet linear synchronous motor is classified according to design feature, can be divided into long elementary weak point secondary (LPSS) type and two kinds on short elementary length secondary (SPLS) type, the secondary type linear synchronous generator of its short-and-medium elementary length is in running, its mover need link to each other with service cable, the operate as normal of the system of giving, the operation of especially long stroke electric system is made troubles, but also has influence on the reliability and the fail safe of whole system.Therefore in long stroke motor control assembly, should not adopt the secondary type linear synchronous generator of short elementary length; The secondary type linear synchronous generator of long elementary weak point is because it is elementary longer, and inductance is bigger, has bigger loss, thereby has reduced the efficient of system.
Summary of the invention
The present invention is elementary longer in order to solve the secondary type linear synchronous generator of long elementary weak point, and inductance is big, loss height, the problem that system effectiveness is low, and the control device of a kind of primary winding segmenting structure permanent magnet synchronous linear electric motor that proposes.
The control device of primary winding segmenting structure permanent magnet synchronous linear electric motor, it comprises the first signal isolation circuit module and the secondary signal buffer circuit module that structure is identical; It also comprises processor circuit module, straight-line displacement checkout gear, straight-line displacement interface module, the first frequency converter driver module and the second frequency converter driver module; The straight-line displacement differential signal output of straight-line displacement checkout gear links to each other with the straight-line displacement differential signal input of straight-line displacement interface module; The linear displacement signal output of straight-line displacement interface module links to each other with the second linear displacement signal input with the first linear displacement signal input of processor circuit module respectively; The first drive signal output of processor circuit module links to each other with the driving signal input of the first frequency converter driver module and the driving signal input of the second frequency converter driver module with secondary signal buffer circuit module by the first signal isolation circuit module respectively with the second drive signal output, and described straight-line displacement interface module is made up of first chip, second chip, first resistance to the, nine resistance and first electric capacity to the, nine electric capacity; One end of first resistance links to each other with an end of second resistance; The other end of first resistance links to each other with the normal phase input end of first operational amplifier of the end of second electric capacity and first chip respectively; The other end of second resistance links to each other with an end of first electric capacity; The other end of second electric capacity links to each other with ground wire with an end of the 3rd electric capacity respectively; The other end of first electric capacity links to each other with an end of the 3rd resistance, and the other end of the 3rd resistance links to each other with the negative-phase input of first operational amplifier of the other end of the 3rd electric capacity and first chip respectively; One end of the 4th resistance links to each other with an end of the 5th resistance; The other end of the 4th resistance links to each other with the normal phase input end of second operational amplifier of the end of the 5th electric capacity and first chip respectively; The other end of the 5th resistance links to each other with an end of the 4th electric capacity; The other end of the 5th electric capacity links to each other with ground wire with an end of the 6th electric capacity respectively; The other end of the 4th electric capacity links to each other with an end of the 6th resistance, and the other end of the 6th resistance links to each other with the negative-phase input of second operational amplifier of the other end of the 6th electric capacity and first chip respectively; One end of the 7th resistance links to each other with an end of the 8th resistance; The other end of the 7th resistance links to each other with the normal phase input end of the 3rd operational amplifier of the end of the 8th electric capacity and first chip respectively; The other end of the 8th resistance links to each other with an end of the 7th electric capacity; The other end of the 8th electric capacity links to each other with ground wire with an end of the 9th electric capacity respectively; The other end of the 7th electric capacity links to each other with an end of the 9th resistance, and the other end of the 9th resistance links to each other with the negative-phase input of the 3rd operational amplifier of the other end of the 9th electric capacity and first chip respectively; The output of first operational amplifier of first chip～the 3rd operational amplifier links to each other with input, the input of the 3rd reverser and the input of the 5th reverser of first reverser of second chip respectively; The output of first reverser of second chip links to each other with the input of second reverser of second chip; The output of the 3rd reverser of second chip links to each other with the input of the 4th reverser of second chip; The output of the 5th reverser of second chip links to each other with the input of the 6th reverser of second chip; One end of one end of one end of first resistance, the other end of first electric capacity, the 4th resistance, the other end of the 4th electric capacity, the 7th resistance and the other end of the 7th electric capacity have been formed straight-line displacement interface module straight-line displacement differential signal input jointly; The output of the output of second reverser of second chip, the output of the 4th reverser and the 6th reverser is the linear displacement signal output of straight-line displacement interface module, the model that the processor circuit module adopts American TI Company to produce is the chip of TMS320F2808, it is the chip of DS3486 that first chip adopts model, and it is the chip of 74LVC14 that second chip adopts model.
The present invention has realized the good control to the linear electric motors of primary winding segmenting structure, also possesses the advantage of low-power consumption, high reliability simultaneously.
Description of drawings
Fig. 1 is a structural representation of the present invention; Fig. 2 is the structural representation of embodiment two; Fig. 3 is the electrical block diagram of embodiment three; Fig. 4 is the electrical block diagram of embodiment six; Fig. 5 is the electrical block diagram of embodiment seven; Fig. 6 is the electrical block diagram of embodiment eight; Fig. 7 is the electric power system schematic diagram of the primary winding segmenting structure permanent magnet synchronous linear electric motor that the present invention controlled.
Embodiment
Embodiment one: in conjunction with Fig. 1 present embodiment is described, present embodiment comprises the first signal isolation circuit module 7 and the secondary signal buffer circuit module 8 that structure is identical; It also comprises processor circuit module 1, straight-line displacement checkout gear 5, straight-line displacement interface module 6, the first frequency converter driver module 9 and the second frequency converter driver module 10; The model that processor circuit module 1 adopts American TI Company to produce is the high performance chips of TMS320F2808; The straight-line displacement differential signal output of straight-line displacement checkout gear 5 links to each other with the straight-line displacement differential signal input of straight-line displacement interface module 6; The linear displacement signal output of straight-line displacement interface module 6 links to each other with the second linear displacement signal input with the first linear displacement signal input of processor circuit module 1 respectively; The first drive signal output of processor circuit module 1 links to each other with the driving signal input of the first frequency converter driver module 9 and the driving signal input of the second frequency converter driver module 10 with secondary signal buffer circuit module 8 by the first signal isolation circuit module 7 respectively with the second drive signal output.
Embodiment two: in conjunction with Fig. 2 present embodiment is described, present embodiment and embodiment one difference are that processor circuit module 1 is made up of with FLASH program Solidification interface module 1-2, capture unit interface module 1-3, incremental optical-electricity encoder interface module 1-4, serial communication unit module 1-5 and crystal oscillator and reset circuit module 1-6 processor chips DSP1-1, simulator; Simulator links to each other with the routine data I/O of processor chips DSP1-1 with the routine data input/output terminal of FLASH program Solidification interface module 1-2, the displacement signal output of capture unit interface module 1-3 links to each other with the second displacement signal input of processor chips DSP1-1, the linear displacement signal input of capture unit interface module 1-3 links to each other with the linear displacement signal output of straight-line displacement interface module 6, and the linear displacement signal input of capture unit interface module 1-3 is the second linear displacement signal input of processor circuit module 1; The displacement signal output of incremental optical-electricity encoder interface module 1-4 links to each other with the first displacement signal input of processor chips DSP1-1, and the linear displacement signal input of incremental optical-electricity encoder interface module 1-4 links to each other with the linear displacement signal output of straight-line displacement interface module 6; The linear displacement signal input of incremental optical-electricity encoder interface module 1-4 is the first linear displacement signal input of processor circuit module 1; The communication data signal output part of serial communication unit module 1-5 links to each other with the communication data signal input part of processor chips DSP1-1, and the reset clock signal output of crystal oscillator and reset circuit module 1-6 links to each other with the reset clock signal input of processor chips DSP1-1; The first drive signal output of processor chips DSP1-1 links to each other with the driving signal input of the first frequency converter driver module 9 and the driving signal input of the second frequency converter driver module 10 with secondary signal buffer circuit module 8 by the first signal isolation circuit module 7 respectively with the second drive signal output.Other composition is identical with embodiment one with connected mode.
Embodiment three: in conjunction with Fig. 3 present embodiment is described, present embodiment and embodiment one difference are that described straight-line displacement interface module 6 is made up of the first chip U1, the second chip U2, first resistance R, 1 to the 9th resistance R 9 and first capacitor C, 1 to the 9th capacitor C 9; One end of first resistance R 1 links to each other with an end of second resistance R 2; The other end of first resistance R 1 links to each other with an end of second capacitor C 2 and the normal phase input end of first operational amplifier of the first chip U1 respectively; The other end of second resistance R 2 links to each other with an end of first capacitor C 1; The other end of second capacitor C 2 links to each other with ground wire with an end of the 3rd capacitor C 3 respectively; The other end of first capacitor C 1 links to each other with an end of the 3rd resistance R 3, and the other end of the 3rd resistance R 3 links to each other with the other end of the 3rd capacitor C 3 and the negative-phase input of first operational amplifier of the first chip U1 respectively; One end of the 4th resistance R 4 links to each other with an end of the 5th resistance R 5; The other end of the 4th resistance R 4 links to each other with an end of the 5th capacitor C 5 and the normal phase input end of second operational amplifier of the first chip U1 respectively; The other end of the 5th resistance R 5 links to each other with an end of the 4th capacitor C 4; The other end of the 5th capacitor C 5 links to each other with ground wire with an end of the 6th capacitor C 6 respectively; The other end of the 4th capacitor C 4 links to each other with an end of the 6th resistance R 6, and the other end of the 6th resistance R 6 links to each other with the other end of the 6th capacitor C 6 and the negative-phase input of second operational amplifier of the first chip U1 respectively; One end of the 7th resistance R 7 links to each other with an end of the 8th resistance R 8; The other end of the 7th resistance R 7 links to each other with an end of the 8th capacitor C 8 and the normal phase input end of the 3rd operational amplifier of the first chip U1 respectively; The other end of the 8th resistance R 8 links to each other with an end of the 7th capacitor C 7; The other end of the 8th capacitor C 8 links to each other with ground wire with an end of the 9th capacitor C 9 respectively; The other end of the 7th capacitor C 7 links to each other with an end of the 9th resistance R 9, and the other end of the 9th resistance R 9 links to each other with the other end of the 9th capacitor C 9 and the negative-phase input of the 3rd operational amplifier of the first chip U1 respectively; The output of first operational amplifier of the first chip U1～the 3rd operational amplifier links to each other with input, the input of the 3rd reverser and the input of the 5th reverser of first reverser of the second chip U2 respectively; The output of first reverser of the second chip U2 links to each other with the input of second reverser of the second chip U2; The output of the 3rd reverser of the second chip U2 links to each other with the input of the 4th reverser of the second chip U2; The output of the 5th reverser of the second chip U2 links to each other with the input of the 6th reverser of the second chip U2; One end of one end of one end of first resistance R 1, the other end of first capacitor C 1, the 4th resistance R 4, the other end of the 4th capacitor C 4, the 7th resistance R 7 and the other end of the 7th capacitor C 7 have been formed straight-line displacement interface module 6 straight-line displacement differential signal inputs jointly; The output of the output of second reverser of the second chip U2, the output of the 4th reverser and the 6th reverser is the linear displacement signal output of straight-line displacement interface module 6.Other composition is identical with embodiment one with connected mode.It is the chip of DS3486 that the first chip U1 adopts model, and it is the chip of 74LVC14 that the second chip U2 adopts model.
Embodiment four: in conjunction with Fig. 1 present embodiment is described, the signal of present embodiment straight-line displacement checkout gear 5 sample detecting is straight-line displacement ABZ differential signal or straight-line displacement UVW differential signal.
Embodiment five: in conjunction with Fig. 1, Fig. 2 present embodiment is described, present embodiment and embodiment one, two, three or four differences are that it has also increased current sample and current foldback circuit module 2, temperature detection and overheating protection circuit module 3 and fault secure circuit module 4; The two-way current signal input of current sample and current foldback circuit module 2 respectively be installed in any two-phase stator winding of linear synchronous motor on the current signal output end of current sensor 14 link to each other; The current data signal output part of current sample and current foldback circuit module 2 links to each other with the current data signal input part of processor circuit module 1; The temperature signal input of temperature detection and overheating protection circuit module 3 links to each other with the temperature signal output of temperature sensor 15 on being installed in the linear synchronous motor stator winding; The current failure signal of fault secure circuit module 4 and temperature fault signal input part link to each other with the current failure signal output part of current sample and current foldback circuit module 2 and the temperature fault signal output part of temperature detection and overheating protection circuit module 3 respectively; The gating of fault secure circuit module 4 links to each other with the cut-off signals input with the gating of cut-off signals input and secondary signal buffer circuit module 8 with the gating of the first signal isolation circuit module 7 respectively with the cut-off signals output.Other composition is identical with embodiment one with connected mode.
The operation principle of present embodiment: after this control device powers on; processor circuit module 1 is at first carried out system initialization; detect, handle by the current sample of system and the electric current and the temperature of current foldback circuit module 2 and temperature detection and 3 pairs of linear electric motors of overheating protection circuit module, judge whether system is working properly.If overcurrent or superheating phenomenon appear in system, overcurrent or overheating protection circuit send fault-signal to fault secure circuit module 4, and fault secure circuit module 4 will be blocked the drive signal of first frequency converter and second frequency converter, and linear electric motors are quit work.Straight-line displacement interface module 6 receives the straight-line displacement differential signal of straight-line displacement devices 5 outputs and incremental optical-electricity encoder interface module 1-4 and the capture unit interface module 1-3 that respectively first linear displacement signal input and the second linear displacement signal input of linear displacement signal by processor circuit module 1 is transferred to processor circuit module 1 by the linear displacement signal output, the kind of the straight-line displacement differential signal by straight-line displacement device 5 output comes whether the incremental optical-electricity encoder interface module 1-4 of decision processor circuit module 1 and linear displacement signal that capture unit interface module 1-3 receives are useful signal; When 5 outputs of straight-line displacement device is straight-line displacement ABZ differential signal, the linear displacement signal that the incremental optical-electricity encoder interface module 1-4 of processor circuit module 1 receives is a useful signal, the linear displacement signal that capture unit interface module 1-3 receives is an invalid signals, processor chips DSP1-1 blocks the invalid signals that capture unit interface module 1-3 receives, and utilize linear displacement signal that incremental optical-electricity encoder interface module 1-4 receives to compare with the stereotyped command value corresponding with it, obtain corresponding deviation signal, treated again device carries out the controlling and driving first frequency converter driver module 9 and the second frequency converter driver module 10 according to required controlled quentity controlled variable, realization is to the control of primary winding segmenting structure linear synchronous motor, when 5 outputs of straight-line displacement device is straight-line displacement UVW differential signal, the linear displacement signal that the incremental optical-electricity encoder interface module 1-4 of processor circuit module 1 receives is an invalid signals, the linear displacement signal that capture unit interface module 1-3 receives is a useful signal, the useful signal that processor chips DSP1-1 will receive by capture unit interface module 1-3 is realized the control to the primary winding segmenting structure linear synchronous motor, be mainly used in brushless linear motor when what straight-line displacement device 5 was exported for straight-line displacement UVW differential signal, processor chips DSP1-1 carries out the level inspection to the linear displacement signal of the input of capture unit interface module 1-3, with the commutation sequential of decision brushless linear motor.As seen from Figure 7, the elementary winding of primary winding segmenting structure permanent magnet synchronous linear electric motor is divided into multistage (being designated as the N section), the electric power system of motor adopts two frequency converter feeds, and the first frequency converter driver module 9 and the second frequency converter driver module 10 are realized two frequency converter drive controlling; First frequency converter 9 through gate-controlled switch and label be odd number (1,3,5 ...) the stator winding section connect; Second frequency converter 10 through gate-controlled switch and label be even number (2,4,6 ...) the stator winding section connect, wherein the break-make of gate-controlled switch is by 1 control of processor circuit module.When only there was coupling in electric mover with certain section stator segment, this section stator corresponding controllable switch was opened, and the gate-controlled switch of other sections is turned off; When there is coupling in two sections stator segments before and after electric mover and certain, but the switch of these two sections stator correspondences all be opened, and the gate-controlled switch of other sections is turned off.
Embodiment six: in conjunction with Fig. 4 present embodiment is described, present embodiment and embodiment five differences are that described current sample and current foldback circuit module 2 be made up of the 3rd chip U3, four-core sheet U4, the 5th chip U5, first source of stable pressure 11 and the tenth resistance R the 10 to the 26 resistance R 26; One end of the tenth resistance R 10 respectively with four-core sheet U4 in normal phase input end and the four-core sheet U4 of first operational amplifier in the negative-phase input of second operational amplifier link to each other, the other end of the tenth resistance R 10 links to each other with the output of first operational amplifier among an end of the 11 resistance R 11 and the 3rd chip U3 respectively; The other end of the 11 resistance R 11 links to each other with the negative-phase input of first operational amplifier among an end of an end of the 12 resistance R 12, the 13 resistance R 13 and the 3rd chip U3 respectively; The other end of the 12 resistance R 12 links to each other with the negative-phase input of second operational amplifier among an end of the 20 resistance R 20, normal phase input end and the 5th chip U5 of first operational amplifier among the 5th chip U5 respectively; The other end of the 13 resistance R 13 links to each other with the negative-phase input of four-operational amplifier among an end of the 26 resistance R 26, normal phase input end and the 5th chip U5 of the 3rd operational amplifier among the 5th chip U5 respectively; The normal phase input end of first operational amplifier among one end of the 14 resistance R 14 and the 3rd chip U3 links to each other the other end ground connection of the 14 resistance R 14; One end of the 15 resistance R 15 is one road current signal input of current sample and current foldback circuit module 2, and the other end of the 15 resistance R 15 links to each other with the normal phase input end of second operational amplifier among an end of an end of the 16 resistance R 16, the 17 resistance R 17 and the 3rd chip U3 respectively; The other end of the 16 resistance R 16 links to each other with first source of stable pressure 11; The other end of the 17 resistance R 17 links to each other with ground wire with an end of the 18 resistance R 18 respectively; The other end of the 18 resistance R 18 links to each other with the negative-phase input of second operational amplifier among an end of the 19 resistance R 19 and the 3rd chip U3 respectively; The other end of the 19 resistance R 19 links to each other with the output of second operational amplifier among an end of the 20 resistance R 20 and the 3rd chip U3 respectively; The other end of the 20 resistance R 20 links to each other with the negative-phase input of second operational amplifier among an end of the 12 resistance R 12, normal phase input end and the 5th chip U5 of first operational amplifier among the 5th chip U5 respectively; One end of the 21 resistance R 21 is another road current signal input of current sample and current foldback circuit module 2, and the other end of the 21 resistance R 21 links to each other with the normal phase input end of the 3rd operational amplifier among an end of an end of the 22 resistance R 22, the 23 resistance R 23 and the 3rd chip U3 respectively; The other end of the 22 resistance R 22 links to each other with first source of stable pressure 11; The other end of the 23 resistance R 23 links to each other with ground wire with an end of the 24 resistance R 24 respectively; The other end of the 24 resistance R 24 links to each other with the negative-phase input of the 3rd operational amplifier among an end of the 25 resistance R 25 and the 3rd chip U3 respectively; The other end of the 25 resistance R 25 links to each other with the output of the 3rd operational amplifier among an end of the 26 resistance R 26 and the 3rd chip U3 respectively; The other end of the 26 resistance R 26 links to each other with the negative-phase input of four-operational amplifier among an end of the 13 resistance R 13, normal phase input end and the 5th chip U5 of the 3rd operational amplifier among the 5th chip U5 respectively; The output of first operational amplifier among the four-core sheet U4 respectively with four-core sheet U4 in output and the 5th chip U5 of second operational amplifier in the output of output to the four-operational amplifier of first operational amplifier link to each other; The output of first operational amplifier among the four-core sheet U4 is the current failure signal output part of current sample and current foldback circuit module 2; The negative-phase input of first operational amplifier among the four-core sheet U4 respectively with the 5th chip U5 in negative-phase input and the 5th chip U5 of first operational amplifier in the negative-phase input of the 3rd operational amplifier link to each other; The normal phase input end of second operational amplifier among the four-core sheet U4 respectively with the 5th chip U5 in normal phase input end and the 5th chip U5 of second operational amplifier in the normal phase input end of four-operational amplifier link to each other.Other composition is identical with embodiment five with connected mode.It is the chip of TL074 that the 3rd chip U3 adopts model; It is the chip of LM339 that four-core sheet U4 and the 5th chip U5 all adopt model.The biphase current of current sample and 2 pairs of motor stator winding of current foldback circuit module is sampled; and the minimum working current and the maximum operating currenbt of winding current be set according to the trouble free service needs; the electric current that sampling is obtained compares with it respectively; if electric current is excessive; the output of upper current limit comparator produces output low level fault-signal and delivers to processor circuit module 1.If electric current is too small, the output of lower current limit comparator is output low level, produces fault-signal equally and delivers to fault secure circuit module 4 and processor circuit module 1 so that carry out system protection.
Embodiment seven: in conjunction with Fig. 5 present embodiment is described, present embodiment and embodiment five differences are that described temperature detection and overheating protection circuit module 3 be made up of the 6th chip U6, the 7th chip U7, second source of stable pressure 12 and the 27 resistance R the 27 to the 31 resistance R 31; One end of the 27 resistance R 27 respectively with the 6th chip U6 in the output of first operational amplifier and an end of the 28 resistance R 28 link to each other, the normal phase input end of first operational amplifier among the other end of the 27 resistance R 27 and the 7th chip U7 links to each other; The negative-phase input of first operational amplifier among the 7th chip U7 links to each other with second source of stable pressure 12, and the output of first operational amplifier among the 7th chip U7 is the temperature fault signal output part of temperature detection and overheating protection circuit module 3; The other end of the 28 resistance R 28 links to each other with the negative-phase input of first operational amplifier among an end of the 29 resistance R 29 and the 6th chip U6 respectively; The other end of the 29 resistance R 29 links to each other with ground wire; One end of the 30 resistance R 30 is the temperature signal input of temperature detection and overheating protection circuit module 3, and the other end of the 30 resistance R 30 links to each other with the normal phase input end of first operational amplifier among an end of the 31 resistance R 31 and the 6th chip U6 respectively; The other end of the 31 resistance R 31 links to each other with ground wire.Other composition is identical with embodiment five with connected mode.It is the chip of TLC272 that the 6th chip U6 adopts model.Temperature detection and overheating protection circuit module 3 are amplified the detected temperature signal output of temperature sensor through operational amplifier; delivering to the 7th chip U7 and fiducial temperature then compares; judge whether system temperature is higher than the maximum working temperature value that allows, thereby whether decision sends the temperature fault signal.
Embodiment eight: in conjunction with Fig. 6 present embodiment is described, present embodiment and embodiment five differences are that described fault secure circuit module 4 is made up of rest-set flip-flop 13, switch S 1, light-emitting diode D1, the 32 resistance R the 32, the 33 resistance R 33 and the 34 resistance R 34; One end of switch S 1 links to each other with an end of the 32 resistance R 32, and the other end of switch S 1 links to each other with ground wire with S end, R end, the clock end of rest-set flip-flop 13 respectively; The other end of the 32 resistance R 32 links to each other with+5V power supply with the SET set end of an end of an end of the 33 resistance R 33, the 34 resistance R 34, rest-set flip-flop 13 respectively; The other end of the 33 resistance R 33 links to each other with the anode of light-emitting diode D1; The other end of the 34 resistance R 34 links to each other with the CLR clear terminal of rest-set flip-flop 13; The other end of the 34 resistance R 34 is current failure signal and temperature fault signal input part; The negative electrode of light-emitting diode D1 links to each other with the positive output end of rest-set flip-flop 13; The reversed-phase output of rest-set flip-flop 13 links to each other with the enable pin of the first signal isolation circuit module 7 with secondary signal buffer circuit module 8.Other composition is identical with embodiment five with connected mode.Fault secure circuit module 4 adopts rest-set flip-flop 13, and the zero clearing pin of fault-signal and rest-set flip-flop 13 joins, and reset signal links to each other with the set pin of rest-set flip-flop 13.When current sample and current foldback circuit module 2 transmission current failure signals or temperature detection and overheating protection circuit module 3 transmission temperature fault signals (fault-signal is for effectively low), the output of rest-set flip-flop 13 positives is cleared, and the bright expression system failure of malfunction indicator lamp produces; And rest-set flip-flop 13 anti-phase outputs are set, and are used to block the first signal isolation circuit module 7 and secondary signal buffer circuit module 8 two-way PWM drive control signal, and system is protected.After the system failure is eliminated, press system failure reset button, malfunction indicator lamp is extinguished, the expression system can operate as normal, and rest-set flip-flop 13 anti-phase outputs are cleared, and allow the first signal isolation circuit module 7 and secondary signal buffer circuit module 8 that the PWM drive control signal is delivered to the first frequency converter driver module 9 and the second frequency converter driver module 10.
Embodiment nine: present embodiment and embodiment one difference are that it is the chip of 74ACT245 that the first signal isolation circuit module 7 and secondary signal buffer circuit module 8 adopt model; Other composition is identical with embodiment one with connected mode.The effect of the first signal isolation circuit module 7 and secondary signal buffer circuit module 8 is that the voltage signal that processor circuit module 1 is sent is changed, and makes it be suitable for the first frequency converter driver module 9 and the first frequency converter driver module 10 are driven.
Claims (4)
1. the control device of primary winding segmenting structure permanent magnet synchronous linear electric motor, it comprises the first signal isolation circuit module (7) and the secondary signal buffer circuit module (8) that structure is identical; It also comprises processor circuit module (1), straight-line displacement checkout gear (5), straight-line displacement interface module (6), the first frequency converter driver module (9) and the second frequency converter driver module (10); The straight-line displacement differential signal output of straight-line displacement checkout gear (5) links to each other with the straight-line displacement differential signal input of straight-line displacement interface module (6); The linear displacement signal output of straight-line displacement interface module (6) links to each other with the second linear displacement signal input with the first linear displacement signal input of processor circuit module (1) respectively; The first drive signal output of processor circuit module (1) links to each other with the driving signal input of the first frequency converter driver module (9) and the driving signal input of the second frequency converter driver module (10) with secondary signal buffer circuit module (8) by the first signal isolation circuit module (7) respectively with the second drive signal output, it is characterized in that described straight-line displacement interface module (6) is made up of first chip (U1), second chip (U2), first resistance (R1) to the 9th resistance (R9) and first electric capacity (C1) to the 9th electric capacity (C9); One end of first resistance (R1) links to each other with an end of second resistance (R2); The other end of first resistance (R1) links to each other with an end of second electric capacity (C2) and the normal phase input end of first operational amplifier of first chip (U1) respectively; The other end of second resistance (R2) links to each other with an end of first electric capacity (C1); The other end of second electric capacity (C2) links to each other with ground wire with an end of the 3rd electric capacity (C3) respectively; The other end of first electric capacity (C1) links to each other with an end of the 3rd resistance (R3), and the other end of the 3rd resistance (R3) links to each other with the other end of the 3rd electric capacity (C3) and the negative-phase input of first operational amplifier of first chip (U1) respectively; One end of the 4th resistance (R4) links to each other with an end of the 5th resistance (R5); The other end of the 4th resistance (R4) links to each other with an end of the 5th electric capacity (C5) and the normal phase input end of second operational amplifier of first chip (U1) respectively; The other end of the 5th resistance (R5) links to each other with an end of the 4th electric capacity (C4); The other end of the 5th electric capacity (C5) links to each other with ground wire with an end of the 6th electric capacity (C6) respectively; The other end of the 4th electric capacity (C4) links to each other with an end of the 6th resistance (R6), and the other end of the 6th resistance (R6) links to each other with the other end of the 6th electric capacity (C6) and the negative-phase input of second operational amplifier of first chip (U1) respectively; One end of the 7th resistance (R7) links to each other with an end of the 8th resistance (R8); The other end of the 7th resistance (R7) links to each other with an end of the 8th electric capacity (C8) and the normal phase input end of the 3rd operational amplifier of first chip (U1) respectively; The other end of the 8th resistance (R8) links to each other with an end of the 7th electric capacity (C7); The other end of the 8th electric capacity (C8) links to each other with ground wire with an end of the 9th electric capacity (C9) respectively; The other end of the 7th electric capacity (C7) links to each other with an end of the 9th resistance (R9), and the other end of the 9th resistance (R9) links to each other with the other end of the 9th electric capacity (C9) and the negative-phase input of the 3rd operational amplifier of first chip (U1) respectively; The output of first operational amplifier of first chip (U1)～the 3rd operational amplifier links to each other with input, the input of the 3rd reverser and the input of the 5th reverser of first reverser of second chip (U2) respectively; The output of first reverser of second chip (U2) links to each other with the input of second reverser of second chip (U2); The output of the 3rd reverser of second chip (U2) links to each other with the input of the 4th reverser of second chip (U2); The output of the 5th reverser of second chip (U2) links to each other with the input of the 6th reverser of second chip (U2); The other end of one end of the other end of one end of the other end of one end of first resistance (R1), first electric capacity (C1), the 4th resistance (R4), the 4th electric capacity (C4), the 7th resistance (R7) and the 7th electric capacity (C7) has been formed straight-line displacement interface module (6) straight-line displacement differential signal input jointly; The output of the output of second reverser of second chip (U2), the output of the 4th reverser and the 6th reverser is the linear displacement signal output of straight-line displacement interface module (6), the model that processor circuit module (1) adopts American TI Company to produce is the chip of TMS320F2808, it is the chip of DS3486 that first chip (U1) adopts model, and it is the chip of 74LVC14 that second chip (U2) adopts model.
2. the control device of primary winding segmenting structure permanent magnet synchronous linear electric motor according to claim 1 is characterized in that it also comprises current sample and current foldback circuit module (2), temperature detection and overheating protection circuit module (3) and fault secure circuit module (4); The two-way current signal input of current sample and current foldback circuit module (2) respectively be installed in any two-phase stator winding of linear synchronous motor on the current signal output end of current sensor (14) link to each other; The current data signal output part of current sample and current foldback circuit module (2) links to each other with the current data signal input part of processor circuit module (1); The temperature signal input of temperature detection and overheating protection circuit module (3) links to each other with the temperature signal output of temperature sensor (15) on being installed in the linear synchronous motor stator winding; The current failure signal of fault secure circuit module (4) and temperature fault signal input part link to each other with the current failure signal output part of current sample and current foldback circuit module (2) and the temperature fault signal output part of temperature detection and overheating protection circuit module (3) respectively; The gating of fault secure circuit module (4) links to each other with the cut-off signals input with the gating of cut-off signals input and secondary signal buffer circuit module (8) with the gating of the first signal isolation circuit module (7) respectively with the cut-off signals output.
3. the control device of primary winding segmenting structure permanent magnet synchronous linear electric motor according to claim 2 is characterized in that described current sample and current foldback circuit module (2) be made up of the 3rd chip (U3), four-core sheet (U4), the 5th chip (U5), first source of stable pressure (11) and the tenth resistance (R10) to the 26 resistance (R26); One end of the tenth resistance (R10) respectively with four-core sheet (U4) in normal phase input end and the four-core sheet (U4) of first operational amplifier in the negative-phase input of second operational amplifier link to each other, the other end of the tenth resistance (R10) links to each other with the output of first operational amplifier in an end of the 11 resistance (R11) and the 3rd chip (U3) respectively; The other end of the 11 resistance (R11) links to each other with the negative-phase input of first operational amplifier in an end of an end of the 12 resistance (R12), the 13 resistance (R13) and the 3rd chip (U3) respectively; The other end of the 12 resistance (R12) links to each other with the negative-phase input of second operational amplifier in an end of the 20 resistance (R20), normal phase input end and the 5th chip (U5) of first operational amplifier in the 5th chip (U5) respectively; The other end of the 13 resistance (R13) links to each other with the negative-phase input of four-operational amplifier in an end of the 26 resistance (R26), normal phase input end and the 5th chip (U5) of the 3rd operational amplifier in the 5th chip (U5) respectively; The normal phase input end of first operational amplifier in one end of the 14 resistance (R14) and the 3rd chip (U3) links to each other the other end ground connection of the 14 resistance (R14); One end of the 15 resistance (R15) is one road current signal input of current sample and current foldback circuit module (2), and the other end of the 15 resistance (R15) links to each other with the normal phase input end of second operational amplifier in an end of an end of the 16 resistance (R16), the 17 resistance (R17) and the 3rd chip (U3) respectively; The other end of the 16 resistance (R16) links to each other with first source of stable pressure (11); The other end of the 17 resistance (R17) links to each other with ground wire with an end of the 18 resistance (R18) respectively; The other end of the 18 resistance (R18) links to each other with the negative-phase input of second operational amplifier in an end of the 19 resistance (R19) and the 3rd chip (U3) respectively; The other end of the 19 resistance (R19) links to each other with the output of second operational amplifier in an end of the 20 resistance (R20) and the 3rd chip (U3) respectively; The other end of the 20 resistance (R20) links to each other with the negative-phase input of second operational amplifier in an end of the 12 resistance (R12), normal phase input end and the 5th chip (U5) of first operational amplifier in the 5th chip (U5) respectively; One end of the 21 resistance (R21) is another road current signal input of current sample and current foldback circuit module (2), and the other end of the 21 resistance (R21) links to each other with the normal phase input end of the 3rd operational amplifier in an end of an end of the 22 resistance (R22), the 23 resistance (R23) and the 3rd chip (U3) respectively; The other end of the 22 resistance (R22) links to each other with first source of stable pressure (11); The other end of the 23 resistance (R23) links to each other with ground wire with an end of the 24 resistance (R24) respectively; The other end of the 24 resistance (R24) links to each other with the negative-phase input of the 3rd operational amplifier in an end of the 25 resistance (R25) and the 3rd chip (U3) respectively; The other end of the 25 resistance (R25) links to each other with the output of the 3rd operational amplifier in an end of the 26 resistance (R26) and the 3rd chip (U3) respectively; The other end of the 26 resistance (R26) links to each other with the negative-phase input of four-operational amplifier in an end of the 13 resistance (R13), normal phase input end and the 5th chip (U5) of the 3rd operational amplifier in the 5th chip (U5) respectively; The output of first operational amplifier in the four-core sheet (U4) respectively with four-core sheet (U4) in output and the 5th chip (U5) of second operational amplifier in the output of output to the four-operational amplifier of first operational amplifier link to each other; The output of first operational amplifier in the four-core sheet (U4) is the current failure signal output part of current sample and current foldback circuit module (2); The negative-phase input of first operational amplifier in the four-core sheet (U4) respectively with the 5th chip (U5) in negative-phase input and the 5th chip (U5) of first operational amplifier in the negative-phase input of the 3rd operational amplifier link to each other; The normal phase input end of second operational amplifier in the four-core sheet (U4) respectively with the 5th chip (U5) in normal phase input end and the 5th chip (U5) of second operational amplifier in the normal phase input end of four-operational amplifier link to each other, it is the chip of TL074 that the 3rd chip (U3) adopts model; It is the chip of LM339 that four-core sheet (U4) and the 5th chip (U5) all adopt model.
4. the control device of primary winding segmenting structure permanent magnet synchronous linear electric motor according to claim 2 is characterized in that described fault secure circuit module (4) is made up of rest-set flip-flop (13), switch (S1), light-emitting diode (D1), the 32 resistance (R32), the 33 resistance (R33) and the 34 resistance (R34); One end of switch (S1) links to each other with an end of the 32 resistance (R32), and the other end of switch (S1) links to each other with ground wire with S end, R end, the clock end of rest-set flip-flop (13) respectively; The other end of the 32 resistance (R32) links to each other with+5V power supply with the SET set end of an end of an end of the 33 resistance (R33), the 34 resistance (R34), rest-set flip-flop (13) respectively; The other end of the 33 resistance (R33) links to each other with the anode of light-emitting diode (D1); The other end of the 34 resistance (R34) links to each other with the CLR clear terminal of rest-set flip-flop (13); The other end of the 34 resistance (R34) is current failure signal and temperature fault signal input part; The negative electrode of light-emitting diode (D1) links to each other with the positive output end of rest-set flip-flop (13); The reversed-phase output of rest-set flip-flop (13) links to each other with the enable pin of the first signal isolation circuit module (7) and secondary signal buffer circuit module (8), and it is the chip of 74ACT245 that the first signal isolation circuit module (7) and secondary signal buffer circuit module (8) adopt model.
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| CN102497157B (en) * | 2011-11-23 | 2013-12-25 | 哈尔滨工业大学 | Sensor-less control device and control method of sectional-winding linear motor |
| CN102720858B (en) * | 2012-07-03 | 2013-08-21 | 中国矿业大学 | Wireless intelligent silicone tube cut-off device and control method |
| CN104484306B (en) * | 2014-12-31 | 2017-06-20 | 哈尔滨工业大学 | Master-slave synchronisation serial communication bus and its implementation based on differential signal |
| CN105656385B (en) * | 2015-03-07 | 2018-04-03 | 河南理工大学 | The fault-tolerant handover control system of section of winding formula permanent magnet linear synchronous motor and method |
| CN105977917A (en) * | 2016-07-01 | 2016-09-28 | 深圳市振华微电子有限公司 | Motor driving circuit having over-temperature protection |
| CN107544257A (en) * | 2017-10-02 | 2018-01-05 | 淮南师范学院 | A kind of alternating current generator self-adaptation control method and control system |
| CN108657458A (en) * | 2018-03-07 | 2018-10-16 | 东南大学 | Primary segmented circle cartridge type Modularized unmanned machine catapult-launching gear and its control method |
| CN110095626B (en) * | 2019-04-04 | 2021-09-14 | 上海集成电路研发中心有限公司 | System with high-speed photoelectric encoder and testing method |
| CN110912493A (en) * | 2019-11-29 | 2020-03-24 | 中国科学院空间应用工程与技术中心 | Segmented power supply system for induction linear motor |
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