CN101320331B - Method and apparatus for accelerating ROM reading speed of game machine - Google Patents

Method and apparatus for accelerating ROM reading speed of game machine Download PDF

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CN101320331B
CN101320331B CN 200710108935 CN200710108935A CN101320331B CN 101320331 B CN101320331 B CN 101320331B CN 200710108935 CN200710108935 CN 200710108935 CN 200710108935 A CN200710108935 A CN 200710108935A CN 101320331 B CN101320331 B CN 101320331B
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CN101320331A (en
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张巍
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Winbond Electronics Corp
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Abstract

The invention relates to a method and an apparatus of quickening the speed of reading the ROM of a play station. One or more than one piece of section definition information is read from the source code of a program; the definition information is used for showing the range of every section and one address of main storage corresponding to every section; and the source code of the program is translated and edited according to the definition information to generate an executable file of the program. As a result, when a processor executes an instruction from the executable file, an executable file code from one or more than one section is loaded to every corresponding address of the main storage from the nonvolatile storage. The processor is inputted into the main storage for execution and the other instructions from the executable file are inputted into the storage from the nonvolatile storage for execution.

Description

A kind of method and device of accelerating ROM reading speed of game machine
Technical field
The invention relates to computer technology, and be particularly to accelerate the method and the device of memory access rate.
Background technology
Along with the difference in the design of game machine (game console), the Storage Media of its Games Software is also different.For instance, the Games Software of Playstation 2 game machines and Xbox game machine is stored on the discs (compact disk), and the Games Software of Game Boy then is stored in mask read-only memory (mask ROM) or the rom chip.
The access speed of rom chip is enough to allow game machine directly read and carry out swimmingly some games the rom chip in game card, does not need games are loaded on primary memory.Yet the access speed of rom chip is still far away from random access memory (Random-Access Memory is called for short RAM).The execution speed of the recreation that data volume is big but can be crossed slow and limited because of the access speed of rom chip.But the primary memory that expands game machine then can increase cost.
Summary of the invention
In view of this, purpose of the present invention is providing method and the device of accelerating ROM reading speed of game machine.
Based on above-mentioned purpose, the embodiment of the invention provides a kind of method of accelerating ROM reading speed of game machine, comprises the following steps:
Read the source code of a program; Read the definition information of one or more section in the above-mentioned source code; Above-mentioned definition information comprises zone field indicating the scope of each section, and address information is with an address of the primary memory of indicating each section correspondence; According to above-mentioned zone field and above-mentioned address information with the source code of compiling said procedure to produce the executable file of this program, make when a processor is carried out instruction in the above-mentioned executable file, the executable file sign indicating number of above-mentioned one or more section is loaded on each corresponding address of this primary memory from a nonvolatile memory, and the above-mentioned processor of input is to carry out from this primary memory, and all the other instructions of above-mentioned executable file are then imported above-mentioned processor to carry out from above-mentioned nonvolatile memory.
In addition, the embodiment of the invention provides a kind of device of accelerating ROM reading speed of game machine, comprises a compiler and a connector.This compiler reads the definition information of one or more section in the source code of a program.Above-mentioned definition information comprises zone field with the scope of indicating each section and the address information address with the primary memory of indicating each section correspondence.Above-mentioned compiler according to above-mentioned zone field and above-mentioned address information with the source code of compiling said procedure to produce the object code of this program.This connector according to above-mentioned purpose sign indicating number and above-mentioned definition information to produce the executable file of said procedure, make when a processor is carried out instruction in the above-mentioned executable file, the executable code of above-mentioned one or more section is loaded on each corresponding address of this primary memory from a nonvolatile memory, and the above-mentioned processor of input is to carry out from this primary memory, and all the other instructions of above-mentioned executable file are then imported above-mentioned processor to carry out from above-mentioned nonvolatile memory.
Description of drawings
Fig. 1 accelerates an embodiment of the method for ROM reading speed of game machine with explanation;
Fig. 2 shows the example of a program source code and executable file;
Fig. 3 shows the work flow example of move;
Fig. 4 shows the structural representation of a game machine of carrying out above-mentioned executable file; And
Fig. 5 shows an embodiment of the device of accelerating ROM reading speed of game machine.
Symbol description:
1～processor; 2～primary memory; 3～connecting interface; 4～nonvolatile memory; 200～program source code; 210～section; 211～label; 212～program code; 213～label; 220～section; 221～label; 222～program code; 223～label; 230～instruction; 240～instruction; 250～executable file; 251～move; 210A～section; 220A～section; 230A～instruction; 240A～instruction; 210B～section; 220B～section; 400～game machine; The device of 500～quickening ROM reading speed of game machine; 501～editing machine; 502～compiler; 503～connector.
Embodiment
Below explanation is preferred embodiment of the present invention.Its objective is to illustrate the general principle of the present invention, should not be considered as restriction of the present invention, scope of the present invention is worked as with being as the criterion that claim was defined.
Below propose to accelerate the method and the device of ROM reading speed of game machine, make the memory management of programmer can planning procedure when designing program the term of execution in order to a mechanism to be provided.That is, the term of execution that above-mentioned mechanism making the program itself that develops manage it by where being input to processor to carry out.
First embodiment
Accelerate an embodiment of the method for ROM reading speed of game machine with explanation with reference to Fig. 1.
At first, for example use C, C++, java or other program language to edit a program (step S100) by a software developer, and be set in the definition information (section definition) (step S102) of code segment in this program (section), be performed in order to a primary memory of indicating one or more code segment in this program will be loaded a computer installation.This research and development of software system can comprise editing machine (editor), compiler (compiler) and connector (linker), and provides a program language specification to describe above-mentioned definition information.Above-mentioned definition information can comprise zone field indicating the scope of each section, and address information is with an address of the primary memory of indicating each section correspondence.
When the source code editor of said procedure finished, the research and development of software system produced the executable file (executable file) of this program with the source code of compiling (compile) this program according to above-mentioned definition information.Above-mentioned executable file is a Games Software.Yet the method also can apply to other various softwares.The research and development of software system according to above-mentioned definition information to produce at least one move, in order to moving above-mentioned one or more section, and become a logical address (logical address) or physical address (physical address) (step S106) on the above-mentioned primary memory to change symbolic address (symbol address) in the above-mentioned source code according to above-mentioned definition information to above-mentioned primary memory (step S104).Whereby, even above-mentioned one or more section is copied to above-mentioned primary memory, also can be by all the other instruction institute references of above-mentioned executable file.
Fig. 2 shows the example of a program source code and executable file.Program source code 200 comprises code segment 210 and 220. Label 211 and 213 is used for indicating beginning and end position of section 210 respectively.The program code 212 of section 210 comprises its corresponding main memory address RAM_ADDRESS, and its value is 0x10, and comprises symbolic address SECTION_1.Above-mentioned information constitutes the definition information of section 210.The definition information of section 220 then comprises label 221 and 223, is used for respectively indicating beginning and end position of section 220, and the symbolic address SECTION_2 of the main memory address RAM_ADDRESS=0x1024 of section 220 correspondences and program code 222.
Section 210 and 220 all is a programmed instruction, and comprises definition information (comprising RAM_ADDRESS, C_CODE_IN_RAM_START and C_CODE_IN_RAM_END).Executable file (executable file) after the 200 process compilings of program source code need comprise the instruction (210A among Fig. 2 and 220A) after 210 and 220 compilings, and can not contain above-mentioned definition information.The term of execution code segment 210A and 220A copy to primary memory.
Need be appreciated that the definition information of arbitrary program source code can define more than two or following section.The size of section can be set arbitrarily or adjust.For instance, a section can comprise one or more letter formula (function) or subroutine (subrout ine).Letter formula or subroutine also can comprise one or more section.
The i instruction 230 that program source code 200 also comprises outside section 210 and 220 refers to the symbolic address SECTION_1 of section 210 and the symbolic address SECTION_2 that j instruction 240 refers to section 220.Wherein i and j are positive integer.Need be appreciated that program source code 200 can have more instruction references to the address of section 210 and 220 to carry out section 210 and 220 with request.
Program source code 200 produces executable file 250 through the compiling back.Executable file 250 then writes to nonvolatile memory (nonvolatile memory), for example ROM chip (read onlymemory chip).I instruction 230 and j instruction 240 are converted into instruction 230A and 240A respectively, and symbolic address SECTION_1 wherein and SECTION_2 are converted into the main memory address 0x10 and the 0x1024 of section 210 and 220 correspondences respectively.
Code segment 210A and 220A are according to section 210 and 220 program codes through the generation of compiling back, for example can be machinery sign indicating numbers (machine code). Section 210A and 220A can keep above-mentioned definition information or replace above-mentioned definition information with customized move program code.251 of moves are to produce according to above-mentioned definition information, in order to duplicate section 210A and 220A to a primary memory to carry out.Move 251 can load section 210A and 220A when executable file 250 begins to carry out, perhaps just load the section that needs execution when needs are carried out section 210A or 220A individually.The research and development of software system can be according to the definition information of section out of the ordinary with customized move.Or with definition information each section is loaded primary memory to carry out according to section out of the ordinary by common move.
Fig. 3 shows the work flow example of move 251.When carrying out move 251, a computer installation can carry out the following step:
At first, obtain the starting position of a section in this nonvolatile memory, for example label 211 or 221 addresses are (after the connector processing, 211 or 221 address is all determined) (step S300), obtain the end position of this section again, for example label 213 or 223 addresses (handle through connector after, 213 or 223 address is all determined) (step S302).According to above-mentioned starting position and end position to calculate the data volume size (step S304) of this section.Whether the size of differentiating section is 0 byte (byte) (step S306).In this way, finish the execution of move 251.As denying, obtain the address of this section at this nonvolatile memory, for example symbolic address SECTION_1 and SECTION_2 are through address (step S308) and the destination address in the primary memory of aforementioned calculation machine after changing, for example 0x10 and 0x1024 (step S310), and above-mentioned section is loaded this destination address (step S312) of above-mentioned primary memory.
Can be in the instruction set of a processor come real the work above-mentionedly to load of the operation of above-mentioned one or more section to this primary memory from a nonvolatile memory with an instruction or plural number instruction.Need be appreciated that if section 210A and 220A do not keep above-mentioned definition information, section 210A and 220A also can distinctly comprise customized move, as above-mentioned step S308～S312 usually, respectively 210A and 220A be loaded primary memory.
Executable file 250 then writes to nonvolatile memory (nonvolatile memory), for example ROM chip (read only memory chip), flash memory (flash memory), the programmable read-only memory of can erasing (erasable programmable ROM, be called for short EPROM), the electronic type programmable read-only memory (electrically erasable programmable ROM is called for short EEPROM) etc. of can erasing.
Fig. 4 shows the structural representation of a game machine 400 of carrying out above-mentioned executable file.Executable file 250 writes to nonvolatile memory 4 to constitute portable memory device.Nonvolatile memory 4 is connected in the connecting interface 3 of game machine 400.Processor 1 is coupled to primary memory 2 and connecting interface 3.Primary memory 2 can be made of random access memory, for example static RAM (StaticRandom Access Memory) or dynamic RAM (Dynamic Random AccessMemory is called for short DRAM).
When game machine 400 starts, processor 1 can directly read and carry out the program in the nonvolatile memory 4.As shown in Figure 3, according to move 251, processor 1 can load section 210A and 220A when executable file 250 begins to carry out.Perhaps, processor 1 can just load the section that needs execution individually when needs are carried out section 210A or 220A.
Processor 1 is when carrying out executable file 250, from the section 210A of nonvolatile memory 4 input executable files 250 and all the other instructions (for example 230A and 240A) beyond the 220A to processor 1 to carry out, and load section 210A the above-mentioned executable file 250 and 220A each corresponding address from nonvolatile memory 4 to primary memory 2, and from this primary memory 2 among inflow section 210A and the 220A instruct to processor 1 to carry out.The term of execution that move primary memory to is 210A and 220A, rather than 230A and 240A.230A and 240A can call out 210B and 220B.
For instance, the corresponding address of section 210A is the 0x10 byte address in the primary memory 2.Processor 1 becomes section 210B with the 0x10 byte address that section 210A is loaded in the primary memory 2.That is, on the above-mentioned address of primary memory 2, begin to load section 210A.In like manner, processor 1 also can be loaded on section 220A the 0x1024 byte address in the primary memory 2, becomes section 220B. Instruction 230A and 240A still can be with reference to the corresponding address in the primary memory 2 to carry out section 210B and 220B.
Each section in primary memory 2 all can be back to the execution control instruction on the nonvolatile memory 4 after carrying out end, other subroutine (subroutine) of for example instruct 230A and 240A, calling out this section makes the instruction in the processor 1 continuation execution nonvolatile memory 250.
Second embodiment
Fig. 5 shows the device 500 of accelerating ROM reading speed of game machine.
In the device 500 of accelerating ROM reading speed of game machine, editing machine 501 produces a program source code, and sets the definition information of the one or more section of program code wherein.Above-mentioned definition information comprises zone field indicating the scope of each section, and address information is with an address of the primary memory of indicating each section correspondence.Above-mentioned zone field can comprise each start address and end addresses of above-mentioned one or more section.
The definition information that compiler 502 reads one or more section in the source code of said procedure is according to above-mentioned zone field and the above-mentioned address information object code (object code) of source code to produce this program with the compiling said procedure.Above-mentioned compiler produces at least one move according to above-mentioned definition information in the above-mentioned purpose sign indicating number, in order to move the primary memory of above-mentioned one or more section to a computer installation.
Connector 503 according to above-mentioned purpose sign indicating number and above-mentioned definition information to produce the executable file of said procedure.Comprise a symbolic address in the above-mentioned source code with reference to one of them of above-mentioned one or more section.Above-mentioned connector becomes a logical address on the above-mentioned primary memory according to above-mentioned address information to change above-mentioned symbolic address.Above-mentioned one or more section is through compiling and link the above-mentioned one or more executable code section of back generation.
Store above-mentioned executable file in a nonvolatile memory.When above-mentioned executable file is loaded on a computer installation that comprises a processor and a primary memory, this processor is carried out the instruction in the above-mentioned executable file, above-mentioned one or more executable code section is loaded on each corresponding address of this primary memory from a nonvolatile memory, and the above-mentioned processor of input is to carry out from this primary memory, and all the other instructions of above-mentioned executable file are then imported above-mentioned processor to carry out from above-mentioned nonvolatile memory.
Therefore, utilize the said method can be with the instruction load that takes normal execution in the nonvolatile memory to primary memory, other instruction then maintains in the nonvolatile memory.The instruction that need load primary memory then can just have been determined well when designing by the program designer.Utilize above-mentioned definition information can define the program section of any magnitude range.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; has common knowledge in the technical field under any; without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is when looking being as the criterion that claims define.

Claims (11)

1. a method of accelerating ROM reading speed of game machine comprises the following steps:
Read the source code of a program;
Read the definition information of one or more section in the above-mentioned source code, wherein above-mentioned definition information comprises zone field with the scope of indicating each section and the address information address with the primary memory of indicating each section correspondence; And
According to above-mentioned zone field and above-mentioned address information with the source code of compiling said procedure to produce the executable file of this program, make when a processor is carried out instruction in the above-mentioned executable file, the executable file sign indicating number of above-mentioned one or more section is loaded on each corresponding address of this primary memory from a nonvolatile memory, and the above-mentioned processor of input is to carry out from this primary memory, and all the other instructions of above-mentioned executable file are then imported above-mentioned processor to carry out from above-mentioned nonvolatile memory.
2. the method for claim 1, wherein also comprise:
In above-mentioned compile step, according to above-mentioned definition information in above-mentioned executable file, produce at least one move with the executable code that moves above-mentioned one or more section to above-mentioned primary memory.
3. comprise a symbolic address in the method for claim 1, wherein above-mentioned source code with reference to one of them of above-mentioned one or more section, also comprise:
Become a logical address or physical address on the above-mentioned primary memory according to above-mentioned address information to change above-mentioned symbolic address.
4. the method for claim 1 also comprises:
Provide a program language specification to describe above-mentioned definition information.
5. the method for claim 1 also comprises:
Provide an instruction of an instruction set above-mentionedly to load of the operation of the executable code of above-mentioned one or more section to this primary memory from a nonvolatile memory to carry out.
6. method as claimed in claim 4, wherein above-mentioned zone field comprise each start address and end addresses of above-mentioned one or more section.
7. device of accelerating ROM reading speed of game machine comprises:
One compiler, read the definition information of one or more section in the source code of a program, wherein above-mentioned definition information comprises zone field with the scope of indicating each section and the address information address with the primary memory of indicating each section correspondence, and according to above-mentioned zone field and above-mentioned address information with the source code of compiling said procedure to produce the object code of this program; And
One connector, according to above-mentioned purpose sign indicating number and above-mentioned definition information to produce the executable file of said procedure, make when a processor is carried out instruction in the above-mentioned executable file, the executable code of above-mentioned one or more section is loaded on each corresponding address of this primary memory from a nonvolatile memory, and the above-mentioned processor of input is to carry out from this primary memory, and all the other instructions of above-mentioned executable file are then imported above-mentioned processor to carry out from above-mentioned nonvolatile memory.
8. device as claimed in claim 7, wherein, above-mentioned compiler produces at least one move to move above-mentioned one or more section to above-mentioned primary memory according to above-mentioned definition information in the above-mentioned purpose sign indicating number.
9. device as claimed in claim 7, wherein, comprise a symbolic address in the above-mentioned source code with reference to one of them of above-mentioned one or more section, above-mentioned connector becomes a logical address or physical address on the above-mentioned primary memory according to above-mentioned address information to change above-mentioned symbolic address.
10. device as claimed in claim 7, wherein above-mentioned zone field comprise each start address and end addresses of above-mentioned one or more section.
11. device as claimed in claim 7, wherein:
Comprise in the instruction set of described processor and carry out the above-mentioned instruction that loads the executable code of above-mentioned one or more section to the operation of this primary memory from a nonvolatile memory.
CN 200710108935 2007-06-07 2007-06-07 Method and apparatus for accelerating ROM reading speed of game machine Active CN101320331B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049667A (en) * 1997-08-15 2000-04-11 International Business Machines Corporation Computer system, method of compiling and method of accessing address space with pointer of different width therefrom
CN1828538A (en) * 2006-03-31 2006-09-06 浙江大学 Method for realizing operating procedure directly from file system in embedded system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049667A (en) * 1997-08-15 2000-04-11 International Business Machines Corporation Computer system, method of compiling and method of accessing address space with pointer of different width therefrom
CN1828538A (en) * 2006-03-31 2006-09-06 浙江大学 Method for realizing operating procedure directly from file system in embedded system

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