CN101303655B - Device and method for managing basic input/output system - Google Patents
Device and method for managing basic input/output system Download PDFInfo
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- CN101303655B CN101303655B CN2007101068660A CN200710106866A CN101303655B CN 101303655 B CN101303655 B CN 101303655B CN 2007101068660 A CN2007101068660 A CN 2007101068660A CN 200710106866 A CN200710106866 A CN 200710106866A CN 101303655 B CN101303655 B CN 101303655B
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Abstract
The invention provides a management unit of a basic input and output system and a method thereof. Whether a host is closed and a basic regulated value of the input and output system is reduced to a preset value is decided by detecting whether a reducing event happens or not. Besides, when the reducing event happens, the host is closed and the basic regulated value is reduced to the preset state, thus eliminating the faults caused by the improper setting of the input and output system.
Description
Technical field
The present invention relates to a kind of Basic Input or Output System (BIOS) administrative skill of (Basic Input/Output System is called for short BIOS), particularly a kind of administrative skill of replying the setting value of being stored in the Basic Input or Output System (BIOS).
Background technology
Along with assembling popularizing of computer technology voluntarily, user regular meeting utilizes overlockin to make main frame have better usefulness.The general practice is the BIOS by the set-up and calculated machine host, the computing frequency of coming the control computer main frame.Generally speaking, the BIOS of set-up and calculated machine host must be under the normal operating conditions at main frame and just can set.If it is improper that BIOS sets, not only can cause main frame to crash, and main frame be closed (Shut Down) back even also can cause main frame to start shooting, so the user then can't adjust BIOS return by the mode of general setting BIOS.
What deserves to be mentioned is, cause main frame to crash, and along with the deadlock time is longer, the intraware of main frame may cause more serious damage if BIOS sets improper meeting.Conventional practice must be used the main frame of shutting down computer according to four seconds of power supply of main frame; Then, open the casing of main frame; And then wire jumper (Jumper) is electrically connected at the specific pin in header board (Front Panel) district of motherboard, use the interior basic setting value of removings (or weigh and establish) BIOS.This action is commonly referred to removes CMOS setting value (Clear CMOS).Have the knack of this skill person and should be known in the step suitable trouble not only of removing the basic setting value in the BI OS, and suitable little of wire jumper, be very easy to lose.
Summary of the invention
The invention provides a kind of administration module of Basic Input or Output System (BIOS),, use the lifting convenience in order to main frame and the basic setting value of Basic Input or Output System (BIOS) of reducing of shutting down computer.
The invention provides a kind of management method of Basic Input or Output System (BIOS), use the fault that improper setting caused of getting rid of Basic Input or Output System (BIOS).
The present invention proposes a kind of administration module of Basic Input or Output System (BIOS), is applicable to main frame.The administration module of Basic Input or Output System (BIOS) comprises Basic Input or Output System (BIOS), switch and chipset.Basic Input or Output System (BIOS) stores basic setting value.Switch is emerging in outside the main frame.Switch is used for producing voltage signal, and the level of this voltage signal is to determine according to the state of switch.Chipset couples switch and Basic Input or Output System (BIOS).Chipset is according to the level of voltage signal, and whether shut down computer main frame and the basic setting value of reducing of decision is preset state.
Chipset comprises super I/O chip and South Bridge chip.Super I/O chip couples switch and Basic Input or Output System (BIOS), determines whether the main frame of shutting down computer in order to the level according to this voltage signal.South Bridge chip couples switch and Basic Input or Output System (BIOS), and determining whether reducing basic setting value in order to the level of foundation voltage signal is preset state.
In one embodiment, when super I/O chip was shut down computer main frame, super I/O chip is the employed power supply of awaiting orders of forbidden energy (Disable) main frame then, in order to eliminate the data of depositing of main frame.
In one embodiment of this invention, whether the anti-error touch function of chipset detection Basic Input or Output System (BIOS) is enabled.When anti-error touch function was enabled, Basic Input or Output System (BIOS) is the operating state of detection computations machine host then.In another embodiment, when this anti-error touch function was enabled, chipset was a preset state according to whether shut down computer main frame and the basic setting value of reducing of the operating state decision of the level of voltage signal and main frame.In another embodiment, when this anti-error touch function is enabled, and the operating state of main frame do not enter operating system as yet, and the level of voltage signal is when being first level, and then shut down computer main frame and the basic setting value of reducing of chipset is preset state.
From another viewpoint, the present invention proposes a kind of management method of Basic Input or Output System (BIOS), is applicable to main frame, and Basic Input or Output System (BIOS) stores basic setting value.The management method of Basic Input or Output System (BIOS) comprises, detects the reduction incident and whether takes place, and be preset state with whether shut down computer main frame and the basic setting value of reducing of decision.When the reduction incident took place, then the shut down computer main frame and the basic setting value of reducing were preset state.
In one embodiment of this invention, wherein detect the step whether the reduction incident takes place, comprise the reception voltage signal.When the level of voltage signal then is first level, judge that then this reduction incident takes place.In another embodiment, when the level of voltage signal is second level, judge that then this reduction incident does not take place.In another embodiment, the management method of Basic Input or Output System (BIOS) more comprises when the reduction incident does not take place, and then makes main frame continue normal operation.In an embodiment again, when the reduction incident did not take place, the level of voltage signal then was second level.
In one embodiment of this invention, the step of the above-mentioned main frame of shutting down computer comprises that the stop supplies power supply of awaiting orders gives main frame, in order to eliminate the data of depositing of main frame.
From another viewpoint, the present invention proposes a kind of management method of Basic Input or Output System (BIOS), is applicable to main frame, and Basic Input or Output System (BIOS) stores basic setting value.Whether whether the management method of Basic Input or Output System (BIOS) comprises, detect the reduction incident and take place to enable with anti-error touch function.When anti-error touch function is enabled and reduction incident when taking place, then according to the operating state of main frame, and whether shut down computer main frame and the basic setting value of reducing of decision is preset state.Wherein, the reduction incident judges according to the level of voltage signal whether the reduction incident is set up, and anti-error touch function judges according to the residing state of current computer main frame whether anti-error touch function is set up.
In one embodiment of this invention, wherein, detect the step whether the reduction incident takes place, comprise the reception voltage signal.When the level of voltage signal is first level, judge that then the reduction incident takes place.In addition, when the level of voltage signal is second level, judge that then the reduction incident does not take place.In another embodiment, the management method of Basic Input or Output System (BIOS) comprises that more then the shut down computer main frame and the basic setting value of reducing are preset state when anti-error touch function is taken place by forbidden energy and reduction incident.In another embodiment, the step of the main frame of wherein shutting down computer comprises that the stop supplies power supply of awaiting orders gives main frame, in order to eliminate the data of depositing of main frame.
In one embodiment of this invention, wherein, operating state according to main frame, and whether shut down computer main frame and the basic setting value of reducing of decision is the step of preset state, comprise that the operating state when main frame does not enter operating system as yet, and when the reduction incident takes place, then close this main frame and this basic setting value of reduction is this preset state.
Whether the present invention takes place by detecting the reduction incident, is preset state with whether shut down computer main frame and the basic setting value of reducing of decision.When the reduction incident took place, then the shut down computer main frame and the basic setting value of reducing were preset state.Use the fault that improper setting caused of getting rid of Basic Input or Output System (BIOS).
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is the synoptic diagram according to the administration module of a kind of BIOS of the first embodiment of the present invention.
Fig. 2 is the process flow diagram according to the management method of a kind of BIOS of the first embodiment of the present invention.
Fig. 3 is the process flow diagram according to the management method of a kind of BIOS of the second embodiment of the present invention.
Fig. 4 is the process flow diagram according to the management method of a kind of BIOS of the third embodiment of the present invention.
Embodiment
Fig. 1 is the synoptic diagram according to the administration module of a kind of Basic Input or Output System (BIOS) of the first embodiment of the present invention.Please refer to Fig. 1, the administration module 10 of Basic Input or Output System (BIOS) (hereinafter to be referred as BIOS) is applicable to main frame.In the present embodiment, administration module 10 comprises BIOS 20, switch 30 and chipset 40.In the present embodiment, switch 30 is to be emerging in outside the main frame, and is coupled to chipset 40, to send a voltage signal Vs to chipset 40.In the present embodiment, the level of this voltage signal Vs can decide according to the state of switch 30.In addition, chipset 40 also is coupled to BIOS 20.In general, BIOS 20 can be loaded in the CMOS internal memory by a Nonvolatile memory, and this CMOS internal memory can the required basic setting value of storage computation machine host running.Be meant at this alleged BIOS 20 and be loaded into the CMOS internal memory.
In addition, administration module 10 also can comprise line unit 70.Line unit 70 is coupled between switch 30 and the chipset 40, sends chipset 40 in order to the voltage signal Vs with switch 30.In many selection embodiment, switch 30 can be button or operating switch (Slide Switch).And in the present embodiment, be that example describes with the button then with switch 30.Usually know that the knowledgeable is when knowing that the present invention is not as limit yet have in this field.
Suppose that switch 30 is buttons, and when switch 30 during in pressed state, the level of voltage signal Vs can be first level, for example is high level.Otherwise when switch 30 during at releasing orientation, the level of voltage signal Vs then is second level, for example is low level.
Please continue with reference to Fig. 1, chipset 40 can comprise super input and output (Super Input/Output is hereinafter to be referred as SIO) chip 50 and South Bridge chip 60, and the two can couple BIOS 20, and couples switch 30, to receive voltage signal Vs.
Wherein, SIO chip 50 can be according to the level of the voltage signal Vs decision main frame of whether shutting down computer, and South Bridge chip 60 then can the basic setting value that determine whether to reduce be a preset state according to the level of voltage signal Vs.Haveing the knack of this area skill person and should be known in that the basic setting value of reduction is a preset state, for example is the action of the removing CMOS setting value that is commonly called as.In other words, set the bad fault that causes when main frame because of BIOS 20, the user then can use the normal preset state of every setting recovery that makes in the BIOS 20 by push switch 30.
What deserves to be mentioned is that this area has knows that usually the knowledgeable also can utilize the state of BIOS 20 detection computations machine hosts.50 of SIO chips can determine whether to shut down computer main frame according to the level of voltage signal Vs and the state of main frame, for example when main frame during at dos operating system, 50 level decisions of SIO chip main frame of whether shutting down computer according to voltage signal Vs; Otherwise when main frame during not at dos operating system, 50 of SIO chips are failure to actuate.On the other hand, South Bridge chip 60 also can be according to the state of the level of voltage signal Vs and main frame and the basic setting value that determines whether to reduce is a preset state.For example when main frame during at dos operating system or off-mode, whether 60 level decisions according to voltage signal Vs of South Bridge chip reduce basic setting value is preset state; Otherwise when main frame during not at dos operating system or off-mode, 60 of South Bridge chips are failure to actuate.Below each section, then be to do further explanation at each step of the management method of BIOS.
Fig. 2 is the process flow diagram according to the management method of a kind of BIOS of the first embodiment of the present invention.Please merge with reference to Fig. 1 and Fig. 2, at first, utilize chipset 40 to detect the reduction incident and whether take place, wherein detect the reduction incident and whether take place for example can whether to be pressed by detector switch 30 by step S101, and the level of voltage signal Vs is changed, use differentiation reduction incident and whether take place.In more detail, when BIOS 20 sets improper and when causing computer corruption, the user can use by push switch 30 and send voltage signal Vs and give chipset 40.And when voltage signal Vs is first level, then represent the reduction incident to take place; Otherwise,, then represent the reduction incident not take place when voltage signal Vs is not first level or when being second level.When the reduction incident does not take place, then make main frame continue normal operation, and get back to step S101.Otherwise, when the reduction incident takes place, then by shut down computer immediately main frame and be preset state (step S102) of SIO chip 50 by the basic setting value of South Bridge chip 60 reduction.
In the foregoing description, the basic setting value of reducing is a preset state, and its benefit is to get rid of BIOS 20 and sets the bad fault that causes main frame.In addition, the main frame of shutting down computer immediately not only can be avoided hardware damage, also can discharge the data of depositing of main frame, to solve the deadlock problem.For instance, too high if BIOS 20 sets the frequency (Clock) of central processing unit when the user carries out overclocking to the central processing unit of main frame, not only can cause main frame to crash, also may cause central processing unit to damage.This moment, the user only need pass through push switch 30, and can shut down computer the immediately main frame and the basic setting value of reducing are preset state, and is quite convenient for the user.
This area has knows that usually the knowledgeable should be known in when shutting down computer main frame, and the power supply unit of main frame (Power) still can continue to provide V Standby (Standby Voltage) to give main frame.Therefore, in another embodiment, when shutting down computer main frame, power supply unit also stop supplies is temporarily awaited orders power supply to main frame, uses the data of depositing of eliminating main frame more up hill and dale.In addition, have the knack of this area skill person, also switch 30 can be disposed at I/O area (Input/Output the is called for short I O) district of the motherboard of main frame.Thus, the user is under the situation of the casing that need not open main frame, and then can the shut down computer main frame and the basic setting value of reducing are preset state.
What deserves to be mentioned is, though the management method of BIOS has been depicted a possible kenel in the foregoing description, usually know that the knowledgeable should know but have in the affiliated technical field, each manufacturer is all different for the designed step of the management method of BIOS, and therefore application of the present invention is when being not restricted to the possible kenel of this kind.In other words, so long as whether take place, be preset state with whether shut down computer main frame and the basic setting value of reducing of decision according to the reduction incident, be to have met spiritual place of the present invention just.Usually know that the knowledgeable can further understand spirit of the present invention for several embodiment so that this area has again with next, and implement the present invention.
Fig. 3 is the process flow diagram according to the management method of a kind of BIOS of the second embodiment of the present invention.Please merge with reference to Fig. 1 and Fig. 3, step S201 at first, whether the anti-error touch function that detects BIOS 20 by chipset 40 is enabled.When if the anti-error touch function of BIOS 20 is enabled, then can detect the reduction incident whether (step S202) takes place by chipset 40, can then repeat no more at this with reference to the above embodiments about reduction incident part.In step S202, do not continue normal operation when main frame takes place then to make the reduction incident, and get back to step S202; Otherwise, then whether do not enter operating system (step S203) as yet by BIOS 20 detection computations machine hosts.In step S203,, the state of main frame then do not get back to step S202 if entering operating system as yet; Otherwise, then by shut down computer immediately main frame and be preset state (step S204) of SIO chip 50 by the basic setting value of South Bridge chip 60 reduction.
Hold above-mentioned, in step S201, if the anti-error touch function of BIOS 20 by forbidden energy, then can detect the reduction incidents by chipset 40 whether (step S205) take place.In step S205, do not continue normal operation when main frame takes place then to make the reduction incident, and get back to step S205; Otherwise, then skip to step S204.Thus, by enabling the anti-error touch function of BIOS 20, then can avoid main frame to enter operating system after, the mistake that can't expect takes place because of false touch switch 30 causes main frame in the user.
In the foregoing description, the state that main frame does not enter operating system as yet for example is S5 or G3; The state that main frame has entered operating system for example is S0, S1, S3 or S4.Haveing the knack of this area skill person should know, advancing stepwise configuration and power management interface (Advanced Configuration and Power management Interface, abbreviation ACPI) in the specification, defined the dormant state in various degree (Sleep State) of computing machine.For example S1 is that electric power starting suspends (Power On Suspend), and as its name suggests, promptly power supply unit still provides primary power to main frame, and just operating system enters halted state.
Hold above-mentioned, S 3 is for suspending to internal memory (Suspend To RAM, be called for short STR), be that operating system is when suspending, related data (Context) of the data of operating system and each device is deposited among the internal memory, then the primary power of power supply unit is turned off, the only surplus standby power supply that provides uses to internal memory and interlock circuit, to preserve the data in the internal memory.S4 suspends to hard disk (Suspend To Disk, be called for short STD), be that operating system is when suspending, related data of the data of system and each device is deposited among the hard disk, then the primary power of power supply unit is turned off, need not provide standby power supply to use, also not have any data and lose to interlock circuit.3 of S5, G are meant existing general soft-off (Soft Off).
Fig. 4 is the process flow diagram according to the management method of a kind of BIOS of the third embodiment of the present invention.Please merge with reference to Fig. 1 and Fig. 4, the user can pass through trigger switch 30 (step S301), uses and gets rid of main frame because of the improper fault that takes place of BIOS 20 settings.Then by step S302, whether the detection computations machine host is under S0, S1, S3 or S4 state.If main frame under S0, S1, S3 or S4 state, is then represented user's false touch switch 30, therefore then skip to step S303, make main frame continue to keep normal operation.In step S302, if main frame is not under S0, S1, S3 or S4 state, then skip to step S304, the shut down computer main frame and the basic setting value of reducing are preset state.Thus, not only simplified embodiment, also can reach similar effect with second embodiment.
In sum, whether the present invention is first level by the level of detectable voltage signals Vs, and can the shut down computer main frame and the basic setting value of reducing are preset state, uses the fault of getting rid of main frame.Embodiments of the invention have following advantage at least in addition:
When shutting down computer main frame, power supply unit also stop supplies is temporarily awaited orders power supply to main frame, uses the data of depositing of eliminating main frame more up hill and dale.
Switch is disposed at the IO district of motherboard, uses the convenience that improves operating switch.
By enabling the anti-error touch function of BIOS, can avoid main frame to enter operating system after, the mistake that can't expect takes place because of the false touch switch causes main frame in the user.
When switch is triggered,, can avoid the user mistake that can't expect to take place because of the false touch switch causes main frame by the state of detection computations machine host.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (11)
1. the administration module of a Basic Input or Output System (BIOS) is applicable to a main frame, it is characterized in that, above-mentioned administration module comprises:
One Basic Input or Output System (BIOS) stores a basic setting value;
One switch is emerging in outside the above-mentioned main frame, and in order to producing a voltage signal, and the level of above-mentioned voltage signal is to determine according to the state of above-mentioned switch; And
One chipset couples above-mentioned switch and above-mentioned Basic Input or Output System (BIOS), and above-mentioned chipset is according to the level of above-mentioned voltage signal, is a preset state and whether decision closes above-mentioned main frame and reduce above-mentioned basic setting value,
Wherein above-mentioned chipset comprises:
One super I/O chip couples above-mentioned switch and above-mentioned Basic Input or Output System (BIOS), determines whether closing above-mentioned main frame in order to the level according to above-mentioned voltage signal; And
One South Bridge chip couples above-mentioned switch and above-mentioned Basic Input or Output System (BIOS), is above-mentioned preset state in order to whether to reduce above-mentioned basic setting value according to the level decision of above-mentioned voltage signal.
2. administration module according to claim 1, it is characterized in that, when above-mentioned super I/O chip is closed above-mentioned main frame, above-mentioned super I/O chip is the above-mentioned main frame employed of the forbidden energy power supply of awaiting orders then, in order to eliminate the data of depositing of above-mentioned main frame.
3. administration module according to claim 1 is characterized in that, more comprises:
One line unit is coupled between above-mentioned switch and the above-mentioned chipset, in order to above-mentioned voltage signal is passed to above-mentioned chipset.
4. administration module according to claim 1, it is characterized in that, whether the anti-error touch function that above-mentioned chipset detects above-mentioned Basic Input or Output System (BIOS) is enabled, when above-mentioned anti-error touch function was enabled, above-mentioned Basic Input or Output System (BIOS) then detected the operating state of above-mentioned main frame.
5. administration module according to claim 4, it is characterized in that, wherein when above-mentioned anti-error touch function is enabled, above-mentioned chipset determines whether close above-mentioned main frame according to the operating state of the level of above-mentioned voltage signal and above-mentioned main frame and reduces above-mentioned basic setting value is above-mentioned preset state.
6. administration module according to claim 5, it is characterized in that, when above-mentioned anti-error touch function is enabled, and the operating state of above-mentioned main frame does not enter an operating system as yet, and the level of above-mentioned voltage signal is when being one first level, and above-mentioned chipset is then closed above-mentioned main frame and reduced above-mentioned basic setting value is above-mentioned preset state.
7. the management method of a Basic Input or Output System (BIOS) is applicable to a main frame, and above-mentioned Basic Input or Output System (BIOS) stores a basic setting value, it is characterized in that above-mentioned management method comprises:
Whether whether the reduction incident that detects take place to enable with an anti-error touch function; And
When above-mentioned anti-error touch function is enabled and above-mentioned reduction incident when taking place, then according to the operating state of above-mentioned main frame, be preset state and whether decision closes above-mentioned main frame and reduce above-mentioned basic setting value,
Wherein, the reduction incident judges according to the level of a voltage signal whether above-mentioned reduction incident is set up,
This anti-error touch function foundation residing state of main frame instantly judges whether above-mentioned anti-error touch function is set up.
8. management method according to claim 7 is characterized in that, detects the step whether above-mentioned reduction incident takes place, and comprising:
Receive a voltage signal;
When the level of above-mentioned voltage signal is one first level, judge that then above-mentioned reduction incident takes place; And
When the level of above-mentioned voltage signal is one second level, judge that then above-mentioned reduction incident does not take place.
9. management method according to claim 7 is characterized in that, more comprises:
When above-mentioned anti-error touch function was taken place by forbidden energy and above-mentioned reduction incident, then closing above-mentioned main frame and reducing above-mentioned basic setting value was a preset state.
10. management method according to claim 7 is characterized in that, closes above-mentioned main frame, comprising:
Stop supplies one is awaited orders power supply to above-mentioned main frame, in order to eliminate the data of depositing of above-mentioned main frame.
11. management method according to claim 7 is characterized in that, according to the operating state of above-mentioned main frame, is above-mentioned preset state and whether decision closes above-mentioned main frame and reduce above-mentioned basic setting value, comprising:
When the operating state of main frame does not enter an operating system as yet, and above-mentioned reduction incident is when taking place, and then closing above-mentioned main frame and reducing above-mentioned basic setting value is above-mentioned preset state.
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| TWI461885B (en) | 2009-02-27 | 2014-11-21 | Asustek Comp Inc | Over clocking control device and over clocking control method |
| CN102467225A (en) * | 2010-11-18 | 2012-05-23 | 英业达股份有限公司 | Memory power supply device and method of computer system |
| TWI494744B (en) | 2013-07-05 | 2015-08-01 | Giga Byte Tech Co Ltd | Power control system and method thereof |
| CN104281245B (en) * | 2013-07-05 | 2017-03-22 | 技嘉科技股份有限公司 | Power control system and method |
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| CN1707442A (en) * | 2005-03-28 | 2005-12-14 | 联想(北京)有限公司 | Method for recoverying basic inputting and outputting system chip |
| CN1885231A (en) * | 2006-06-12 | 2006-12-27 | 张健 | Apparatus and method for recovering computer system |
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| CN1707442A (en) * | 2005-03-28 | 2005-12-14 | 联想(北京)有限公司 | Method for recoverying basic inputting and outputting system chip |
| CN1885231A (en) * | 2006-06-12 | 2006-12-27 | 张健 | Apparatus and method for recovering computer system |
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