CN101299055A - Simulation integrated switch current circuit testing method based on wavelet-neural net - Google Patents

Abstract

The present invention discloses a method for testing an analog integrated switch current circuit based on a wavelet-neural network. The method comprises the following steps: selecting an actuating signal aiming at the state of typical failure, respectively sampling the excitation response output signal in the time domain and frequency domain as neural network training samples; adopting a group sensitivity analysis for choose and confirm the test defect point with the structural characteristic of switch current circuit; adopting a wavelet multiple-dimension decomposing for preprocessing each kinds of response data for reducing the complexity of the neural network, and outputting to the neural network when a fault detail is generated; and sorting and recognizing different failure response results by the neutral network. The actual voltage signal of the circuit to be tested is measured and is inputted to a trained neural network model to complete the failure test and recognition. The method according to the invention has evident predominance for simulating the software and hardware failure and defect problem of integrated switch current circuit and has the advantages of simple structure, high speed and high accuracy.

Description

Simulation integrated switch current circuit testing method based on wavelet-neural net

Technical field

The present invention relates to a kind of simulation integrated switch current circuit testing method, particularly a kind of simulation integrated switch current circuit testing method based on wavelet-neural net.

Background technology

In discrete time mimic channel field owing to do not need floating earth capacitance, compatibility standard digital technology, and adopt the current-mode signal very to adapt to low-power consumption and use, Switched-Current Circuit as a kind of technology of replaceable switching capacity by more and more widely application.Yet aspect the test of Switched-Current Circuit, traditional Analog Circuits Test Method and incompatibility Switched-Current Circuit, at present the switch current circuit testing method of report being arranged abroad is to utilize direct current or low frequency signal to carry out functional test, all fail to relate to for the fault that mimic channel tolerance analysis, parameter defective cause, and the method that proposes generally only adapts to the Switched-Current Circuit of special construction.Because the mimic channel characteristic is different, measurement parameter is changeable and various non-linear factor has caused the complicacy of its method of testing, it also is the problem of a difficulty that threshold value is determined.Method commonly used in recent years is to utilize neural network to carry out analog circuit fault diagnosing.But have more defective to satisfactorily resolve on the neural network theory, for example structure choice, local extremum, cross problems such as study, it is long that wherein sixty-four dollar question is exactly the training time.For a very little circuit, all need very many training samples for obtaining desirable failure modes, the complicated and long training time of causing network structure to be difficult to accept like this.

Summary of the invention

Above-mentioned technical matters for the test that solves the simulation integrated switch current circuit exists the invention provides a kind of simulation integrated switch current circuit testing method based on wavelet-neural net.Adopt the inventive method can simplify the structure of analysis of neural network device, and reduce the training time, improve measuring accuracy.

The technical scheme that the present invention solves the problems of the technologies described above may further comprise the steps:

1) set up test circuit, the fault collection is set, and the pumping signal that puts on test circuit;

2) device that will constitute test circuit according to the Switched-Current Circuit characteristic carries out group, carries out sensitivity analysis according to group's mode, determines the test node of circuit;

3) at the typical fault situation, apply pumping signal at node and carry out the test of Switched-Current Circuit failure response, obtain reaching the some response;

4) utilize multi-scale wavelet to decompose, the failure response signal is carried out the decomposition pre-service of time-domain and frequency-domain, obtain the thin looks of low frequency;

5) with the thin looks data after the wavelet pretreatment as the training sample neural network training;

6) actual voltage signal of measurement circuit under test with the neural network model that its input trains, is analyzed the stable state output result of support model, obtains the test and the recognition result of fault and defective.

Technique effect of the present invention is: the present invention is according to the peculiar structure of switching current, the cmos element of forming circuit is classified by the method for group's sensitivity analysis, according to the influence degree of circuit performance is determined choosing of malfunctioning node, apply the pumping signal of selection at node, the test and excitation response.Before the neural network sample training, response data is carried out wavelet pretreatment, can extract tested Switched-Current Circuit dynamic behaviour sample with the thin looks data of extracting of low frequency all sidedly as training sample, simplify the structure of analysis of neural network device simultaneously greatly, and reduce the training time, improve the simulation integrated switch current circuit testing precision.

The present invention is further illustrated below in conjunction with accompanying drawing.

Description of drawings

Fig. 1 is a process flow diagram of the present invention.

Fig. 2 is the wavelet decomposition synoptic diagram among the present invention.

Fig. 3 can accept the border for the gain of standard 5% deviation among the present invention.

Fig. 4 is switch current circuit testing fault model among the present invention.

Fig. 5 is the time domain response of switching current CMOS bust among the present invention.

Fig. 6 is the time-domain and frequency-domain response of all kinds of normalization mutual conductances of the c of group among the present invention.

Fig. 7 is the time-domain and frequency-domain response of all kinds of normalization mutual conductances of the d of group among the present invention.

Fig. 8 is the tri-layer wavelet decomposition of the c of group ideal among the present invention with band bias circuit frequency domain response signal.

The c of group ideal and the tri-layer wavelet decomposition of being with bias circuit time domain response signal among Fig. 9 the present invention.

Figure 10 is the tri-layer wavelet decomposition of group d ideal among the present invention with band bias circuit frequency domain response signal.

Figure 11 is the layer 5 time wavelet decomposition of the d of group ideal among the present invention with band bias circuit time domain response signal.

Figure 12 wavelet neural network test structure figure

Figure 13 is the tester analysis result of 6 class busts among the present invention.

Figure 14 is 5% defective circuits analysis result for deviation among the present invention.

Figure 15 is 20% defective circuits analysis result for deviation among the present invention.

Embodiment

The simulation integrated switch current circuit testing method process that the present invention is based on wavelet-neural net is as follows:

Construct a representational test simulation integrated switch current circuit.

Select the fault collection: to the mimic channel of having set up, consider the element hard fault (being element short circuit or open circuit) in the circuit, and do not consider the lead wire fault in the circuit.Actual scheme is to select some single faults and a plurality of fault as the fault collection according to the characteristics of circuit-under-test and experience in the past and element failure rate.

Select pumping signal: select for use the input signal similar usually as pumping signal to real work.For fully concentrated the owning of isolated fault (most of at least) faults, can adopt the composite signal of multiple input signal to encourage in the real work as circuit.

The CMOS parameter that constitutes Switched-Current Circuit is carried out sensitivity analysis.Its influence degree to inside and outside parameter of circuit is represented in the sensitivity of device.According to cycle switch linear circuit analytical approach, for a N phase switch, the cycle is that the Switched-Current Circuit of T adopts sinusoidal signal as input signal, and parameter x (z) is about node voltage E _i(z) sensitivity is:

$S_x^{E_i}=\frac{x}{E_i}\underset{m=1}{\overset{f}{\mathrm{\Σ}}}\underset{k=1}{\overset{f}{\mathrm{\Σ}}}\underset{l=1}{\overset{f}{\mathrm{\Σ}}}\frac{{\∂E}_{i,\mathrm{mk}}}{{\∂x}_l}$

M=1 wherein, 2...f is an output phase, k=1,2...f are input phase, x _l(z) be parameter x (z) during phase place l.

Node voltage E _{I, mk}(z) for the mutual conductance G of the input a that is operated in out of phase with output branch road b _Mab(z) sensitivity is:

$S_{G_{\mathrm{mab}}}^{E_i}=\frac{G_{\mathrm{mab}}}{E_i}\underset{m=1}{\overset{f}{\mathrm{\Σ}}}\underset{k=1}{\overset{f}{\mathrm{\Σ}}}\underset{l=1}{\overset{f}{\mathrm{\Σ}}}{V}_{a,\mathrm{lk}}{V}_{b,\mathrm{lm}}$

Under the condition of given mutual conductance stochastic error, can further calculate absolute or statistic bias, add or deduct deviation from typical curve and just can obtain error margin.The formula of counting statistics deviation is as follows:

$\mathrm{\Δ}\left|E_a\left(\mathrm{j\ω}\right)\right|=0.05\×8.686\sqrt{\underset{i}{\mathrm{\Σ}}{\left(\mathrm{Re}{S}_{G_{\mathrm{mi}}}^{E_a\left(\mathrm{j\ω}\right)}\right)}^2}$

Wherein 0.868 is the db-loss constant.The db-loss coefficient need be in formula, added when promptly adopting the decibel expression, otherwise this coefficient needn't be added.

The compatible digital technology of Switched-Current Circuit, circuit only is made of the CMOS transistor, and for obtaining the function that design needs, the size of each metal-oxide-semiconductor mutual conductance must be calibrated the result in strict conformity with electric current.With 6 rank chebyshev low-pass filters is example, and the whole CMOS pipes that constitute wave filter calculate according to calibration and can be divided into 11 values, and its normalization transconductance value and the plural sensitivity under 5% standard deviation condition thereof are as shown in table 1.Fig. 3 is the circuit gain acceptable deviation range under 5% standard deviation condition that draws according to sensitivity analysis.

The sensitivity of table 1 group thin parameter

Adopt Fig. 4 fault model, can simulate all kinds of busts such as the short circuit of grid source, grid leak short circuit, drain-source short circuit, open-drain, source electrode open circuit and open-grid, can also simulate all kinds of parameter defectives by the adjustment of different circuit capacitance values.The response data that obtains as shown in Figure 5.Be comprehensive acquisition parameter fault data, the response that causes for parameter error also needs to gather, and its frequency domain and time domain response data are shown in Fig. 6-7.The relatively large less relatively d group of C group specific sensitivity of result's reality sensitivity influences more obvious to circuit performance.

Apply pumping signal, measure exciter response, be loaded into neural network after all kinds of response data samples are handled through small echo and train.

Wavelet decomposition and low frequency coefficient extract: wavelet decomposition can be preserved the dynamic perfromance of circuit when extracting the output signal principal character.Can realize with the linear combination of small echo signal according to any signal that has finite energy of wavelet theory.The consistance and the specific characteristic of its coefficient characterization signal and basic function, just we need extract.

The decomposition of small echo one dimension is defined as:

$W(a,b)=\underset{-\∞}{\overset{\∞}{\∫}}f\left(t\right){\mathrm{\ψ}}^{*}a,b\left(t\right)\mathrm{dt}$

Wherein ${\mathrm{\ψ}}_{(a,b)}\left(t\right)=\frac{1}{\sqrt{\left|a\right|}}\mathrm{\ψ}\left(\frac{t-b}{a}\right)$

A and b are real number in the formula, ^*Number the expression complex conjugate.(a b) is the coefficient of dissociation of f (t) to W.Wavelet decomposition is the function of two variablees.For given a, ψ _{A, b}(t) be female small echo ψ _{A, 0}(t) skew of b on time shaft.Variable b represents time migration.The ψ that less a value is corresponding little _{A, b}(t) yardstick or high frequency and 1/a ratio.The corresponding large scale ψ of the value of big a _{A, b}(t), expand female small echo and shrink its frequency spectrum.Therefore, the frequency spectrum at frequency-domain small wave looks that just as Bandpass Filters response centre frequency is w0, bandwidth deltaf ω.Parameter a increase can make frequency domain decompose reinforcement and the Time Domain Decomposition reduction.A reduces and then reduces frequency domain decomposition raising Time Domain Decomposition.Therefore the wavelet decomposition of circuit-under-test output signal can obtain the information of all spectrum components in the different scale details.The coefficient that the output response signal that the output test node is measured carries out wavelet decomposition can be used as the evaluate parameter of transient state functional test.Such pre-service can reduce the yardstick analyzed and lossing signal characteristic quality not substantially.

All (a, b) calculating is a very time-consuming evaluation work to the coefficient of wavelet decomposition W of signal at each yardstick.For avoiding this situation, can adopt the mode of discrete sampling, obtain discrete wavelet.The discrete wavelet analysis is set sampled point and is followed following rule: a ^m=2 ^m, b _Mn=a _mNT=2 ^mNT, wherein T is the sampling period, m, n is an integer, discrete wavelet is defined as:

$W(m,n)2^{-\frac{\mathrm{<figure-callout\; id="2"\; label="m"\; filenames="A20081003150500131.png,A20081003150500132.png"\; state="\{\{state\}\}">m</figure-callout>}}{2}}\underset{k}{\mathrm{\&Sigma;}}x\left(k\right)\mathrm{\&psi;}(2^{-m}k-n)$

Wherein ψ (k) is the discrete form of ψ (t), and x (k) is a discrete signal.An original signal can be decomposed into the thin looks A of low frequency through small echo _jWith the thin looks D of high frequency _j, the thin looks of its medium and low frequency have been represented the approximate construction of signal and the special details of the thin looks performance of high frequency.Thereby the feature of signal can be obtained by the thin looks of low frequency.The decomposed signal number of samples reduces half each time, therefore can normally propose under the prerequisite of characteristics of signals, thereby less greatly number of samples is simplified the required time of structure decrease training of neural network.

Correctly selecting female small echo is very crucial in signal Processing.Proved that now a few class small echos are very suitable in signal and Flame Image Process.They are respectively Daubechies, Biorthogonal, Haar, Shanon small echo or the like.Each class small echo all has the application that property is applicable to that some are special.The Haar small echo is stronger to the time station-keeping ability, to the frequency localization ability a little less than.And the Shanon small echo is on the contrary, and the time station-keeping ability is more weak and have stronger frequency localization ability, because it has the spectral characteristic of an optimum wideband wave filter.Also have the station-keeping ability of standard orthogonal wavelet to fall between in addition. so this paper adopts the female small echo of Daubechies class, they are standard orthogonal wavelets.Experiment shows adopts the db2 small echo of Daubechies class can obtain more accurate wavelet coefficient in than broadcasting and TV road defective.

Coefficient calculations and low frequency coefficient extraction procedure that db2 decomposes are as follows ^]:

[c, 1] wavedec (s, 3, " db2 "): the %db2 tri-layer decomposes;

Ca1=appcoef (c, 1, " db2 ", 1); % extracts the first yardstick low frequency coefficient A from [c, 1] ₁

Ca2=appcoef (c, 1, " db2 ", 2); % extracts the second yardstick low frequency coefficient A from [c, 1] ₂

Ca3=appcoef (c, 1, " db2 ", 3); % extracts the 3rd yardstick low frequency coefficient A from [c, 1] ₃.

Ca1, ca2, ca3 are respectively first, second and third yardstick low frequency coefficients

The wavelet decomposition synoptic diagram as shown in Figure 2.

Time-domain and frequency-domain signal with exciter response carries out wavelet decomposition respectively, and the result is shown in Fig. 8-11. and decompose from time domain and frequency-region signal, through three decomposition, the obvious difference of fault-signal and ideal signal shows in waveform.The d group time domain response signal lower for sensitivity also reaches resolving effect through 5 decomposition.

The wavelet neural network test: the test structure of wavelet neural network such as Figure 12, input X is 2 to the power of hidden layer ^m, the hidden layer activation function is wavelet scaling function φ (), and the thresholding of i hidden node is b _i, hidden layer is w to the weights of output layer _Ij, the thresholding of output node is 0.If hidden layer has p node.Q output altogether has:

$y_i=f\left(\underset{j=1}{\overset{p}{\mathrm{\&Sigma;}}}{w}_{\mathrm{ij}}{\mathrm{outh}}_j\right)$

${\mathrm{out}}_j=\mathrm{\&phi;}(\underset{m=1}{\overset{n}{\mathrm{\&Sigma;}}}{x}_{\mathrm{im}}{a}_{\mathrm{im}}+b_i),i=\mathrm{1,2}\mathrm{\&Lambda;q}$

Wherein f () is the sigmoid function, and whole network parameter to be trained has j weights a undetermined _Im, b _j, w _Ij, wherein (m=1,2. Λ n; I=1,2, Λ q; J=1,2, Λ p)

The emulation of above-mentioned Switched-Current Circuit failure response can have the dedicated emulated instrument ASIZ of switching current to carry out, and the wavelet pretreatment of sample of signal and analysis of neural network can be realized with the MATLB tool box.Experimental result shows, does not adopt wavelet pretreatment, and used neural network needs three layers, 38 nodes, and neuron needs 18.Just only need two-layer 5 nodes after the process wavelet pretreatment, 8 neurons, through 100 cycles of training, the failure convergence progress reaches 10 ^-9. Figure 13-the 15th, tester is to the test result of all kinds of faults.For all kinds of busts, tester can reach the fault coverage more than 90% as seen from the figure.For the lower group of sensitivity _{B, f, g, h, I}Deng, it is not obvious that its parameter changes for the circuit performance parameters influence, but the parameter that exceeds tolerance interval changes the fault coverage that still can reach more than 90%.

Claims (1)

1. simulation integrated switch current circuit testing method based on wavelet-neural net may further comprise the steps:

1) set up test circuit, the fault collection is set, and the pumping signal that puts on test circuit;

2) device that will constitute test circuit according to the Switched-Current Circuit characteristic carries out group, carries out sensitivity analysis according to group's mode, determines the test node of circuit;

3) at the typical fault situation, apply pumping signal at node and carry out the test of Switched-Current Circuit failure response, obtain reaching the some response;

4) utilize multi-scale wavelet to decompose, the failure response signal is carried out the decomposition pre-service of time-domain and frequency-domain, obtain the thin looks of low frequency;

5) with the thin looks data after the wavelet pretreatment as the training sample neural network training;

6) actual voltage signal of measurement circuit under test with the neural network model that its input trains, is analyzed the stable state output result of support model, obtains the test and the recognition result of fault and defective.

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