CN101295272A - Method and device for controlling circuit module failure tolerance - Google Patents
Method and device for controlling circuit module failure tolerance Download PDFInfo
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- CN101295272A CN101295272A CNA200810110854XA CN200810110854A CN101295272A CN 101295272 A CN101295272 A CN 101295272A CN A200810110854X A CNA200810110854X A CN A200810110854XA CN 200810110854 A CN200810110854 A CN 200810110854A CN 101295272 A CN101295272 A CN 101295272A
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Abstract
The invention discloses a method and a device used for the fault tolerance of a control circuit module; wherein, the method comprises corresponding relation between the error type and the processing mode is arranged for the circuit module which participates in the task or program execution and a state converter used for state conversion is arranged; after the circuit module which participates in the task or program execution detects error, the processing mode corresponding to the error type is determined according to the arranged corresponding relation, the processing is carried out according to the processing mode; the current working state is turned to an idle state according to the arranged state machine and the task or program execution is stopped. Therefore, the method and the system provided by the invention improve the efficiency of the fault tolerance of the control circuit module and ensure the basic functions and stability of the whole circuit system after the fault tolerance of the circuit module.
Description
Technical field
The present invention relates to when carrying out a task or program control technology, method and device that particularly a kind of control circuit module is fault-tolerant to the circuit module that participates in execution work.
Background technology
At a SOC (system on a chip) (SOC, System On Chip) needs the circuit module collaborative work of a lot of difference in functionalitys in, central processing unit (the CPU of these circuit in SOC, Central Process Unit) control down, start simultaneously simultaneously or not, co-operation is finished a task or a program.In the circuit module cooperative working process of difference in functionality,, and cause task or program to finish often because some circuit modules wherein take place or find mistake.At this moment, carry out fault-tolerantly with regard to the circuit module that needs SOC control collaborative work, so that in time notify the circuit module that does not make a mistake of collaborative work to quit work, the free time goes out the bus among the SOC, makes SOC handle other tasks or program earlier by bus.
At present, the SOC control circuit module is carried out fault-tolerant process: finish in a task or the program process at SOC, the some circuit modules that participate in collaborative work take place or the discovery mistake, the processing of this mistake is confined to the inside in this circuit module and is finished by the CPU control and treatment, promptly this circuit module can be by the inquiry of the CPU among the SOC, perhaps this circuit module should mistake notify CPU (in SOC with the message interrupt mechanism, connect by bus between circuit module and the CPU), CPU stops to send error reporting (bus that connects between by CPU and other circuit modules) to the startup of other circuit modules that participate in collaborative work and to other circuit modules that participate in collaborative work.CPU is then according to the follow-up fault processing flow process of setting, as stops to carry out this task or program, jumps to other tasks or program and participates in the circuit module execution by total line traffic control.
This fault-tolerant process in the SOC control circuit module adopts is indirect report mechanism or by the CPU inquiry mechanism, by the control of CPU united and coordinating, this control procedure can influence the fault-tolerant efficient of whole SOC then.Particularly in fault-tolerant process,, cause CPU to know whether certain circuit module makes a mistake, thereby can't control fault-tolerant process by indirect report mechanism or by the CPU inquiry mechanism by the CPU united and coordinating in case CPU is blocked; Perhaps when CPU by indirect report mechanism or by the CPU inquiry mechanism, know that certain circuit module makes a mistake after, if at this moment CPU is blocked, then can't carries out again and control fault-tolerant process by the CPU united and coordinating.Like this, just cause the whole task of SOC execution or the paralysis of program, influence the basic function and the stability of SOC entire circuit system.
Lift in specific embodiment explanation prior art in SOC control circuit module and carry out fault-tolerant process, as shown in Figure 1, comprise CPU, direct memory visit (DMA), interface controller (Interface Controller), equipment (Device) and single port storer (Memory) among this SOC.Wherein, DMA, CPU and single port Memory connect by bus, and the data among the Device are gathered by Interface Controller, are sent among the single port Memory by DMA then and store.The program of CPU or/and data storage in single port Memory, simultaneously be stored in program among the single port Memory or/and data by the CPU request of access, DMA preferentially takies single port Memory and bus than the priority height of CPU, and CPU is suspended when DMA takies single port Memory and bus.
The process that adopts synoptic diagram shown in Figure 1 to carry out a task or program is: 1) CPU takies bus and single port Memory, the working procedure execution command; 2) DMA sends visit single port Memory request to bus, after CPU detects by bus, responds this request and discharges bus; 3) DMA takies bus and single port Memory, the data that transmission is collected from Device by Interface Controller; 4) behind the DMA transmission ED, discharge bus, cancel visit single port Memory request, CPU resumes bus and Memory, the working procedure fill order.
In adopting task of synoptic diagram execution or program process shown in Figure 1, because the priority of DMA is higher than CPU, when DMA by bus during to single port Memory transmission data, and CPU also will pass through bus access single port Memory, this moment, CPU will be blocked, discharges bus behind DMA transmission ED.When DMA transmission data, make mistakes, make a mistake when for example Interface Controller is from the Device image data,, but need circular to detect to CPU or by CPU owing to mistake can not circulated a notice of to DMA, then DMA rests on data transmission state always, and CPU stops up always.Even mistake can be circulated a notice of to detect to CPU or by CPU, CPU also can't handle this mistake because being in blocked state.CPU can't be notified to DMA with error reporting, makes DMA stop data transmission.If there is not error reporting mechanism notice DMA, then CPU will be stopped up always, can't carry out down-stream, to cause total system operation paralysis.
Summary of the invention
The invention provides the fault-tolerant method of a kind of control circuit module, this method can improve the fault-tolerant efficient of control circuit module, the fault-tolerant back of circuit module is guaranteed the basic function and the stability of entire circuit system.
The present invention also provides a kind of control circuit module fault-tolerant device, and this device can improve the fault-tolerant efficient of control circuit module, the fault-tolerant back of circuit module is guaranteed the basic function and the stability of entire circuit system.
According to above-mentioned purpose, technical scheme of the present invention is achieved in that
The method that a kind of control circuit module is fault-tolerant is participating in executing the task or the circuit module of program is provided with the corresponding relation of type of error and processing mode, and the state machine that carries out state exchange is being set, and this method also comprises:
Participation is executed the task or the circuit module of program detects mistake, determine the processing mode of the type correspondence that this is wrong according to the corresponding relation that is provided with, handle according to this processing mode, according to the state machine that is provided with self state is jumped to idle condition by current working state, stop to execute the task or program.
The described processing according to this processing mode comprises: execute the task or other interlock circuit modules transmission error notifications of program to participations;
This method also comprises: participate in executing the task or after other interlock circuit modules of program receive error notification, according to the state machine that is provided with self state is jumped to idle condition by current working state or standby condition, stop to execute the task or program.
The described processing according to this processing mode comprises: participate in executing the task or the circuit module of program is not executed the task or other interlock circuits transmission request signals of program to participations;
This method also comprises: participate in executing the task or other interlock circuit modules of program do not receive request signal in the time of setting after, according to the state machine that is provided with self state is jumped to idle condition by current working state or standby condition, stop to execute the task or program.
After participating in executing the task or other interlock circuit modules of program jump to idle condition, after receiving the request signal that participation is executed the task or the circuit module of program sends, according to the state machine that is provided with self state is jumped to duty, re-execute task or program.
Described participation is executed the task or the circuit module of program is interface controller Interface Controller, and participation is executed the task or other circuit modules of program are direct memory visit DMA.
The device that a kind of control circuit module is fault-tolerant, this device comprises: state machine, detection module, corresponding relation memory module and processing module, wherein
Detection module is used to detect mistake, perhaps detects rub-out signal or detect in the time of setting not receive request signal, and the transmit status switching signal is given state machine, and the mistake that the transmission detection obtains is to processing module;
State machine is used for according to state exchange signal redirect state, state is jumped to stop on the idle condition executing the task or program;
The corresponding relation memory module is used for the corresponding relation of storage errors type and processing mode;
Processing module is used for determining to detect obtaining wrong type, after the definite corresponding processing mode of corresponding relation memory module stored relation, adopts corresponding processing mode to handle this mistake.
Comprise first sending module in the described processing module, be used for determining to send rub-out signal, the rub-out signal that generates is sent to the interlock circuit module according to the processing mode of correspondence.
Comprise second sending module in the described processing module, be used for determining no longer to send request signal to the interlock circuit module according to the processing mode of correspondence.
From such scheme as can be seen, method provided by the invention and device are in order to improve the fault-tolerant efficient of control circuit module, do not adopt indirect report mechanism or,, but in each circuit module, state machine is set then by the fault-tolerant process of CPU united and coordinating control circuit module by the CPU inquiry mechanism.When certain circuit module makes a mistake, determine the processing mode of type of error correspondence according to the corresponding relation of type of error that is provided with and processing mode, give other interlock circuit modules with this error notification.This circuit module also carries out the state exchange of this circuit module according to the state machine that is provided with, thus the switch operating state.After other interlock circuit modules receive notice, carry out state exchange according to the state machine that self is provided with, thus the switch operating state.Like this, even CPU is blocked in fault-tolerant process, can any influence not arranged to the basic function and the stability of entire circuit system yet.Therefore, method provided by the invention and device have improved the fault-tolerant efficient of control circuit module, the fault-tolerant back of circuit module are guaranteed the basic function and the stability of entire circuit system.
Description of drawings
Fig. 1 carries out fault-tolerant process specific embodiment synoptic diagram for prior art control circuit module in SOC;
Fig. 2 is the fault-tolerant method flow diagram of control circuit module provided by the invention;
Fig. 3 is C PU, the DMA in the embodiment of the invention, the mutual synoptic diagram of signal between the Interface Controller;
The state machine that Fig. 4 is provided with for embodiment of the invention DMA carries out the state redirect and carries out the synoptic diagram of inter-process;
The sequential chart of DMA control signal when Fig. 5 detects rub-out signal for the embodiment of the invention;
Fig. 6 is the processing sequential chart of embodiment of the invention DMA to DRQ signal and coherent signal;
Fig. 7 is the redirect synoptic diagram of three kinds of states in the state machine of embodiment of the invention DMA setting;
Fig. 8 is the structural representation of embodiment of the invention circuit module.
Embodiment
In order to make the purpose, technical solutions and advantages of the present invention clearer, below lift specific embodiment and, the present invention is described in more detail with reference to accompanying drawing.
The present invention is in order to improve the fault-tolerant efficient of control circuit module, do not adopt indirect report mechanism that prior art proposes or by the CPU inquiry mechanism, then by the process of CPU united and coordinating control, but in each circuit module state machine is set.When certain circuit module makes a mistake, determine the processing mode of type of error correspondence according to the corresponding relation of type of error that is provided with and processing mode, give other interlock circuit modules with this error notification, this circuit module that makes a mistake also carries out the state exchange of this circuit module, switch operating state according to the state machine that is provided with.After other interlock circuit modules receive error notification, self is carried out state exchange, the switch operating state according to the state machine that self is provided with.Owing in carrying out the fault-tolerant process of circuit module, do not need the participation of CPU, but finish by the fault tolerant mechanism of each circuit module setting.Like this, even CPU is blocked in fault-tolerant process, can any influence not arranged to the basic function and the stability of entire circuit system yet.
In the present invention, state machine is set in circuit module, this state machine carries out redirect according to the unlike signal or the detected mistake that receive, three kinds of states are generally arranged: duty, standby condition and idle condition in state machine, as when receiving request signal, then jump to duty and carry out work by standby condition; As receive rub-out signal or when in the time of setting, not receiving request signal or detecting mistake, then jump to idle condition and quit work by duty.These three kinds of states can carry out correspondingly redirect according to set different condition between any two.
In the present invention, according to each circuit module self-characteristic, the corresponding relation of type of error and processing mode is set, when circuit module detects executive routine or task wrong in circuit module inside, determine type of error, carry out corresponding processing according to the corresponding relation that is provided with.Generally comprise to the interlock circuit module in the corresponding processing and send error notification etc.
Fig. 2 is the fault-tolerant method flow diagram of control circuit module provided by the invention, and its concrete steps are:
In this step, this processing mode can be for sending error notification for other interlock circuit modules or/and other correlation modules that the request that do not send is carried out to this task of participation etc.
Other interlock circuit modules that this task is carried out in step 204, participation receive error notification or/and do not receive when asking in the time of setting, then adopt the state machine that is provided with to carry out redirect, jump to idle condition from duty or standby condition, stop to carry out this task, after receiving new task requests, jump to standby condition or duty (according to the state difference of the different redirects of the condition of setting) from idle condition again again.
Lift a specific embodiment and be elaborated, this specific embodiment adopts synoptic diagram shown in Figure 1.
In this embodiment, after Interface Controller detects generation transmission error in data, as can't when Device collects data, detecting the generation error of transmission, then adopt the state machine that is provided with to carry out the state redirect, jump to idle condition from duty.Interface Controller determines that also according to the type of error that is provided with and the corresponding relation of processing mode processing mode is to send error notification to DMA.After DMA receives this error notification, adopt the state machine that is provided with to carry out the state redirect, jump to idle condition from standby condition or duty, discharge the SOC bus to finish, to give CPU to the control of SOC bus, carry out down-stream or task executions by CPU by bus, avoid the CPU deadlock state that occurs in the prior art, and cause the total system paralysis of SOC.
In this embodiment, the signal between CPU, DMA, the Interface Controller alternately as shown in Figure 3.When DMA visit Interface Controller, need to wait for Interface Controller transmitting apparatus request (DRQ, Device Request) signal; Receive this DRQ signal of InterfaceController transmission at DMA after, DMA sends request (Request) signal to CPU; After CPU receives request (Request) signal of DMA transmission, send response (ACK) signal and give DMA and keep this signal to give single port Memory end with the data that interface Controller collects by bus transfer up to DMA.Give in the process of single port Memory by bus transfer when data that DMA collects interface Controller and error of transmission to occur, then interface Controller is after DMA sends rub-out signal, DMA adopts the state machine that is provided with to carry out the state redirect, jump to idle condition from duty, discharge the SOC bus, stop to send the Request signal, will give CPU the control of SOC bus to CPU.
In this embodiment, when DMA does not receive rub-out signal, after then DMA finishes current data transmission, jump to standby condition from duty, in the time of setting, judge not receive the DRQ signal that interface Controller sends, then also adopt the state machine that is provided with to carry out the state redirect, jump to idle condition from standby condition, discharge the SOC bus, stop to send the Request signal, will give CPU the control of SOC bus to CPU; Receive the DRQ signal that interface Controller sends if in the time of setting, judge, then hold over bus, jump to duty by standby condition, give single port Memory with the data that interface Controller collects by bus transfer by bus.
The state machine that Fig. 4 is provided with for embodiment of the invention DMA carries out the state redirect and carries out the synoptic diagram of inter-process, and as shown in the figure, DMA is in idle condition, waits for receiving the DRQ signal; After receiving the DRQ signal, jump to duty, send the Request signal to CPU; After receiving ack signal, give single port Memory with the data that interface Controller collects by bus transfer by bus; In data transmission procedure, whether the DMA real-time judge has the DRQ signal, if having, then continues the transmission data and sends the Request signal to CPU, if do not have, then cancels the Request signal that sends to CPU, discharges the SOC bus, and enters idle condition.
In this embodiment, when DMA detects rub-out signal, DMA then adopts the state machine of setting to carry out redirect, jumps to idle condition from duty, stops data transmission, discharges the SOC bus, cancels the Request signal that sends to CPU.The sequential chart of DMA control signal as shown in Figure 5 when detecting rub-out signal, wherein CLK is a clock signal, ERROR is a rub-out signal, STATE is a status signal, and Request is the Request signal, as can be seen, after detecting ERROR, then carry out the state redirect, jump to idle condition (IDIE) on the next clock period of ERROR detecting, stop to send Request signal (low level) on the next clock period of ERROR detecting.
In this embodiment, even the ERROR signal is not in time sent by Interface Controller, be that DMA can't detect the ERROR signal, Interface Controller also can because of because and the obstruction between the Device can't collect data and no longer send the DRQ signal to DMA, if this obstruction is not because mistake causes, then follow-up can the continuation given single port Memory (Interface Controller and Device between follow-up no longer obstruction with the data that interface Controller collects by bus transfer by DMA, the state machine state conversion that DMA is provided with), DMA to the processing sequential chart of DRQ signal and coherent signal as shown in Figure 6, wherein CLK is a clock signal, and WR is a read-write.As can be seen, when DMA receives the DRQ signal (high level is represented), send Request signal (high level is represented) in the next time cycle to CPU, DMA is after the next time cycle that sends the Request signal receives the ack signal (high level is represented) that CPU returns, carry out data transfer operation in the next time cycle, just read and write single port Memory operation.
In this embodiment, the state machine that is provided with at DMA needs three kinds of state redirects altogether, and be respectively: duty can be called data transmission state here; Standby condition can be called the waiting facilities state here; And idle condition.The redirect synoptic diagram of three kinds of states as shown in Figure 7, when log-on data was transmitted, when promptly DMA received the DRQ signal, the state machine that DMA is provided with jumped to the waiting facilities state by idle condition; After equipment was ready to, when promptly DMA received data, the state machine that DMA is provided with jumped to duty by the waiting facilities state; After data transmission was finished, the state machine that DMA is provided with jumped to idle condition by duty; When device busy, promptly Interface Controller is busy, does not transmit data or data transmission and does not finish, and the state machine that DMA is provided with is transformed into the waiting facilities state from duty.When the waiting facilities state, after DMA detected the ERROR signal or do not receive the DRQ signal in the time of setting, then the state machine of DMA setting is an idle condition with the waiting facilities state exchange, and determine the processing mode of type of error correspondence according to the corresponding relation that is provided with, promptly discharge the SOC bus, allow CPU control the SOC bus again, carry out follow-up work by the SOC bus; In the time of in working order, after detecting the ERROR signal or in the time of setting, not receiving the DRQ signal, then the state machine of the state machine setting of DMA setting is converted to idle condition from duty, and determine the processing mode of type of error correspondence according to the corresponding relation that is provided with, promptly discharge the SOC bus, allow CPU control the SOC bus again, carry out follow-up work by the SOC bus.
In this embodiment, can be in order to make CPU always by not locked in fault-tolerant process, this mistake discovery procedure CPU does not participate in, therefore, in each circuit module, as the corresponding relation of type of error and processing mode is set among DMA or the Interface Controller.
Below lift two object lesson explanations.Interface Controller can gather the data of memory stick (MS) card apparatus, in gatherer process, the corresponding relation that error in data type and processing mode be set as shown in Table 1:
| Type of error | Processing mode |
| The MS card was pulled out when Interface Controller read the MS card | Begin to start the overtime timer of read data, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| Wrong no ready signal of the card of MS card or card did not send data when Interface Controller read the MS card | Begin to start the overtime timer of read data, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| Card was pulled out when Interface Controller write the MS card | Hardware redundancy verification (CRC) data check reports an error. |
| Card entered busy condition and does not enter standby condition always when Interface Controller write the MS card | Start hardware timer when entering busy condition, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| Interface Controller internal state mistake | Start hardware timer when entering this state, hardware is inquired about the timely time, if surpass setting-up time newspaper time-out error |
Table one
Interface Controller can gather the data of secure digital (SD) card apparatus, in gatherer process, the corresponding relation that error in data type and processing mode be set as shown in Table 2:
| Type of error | Processing mode |
| The SD card was pulled out when Interface Controller read the SD card | Begin to start the overtime timer of read data, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| The card of SD card was gone bad or is blocked and do not send data when Interface Controller read the SD card | Begin to start the overtime timer of read data, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| Card was pulled out when Interface Controller write the SD card | Hardware CRC data check mistake. |
| Card entered BUSY and does not finish always when Interface Controller write the SD card | Start hardware timer when entering BUSY, hardware inquiry timing time is if surpass setting-up time newspaper time-out error |
| Interface Controller internal state mistake | Start hardware timer when hardware enters this state, hardware inquiry timing time is if surpass certain hour newspaper time-out error |
Table two
In this specific embodiment, as can be seen, the discovery of common fault and notice are InterfaceController, and DMA is used to receive error notification.DMA is the object that receives error notification, and after circuit module sent mistake, notice DMA discharged the SOC bus by DMA, allows CPU control the SOC bus again, carries out follow-up work by the SOC bus.Therefore, the processing mode of the type of error correspondence that is provided with at DMA is: after receiving error notification or self detecting mistake, corresponding processing mode is for discharging the SOC bus.
The present invention also provides a kind of circuit module, this circuit module has and can trigger the ability of corresponding processing mode and the ability of carrying out state exchange according to the type of error that detection obtains, the structural representation of this circuit module as shown in Figure 8, specifically comprise: state machine, detection module, corresponding relation memory module and processing module, wherein
Detection module is used to detect mistake, perhaps detects rub-out signal or detect in the time of setting not receive request signal, and the transmit status switching signal is given state machine, and the mistake that the transmission detection obtains is to processing module;
State machine is used for according to state exchange signal redirect state, state is jumped on the idle condition quit work;
The corresponding relation memory module is used for the corresponding relation of storage errors type and processing mode;
Processing module is used for determining to detect obtaining wrong type, after the definite corresponding processing mode of corresponding relation memory module stored relation, adopts corresponding processing mode to handle this mistake.
In this embodiment, processing module also comprises first sending module, is used for determining to send rub-out signal according to the processing mode of correspondence, and the rub-out signal that generates is sent to the interlock circuit module.
In this embodiment, comprise second sending module in the described processing module, be used for determining no longer to send request signal to the interlock circuit module according to the processing mode of correspondence.
As can be seen, method provided by the invention and device participate in executing the task or the circuit module of program in the corresponding relation of type of error and processing mode is set, when circuit module detects mistake, adopt the state machine redirect state that is provided with to stop to carry out this task or program, and determine corresponding processing mode according to this corresponding relation, to executing the task or the interlock circuit module of program sends error notification.Receive after state machine redirect state that the circuit module of error notification adopt to be provided with stops to carry out this task or program, discharge the SOC bus, make CPU carry out other tasks or program implementation by this bus.Therefore, method provided by the invention and device can improve the fault-tolerant efficient of circuit module of SOC system, and carry out reliability service, guarantee the stability and the consistance of SOC operation.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being made within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1, the fault-tolerant method of a kind of control circuit module is characterized in that, is participating in executing the task or the circuit module of program is provided with the corresponding relation of type of error and processing mode, and the state machine that carries out state exchange is set, and this method also comprises:
Participation is executed the task or the circuit module of program detects mistake, determine the processing mode of the type correspondence that this is wrong according to the corresponding relation that is provided with, handle according to this processing mode, according to the state machine that is provided with self state is jumped to idle condition by current working state, stop to execute the task or program.
2, the method for claim 1 is characterized in that, the described processing according to this processing mode comprises: execute the task or other interlock circuit modules transmission error notifications of program to participations;
This method also comprises: participate in executing the task or after other interlock circuit modules of program receive error notification, according to the state machine that is provided with self state is jumped to idle condition by current working state or standby condition, stop to execute the task or program.
3, the method for claim 1 is characterized in that, the described processing according to this processing mode comprises: participate in executing the task or the circuit module of program is not executed the task or other interlock circuits transmission request signals of program to participations;
This method also comprises: participate in executing the task or other interlock circuit modules of program do not receive request signal in the time of setting after, according to the state machine that is provided with self state is jumped to idle condition by current working state or standby condition, stop to execute the task or program.
4, as claim 2 or 3 described methods, it is characterized in that, after participating in executing the task or other interlock circuit modules of program jump to idle condition, after receiving the request signal that participation is executed the task or the circuit module of program sends, according to the state machine that is provided with self state is jumped to duty, re-execute task or program.
As claim 2 or 3 described methods, it is characterized in that 5, described participation is executed the task or the circuit module of program is interface controller Interface Controller, participation is executed the task or other circuit modules of program are direct memory visit DMA.
6, the fault-tolerant device of a kind of control circuit module is characterized in that, this device comprises: state machine, detection module, corresponding relation memory module and processing module, wherein
Detection module is used to detect mistake, perhaps detects rub-out signal or detect in the time of setting not receive request signal, and the transmit status switching signal is given state machine, and the mistake that the transmission detection obtains is to processing module;
State machine is used for according to state exchange signal redirect state, state is jumped to stop on the idle condition executing the task or program;
The corresponding relation memory module is used for the corresponding relation of storage errors type and processing mode;
Processing module is used for determining to detect obtaining wrong type, after the definite corresponding processing mode of corresponding relation memory module stored relation, adopts corresponding processing mode to handle this mistake.
7, device as claimed in claim 6 is characterized in that, comprises first sending module in the described processing module, is used for determining to send rub-out signal according to the processing mode of correspondence, and the rub-out signal that generates is sent to the interlock circuit module.
8, device as claimed in claim 6 is characterized in that, comprises second sending module in the described processing module, is used for determining no longer to send request signal to the interlock circuit module according to the processing mode of correspondence.
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|---|---|---|---|
| CNA200810110854XA CN101295272A (en) | 2008-06-13 | 2008-06-13 | Method and device for controlling circuit module failure tolerance |
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| CNA200810110854XA CN101295272A (en) | 2008-06-13 | 2008-06-13 | Method and device for controlling circuit module failure tolerance |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103186447A (en) * | 2011-12-27 | 2013-07-03 | 安凯(广州)微电子技术有限公司 | Bus read-write detection device |
| CN109426517A (en) * | 2017-08-30 | 2019-03-05 | 比亚迪股份有限公司 | Micro-control unit and its control method and control device |
-
2008
- 2008-06-13 CN CNA200810110854XA patent/CN101295272A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103186447A (en) * | 2011-12-27 | 2013-07-03 | 安凯(广州)微电子技术有限公司 | Bus read-write detection device |
| CN103186447B (en) * | 2011-12-27 | 2015-02-11 | 安凯(广州)微电子技术有限公司 | Bus read-write detection device |
| CN109426517A (en) * | 2017-08-30 | 2019-03-05 | 比亚迪股份有限公司 | Micro-control unit and its control method and control device |
| CN109426517B (en) * | 2017-08-30 | 2021-01-01 | 比亚迪股份有限公司 | Micro control unit and control method and control device thereof |
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