CN101271487B - Verification method and system of video processing chip - Google Patents
Verification method and system of video processing chip Download PDFInfo
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- CN101271487B CN101271487B CN2008101046789A CN200810104678A CN101271487B CN 101271487 B CN101271487 B CN 101271487B CN 2008101046789 A CN2008101046789 A CN 2008101046789A CN 200810104678 A CN200810104678 A CN 200810104678A CN 101271487 B CN101271487 B CN 101271487B
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- 238000012545 processing Methods 0.000 title claims abstract description 95
- 238000012795 verification Methods 0.000 title claims abstract description 26
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- 230000000007 visual effect Effects 0.000 claims abstract description 16
- 238000012360 testing method Methods 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 6
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Abstract
The invention discloses a verification system of a video processing chip, which comprises a field programmable gate array, a video processing chip which is erected on the field programmable gate array, a logic analyzing device which is connected with the field programmable gate array and a data processing device which is connected with the logic analyzing device. The field programmable gate array can simulate the video processing chip which is erected on the array and introduce video flow data on any node of a video path in the video processing chip into the logic analyzing device. The logic analyzing device intercepts one frame of the video flow data to be recorded as a text file. The data processing device transforms the text file which records one frame of the video flow data into a visual image. Therefore, the chip verification can be realized at a glance.
Description
[technical field]
The present invention relates to image processing field, particularly a kind of verification method of video frequency processing chip and system.
[background technology]
At present, the video frequency processing chip widespread use such as in the digital camera equipments such as PC camera, IP Camera, video camera.Described video frequency processing chip in design process, need repeatedly its inner video flowing of checking each functional module of process whether can operate as normal.In the design phase of video frequency processing chip, the actual chips on the physical significance can not utilized, therefore the video frequency processing chip that designs can be set up in FPGA (Field Programmable Gate Array, field programmable gate array) on, can come video frequency processing chip on the emulated physics meaning with this.
For instance, after the video frequency processing chip primary design is finished, it can be set up on the FPGA (FieldProgrammable Gate Array, field programmable gate array), then logic analyser and FPGA be connected.At this moment, set up the video frequency processing chip that the FPGA of design video frequency processing chip can artificial actual.By, test in the video frequency processing chip selects the video stream data in the node in the video path that module can be inner with it to derive to logic analyser, described logic analyser can show the video stream data of the deriving form with waveform, the slip-stick artist can judge whether the video stream data of this node place output is correct according to the waveform that shows, according to adjacent working condition from this two internodal functional module to the video flowing situation of node that can judge.Yet, judge the situation of video stream data by waveform, be a very big challenge for the slip-stick artist, need the slip-stick artist very careful for a long time, precise going observe, and has carelessness just mistake may occur slightly.
[summary of the invention]
The object of the present invention is to provide the verification method and the system of video frequency processing chip, it can provide judgment mode intuitively, has improved the efficient and the accuracy of checking greatly.
According to an aspect of the present invention, the invention provides a kind of verification system of video frequency processing chip, the data processing equipment that it comprises field programmable gate array, is set up in the video frequency processing chip on the field programmable gate array, the logic analysis unit that is connected with field programmable gate array and is connected with logic analysis unit.Described field programmable gate array can carry out emulation and the video stream data at the arbitrary node place in the video path in the video frequency processing chip can be imported logic analysis unit the video frequency processing chip that sets up thereon, described logic analysis unit intercepts a frame video stream data and it is recorded as text, and the text that described data processing equipment will record a described frame video stream data is converted to visual image.
Further, described logic analysis unit shows the one-frame video data flow data of intercepting in the mode of waveform.
Further, described data processing equipment also carries out the image demonstration to the visual image after the conversion.
Further, described video stream data comprises frame image data, control data.
Further, described visual image is the BMP form.
Further, described video frequency processing chip includes video input interface, image processing module, video encoding module and video output interface.
Further, described image processing module includes bad point and detects supplementary units, gain adjustment unit and form converting unit, described bad point detects supplementary units and is used for video flowing is gone bad some detection, when having detected bad point, this evil idea point is carried out the interpolation compensation by interpolation algorithm, described gain adjustment unit is used for each pixel point value in the two field picture of video flowing is carried out gain-adjusted, and described format conversion unit is used for the picture format of video flowing is changed.
Further again, also be provided with video node in the described video frequency processing chip and select module, be used for the selected target node.
According to a further aspect in the invention, the invention provides a kind of verification method of video frequency processing chip, it comprises: the node on the video path of selection video frequency processing chip is a test node; Intercept a frame video stream data to logic analysis unit from the test node of video frequency processing chip; The frame video stream data that logic analysis unit will intercept is recorded as text; The text that records a frame video stream data is converted to visual image to show.
Further, described logic analysis unit also shows the one-frame video data flow data of intercepting in the mode of waveform.
Technical solution of the present invention is compared with existing scheme, convert the visual image form to by video stream data with logic analysis unit, make the checking slip-stick artist can see visual image, rather than only watch the waveform of video stream data, size has improved the efficient and the accuracy of checking greatly like this.
[description of drawings]
Fig. 1 is the block diagram of an embodiment of the verification system of video frequency processing chip of the present invention;
Fig. 2 is the block diagram of an embodiment of the video frequency processing chip in the verification system of video frequency processing chip of the present invention;
Fig. 3 is the block diagram of an embodiment of the image processing module in the video frequency processing chip of the present invention;
Fig. 4 is the sequential chart among the embodiment of the video flowing in the video frequency processing chip of the present invention; With
Fig. 5 is the schematic flow sheet of an embodiment of the verification method of video frequency processing chip of the present invention.
[embodiment]
Below in conjunction with accompanying drawing the specific embodiment of the invention is described.
In one embodiment, the invention provides a kind of verification system 100 of video frequency processing chip, Fig. 1 shows the block diagram of an embodiment of the verification system of video frequency processing chip of the present invention.As shown in Figure 1, the verification system 100 of described video frequency processing chip comprises FPGA (Field Programmable GateArray, field programmable gate array) 140, is set up in video frequency processing chip 120, logic analysis unit 160 that is connected with FPGA and the data processing equipment 180 that is connected with logic analysis unit on the FPGA.
Wherein, described FPGA 140 can be used for the video frequency processing chip 120 that sets up is thereon carried out emulation.
Described video frequency processing chip 120 can carry out such as processing such as video coding, format conversion, gain-adjusted video stream signal.As shown in Figure 2, it shows the block diagram of an embodiment of the described video frequency processing chip 120 among Fig. 1, and wherein said video frequency processing chip 120 includes video input interface 122, image processing module 124, video encoding module 126 and video output interface 128.Described video input interface 122 is from extraneous incoming video stream data, such as incoming video stream data from cmos sensor, described image processing module 124 is used for video stream data is carried out Flame Image Process, described video encoding module 126 is used for carry out the video coding through the data of Flame Image Process, and described video output interface 128 is used to export the video stream data through the video coding.It should be noted that wherein Fig. 2 only is the exemplary part of functions module that has provided in the video frequency processing chip 120, in a concrete realization, described video frequency processing chip 120 also may comprise the functional module that other are possible.As shown in Figure 3, it shows the block diagram of an embodiment of the described image processing module 124 among Fig. 2, and described image processing module 124 includes bad point and detects supplementary units 1240, gain adjustment unit 1242 and form converting unit 1244.Described bad point detects supplementary units 1240 and is used for video flowing is gone bad some detection, by interpolation algorithm this evil idea point is carried out the interpolation compensation when having detected bad point.Described gain adjustment unit 1242 is used for each pixel point value in the two field picture of video flowing is carried out gain-adjusted.Described format conversion unit 1244 is used for the picture format of video flowing is changed, and becomes RGB image etc. such as the image transitions from Bel's form.It should be noted that equally Fig. 3 only is the exemplary part of functions unit that has provided in the image processing module 124, in a concrete real example, described image processing module 124 also may comprise the functional unit that other are possible.In addition, only provided the built-in function unit of image processing module 124 at this, in other embodiments, video input interface 122, video encoding module 126 and video output interface 128 also all have built-in function unit separately.
Angle from video flowing, in video frequency processing chip 120, be formed with a video path, this video path can be passed through many functional modules or unit, the input of each functional module or unit be video stream data, output also be video stream data, each functional module or unit inputs or outputs a node that can be called as in this video path like this.Input such as described gain adjustment unit 1242 can be called as a node, the output of described gain adjustment unit 1242 also can be called as a node, the input of described for another example video encoding module 126 can be called as a node, and the output of described video encoding module 126 also can be called as a node.
When detection validation, needing to derive video stream data by the arbitrary node from video path, therefore as shown in Figure 2, also be provided with the one-level video node and select module 129 in video frequency processing chip 120, its any one functional module that can select in the video frequency processing chip derives module as video stream data.As shown in Figure 3, also include the secondary video node in the described image processing module 124 and select module 1246, its any one node in can selected digital image processing module 124 is derived node as video flowing.Secondary video node among Fig. 3 selects module may also be present in other video input interface 122, video encoding module 126 and the video output interface 128.Like this, select module 129 and secondary video node to select module 1246 arbitrary node can be chosen to be video flowing derivation node, just can derive video stream data then from this node by controlling described one-level video node.In other embodiments, as long as the structure or the multistage video node choice structure that can also adopt the one-level video node to select are can the selected target node and derive video flowing from this node.Such as the output terminal that can select gain adjustment unit 1242 is destination node, so just the video stream data of this node can be derived to logic analysis unit 160.
Described logic analysis unit 160 can carry out the video stream data of deriving waveform and show.Fig. 4 shows the sequential chart among the embodiment of video stream data, and wherein video stream data mainly includes control data, frame image data (DATA, wherein D0, D1, D2 remarked pixel point data).Described frame image data is exactly to be worth the data of pixel one by one, and such as in the video flowing being the VGA image, that frame image data just has 640 * 480 pixel number certificates, certainly this yet the form with image is relevant.Described control data comprises the frame start signal (Vsync) that is used for representing data active data enable signal (DATA_EN), is used for representing frame head, frame termination signal (FRAME_END) and other control signals that is used for representing postamble.Usually, described logic analysis unit 160 once only needs to derive a frame image data from the video flowing of destination node.By observing the video stream data waveform that shows in the logic analysis unit 160, the checking slip-stick artist can make analysis and judgement.
In sum, by using logic analysis unit the video flowing valid data are derived, by data processing equipment 180 the video flowing valid data of deriving are converted to displayable image afterwards and show, the checking slip-stick artist just can view the two field picture of visual video flowing like this, rather than can only view the waveform of video stream data, size has improved the efficient and the accuracy of checking greatly like this.
In one embodiment, technical solution of the present invention can also be embodied as a kind of verification method of video frequency processing chip.Please referring to Fig. 5, the schematic flow sheet of an embodiment that it shows the verification method of video frequency processing chip of the present invention said method comprising the steps of.
The frame video stream data that step 504, logic analysis unit will intercept is recorded as text.Simultaneously, logic analysis unit also can show a described frame video stream data in the mode of waveform.
The checking slip-stick artist just can view the two field picture of visual video flowing like this, rather than can only view the waveform of video stream data, and size has improved the efficient and the accuracy of checking greatly like this.
Be understandable that, for those of ordinary skills, can be equal to replacement or change according to technical scheme of the present invention and inventive concept thereof, and all these changes or replacement all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1. the verification system of a video frequency processing chip, the logic analysis unit that it comprises field programmable gate array, is set up in the video frequency processing chip on the field programmable gate array and is connected with field programmable gate array, it is characterized in that it also comprises the data processing equipment that is connected with logic analysis unit;
Described field programmable gate array can carry out emulation and the video stream data at the arbitrary node place in the video path in the video frequency processing chip can be imported logic analysis unit the video frequency processing chip that sets up thereon, described logic analysis unit intercepts a frame video stream data and it is recorded as text, and the text that described data processing equipment will record a described frame video stream data is converted to visual image.
2. the verification system of video frequency processing chip as claimed in claim 1 is characterized in that: described logic analysis unit shows the one-frame video data flow data of the intercepting mode with waveform.
3. the verification system of video frequency processing chip as claimed in claim 1 is characterized in that: described data processing equipment also carries out image to the visual image after the conversion and shows.
4. the verification system of video frequency processing chip as claimed in claim 1, it is characterized in that: described video stream data comprises frame image data, control data.
5. the verification system of video frequency processing chip as claimed in claim 1, it is characterized in that: described visual image is the BMP form.
6. the verification system of video frequency processing chip as claimed in claim 1, it is characterized in that: described video frequency processing chip includes video input interface, image processing module, video encoding module and video output interface.
7. the verification system of video frequency processing chip as claimed in claim 6, it is characterized in that: described image processing module includes bad point and detects supplementary units, gain adjustment unit and form converting unit, described bad point detects supplementary units and is used for video flowing is gone bad some detection, when having detected bad point, this evil idea point is carried out the interpolation compensation by interpolation algorithm, described gain adjustment unit is used for each pixel point value in the two field picture of video flowing is carried out gain-adjusted, and described format conversion unit is used for the picture format of video flowing is changed.
8. the verification system of video frequency processing chip as claimed in claim 7 is characterized in that: also be provided with video node in the described video frequency processing chip and select module, be used for the selected target node.
9. the verification method of a video frequency processing chip is characterized in that, described method comprises:
Node on the video path of selection video frequency processing chip is a test node;
Intercept a frame video stream data to logic analysis unit from the test node of video frequency processing chip;
The frame video stream data that logic analysis unit will intercept is recorded as text;
The text that records a frame video stream data is converted to visual image to show.
10. the verification method of video frequency processing chip as claimed in claim 9 is characterized in that: described logic analysis unit also shows the one-frame video data flow data of the intercepting mode with waveform.
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| CN2008101046789A CN101271487B (en) | 2008-04-22 | 2008-04-22 | Verification method and system of video processing chip |
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| CN2008101046789A CN101271487B (en) | 2008-04-22 | 2008-04-22 | Verification method and system of video processing chip |
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| CN101271487B true CN101271487B (en) | 2011-09-14 |
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| CN102495913A (en) * | 2011-10-18 | 2012-06-13 | 山东大学 | Design method of contact type card verification system based on FPGA (field programmable gate array) |
| CN113905230B (en) * | 2021-12-09 | 2022-03-29 | 深圳比特微电子科技有限公司 | Method and device for exporting and importing debugging code stream of image processing |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2250608Y (en) * | 1996-02-07 | 1997-03-26 | 成都新泰克电子有限公司 | Video frequency comprehensive measuring instrument |
| CN1295690A (en) * | 1999-01-28 | 2001-05-16 | 皇家菲利浦电子有限公司 | System and method for analyzing video content using detected text in video frames |
| CN101009074A (en) * | 2006-12-13 | 2007-08-01 | 康佳集团股份有限公司 | A LED scanning board with the self-testing function and its testing method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2250608Y (en) * | 1996-02-07 | 1997-03-26 | 成都新泰克电子有限公司 | Video frequency comprehensive measuring instrument |
| CN1295690A (en) * | 1999-01-28 | 2001-05-16 | 皇家菲利浦电子有限公司 | System and method for analyzing video content using detected text in video frames |
| CN101009074A (en) * | 2006-12-13 | 2007-08-01 | 康佳集团股份有限公司 | A LED scanning board with the self-testing function and its testing method |
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