CN101261611A - Peripheral apparatus data-transmission apparatus and transmission method - Google Patents

Peripheral apparatus data-transmission apparatus and transmission method Download PDF

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Publication number
CN101261611A
CN101261611A CNA2008100056980A CN200810005698A CN101261611A CN 101261611 A CN101261611 A CN 101261611A CN A2008100056980 A CNA2008100056980 A CN A2008100056980A CN 200810005698 A CN200810005698 A CN 200810005698A CN 101261611 A CN101261611 A CN 101261611A
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data
descriptor
peripherals
control module
transmission
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侯舒志
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Via Technologies Inc
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Via Technologies Inc
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Abstract

The invention relates to a device and the method used for controlling data transmission, especially for the data transmission between peripheral equipment. The device includes two control units and one buffer unit which are integrated onto a same chip. When the data is just transmitted between peripheral equipment, a first control unit temporarily stores the data to be transmitted from a piece of first peripheral equipment into the buffer unit, and then a second control unit stores the data to be transmitted from the buffer unit into a piece of second peripheral equipment. The device and the method provided by the invention and used for controlling data transmission between peripheral equipment has a shorter data transmission route so as to avoid the problem of time delay caused by a long transmission route in the traditional method.

Description

Data transmission device between a kind of peripherals and transmission method
Technical field
The present invention relates to data transmission, be specifically related to data transmission device and transmission method between a kind of peripherals.
Background technology
In the embedded system that contains central processing unit (CPU), in order to improve the service efficiency of storer and CPU, (Direct Memory Access, mode DMA) is carried out data transmission to adopt the direct memory visit usually.In the prior art, each peripherals all has its corresponding dma controller, and dma controller generally is integrated in the south bridge.When with data when first peripherals is transferred to second peripherals, its transmission path that will pass through is very long.In the read cycle, the dma controller of first peripherals obtains data in this first peripherals by being connected bus between south bridge and this first peripherals, and these data are sent in the north bridge by the bus that another is connected between south bridge and north bridge, by north bridge that data are temporary in storer with data by the bus that is connected between north bridge and storer then; At write cycle time, the data that are temporarily stored in the storer are sent to north bridge through bus, these data send the dma controller of second peripherals in the south bridge by north bridge to by bus again, the dma controller of this second peripherals with this data storage in second peripherals.
Therefore, when carrying out data transmission between peripherals by dma mode, because data are temporarily stored in the storer, the path of its data transmission is very long.If can find a kind of apparatus and method that shorten data transfer path, will improve the efficient and the performance of data transmission greatly.
Summary of the invention
Therefore, according to above-mentioned summary, together with accompanying drawing, the purpose of this invention, feature and advantage will become clearly to those skilled in the art from follow-up explanation and appending claims.
This invention provides a kind of apparatus and method of control data transmission, is used for the transmission between peripherals, to prevent above-mentioned shortcoming.
In one embodiment, the invention provides a kind of device of control data transmission, be used to control the data transmission between first peripherals and second peripherals.The device of this control data transmission comprises first control module, second control module and temporary storage location.The information that reads of the data that first control module is used for transmitting as required reads this data from first peripherals.Second control module is used for according to the canned data of the data of this needs transmission the data storage of this needs transmission to second peripherals.Temporary storage location, be connected in first control module and second control module, and be integrated in the same chip with this first control module and second control module, be used for the data of the needs transmission that temporary this first control module reads, and the data that will need to transmit send second control module to.
In another embodiment, the present invention also provides a kind of method of control data transmission, is used to control the data transmission between first peripherals and second peripherals.This method comprises: the data that read the needs transmission according to the information that reads from first peripherals; These data that need transmit are temporary in the temporary storage location; And according to canned data with the data storage of the transmission of this needs in this temporary storage location to second peripherals.
The apparatus and method of control data transmission provided by the invention, be temporarily stored in the temporary storage location by the data that will transmit between peripherals, avoided having improved the speed and the performance of data transmission owing to data are temporarily stored in the long problem of bringing in the storer of transmission path.
Description of drawings
Fig. 1 is traditional computer system architecture figure that comprises dma controller.
Fig. 2 be adopt dma mode with the data transmission in the I/O equipment process flow diagram in hard disk the time.
Fig. 3 is the computer system architecture figure of the data transmission device between peripherals in the present invention's first preferred embodiment.
Fig. 4 is the computer system architecture figure of the data transmission device between peripherals in the present invention's second preferred embodiment.
Fig. 5 be data transmission method between peripherals after adopt improving with the data transmission in the I/O equipment process flow diagram in hard disk the time.
Embodiment
To the present invention be described by the following example.Yet should recognize that the following example is not definitely to be restriction of the present invention, but typical enforcement of the present invention.
After general introduction various aspects of the present invention, with detailed reference narration of the present invention as shown in FIG..Though describe the present invention together with these figure, exhausted nothing intention limits the invention at this inventive embodiment.On the contrary, all substitute, change and equivalent person should drop in the spirit of the present invention and category that is defined by appending claims.
It should be noted that the special characteristic and the aspect that only supply the diagram embodiments of the invention in this diagram that presents.Can understand accomplished multiple alternate embodiment and enforcement and not departing from spirit of the present invention and category from the narration that provides at this.
Also it should be noted that in this diagram that presents not to be to draw in proportion.The ratio of some member is not to be directly proportional with the ratio of other member, detailed description to be provided and to emphasize the present invention.
With reference to Fig. 1, this is traditional computer system architecture figure that comprises dma controller.Computer system architecture figure has comprised central processing unit 101, north bridge 103, storer 105, south bridge 107 and relevant peripherals.In order to make diagram clear, peripherals has only marked first peripherals 109 and second peripherals 111, and needing the data of transmission is to be sent to second peripherals 111 from first peripherals 109.Peripherals has comprised hard disk at interior various input and output (I/O) equipment.
Central processing unit 101 is used to generate the descriptor (descriptor) of data of description read-write operation, and this descriptor has comprised and reads descriptor and memory descriptor.Wherein, this reads the type that has write down the data that need transmission in the descriptor, length, and need be from the address information of data that read first peripherals 109 etc., be mainly used in the data transfer operation of describing the read cycle; Write down the type that needs the data of transmission in this memory descriptor, length, and the address information of the data of in second peripherals 111, storing etc., be mainly used in the data transfer operation that is described in write cycle time.
North bridge 103 is connected in central processing unit 101, is used to transmit the data of descriptor and needs transmission.Storer 105 is connected in central processing unit 101 and north bridge 103, central processing unit 101 is with in the descriptor information write store 105 that generates, the data that north bridge 103 will need to transmit are kept in storer 105, therefore, storer 105 is used for the information such as data of memory descriptor and needs transmission.
Linkage unit 121, first dma controller 123 and second dma controller 125 have been comprised in the south bridge 107.Linkage unit 121 is connected in north bridge 103, and the data transmission that is mainly used in the needs transmission arrives north bridge 103, and receives the descriptor that north bridge 103 transmits.First dma controller 123 is connected between the linkage unit 121 and first peripherals 109, when linkage unit 121 receives when reading descriptor, this can be read descriptor and send first dma controller 123 to, first dma controller 123 reads descriptor to this and resolves, and sends these data that need transmit of appropriate address in first peripherals 109 to linkage unit 121.Second dma controller 125 is connected between the linkage unit 121 and second peripherals 111, when linkage unit 121 receives memory descriptor, can send this memory descriptor to second dma controller 125, second dma controller 125 is resolved this memory descriptor, and the data transmission that needs in second peripherals 111 to transmit is arrived linkage unit 121.
In order more clearly to represent to carry out the process of data transmission with dma mode, being example by the I/O device transmission to hard disk with data, Fig. 2 be adopt dma mode with the data transmission in the input-output device process flow diagram in hard disk the time.In step 201, central processing unit 101 is written to the descriptor that reads of this read-write operation in the storer 105.In step 203, the reading descriptor and will be transferred to linkage unit 121 of storage in the storer 105 by north bridge 103, linkage unit 121 can read descriptor with this and be transferred to first dma controller 123.Then, first dma controller 123 reads descriptor and resolves (step 205) type and length with data that need to determine transmission to this, and should be from first peripherals 109, i.e. the information such as address of the I/O equipment reading of data among this embodiment.In step 207, according to the information that reads descriptor that parses, first peripherals 109, the data that promptly need in the I/O equipment among this embodiment to transmit are transferred in the storer 105 by linkage unit 121 and north bridge 103 by first dma controller 123.In step 209, first dma controller 123 judges whether to finish data transmission work.If also do not finish, turn back to step 207; If data transmission is finished, enter into step 211.In step 211, central processing unit 101 will be written in the storer 105 again corresponding to the memory descriptor of this read-write operation.In step 213, the memory descriptor of 105 storages will be transferred to linkage unit 121 by north bridge 103 in the storer, and linkage unit 121 can read descriptor with this and be transferred to second dma controller 125.Then, second dma controller 125 is resolved (step 215) type and length with the data that determine to need transmission to this memory descriptor, and these data should store second peripherals 111 into, i.e. the information such as address of the hard disk among this embodiment.In step 217, according to the information of the memory descriptor that parses, these data that need transmit are transferred to second peripherals 111 by north bridge 103 and linkage unit 121 by second dma controller 125, promptly in the hard disk among this embodiment.In step 219, second dma controller 125 judges whether to finish data transmission work.If also do not finish, turn back to step 217; If data transmission is finished, this workflow finishes, data with in the dma mode by from the I/O device transmission to the hard disk.Thus process flow diagram as can be seen, the path of data transmission is quite long, if the path that can shorten data transmission, can improve the speed and the performance of data transmission greatly.
Fig. 3 is the computer system architecture figure of the data transmission device between peripherals in the present invention's first preferred embodiment.Computer system architecture figure has comprised central processing unit 301, north bridge 303, storer 305, south bridge 307 and relevant peripherals.In order to make diagram clear, peripherals has only marked first peripherals 309 and second peripherals 311, and needing the data of transmission is to be sent to second peripherals 311 from first peripherals 309.
Central processing unit 301 is used to generate the descriptor of data of description read-write operation, and this descriptor has comprised and reads descriptor and memory descriptor.Wherein, this reads the type that has write down the data that need transmission in the descriptor, length, and need be from the address information of data that read first peripherals 309 etc., be mainly used in the data transfer operation of describing the read cycle; Write down the type that needs the data of transmission in this memory descriptor, length, and the address information of the data of in second peripherals 311, storing etc., be mainly used in the data transfer operation that is described in write cycle time.
North bridge 303 is connected in central processing unit 301, is used to transmit descriptor and data message.Storer 105 is connected in central processing unit 301 and north bridge 303, central processing unit 101 is with in the descriptor information write store 305 that generates, if data are not simple transmission between peripherals, north bridge 303 can be with this data transmission in storer 305, therefore, storer 305 is used for information such as memory descriptor and data.
Receiving element 308, first dma controller 327 and second dma controller 329 have been comprised in the south bridge 307.Receiving element 308 is connected in north bridge 303, be mainly used in receive that north bridge 303 transmits read descriptor and memory descriptor, and this is read descriptor and memory descriptor is resolved, type with the data that obtain needing transmission, length, the information such as address of data of the address of the data that read from first peripherals 309 and storage in second peripherals 311.If data are not simple transmission between peripherals, receiving element 308 arrives north bridge 303 with this data transmission.
Receiving element 308 has comprised linkage unit 321, first resolution unit 323 and second resolution unit 325.Linkage unit 321 is connected in north bridge 303 by external bus, is used for receiving that central processing unit 301 is written to storer 305 reads descriptor and memory descriptor.First resolution unit 323 is connected in linkage unit 321, be used to receive from what linkage unit 321 sent and read descriptor, and this is read descriptor resolve, to obtain the information that reads of these data that need transmit, for example, address information of the type of the data that need read, length and the data that read from peripherals etc.Second resolution unit 325 is connected in linkage unit 321, be used to receive the memory descriptor that sends from linkage unit 321, then this memory descriptor is resolved, to obtain the canned data of these data that need transmit, for example, need type, the length of data of storage and the address information of the data of in peripherals, storing etc.
First control module 327 is connected in first resolution unit 323, is used for the transmission according to the data that read the needs transmission that information Control reads from first peripherals 309 of these data of parsing.Second control module 329 is connected in second resolution unit 325, is used for according to the canned data control of these data of parsing the data storage of needs transmission to second peripherals 311.Temporary storage location 331 is connected between first control module 327 and second control module 329, when these data just are used for transmission between peripherals, first control module 327 will need the data transmitted temporary in temporary storage location 331, and second control module 329 will be temporarily stored in data transmission in the temporary storage location 331 in second peripherals 311.
If data are not only the transmission that is used between peripherals, then in the read cycle, first control module 327 with data transmission to first resolution unit 323, first resolution unit 323 arrives linkage unit 321 with data transmission, linkage unit 321 sends data to north bridge 303, and data finally send storer 305 to by north bridge 303.Such as, needing the data of transmission is the data of image, need carry out Flame Image Process, and at this moment, data will be by first peripherals 309 through first control module, 327, the first resolution unit 323, and linkage unit 321 and north bridge 303 are temporarily stored in the storer 305 at last; And, be temporarily stored in data in the storer 305 and can pass through north bridge 303, linkage unit 321, second resolution unit 325 and second control module 329 and be sent in second peripherals 311 at write cycle time.That is to say that when data were only transmitted, the data that need be transmitted had been temporarily stored in the temporary storage location 331, rather than are temporarily stored in the storer between peripherals.
Storer 305 links to each other with central processing unit 301, and when needs were handled data, traditional method that data is temporary in the storer was relatively to be suitable for.If but data just transmit between peripherals simply, traditional data are temporarily stored in the storer will bring unnecessary time delays.Because development of technology, the technology that temporary storage location and control module are integrated on the same chip is quite ripe, therefore, adopts the method to realize data transmission between peripherals, have good transfer efficiency, will simplify the workflow of read-write operation greatly.
With reference to Fig. 4, this is the computer system architecture figure of the data transmission device between peripherals in the present invention's second preferred embodiment.Computer system architecture figure has comprised central processing unit 401, north bridge 403, storer 405, south bridge 407 and relevant peripherals.In order to make diagram clear, peripherals has only marked first peripherals 409 and second peripherals 411, and needing the data of transmission is to be sent to second peripherals 411 from first peripherals 409.Central processing unit 401 is used to generate the descriptor of data of description read-write operation, different with traditional descriptor, this descriptor is not further divided into and reads descriptor and memory descriptor, but by system software these two descriptors are rewritten as the read-write descriptor, this read-write descriptor write down the data that need transmission type, length, need from the address information of the data that read first peripherals 409 and in second peripherals 411 address information etc. of the data of storage.This read-write descriptor has merged and has read the data message that repeats in descriptor and the memory descriptor originally, can describe this read-write operation more simplifiedly.North bridge 403 is connected in central processing unit 401, is used for transmission read-write descriptor and data message.Storer 405 is connected in central processing unit 401 and north bridge 403, in the read-write descriptor information write store 405 that central processing unit 401 will generate, if data are not simple transmission between peripherals, north bridge 403 can be with this data transmission in storer 405, therefore, storer 405 is used for information such as memory descriptor and data.
Receiving element 408, first controller 427 and second controller 429 have been comprised in the south bridge 407.Receiving element 408 is connected in north bridge 403, be mainly used in and receive the read-write descriptor that north bridge 403 transmits, and this read-write descriptor resolved, with the type of the data that needing to obtain transmission, length, from first peripherals 409 the data that read the address and in second peripherals 411 information such as address of the data of storage.If data are not simple transmission between peripherals, receiving element 408 arrives north bridge 403 with this data transmission.
Receiving element 408 has comprised linkage unit 421 resolution unit 423.Linkage unit 421 is connected in north bridge 403 by external bus, is written to read-write descriptor in the storer 405 to receive central processing unit 401.Resolution unit 423 is connected in linkage unit 421, be used to receive the read-write descriptor that sends from linkage unit 421, and this read-write descriptor resolved, to obtain reading and canned data of these data that need transmit, for example, need the data of transmission type, length, the data that read from first peripherals 409 address information and in second peripherals 411 address information or the like of the data of storage.
First control module 427 is connected in resolution unit 423, is used for receiving the information that reads from resolution unit 423, and according to the transmission of the data that read the needs transmission that information Control reads from first peripherals 409 of these data that parse.Second control module 429 is connected in resolution unit 423, be used for receiving canned datas from resolution unit 423, with according to the canned data control of these data that parse with the data storage of needs transmission in second peripherals 311.
Temporary storage location 431 is connected between first control module 427 and second control module 429, when these data just are used for transmission between peripherals, first control module 427 will need the data transmitted temporary in temporary storage location 431, and second control module 429 will be temporarily stored in data transmission in the temporary storage location 331 in second peripherals 411.If data are not only the transmission that is used between peripherals, then in the read cycle, first control module 427 arrives resolution unit 423 with data transmission, resolution unit 423 arrives linkage unit 421 with data transmission, linkage unit 421 sends data to north bridge 403, data finally send storer 405 to by north bridge 403, such as, needing the data of transmission is the data of image, need carry out Flame Image Process, at this moment, data will be by first peripherals 409 through first control module 427, resolution unit 423, linkage unit 421 and north bridge 403 are temporarily stored in the storer 405 at last; And at write cycle time, be temporarily stored in data in the storer 405 and can pass through north bridge 403, connect single 421, resolution unit 423 and second control module 429 is sent in second peripherals 411.
Adopt software to rewrite the method for descriptor, can save a resolution unit, and linkage unit 421 can directly be transferred to descriptor in the unique resolution unit 423, has omitted and has judged the process that should be transferred to which resolution unit, has promptly saved chip area and has improved transmission speed again.
And in another embodiment, receiving element 408, first control module 427, temporary storage location 431 and second control module 429 are to be integrated in another independently in the chip, rather than on the south bridge 407.In one embodiment, be that receiving element 408 is integrated on the south bridge 407, first control module 427, temporary storage location 431 and second control module 429 are to be integrated in another independently in the chip.
In order to contrast with traditional DMA data transfer mode, once more being example by the I/O device transmission to hard disk with data, Fig. 5 be data transmission method between peripherals after adopt improving with the data transmission in the I/O equipment process flow diagram in hard disk the time, the computer system architecture of employing is as described in Figure 4.
In step 501, central processing unit 401 is written to the read-write descriptor of this read-write operation in the storer 405, and this read-write descriptor has merged original descriptor and the memory descriptor of reading, and has comprised the needed necessary information of data transmission.In step 503, the read-write descriptor of storage will be transferred to the linkage unit 421 in the receiving element 408 by north bridge 403 in the storer 405, and linkage unit 421 can should be read and write descriptor and be transferred to resolution unit 423.Then, resolution unit 423 in the receiving element 408 is resolved (step 505) to obtain reading and canned data of these data that need transmit to this descriptor, for example, need the data of transmission type, length, the data that read from first peripherals 409 address information and in second peripherals 411 address information or the like of the data of storage.In step 507, resolution unit 123 is judged the type of this data transmission according to the information of the descriptor that parses, and when these data were not the transmission that is used between peripherals, step entered into 508, carried out traditional dma operation.When these data are when transmitting between peripherals, if this cycle is read operation, resolution unit 423 will read information transmission to first control module 427, and flow process enters into step 509; If this cycle is a write operation, resolution unit 423 will read information transmission to second control module 429, and flow process enters into step 511.In step 509, first peripherals 409, promptly the data in the I/O equipment among this embodiment have been sent in the temporary storage location 431 by first control module 427.In step 511, first control module 427 judges whether to finish data transmission work.If also do not finish, turn back to step 509; If data transmission is finished, enter into step 513.In step 513, second control module 429 with the data transmission in the temporary storage location 431 to second peripherals, promptly in the hard disk of this embodiment.In step 515, second control module 429 judges whether to finish data transmission work.If also do not finish, turn back to step 515; If data transmission is finished, this workflow finishes, and the data in the I/O equipment have been transferred in the hard disk.Thus process flow diagram as can be seen because data have been temporarily stored in the temporary storage location 431, the path of data transmission is shortened, and has reduced the time delay brought owing to transmission path is long, this will improve the speed and the performance of data transmission greatly.
Above-mentioned explanation is not to be intended to exhaustive or to limit the present invention to the precise forms of being invented.Because above-mentioned teaching can have tangible change and variation.In this, the embodiment that discussed selects and describes so that the best interpretations of principle of the present invention and its practical application to be provided, make whereby those of ordinary skills must be used among the various embodiment the present invention and with the various changes of the purposes that is applicable to specific hope.All this kind changes and variation are within the scope of the invention, its be with appending claims according to its should be legally with justice on the width that should have understood and be as the criterion.
The above only is preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; can do further improvement and variation on this basis, so the scope that claims were defined that protection scope of the present invention is worked as with the application is as the criterion.

Claims (10)

1. the device of a control data transmission is used for the data transmission between first peripherals and second peripherals, it is characterized in that, comprising:
First control module, the information that reads of the data that are used for transmitting as required reads the data that this need transmit from described first peripherals;
Second control module is used for according to the canned data of the data of this needs transmission the data storage of described needs transmission to described second peripherals; And
Temporary storage location, be connected in described first control module and second control module, and be integrated in the same chip with this first control module and second control module, the data that are used for described the needs transmission that temporary this first control module reads, and send the described data that need to transmit to this second control module.
2. the device of control data transmission according to claim 1 is characterized in that, has also comprised:
Receiving element is connected in described first control module and second control module, is used to receive descriptor, and this descriptor is resolved, to obtain the described information and the described canned data of reading of these data that need transmit.
3. the device of control data transmission according to claim 2 is characterized in that, described receiving element has comprised:
Linkage unit is connected in external bus, is used to receive described descriptor, and this descriptor has comprised and reads descriptor and memory descriptor;
First resolution unit is connected in this linkage unit and this first control module, is used for that this is read descriptor and resolves, to obtain the described information that reads of these data that need transmit; And
Second resolution unit is connected in this linkage unit and this second control module, is used for this memory descriptor is resolved, to obtain the described canned data of these data that need transmit.
4. the device of control data transmission according to claim 2 is characterized in that, described receiving element has comprised:
Linkage unit is connected in external bus, is used to receive described descriptor, and this descriptor is the read-write descriptor; And
Resolution unit is connected in this linkage unit, this first control module and this second control module, is used for this read-write descriptor is resolved, to obtain the described described canned data of data that reads information and need transmission of these data that need transmit.
5. the device of control data transmission according to claim 1 is characterized in that, described type of peripheral device has comprised the combination in any of input-output device and hard disk.
6. the method for a control data transmission is used for chip, to control the data transmission between first peripherals and second peripherals, it is characterized in that, comprises:
From first peripherals, read the data of needs transmission according to the information that reads;
The described data that need transmission are temporary in temporary storage location in this chip; And
According to canned data the data storage that these needs in this temporary storage location transmit is arrived this second peripherals.
7. the method for control data transmission according to claim 6 is characterized in that, has also comprised the reception descriptor, and this descriptor has comprised and reads descriptor and memory descriptor.
8. the method for control data transmission according to claim 7 is characterized in that, has also comprised
This is read descriptor resolve, to obtain the described information that reads of these data that need transmit; And
This memory descriptor is resolved, to obtain the described canned data of these data that need transmit.
9. the method for control data transmission according to claim 6 is characterized in that, has also comprised to receive the read-write descriptor, and this read-write descriptor is resolved, to obtain the described information and the described canned data of reading of these data that need transmit.
10. the method for control data transmission according to claim 6 is characterized in that, described type of peripheral device has comprised the combination in any of input-output device and hard disk.
CNA2008100056980A 2008-02-15 2008-02-15 Peripheral apparatus data-transmission apparatus and transmission method Pending CN101261611A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102981986A (en) * 2012-11-02 2013-03-20 上海移远通信技术有限公司 System and method of data interaction
CN103119573A (en) * 2010-09-21 2013-05-22 三菱电机株式会社 DMA controller and data readout device
CN104598405A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Expansion chip and expandable chip system and control method
CN104598406A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Expansion function unit and computing equipment expansion system and expansion method
CN104598404A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Computing equipment extending method and device as well as extensible computing system
WO2018137529A1 (en) * 2017-01-26 2018-08-02 华为技术有限公司 Data transmission method, device, apparatus, and system

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103119573A (en) * 2010-09-21 2013-05-22 三菱电机株式会社 DMA controller and data readout device
CN102981986A (en) * 2012-11-02 2013-03-20 上海移远通信技术有限公司 System and method of data interaction
CN104598405A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Expansion chip and expandable chip system and control method
CN104598406A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Expansion function unit and computing equipment expansion system and expansion method
CN104598404A (en) * 2015-02-03 2015-05-06 杭州士兰控股有限公司 Computing equipment extending method and device as well as extensible computing system
CN104598406B (en) * 2015-02-03 2018-02-09 杭州士兰控股有限公司 Expanded function unit and computing device extension system and extended method
CN104598405B (en) * 2015-02-03 2018-05-11 杭州士兰控股有限公司 Extended chip and expansible chip system and control method
CN104598404B (en) * 2015-02-03 2018-09-04 杭州士兰控股有限公司 Computing device extended method and device and expansible computing system
WO2018137529A1 (en) * 2017-01-26 2018-08-02 华为技术有限公司 Data transmission method, device, apparatus, and system
US10810135B2 (en) 2017-01-26 2020-10-20 Huawei Technologies Co., Ltd. Data transmission method, apparatus, device, and system

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