CN101256289A - Liquid crystal display panel and drive method thereof - Google Patents
Liquid crystal display panel and drive method thereof Download PDFInfo
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- CN101256289A CN101256289A CNA2007100734024A CN200710073402A CN101256289A CN 101256289 A CN101256289 A CN 101256289A CN A2007100734024 A CNA2007100734024 A CN A2007100734024A CN 200710073402 A CN200710073402 A CN 200710073402A CN 101256289 A CN101256289 A CN 101256289A
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Abstract
A liquid crystal display panel comprises: a plurality of scanning lines, a plurality of data lines, a data driven circuit, a gray level processor and a memory. The minimal area enclosed by the data line and scanning line is defined as one pixel unit. The gray level processor receives the j(j>=1), j+1, k-1(j+2<=k<=h, h<=frame frequency), k frame gray level voltage from outside. When the j+1 frame of the pixel unit displays dynamic menu, and when the gray level voltage difference of the j and j+1 frames of the pixel unit is less than the gray level voltage difference of the j and k frames of the pixel unit, therefore the gray level voltages of the j+1 frame and k frame are exchanged. The memory stores the treated gray level output from the gray level processor and untreated residual gray level voltage output from the outside device, and the equal gray level voltages are output to the data driven circuit in turn. The liquid crystal display panel can improve the streaking phenomena of displaying dynamic menu.
Description
Technical field
The present invention relates to a kind of display panels and its driving method.
Background technology
Because advantages such as display panels has gently, approaches, power consumption is little are widely used in the modernized information equipments such as TV, notebook, mobile phone, personal digital assistant.At present, the application of display panels TV on market is more and more important, yet liquid crystal itself is the coefficient of viscosity material, causes that its reaction velocity can't (Cathode Radial Tube, CRT) display contends with cathode-ray tube (CRT).
Seeing also Fig. 1, is a kind of display panels synoptic diagram of prior art.This display panels 10 comprises that many sweep traces that are parallel to each other 13, many are parallel to each other and the data line 14 that intersects vertically with these sweep trace 13 insulation, a plurality of thin film transistor (TFT) that is positioned at this sweep trace 13 and these data line 14 intersections (thin film transistor, TFT) 15, a plurality of pixel electrode 151, a plurality of public electrode 152, scan driving circuit 11 and a data drive circuit 12.This pixel electrode 151 constitutes a memory capacitance 153 with this public electrode 152.This scan drive circuit 11 is used to this sweep trace 13 that sweep signal is provided, and this data drive circuit 12 is used to this data line 14 that a plurality of gray scale voltages of data representing image are provided.
The grid of this thin film transistor (TFT) 15 (not indicating) is connected to this sweep trace 13, and source electrode (not indicating) is connected to this data line 14, and drain electrode (not indicating) is connected to this pixel electrode 151.This sweep trace 13 is defined as a pixel cell (not indicating) with the Minimum Area that this data line 14 is enclosed.
Seeing also Fig. 2, is the drive signal waveform figure of this display panels 10.Wherein, " G1-Gn " is a plurality of sweep signal oscillograms, and " Vcom " provides the common electric voltage oscillogram to public electrode 152, and " Vd " is the oscillogram of the gray scale voltage that provides for this pixel electrode 151.
See also Fig. 1 and Fig. 2, this scan drive circuit 11 produces continuously a plurality of sweep signals 19 at a frame (frame) in the time, and is followed successively by each column scan line 13 this sweep signal 19 is provided.This sweep signal 19 is high voltages.During providing sweep signal 19 for a column scan line 13, high voltage makes and is connected this thin film transistor (TFT) that lists 15 and all is in conducting state, that is, and and the drain electrode of this thin film transistor (TFT) that lists 15 and source electrode conducting.
Simultaneously, during this sweep signal 19 offers a column scan line 13, this data drive circuit 12 provides a plurality of gray scale voltage Vd that represent a frame pixel data PD for this data line 14, this gray scale voltage Vd exports to this pixel electrode 151 via the source electrode and the drain electrode of the thin film transistor (TFT) on this row 15 respectively then, make the pixel cell that is positioned on this column scan line 11 show this pixel data PD, and make the memory capacitance 153 on this column scan line 11 be in charged state, and in a frame time, keep this pixel data PD by this memory capacitance 153.
Back one frame scan signal 19 ' output to before this column scan line 13, the pixel data PD that is positioned at the pixel cell demonstration on this column scan line 13 remains unchanged.
Back one frame scan signal 19 ' output to during this column scan line 13, high voltage makes and is connected this thin film transistor (TFT) that lists 15 and all is in conducting state, simultaneously, this data drive circuit 12 is represented a plurality of gray scale voltage Vd ' of back one frame pixel data PD ' to these data line 14 outputs, then, represent this gray scale voltage Vd ' of back one frame pixel data PD ' to export to this pixel electrode 151 via the source electrode and the drain electrode of the thin film transistor (TFT) on this row 15 respectively, make the display update that is positioned at the pixel cell on this column scan line 13 be back one frame pixel data PD '.
Because the response speed of liquid crystal molecule under driven between this pixel electrode 151 and this public electrode 152 is limited, it can not be torqued into special angle with gray scale voltage Vd ' in a frame time, sometimes even need two frames or above time to be torqued into special angle with gray scale voltage Vd '.Therefore in the dynamic menu that this display panels 10 shows, the gray scale voltage difference between the two continuous frames dynamic menu hour easily produces ghost.
Summary of the invention
In order to solve the problem that there is smear in the prior art display panels, be necessary to provide a kind of display panels that improves the smear phenomenon.
For the driving method that solves the prior art display panels easily produces the problem of smear, be necessary to provide a kind of driving method that improves the smear phenomenon.
A kind of display panels, it comprises many parallel scanning beams, many data line, a data drive circuit, a GTG processor and storeies that intersect with this sweep trace insulation.The Minimum Area that this data line and this sweep trace enclosed is defined as a pixel cell.This GTG processor is used for receiving the j (j 〉=1) of external transmission, j+1, k-1 (j+2≤k≤h, h≤frame frequency), k frame gray scale voltage is when this pixel cell j+1 frame shows dynamic menu, and as this pixel cell j, the gray scale voltage difference of j+1 two frames during the gray scale voltage difference of k two frames, is then changed the gray scale voltage of j+1 frame and the gray scale voltage of k frame less than this j.This storer is used for storing the j+1 of this GTG processor output, the 1st of k frame gray scale voltage and the output of this external unit ..., j, j+2, j+3 ..., k-1, k+1, k+2, ..., h frame gray scale voltage, and with the 1st, 2,3 ..., h frame gray scale voltage is exported to this data drive circuit successively, and then exports to this data line.
A kind of driving method of display panels, it comprises the steps: in a. one external unit output one second the 1st ..., j, j+2, j+3, ..., k-1, k+1, k+2 ..., the gray scale voltage of h frame picture correspondence is to this storer, and export j successively, j+1, k-1, the gray scale voltage of k frame picture correspondence is to this GTG processor.B. calculate a pixel cell j, the gray scale voltage of j+1 two frames is poor, calculates this pixel cell j, and the gray scale voltage of k two frames is poor, calculates this pixel cell k-1, and the gray scale voltage of k two frames is poor.C. this pixel cell j relatively, the gray scale voltage difference of j+1 two frames and this j, the gray scale voltage of k two frames is poor, when this pixel cell j+1 frame shows dynamic menu, and as this pixel cell j, the gray scale voltage difference of j+1 two frames during the gray scale voltage difference of k two frames, is then changed the gray scale voltage of j+1 frame and k frame less than this j.
Compared with prior art, the driving method of this display panels can be handled the gray scale voltage of dynamic menu correspondence, when the less easy generation ghost of the gray scale voltage difference of two continuous frames dynamic menu, the gray scale voltage of this dynamic menu correspondence can be changed by the gray scale voltage corresponding with a certain frame picture, make the gray scale voltage difference of two continuous frames dynamic menu become big, thus the ghost problem the when display panels that solves prior art shows dynamic menu.
Display panels is when the less easy generation ghost of the gray scale voltage difference of the dynamic menu two continuous frames that shows, the gray scale voltage of this dynamic menu correspondence can be changed by the gray scale voltage corresponding with a certain frame picture, make the gray scale voltage difference of two continuous frames dynamic menu become big, thus the ghost problem the when display panels that solves prior art shows dynamic menu.
Description of drawings
Fig. 1 is a kind of synoptic diagram of prior art display panels.
Fig. 2 is the drive signal waveform figure of display panels shown in Figure 1.
Fig. 3 is the synoptic diagram of display panels first embodiment of the present invention.
Embodiment
Seeing also Fig. 3, is the synoptic diagram of display panels first embodiment of the present invention.Data line 24, scan driving circuit 21, a data drive circuit 22, a GTG processor 26, a storer 28, a flexible circuit board 27 and an external unit (scheming not show) that this display panels 20 comprises that many sweep traces that are parallel to each other 23, many are parallel to each other and intersects vertically with these sweep trace 23 insulation.This scan drive circuit 21 is to these sweep trace 23 output scanning signals.This sweep trace 23 defines a pixel cell 252 with the Minimum Area that this data line 24 is enclosed.
This external unit is used for exporting successively in one second the 1st, 2,3 ..., the gray scale voltage of h frame picture correspondence, wherein, h≤frame frequency (frame rate), frame frequency are the quantity of the frame picture that shows of per second.This GTG processor 26 is used for receiving the 1st, 2 of this external unit transmission, and k-1 (3≤k≤h), the gray scale voltage of k frame picture correspondence, and output to this storer 28 after the 2nd frame gray scale voltage corresponding with k frame picture handled.This GTG processor 26 comprises one first storehouse 261, one second storehouse 262, one the 3rd storehouse 263, one the 4th storehouse 264, one first subtracter 265, one second subtracter 266, one the 3rd subtracter 267 and a comparer 268.
This first storehouse 261 is used for receiving successively the pairing gray scale voltage (V11 of all pixel cell 252 the 1st frame pictures
1, V12
1..., Vmn
1).This second storehouse 262 is used for receiving successively the pairing gray scale voltage (V11 of all pixel cell 252 the 2nd frame pictures
2, V12
2..., Vmn
2).The 3rd storehouse 263 is used for receiving successively the pairing gray scale voltage (V11 of all pixel cell 252 k-1 frame pictures
K-1, V12
K-1..., Vmn
K-1).The 4th storehouse 264 is used for receiving successively the pairing gray scale voltage (V11 of all pixel cell 252 k frame pictures
k, V12
k..., Vmn
k).
It is poor that this first subtracter 265 is used for calculating successively the gray scale voltage of the 1st, 2 liang of frame of all pixel cells 252.This second subtracter 266 is used for calculating successively all pixel cells 252 the 1st, and the gray scale voltage of k two frames is poor.The 3rd subtracter 267 is used for calculating successively all pixel cell 252 k-1, and the gray scale voltage of k two frames is poor.This comparer 268 is used for successively the relatively gray scale voltage difference and the 1st of the 1st, 2 liang of frame of this pixel cell 252, and the gray scale voltage of k two frames is poor.
This storer 28 is used for storing the 2nd after the processing of these GTG processor 26 outputs, and k two frame gray scale voltages and this external unit are exported the not processed the 1st, 3,4 ..., k-1, k+1, k+2 ..., h frame gray scale voltage, and pass through this flexible circuit board 27 with the 1st, 2,3, ..., h frame gray scale voltage outputs to this data drive circuit 22, and then outputs to this data line 24.This storer 28 comprises a plurality of continuous the 1st, 2,3 ..., h storage unit (not label), the 1st, 2,3 ..., the h storage unit stores in all pixel cells 252 1 seconds the 1st, 2,3 successively ..., the gray scale voltage of h frame picture correspondence.
The driving method of this display panels 20 comprises the steps::
In the one external unit transmission one second the 1st, 3,4 ... k-1, k+1, k+2 ..., the gray scale voltage of h frame picture correspondence is to the 1st, 3,4 of this storer 28, ... k-1, k+1, k+2, ..., the h storage unit, and transmit the 1st successively, 2, k-1, the gray scale voltage of k frame picture correspondence is to this first storehouse 261, this second storehouse 262, the 3rd storehouse 263 and the 4th storehouse 264.
This first subtracter 265 calculates all pixel cells 252 the 1st successively, the gray scale voltage of 2 liang of frames is poor, this second subtracter 266 calculates all pixel cells 252 the 1st successively, the gray scale voltage of k two frames is poor, the 3rd subtracter 267 calculates all pixel cell 252 k-1 successively, and the gray scale voltage of k two frames is poor.
This comparer 268 is the gray scale voltage difference and the 1st of the 1st, 2 liang of frame of all pixel cells 252 relatively successively, and the gray scale voltage of k two frames is poor.When the voltage difference of the 1st, 2 liang of frame of this pixel cell 252 is non-vanishing, this pixel cell 252 k-1, the voltage difference of k two frames is zero, and promptly this pixel cell 252 the 2nd frame shows dynamic menu, and the k frame shows tableaux; And when this pixel cell 252 the 1st, the gray scale voltage difference of 2 liang of frames is less than the 1st, during the gray scale voltage difference of k two frames, then change the gray scale voltage of the 2nd frame and k frame, promptly utilize software control that the gray scale voltage of the 4th storehouse 264 output k frames is arrived in the 2nd storage unit of this storer 28, the gray scale voltage of this second storehouse, 262 outputs the 2nd frame is in the k storage unit of this storer 28.Otherwise, then do not change the gray scale voltage of the 2nd frame and k frame, promptly utilize software control that the gray scale voltage of this second storehouse, 262 outputs the 2nd frame is arrived in the 2nd storage unit of this storer 28, the gray scale voltage of the 4th storehouse 264 output k frames is in the k storage unit of this storer 28.
The 1st storage unit of this storer 28 outputs to this data drive circuit 22 with the gray scale voltage of the 1st row pixel cell correspondence.
This scan drive circuit 21 produces a plurality of sweep signals and outputs to the 1st column scan line 23, and this data drive circuit 22 is to a plurality of gray scale voltages of these data line 24 outputs simultaneously.
The 1st storage unit of this storer 28 outputs to this data drive circuit 22 with the gray scale voltage of the 2nd row pixel cell correspondence.
This scan drive circuit 21 produces a plurality of sweep signals and outputs to the 2nd column scan line 23, and this data drive circuit 22 is to a plurality of gray scale voltages of these data line 24 outputs simultaneously.
……
The 1st storage unit of this storer 28 is to the gray scale voltage of these data drive circuit 22 output n row pixel cell correspondences.
This scan drive circuit 21 produces a plurality of sweep signals and outputs to n column scan line 23, and this data drive circuit 22 is to a plurality of gray scale voltages of these data line 24 outputs simultaneously.
The similar above-mentioned steps of next frame, the 2nd storage unit of this storer 28 is to these data drive circuit 22 output GTGs.
The display panels of the display panels of second embodiment of the invention and first embodiment is roughly the same, its key distinction is: this GTG processor is used for receiving the j (j 〉=1) of this external unit transmission, j+1, k-1 (j+2≤k≤h), the gray scale voltage of k frame picture correspondence, and output to this storer after the j+1 frame gray scale voltage corresponding with k frame picture handled.This first storehouse receives the gray scale voltage of all pixel cell j frame picture correspondences successively.This second storehouse receives the gray scale voltage of all pixel cell j+1 frame picture correspondences successively.
This first subtracter is used for calculating successively all pixel cell j, and the gray scale voltage of j+1 two frames is poor.This second subtracter is used for calculating successively all pixel cell j, and the gray scale voltage of k two frames is poor.The 3rd subtracter is used for calculating successively all pixel cell k-1, and the gray scale voltage of k two frames is poor.This comparer is used for successively relatively all pixel cell j, the gray scale voltage difference of j+1 two frames and this j, and the gray scale voltage of k two frames is poor.
This storer is used for storing the j+1 of this GTG processor output, the 1st of k two frame gray scale voltages and the output of this external unit ..., j, j+2, j+3, ..., k-1, k+1, k+2 ..., h frame gray scale voltage, and with the 1st, 2 ..., h frame gray scale voltage outputs to this data drive circuit successively, and then outputs to this data line.
The driving method of this display panels comprises the steps:
In the one external unit transmission one second the 1st ..., j, j+2, j+3, ..., k-1, k+1, k+2, ..., the gray scale voltage of h frame picture correspondence arrives this storer the 1st ..., j, j+2, j+3 ..., k-1, k+1, k+2 ..., the h storage unit, and transmit j successively, and j+1, k-1, the gray scale voltage of k frame picture correspondence is to this first storehouse, this second storehouse, the 3rd storehouse and the 4th storehouse.
This first subtracter calculates all pixel cell j successively, the gray scale voltage of j+1 two frames is poor, and this second subtracter calculates all pixel cell j successively, and the gray scale voltage of k two frames is poor, the 3rd subtracter calculates all pixel cell k-1 successively, and the gray scale voltage of k two frames is poor.
This comparer is all pixel cell j relatively successively, the gray scale voltage difference of j+1 two frames and this j, and the gray scale voltage of k two frames is poor; As this pixel cell j, the gray scale voltage difference of j+1 two frames greater than zero the time, this pixel cell k-1, the voltage difference of k two frames is less than zero, promptly this pixel cell j+1 frame shows dynamic menu, this pixel cell k frame shows tableaux; And as this pixel cell j, the gray scale voltage difference of j+1 two frames is less than this j, during the gray scale voltage difference of k two frames, then change the gray scale voltage of j+1 frame and k frame, the gray scale voltage that promptly utilizes software control to make the 4th storehouse export the k frame arrives in the j+1 storage unit of this storer, and this second storehouse is exported the gray scale voltage of j+1 frame in the k storage unit of this storer.Otherwise, then do not change the gray scale voltage of j+1 frame and k frame, the gray scale voltage that promptly utilizes software control to make this second storehouse export the j+1 frame arrives in the j+1 storage unit of this storer, makes the 4th storehouse export the gray scale voltage of k frame in the k storage unit of this storer.
The 1st storage unit of this storer is exported the gray scale voltage of the 1st row pixel cell correspondence to this data drive circuit.
This scan drive circuit produces a plurality of sweep signals and outputs to the 1st column scan line, and this data drive circuit is exported a plurality of gray scale voltages to this data line simultaneously.
The 1st storage unit of this storer is exported the gray scale voltage of the 2nd row pixel cell correspondence to this data drive circuit.
This scan drive circuit produces a plurality of sweep signals and outputs to the 2nd column scan line, and this data drive circuit is exported a plurality of gray scale voltages to this data line simultaneously.
……
The 1st storage unit of this storer is exported the gray scale voltage of n row pixel cell correspondence to this data drive circuit.
This scan drive circuit produces a plurality of sweep signals and outputs to n column scan line, and this data drive circuit is exported a plurality of gray scale voltages to this data line simultaneously.
The similar above-mentioned steps of next frame, the 2nd storage unit output GTG of this storer is to this data drive circuit.
Compared with prior art, the driving method of this display panels can be handled the gray scale voltage of dynamic menu correspondence, when the less easy generation ghost of the gray scale voltage difference of two continuous frames dynamic menu, the gray scale voltage of this dynamic menu correspondence can be changed with the corresponding gray scale voltage of a certain frame tableaux, make the gray scale voltage difference of two continuous frames dynamic menu become big, thus the ghost problem the when display panels of technical solution shows dynamic menu.
The driving method of this invention display panels 20 also can be had other numerous embodiments, as when the gray scale voltage difference of a pixel cell 252 j, j+1 two frames during greater than n (0≤n≤4) GTG, then defines this pixel cell 252 j+1 frames and shows dynamic menu.
Claims (10)
1. display panels, it comprises many parallel scanning beams;
Many the data lines that intersect with this sweep trace insulation, the Minimum Area that these many data lines and this multi-strip scanning line are enclosed is defined as a pixel cell;
One data drive circuit; It is characterized in that: this display panels also comprises:
One GTG processor, be used for receiving the j (j 〉=1) of external transmission, j+1, k-1 (j+2≤k≤h, h≤frame frequency), k frame gray scale voltage, when this pixel cell j+1 frame demonstration dynamic menu, and as this pixel cell j, the gray scale voltage difference of j+1 two frames is less than this j, during the gray scale voltage difference of k two frames, then change the gray scale voltage of j+1 frame and the gray scale voltage of k frame;
With a storer, be used for storing the j+1 of this GTG processor output, the 1st of k frame gray scale voltage and the output of this external unit, ..., j, j+2, j+3, ..., k-1, k+1, k+2 ..., h frame gray scale voltage, and with the 1st, 2,3, ..., h frame gray scale voltage outputs to this data drive circuit successively, and then outputs to this data line.
2. display panels as claimed in claim 1 is characterized in that: this GTG processor comprises one first storehouse, is used for receiving successively the gray scale voltage of all pixel cell the 1st frame picture correspondences;
One second storehouse is used for receiving successively the gray scale voltage of all pixel cell second frame picture correspondences;
One the 3rd storehouse is used for receiving successively the gray scale voltage of all pixel cell k-1 frame picture correspondences;
With one the 4th storehouse, be used for receiving successively the gray scale voltage of all pixel cell k frame picture correspondences.
3. display panels as claimed in claim 2 is characterized in that: this GTG processor further comprises:
One first subtracter is used for calculating successively all pixel cell j, and the gray scale voltage of j+1 two frames is poor;
One second subtracter is used for calculating successively all pixel cell j, and the gray scale voltage of k two frames is poor;
With one the 3rd subtracter, be used for calculating successively all pixel cell k-1, the gray scale voltage of k two frames is poor.
4. display panels as claimed in claim 3 is characterized in that: this GTG processor further comprises a comparer, and this comparer is used for successively relatively all pixel cell j, the gray scale voltage difference of j+1 two frames and this j, and the gray scale voltage of k two frames is poor.
5. display panels as claimed in claim 1 is characterized in that: this storer comprises a plurality of continuous the 1st, 2,3 ..., the h storage unit, the 1st, 2,3 ..., the h storage unit stores in all pixel cells one second the 1st, 2,3 successively ..., the gray scale voltage of h frame picture correspondence.
6. display panels as claimed in claim 1 is characterized in that: as this pixel cell j, the gray scale voltage difference of j+1 two frames then defines this pixel cell j+1 frame and shows dynamic menu during greater than n (0≤n≤4) GTG.
7. the driving method of display panels as claimed in claim 1, it is characterized in that: this driving method comprises the steps:
A. in the external unit transmission one second the 1st ..., j, j+2, j+3 ..., k-1, k+1, k+2 ..., the gray scale voltage of h frame picture correspondence is to this storer, and transmits j successively, j+1, and k-1, the gray scale voltage of k frame picture correspondence is to this GTG processor;
B. calculate a pixel cell j, the gray scale voltage of j+1 two frames is poor, calculates this pixel cell j, and the gray scale voltage of k two frames is poor, calculates this pixel cell k-1, and the gray scale voltage of k two frames is poor;
C. this pixel cell j relatively, the gray scale voltage difference of j+1 two frames and this j, the gray scale voltage of k two frames is poor, when this pixel cell j+1 frame shows dynamic menu, and as this pixel cell j, the gray scale voltage difference of j+1 two frames during the gray scale voltage difference of k two frames, is then changed the gray scale voltage of j+1 frame and k frame less than this j.
8. the driving method of display panels as claimed in claim 7 is characterized in that: this storer comprises a plurality of the continuous the 1st, 2,3 ..., the h storage unit, in the step 1 in this external unit transmission one second the 1st ..., j, j+2, j+3 ..., k-1, k+1, k+2, ..., the gray scale voltage of h frame picture correspondence arrives the 1st of this storer ..., j, j+2, j+3 ..., k-1, k+1, k+2 ..., the h storage unit, the gray scale voltage of transposing j+1 frame and k frame in the step 3 is this GTG processor and exports the j+1 storage unit of the gray scale voltage of k frame to this storer, and this GTG processor is exported the k storage unit of the gray scale voltage of j+1 frame to this storer.
9. the driving method of display panels as claimed in claim 8 is characterized in that: further comprise successively behind the step c:
One steps d: the 1st storage unit of this storer is exported the gray scale voltage of the 1st row pixel cell correspondence to a data drive circuit;
One step e: scan driving circuit produces a plurality of sweep signal to the 1 column scan lines;
One step f: this data drive circuit is exported a plurality of gray scale voltages to this data line.
10. the driving method of display panels as claimed in claim 7, it is characterized in that: when the gray scale voltage difference of this pixel cell j, j+1 two frames during, then define this pixel cell j+1 frame and show dynamic menu among its step c greater than n (0≤n≤4) GTG.
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| CN2007100734024A CN101256289B (en) | 2007-02-28 | 2007-02-28 | Liquid crystal display panel and drive method thereof |
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| CN2007100734024A CN101256289B (en) | 2007-02-28 | 2007-02-28 | Liquid crystal display panel and drive method thereof |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727832B (en) * | 2008-10-20 | 2011-07-13 | 元太科技工业股份有限公司 | Drive method of photoelectric display device |
| WO2017071377A1 (en) * | 2015-10-26 | 2017-05-04 | 京东方科技集团股份有限公司 | Display drive method, display drive circuit, and display device, used for display panel |
| CN111966318A (en) * | 2020-10-20 | 2020-11-20 | 歌尔光学科技有限公司 | Image display method, device, equipment and storage medium |
| WO2023050588A1 (en) * | 2021-09-28 | 2023-04-06 | 歌尔股份有限公司 | Image display method and system, display device, head-mounted display device, and medium |
-
2007
- 2007-02-28 CN CN2007100734024A patent/CN101256289B/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727832B (en) * | 2008-10-20 | 2011-07-13 | 元太科技工业股份有限公司 | Drive method of photoelectric display device |
| WO2017071377A1 (en) * | 2015-10-26 | 2017-05-04 | 京东方科技集团股份有限公司 | Display drive method, display drive circuit, and display device, used for display panel |
| CN111966318A (en) * | 2020-10-20 | 2020-11-20 | 歌尔光学科技有限公司 | Image display method, device, equipment and storage medium |
| WO2023050588A1 (en) * | 2021-09-28 | 2023-04-06 | 歌尔股份有限公司 | Image display method and system, display device, head-mounted display device, and medium |
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| Publication number | Publication date |
|---|---|
| CN101256289B (en) | 2010-08-25 |
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