CN101207602A - Processing chip for wireless sensor network node - Google Patents
Processing chip for wireless sensor network node Download PDFInfo
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- CN101207602A CN101207602A CNA2006101695588A CN200610169558A CN101207602A CN 101207602 A CN101207602 A CN 101207602A CN A2006101695588 A CNA2006101695588 A CN A2006101695588A CN 200610169558 A CN200610169558 A CN 200610169558A CN 101207602 A CN101207602 A CN 101207602A
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Abstract
The invention discloses a processing chip used at wireless sensor network nodes, and the processing chip comprises a processor, a program downloading controller, a program memory, an internal memory, a wireless RF module, a MAC protocol module, an interface module, an interruption control module, a coprocessor and a routing protocol module, wherein, the processor is connected with the program downloading controller and then connected to a bus in the chip. The coprocessor is connected with the bus. The program downloading controller is also connected with the program memory. The program downloading controller provides a program downloading interface for external equipment. The internal memory, the Mac protocol module, the routing protocol module, the interface module and the interruption control module are connected with the bus. The wireless RF module is connected with the MAC protocol module. The interface module provides a data interface for the external equipment. The interruption control module is connected with the processor, the coprocessor, the MAC protocol module, the routing protocol module and the interface module through an interruption connection wire, the interruption control module also provides an interruption interface for the external equipment.
Description
Technical field
The present invention relates to field of wireless transmission, particularly a kind of process chip that is used on the wireless sensor network node.
Background technology
Wireless sensor network is a kind of self-organizing network application system that is made of a large amount of intensive autonomous nodes that are deployed in guarded region.It combines sensor technology, embedded computing technique, modern network and wireless communication technology, distributed information processing etc., be multidisciplinary height intersect have a highly challenging forward position research field, also be the tool high-tech industry with broad prospects for development of generally acknowledging both at home and abroad.
The power consumption of node, volume and cost are the Three Difficult Issues that wireless sensor network faces, present wireless sensor network node generally adopts single-chip microcomputer or embedded system technology, with circuit board power supply, general processor chips, radio frequency chip, transducer and some other peripheral circuits are coupled together, with the main realization means of software as procotol and algorithm, the Mica of CrossBow company series node for example.The node that designs in this way, owing to exist the chip that uses more, chip was not done optimization at this applied environment of wireless sensor network specially, and realize shortcomings such as the method efficient of agreement and algorithm is lower with software, be difficult to satisfy the needs of wireless sensor network at aspects such as power consumption and volumes.Hindered the popularization that wireless sensor network is used.
Development and popularization along with SoC (SOC (system on a chip)) technology, integrated processor and other various modules on a chip, making it to form a cover system becomes possibility, and this method is applied to the wireless sensor network field, will become a kind of effective way that addresses the above problem.At present, though there are some chips that processor and wireless radio frequency modules are integrated in the chip, but these chips do not have integrated route contour level procotol, the coprocessor that does not also have integrated wireless sensor network algorithms most in use is just simply pieced together processor and one in less radio-frequency work.For example, though the JN5121-ZO1-MOx of Jennic company integrated processor, wireless module in a chip, and MAC agreement, it is that block with the MAC agreement is solidificated among the ROM of chip, realizes the MAC agreement by the software dispatch processor.The developer is when using these chips, need realize high-rise procotol and algorithm with software, require very high to developer's level like this, should understand the procotol of wireless sensor network, understand the needs of applied environment again, and the debugging work load of the procotol of design realization wireless sensor network is very big, and the developer of non-wireless sensor network specialty often is difficult to finish.Simultaneously, allow these frequencies of utilization of processor processing very high agreement and algorithm, both can not get higher Energy Efficiency Ratio, wasted the resource of processor again.
Summary of the invention
The objective of the invention is to overcome existing being integrated with in the chip of processor and wireless radio frequency modules, the defective that does not have integrated Routing Protocol and be used to handle the coprocessor of network algorithms most in use, thus a kind of chip of dedicated processes efficiently that is used on the wireless sensor network node is provided.
To achieve these goals, the invention provides a kind of process chip that is used on the wireless sensor network node, comprise processor 1, program downloading controller 3, program storage 4, internal memory 5, wireless radio frequency modules 6, MAC protocol module 7, interface module 9 and interruption controls module 10, also comprise coprocessor 2, Routing Protocol module 8; Wherein, described processor 1 is connected with described program downloading controller 3, and is connected on the interior bus of chip; Described coprocessor 2 links to each other with bus; Described program downloading controller 3 also is connected with described program storage 4 except that with described processor 1 links to each other, and 3 pairs of chip external equipment of described program downloading controller provide the program download interface; Described internal memory 5, MAC protocol module 7, Routing Protocol module 8, interface module 9 and interruption controls module 10 all are connected on the bus, and described wireless radio frequency modules 6 is connected with described MAC protocol module 7; Described interface module 9 externally provides data-interface; Described interruption controls module 10 is connected with described processor 1, coprocessor 2, MAC protocol module 7, Routing Protocol module 8, interface module 9 by interrupting connecting line, and described interruption controls module 10 also provides interrupt interface to the chip external equipment.
In the technique scheme, described processor 1 is each module schedules data in the chip, adopts the existing IP module or the code of increasing income to realize.
In the technique scheme, described coprocessor 2 is realized the calculating operation of node locating, filtering, FFT conversion.
In the technique scheme, described wireless radio frequency modules 6 is finished the modulation function to signal under the control of described MAC protocol module 7, and this module has transmission, reception and three kinds of mode of operations of dormancy.
In the technique scheme, described MAC protocol module 7 is set operating frequency, transmitted power and the modulation pattern of described wireless radio frequency modules 6 under the control of described processor 1, and the object that it transmits and receive data by described processor 1 preparation, and the distribution of work and sleep time; The described object that transmits and receive data be meant that described MAC protocol module 7 transmits and receive data to as if described processor 1 still be described Routing Protocol module 8.
In the technique scheme, described Routing Protocol module 8 is according to Routing Protocol encapsulation integrated in the module or split packet, and transmits the packet after handling.
In the technique scheme, described interface module 9 provides various common interfaces for chip, and described common interfaces comprises serial ports, SPI, I2C, parallel port and analog-to-digital conversion interface.
In the technique scheme, the expansion that described interruption controls module 10 realizes the interrupt interface of described processor 1; Described interruption controls module 10 is as the interruption input of described processor 1, the interrupt requests that co-processor module in the chip 2, MAC protocol module 7, Routing Protocol module 8, interface module 9 and chip is outer sends to the interruption input port of described processor 1, and the source-information of interruption is provided for described processor 1.
The invention has the advantages that:
1, of the present inventionly is used for process chip on the wireless sensor network node procotol that the wireless sensor network frequency of utilization is very high and the algorithm of signal processing is realized with hardware logic, the efficientibility of performance hardware logic, the power consumption of saving wireless sensor network node.
2, the processor that is used for the process chip on the wireless sensor network node of the present invention is dispatched each module according to software, by writing different software, can dispatch hardware module with diverse ways, thereby realize various functions, bring into play the flexibility of software.
3, the present invention realizes most of function of wireless sensor network node in a chip, chip provides abundant sensor interface, the user only needs to connect transducer outside chip and power supply can be made into node, has effectively reduced the volume of sensor node.
Description of drawings
Fig. 1 is the structure chart that is used for the process chip on the wireless sensor network node of the present invention.
The drawing explanation
1 processor, 2 coprocessors, 3 program downloading controller
4 program storages, 5 internal memories, 6 wireless radio frequency modules
7 MAC protocol modules, 8 Routing Protocol modules, 9 interface modules
10 interruption controls modules
Embodiment
The present invention is further illustrated below in conjunction with the drawings and specific embodiments.
As shown in Figure 1, the process chip that is used on the wireless sensor network node of the present invention comprises processor 1, coprocessor 2, program downloading controller 3, program storage 4, internal memory 5, wireless radio frequency modules 6, MAC protocol module 7, Routing Protocol module 8, interface module 9 and interruption controls module 10.Wherein, described processor 1 is connected with program downloading controller 3, and is connected on the bus, coprocessor 2 also links to each other with bus, program downloading controller 3 also is connected with program storage 4 except that with processor 1 links to each other, and 3 pairs of chip external equipment of program downloading controller provide the program download interface; Internal memory 5, MAC protocol module 7, Routing Protocol module 8, interface module 9 and interruption controls module 10 all are connected on the bus, and 6 of wireless radio frequency modules are connected with MAC protocol module 7.Interface module 9 externally provides data-interface; Interruption controls module 10 is connected with processor 1, coprocessor 2, MAC protocol module 7, Routing Protocol module 8, interface module 9 by interrupting connecting line, and interruption controls module 10 also externally provides interrupt interface.
Processor 1 plays effect into each intermodule data dispatching in the process chip that is used on the wireless sensor network node of the present invention, therefore function need not very strong, can select the existing IP module or the code of increasing income to realize, for example the MC8051 processor source code of Oregano Systems, the processor module of ARM series etc. also can oneself design.In order to save power consumption, chip volume and cost, the operating frequency of processor 1 does not need very high, just can accept about 12 megahertzes, and data-bus width is about 8, address-bus width is 16, the scale that can adopt the instruction set of risc architecture to save processor.
Program downloading controller 3 is not when receiving external command, what play a part is lead, the program of processor 1 is read address wire and the routine data line is directly connected on the program storage 4, when program downloading controller 3 is received external command, when requirement is operated program storage 4, program downloading controller 3 will separate the line between processor 1 and the program storage 4, and processor 1 is in reset mode, behind the corresponding operating of finishing external demand, again processor 1 is linked to each other with program storage 4, and remove the reset mode of processor 1.
Program storage 4 is used for used program in the storage chip, and program storage 4 is made by FLASH or EEPROM technology.
Wireless radio frequency modules 6 is finished the modulation function to signal under the control of MAC protocol module 7.The operating frequency of wireless radio frequency modules 6, transmitted power, modulation pattern and mode of operation are set by MAC protocol module 7, and it has transmission, reception and three kinds of mode of operations of dormancy.At sending mode, after the data-modulated that wireless radio frequency modules 6 transmits MAC protocol module 7, go out from the antenna transmission that is connected with chip.At receiving mode, the digital signal that obtains after the signal strength signal intensity of the wireless signal that wireless radio frequency modules 6 transmits antenna and the wireless signal demodulation sends to MAC protocol module 7.At park mode, wireless radio frequency modules 6 neither sends also wave-off, and current no circuit is closed, to save power consumption.
MAC protocol module 7 is set operating frequency, transmitted power and the modulation pattern of wireless radio frequency modules 6 under the control of processor 1, and the object that it transmits and receive data by processor 1 preparation, and the distribution of work and sleep time.The object that MAC protocol module 7 transmits and receive data can be a processor 1, also can be Routing Protocol module 8.When not having data to send, MAC protocol module 7 is controlled the switching of wireless radio frequency modules 6 between reception and two kinds of patterns of dormancy according to agreement.When receiving mode, the signal content of MAC protocol module 7 after according to signal strength signal intensity and demodulation judged useful information or noise, and useful information according to before the configuration of processor 1 send to processor 1 or Routing Protocol module 8.When MAC protocol module 7 when processor 1 or Routing Protocol module 8 receive that data demand sends, it at first is configured to receive pattern with wireless radio frequency modules 6 and intercepts channel, when judging that present channel is empty, again wireless radio frequency modules 6 is arranged to sending mode, after sending data to wireless radio frequency modules 6, pass through antenna transmission by wireless radio frequency modules 6.
Whether it needs work to Routing Protocol module 8 by processor 1 configuration, and under condition of work the running parameter in this module.If Routing Protocol module 8 is configured to not work, it will be in resting state.If Routing Protocol module 8 need to be configured to work, it will accept the data that MAC protocol module 7 transmits on the one hand, unpack according to the setting of Routing Protocol, and judge that this packet is to upload to processor 1, still need to transmit, or can ignore; According to judged result, the data upload that needs are uploaded arrives processor 1 then, and the data based agreement that needs are transmitted is packaged into packet again and gives the MAC protocol module 7 transmissions; Negligible packet is ignored.On the other hand, the data based protocol encapsulation that sends of its needs that processor 1 is sent becomes packet to send to MAC agreement control module 7.
Above-mentioned wireless radio frequency modules 6, MAC protocol module 7 and Routing Protocol module 8 have been finished the work of wireless network from the physical layer to the network layer.Use under the situation of Routing Protocol module 8 in processor 1 configuration, network is fully transparent for program, program is as long as send to Routing Protocol module 8 with data, and receive data from Routing Protocol module 8 and get final product, need not be concerned about how data are transmitted in wireless network, this brings great convenience in actual use, simultaneously in wireless sensor network, the frequency of utilization of wireless transmission and reception is very high, with these procotol hardwareization, has improved Energy Efficiency Ratio on the one hand, saved power consumption, processor 1 does not need to handle procotol on the other hand, can have more resources to handle other tasks, indirect raising the ability of processor.If want to use the Routing Protocol that does not comprise in the Routing Protocol module 8, processor 1 can cut out Routing Protocol module 8 and direct control MAC protocol module 7, do the flexibility and the configurability that have embodied chip like this, certainly, in this case, software program need be realized the network layer protocol of wireless network.
Interface module 9 provides various common interfaces for chip, and this module is internally done alternately with the mode and the processor 1 of bus, and multiple interfaces commonly used such as serial ports, SPI, I2C, parallel port and analog-to-digital conversion externally are provided.Interface module 9 is finished the conversion between the communication data of the parallel data of bus and external interface.
The effect of interruption controls module 10 is the interrupt resources of extensible processor 1, and it is mutual by bus and processor 1, and its interruption output is received in the interruption input of processor 1.Simultaneously, it links to each other with the interruption output of coprocessor 2, MAC protocol module 7, Routing Protocol module 8 and interface module 9 in chip, links to each other with the outer interruption input pin that links to each other with chip of chip, and numbering is done in the input of these modules and pin.When one of them module or pin send interrupt requests, the numbering of interruption controls module 10 record interrupt sources, interrupt interface by processor 1 sends interrupt requests to processor 1, when processor enters interruption, can read to interruption controls module 10 by bus and interrupt numbering, according to numbering, processor 1 can be differentiated the interruption which module or pin send, and is correspondingly processed.Like this, interruption controls module 10 has just been finished the expansion to the processor interrupt resources.
Claims (8)
1. a process chip that is used on the wireless sensor network node comprises processor (1), program downloading controller (3), program storage (4), internal memory (5), wireless radio frequency modules (6), MAC protocol module (7), interface module (9) and interruption controls module (10); It is characterized in that, also comprise coprocessor (2), Routing Protocol module (8); Wherein, described processor (1) is electrically connected with described program downloading controller (3), and is connected on the interior bus of chip; Described coprocessor (2) is electrically connected with bus; Described program downloading controller (3) is electrically connected with described processor (1), also is electrically connected with described program storage (4), and described program downloading controller (3) provides the program download interface to the chip external equipment; Described internal memory (5), MAC protocol module (7), Routing Protocol module (8), interface module (9) and interruption controls module (10) are electrically connected to respectively on the bus, and described wireless radio frequency modules (6) is electrically connected with described MAC protocol module (7); Described interface module (9) externally provides data-interface; Described interruption controls module (10) is electrically connected with described processor (1), coprocessor (2), MAC protocol module (7), Routing Protocol module (8), interface module (9) by interrupting connecting line, and described interruption controls module (10) also provides interrupt interface to the chip external equipment.
2. the process chip that is used on the wireless sensor network node according to claim 1 is characterized in that, described processor (1) adopts the existing IP module or the code of increasing income, and is each module schedules data in the chip.
3. the process chip that is used on the wireless sensor network node according to claim 1 is characterized in that, described coprocessor (2) is realized the calculating operation of node locating, filtering, FFT conversion.
4. the process chip that is used on the wireless sensor network node according to claim 1, it is characterized in that, described wireless radio frequency modules (6) is finished the modulation function to signal under the control of described MAC protocol module (7), this module has transmission, reception and three kinds of mode of operations of dormancy.
5. the process chip that is used on the wireless sensor network node according to claim 1, it is characterized in that, described MAC protocol module (7) is set operating frequency, transmitted power and the modulation pattern of described wireless radio frequency modules (6) under the control of described processor (1), and prepare the object that it transmits and receive data, and the distribution of work and sleep time by described processor (1); The described object that transmits and receive data be meant that described MAC protocol module 7 transmits and receive data to as if still described Routing Protocol module (8) of described processor (1).
6. the process chip that is used on the wireless sensor network node according to claim 1 is characterized in that, described Routing Protocol module (8) is according to Routing Protocol encapsulation integrated in the module or split packet, and transmits the packet after handling.
7. the process chip that is used on the wireless sensor network node according to claim 1, it is characterized in that, described interface module (9) provides various common interfaces for chip, and described common interfaces comprises serial ports, SPI, I2C, parallel port and analog-to-digital conversion interface.
8. the process chip that is used on the wireless sensor network node according to claim 1 is characterized in that, described interruption controls module (10) realizes the expansion to the interrupt interface of described processor (1); Described interruption controls module (10) is as the interruption input of described processor (1), the interrupt requests that co-processor module in the chip (2), MAC protocol module (7), Routing Protocol module (8), interface module (9) and chip is outer sends to the interruption input port of described processor (1), and the source-information of interruption is provided for described processor (1).
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101853209A (en) * | 2010-04-29 | 2010-10-06 | 中国人民解放军国防科学技术大学 | Method for managing network node memory of wireless sensor |
| CN101925162A (en) * | 2010-05-17 | 2010-12-22 | 南开大学 | WSN node dedicated processor having functions of security and location |
| CN102076066A (en) * | 2010-11-29 | 2011-05-25 | 华南农业大学 | Wireless sensor network node and communication control method for same |
| CN102799800A (en) * | 2011-05-23 | 2012-11-28 | 中国科学院计算技术研究所 | Security encryption coprocessor and wireless sensor network node chip |
| CN103685558A (en) * | 2013-12-30 | 2014-03-26 | 常州大学 | Wireless sensor network and task processing method thereof |
| CN104503774A (en) * | 2014-11-28 | 2015-04-08 | 广东欧珀移动通信有限公司 | Software debugging method, associated equipment and system |
| CN104640151A (en) * | 2015-01-19 | 2015-05-20 | 青岛中天信通物联科技有限公司 | Wireless management method for sensor |
| CN107453883A (en) * | 2016-05-31 | 2017-12-08 | 北京中天鼎盛视讯科技有限公司 | A kind of wireless supervisory control system and method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| EP1499075A1 (en) * | 2003-07-14 | 2005-01-19 | Samsung Electronics Co., Ltd. | Route update protocol for a wireless sensor network |
| CN1617465B (en) * | 2003-11-11 | 2011-02-16 | 中国科学院沈阳自动化研究所 | Blue tooth radio sensor |
| US20060097046A1 (en) * | 2004-10-25 | 2006-05-11 | Defero Systems Inc. | Intelligent air travel tag for asset self-tracking |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101853209A (en) * | 2010-04-29 | 2010-10-06 | 中国人民解放军国防科学技术大学 | Method for managing network node memory of wireless sensor |
| CN101853209B (en) * | 2010-04-29 | 2011-08-10 | 中国人民解放军国防科学技术大学 | Method for managing network node memory of wireless sensor |
| CN101925162A (en) * | 2010-05-17 | 2010-12-22 | 南开大学 | WSN node dedicated processor having functions of security and location |
| CN102076066A (en) * | 2010-11-29 | 2011-05-25 | 华南农业大学 | Wireless sensor network node and communication control method for same |
| CN102799800A (en) * | 2011-05-23 | 2012-11-28 | 中国科学院计算技术研究所 | Security encryption coprocessor and wireless sensor network node chip |
| CN102799800B (en) * | 2011-05-23 | 2015-03-04 | 中国科学院计算技术研究所 | Security encryption coprocessor and wireless sensor network node chip |
| CN103685558A (en) * | 2013-12-30 | 2014-03-26 | 常州大学 | Wireless sensor network and task processing method thereof |
| CN104503774A (en) * | 2014-11-28 | 2015-04-08 | 广东欧珀移动通信有限公司 | Software debugging method, associated equipment and system |
| CN104640151A (en) * | 2015-01-19 | 2015-05-20 | 青岛中天信通物联科技有限公司 | Wireless management method for sensor |
| CN107453883A (en) * | 2016-05-31 | 2017-12-08 | 北京中天鼎盛视讯科技有限公司 | A kind of wireless supervisory control system and method |
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| CN101207602B (en) | 2010-07-21 |
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