CN101207056B - Method for measuring loading effect and percentage of coverage for thin membrane stairway - Google Patents
Method for measuring loading effect and percentage of coverage for thin membrane stairway Download PDFInfo
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- CN101207056B CN101207056B CN2006101474369A CN200610147436A CN101207056B CN 101207056 B CN101207056 B CN 101207056B CN 2006101474369 A CN2006101474369 A CN 2006101474369A CN 200610147436 A CN200610147436 A CN 200610147436A CN 101207056 B CN101207056 B CN 101207056B
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Abstract
The invention discloses a measurement method of the step coverage ratio and loading effect of a thin film. The method comprises the following steps: a semiconductor substrate is provided; a testing zone is formed on the surface of the substrate; a dielectric thin film is deposited on the surface of the testing zone; the thickness of the thin film is measured through using an optical characteristic dimension measurement method; the step coverage ratio and the loading effect of the thin film are calculated through using the thickness. The method of the invention can measure the step coverage ratio and the loading effect of the thin film dielectric layer without damaging the wafer.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, the method for measurement of particularly a kind of dielectric layer step coverage rate and loading effect.
Background technology
Along with the progress of semi-conductor industry, the dense degree of semiconductor device improves constantly, and circuit function becomes increasingly complex, and the value volume and range of product of semiconductor device intermediary plasma membrane significantly increases.The quality of dielectric film, for example thickness evenness and gradient coating performance become the key that influences device performance gradually.In numerous deielectric-coating deposition technology, chemical vapor deposition (CVD) technology is widely used.Most deielectric-coating adopts the deposit of CVD technology to form.CVD technology is the chemical substance that contains required atom of deielectric-coating or molecule to be mixed to be incorporated under the gaseous state react in reative cell, and its atom and molecular deposition are assembled the formation film at crystal column surface.
In the manufacturing of semiconductor device, be extensive use of silica (SiO
2) and silicon nitride (SIN) as the dielectric film.For example, among Fig. 1, after the surface of Semiconductor substrate 100 forms grid 110, need silicon oxide deposition layer 120 and silicon nitride layer 130 in gate surface, etching forms side wall (sidewallspacer) then.Dielectric layer must satisfy the requirement of general parameters and special parameter, for example aforementioned thickness evenness and step coverage rate.Utilizing CVD technology can control the reaction rate of heat and plasma CVD technology by parameters such as control temperature, pressure, reactant gas flow and radio-frequency powers when the gate surface dielectric layer deposited, is described in the Chinese patent application file of 02814855.X as application number.Yet be subjected to the influence of process conditions itself, dielectric layer is normally different at the thickness of grid end face and side, and the thickness evenness of the dielectric layer of gate surface there are differences, and this directly influences the step coverage rate index.Most of zone at wafer surface deposited dielectric layers cover wafers had both comprised the zone that device is very intensive, just the higher zone (hereinafter to be referred as the compact district) of device density in these zones; Comprise the zone that device is more sparse that is device density is lower (hereinafter to be referred as the non-dense set district) again.Fig. 2 is the schematic diagram of explanation grating of semiconductor element spacing, and as shown in Figure 2, in the higher zone of device density, the spacing between the grid 110 is very small.Under same deposition conditions, because the influence of loading effect (loading effect), the thickness of device compact district and non-dense set district deposited dielectric layers also shows different, utilizes the thickness difference of the dielectric film in compact district and non-dense set district to characterize loading effect usually.
Step coverage rate and loading effect are two very important indexs weighing the thin film dielectrics layer, and the acquisition of these two indexs all needs the thickness of accurate MEASUREMENTS OF THIN.Usually obtained by horizontal interface (scanning electron microscopy) SEM, transmission electron microscope (TEM) and focused ion beam methods such as (FIB) in order to obtain step coverage rate and loading effect information in the past.But these methods all have destructiveness, need cut into slices to wafer, utilize the thickness of electronic scanning microscopy apparatus MEASUREMENTS OF THIN then, and speed is very slow, and the sample analysis cycle is long, has increased production cost.
Summary of the invention
The object of the present invention is to provide the method for measurement of a kind of film step coverage rate and loading effect, can be with the step coverage rate and the loading effect of the mode MEASUREMENTS OF THIN dielectric layer that do not destroy wafer.
For achieving the above object, the invention provides the method for measurement of a kind of film step coverage rate and loading effect, comprising:
Semi-conductive substrate is provided;
Form test zone at described substrate surface;
At described test zone surface deposition thin dielectric film;
Utilize the optical signature dimension measurement method to measure the thickness of described film;
Utilize described THICKNESS CALCULATION film step coverage rate and loading effect.
Described test zone comprises fin compact district and fin non-dense set district.
Described fin is periodic arrangement uniformly-spaced.
Described fin is a grid.
In described compact district, the ratio of the width between the width of described grid and the described grid is 1: 1 to 1: 4.
In described non-dense set district, the ratio of the width between the width of described grid and the described grid is 1: 4 to 1: 10.
Described thickness comprises the thickness of the film that covers described gate lateral wall and covers the thickness of the film between the described grid.
Described step coverage rate equal to cover described gate lateral wall film thickness and cover the ratio of the thickness of the film between the described grid.
Described loading effect comprises a line loading effect and a loading effect.
Described line loading effect equals: the thickness of (thickness of the thickness of non-dense set district gate lateral wall film-compact district gate lateral wall film)/non-dense set district gate lateral wall film;
Described loading effect equals: the thickness of film between (between the non-dense set district grid between the thickness of film-compact district grid the thickness of film)/non-dense set district grid.
Correspondingly the invention provides a kind of mask pattern that is used to form above-mentioned test zone, described mask pattern comprises flagpole pattern, and described flagpole pattern is uniformly-spaced arranged.
Described mask pattern comprises the compact district and the non-dense set district of flagpole pattern.
In the described compact district, the width of flagpole pattern and the ratio of the width between the flagpole pattern are 1: 1 to 1: 4.
In described non-dense set district, the width of flagpole pattern and the ratio of the width between the flagpole pattern are 1: 4 to 1: 10.
Compared with prior art, the present invention has the following advantages:
The method of measurement of film step coverage rate of the present invention and loading effect utilizes mask pattern to form test zone at substrate surface; Then at described test zone surface deposition thin dielectric film; Utilize the optical signature dimension measurement method to measure the thickness of described film; Utilize described one-tenth-value thickness 1/10 to calculate film step coverage rate and loading effect again.Method of the present invention is utilized optical signature dimensional measurement (Optical CD, OCD) technology, this technology is utilized the diffraction light of CD lattice structure formation and thickness, CD size and cross-section structure is measured, can obtain film step coverage rate and loading effect in nondestructive mode, reduce manufacturing cost, improved production efficiency.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing in proportion, focus on illustrating purport of the present invention.In the accompanying drawings, for cheer and bright, amplified the thickness in layer and zone.
Fig. 1 is the grid structure of semiconductor device generalized section;
Fig. 2 is the schematic diagram of explanation grating of semiconductor element spacing;
Fig. 3 is the device profile schematic diagram of gate surface cover film;
The test zone schematic diagram of Fig. 4 for forming in the inventive method;
Fig. 5 is the partial schematic diagram behind test zone surface deposition thin dielectric film shown in Figure 4;
Fig. 6 is the mask pattern schematic diagram that is used to form test zone of the present invention;
Fig. 7 utilizes the inventive method to carry out the device profile schematic diagram of plural layers thickness measure for explanation.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Set forth detail in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention.Therefore the present invention is not subjected to the restriction of following public concrete enforcement.
TEM section technology has been used commonplacely, and the device producer avoids the technology with section SEM more and more, but obtains needed resolution and accuracy with section TEM, but TEM is costliness and labor intensive.In 65 nanometers and more advanced technology, through hole, isolated groove and contact hole etc. become finer and complicated, need carry out the multi-faceted measurement of two peacekeepings to its shape and size.The result must focus near the aggregate performance the characteristic point.This just requires high-resolution cross dimensions testing equipment.And because measurement requirement is carried out on device rather than test structure, this just requires measuring technique is nondestructive.Under higher voltage and dosage, SEM provides better resolution, but this has also destroyed its measured device, and particularly when surveying at a plurality of on wafer, this is that we are reluctant to see.
In 65 nanometers and 45 nm technology node, for the demand on the support property and obtain higher packaging density, the introducing of new material and new construction has promoted this transformation, such as FinFET (finFET) device of optimizing grid.The measurement demand of section becomes and becomes increasingly complex, and traditional measuring technique is no longer competent.The appearance that semiconductor is made new technology requires technical process can reach strict process control level more.The problem that these new technologies need solve comprises the more and more thinner film and the measurement of plural layers stacked structure thickness.(Optical CD is that form is measured in a kind of newer relatively integration OCD), is applied to the advanced technologies control (APC) in the production process in optics CD measurement.The diffraction light that this technology utilizes the CD lattice structure to form is measured thickness, CD size and cross-section structure, and this measuring technique is nondestructive.
Fig. 3 is the device profile schematic diagram of gate surface cover film.As shown in Figure 3, after Semiconductor substrate 100 surface forms grid oxic horizons and polysilicon layer, form grid 110 after utilizing photoetching process to form above-mentioned polysilicon layer of mask etching and grid oxic horizon.Utilize CVD (chemical vapor deposition) technology deposit dielectric film 140 then.At wafer surface numerous device that distributing, than comparatively dense, we are referred to as compact district (Dense) in the density of active area (AA) device; And between AA or the density of wafer edge region device lower, we are referred to as non-dense set district (Iso).In the Dense zone, the density of grid 110 is higher, and is lower in the density of Iso zone grid 110.The step coverage rate of film 140 is defined as a/b.At 65nm and following process node, spacing between the grid in Dense zone has only tens nm, when the so intensive regional deposit dielectric film 140 of gate pitch, the material of some deposits also has little time to enter into the sidewall surfaces that space between the grid just is deposited on grid, cause under identical CVD deposition conditions, the Dense zone is different with the thickness of Iso zone gate lateral wall film, in the Dense zone, the thickness of gate edge increases very fast, and this phenomenon is called loading effect (loading effect).The loading effect of film 140 is represented the consistency of thickness of CVD technology film of deposit between the gate lateral wall of zones of different and grid.Loading effect uses line (line) loading effect (Iso (a)-dense (a))/Iso (a) and (space) loading effect (Iso (b)-dense (b))/Iso (b) to represent respectively.
Before address, no matter be to obtain the step coverage rate of film 140 or the loading effect of film 140, all must obtain the one-tenth-value thickness 1/10 a and the b of film 140.In order to utilize OCD that the film thickness of gate surface deposition is measured, method of the present invention forms test zone at substrate surface.The test zone schematic diagram of Fig. 4 for forming in the inventive method.As shown in Figure 4, test zone comprises fin compact district 150 and fin non-dense set district 160.In the present embodiment, fin is the grid 151 and 161 that forms at etch polysilicon.According to the needs of OCD measuring principle, the grid 151 of compact district 150 and the grid 161 in non-dense set district 160 be periodic arrangement uniformly-spaced.In described compact district 150, the width l of grid 151 and the ratio l/s of the width s between the grid 151 are 1: 1 to 1: 4.In non-dense set district 160, the width l of grid 161 and the ratio l/s of the width s between the grid 161 are 1: 4 to 1: 10.
Then, utilize CVD or LPCVD technology gate surface deposit dielectric film at test zone.Fig. 5 is the partial schematic diagram behind test zone surface deposition thin dielectric film shown in Figure 4, with reference to Fig. 5, and film 140 cover gate 151 and 161.Utilize the thickness of optical signature size (OCD) method MEASUREMENTS OF THIN 140.The thickness of film 140 comprises the thickness a of the film that covers described gate lateral wall and covers the thickness b of the film between the described grid.Obtain after one-tenth-value thickness 1/10 a and the b, utilize one-tenth-value thickness 1/10 to calculate film step coverage rate and loading effect.Described step coverage rate equal to cover described gate lateral wall film thickness a and cover the ratio of the thickness b of the film between the described grid, i.e. a/b.Described loading effect comprises a line loading effect (line loading effect) and a loading effect (space loading effect).Described line loading effect be the thickness a ' of non-dense set district 160 grids, 161 sidewall films deduct compact district 150 grids, 151 sidewall films thickness a again divided by the thickness a ' of non-dense set district 160 grids, 161 sidewall films, promptly (a '-a)/a '.The thickness b that the thickness b ' that described loading effect is film between non-dense set district 160 grids 161 deducts film between 150 grids 151 of compact district is again divided by the thickness b ' of film between non-dense set district 160 grids 161, promptly (b '-b)/b '.
Fig. 6 is the mask pattern schematic diagram that is used to form test zone of the present invention.As shown in Figure 6, described mask pattern 200 comprises compact district and non-dense set district, and described compact district comprises flagpole pattern 211; Described non-dense set district comprises flagpole pattern 221, and the flagpole pattern 211 of compact district and the flagpole pattern in non-dense set district 221 are uniformly-spaced arranged respectively.The live width of the flagpole pattern 211 of compact district is l, and the width between the flagpole pattern 211 is s, l and s's and be spacing p; The live width of the flagpole pattern 221 in non-dense set district is l ', and the width between the flagpole pattern 221 is s ', l ' and s's ' and be spacing p '.In described compact district, the width l of flagpole pattern 211 and the ratio l/s of the width s between the flagpole pattern are 1: 1 to 1: 4.In described non-dense set district, the width l ' of flagpole pattern 221 and ratio the l '/s ' of the width s ' between the flagpole pattern 221 are 1: 4 to 1: 10.In the present embodiment, the length x width of mask pattern 200 (L * W) as long as greater than 20*20um just can, spacing p ' is less than 2um.Specifically, the spacing p ' in non-dense set district is 0.4～2um; The spacing p of compact district is 0.1～0.4um.The live width l ' in non-dense set district is 0.04～0.4um; The live width l of compact district is 0.02～0.8um.
Fig. 7 utilizes the inventive method to carry out the device profile schematic diagram of plural layers thickness measure for explanation.As shown in Figure 7, after the device compact district and non-dense set district formation grid on substrate 100 surfaces, utilize LPCVD technology deposit silicon nitride layer 11 in gate surface, utilize OCD to measure silicon nitride layer 11, utilize aforementioned formula to calculate the step coverage rate and the loading effect of silicon nitride layer 11 then at the bottom surface in compact district and non-dense set district and the thickness of gate lateral wall.Subsequently in silicon nitride layer 11 surface deposition side wall oxide layers 12, utilize OCD to measure film (the silicon nitride layer 11+ side wall oxide layer 12) thickness of bottom surface and gate lateral wall in compact district and non-dense set district, the thickness that deducts silicon nitride layer 11 with this thickness promptly obtains the actual (real) thickness of the side wall oxide layer 12 of deposit.Utilize the actual (real) thickness of side wall oxide layer 12 just can calculate the step coverage rate and the loading effect of side wall oxide layer 12.Follow surface deposition side wall nitride layer 13 in side wall oxide layer 12, utilize OCD to measure film (the silicon nitride layer 11+ side wall oxide layer 12+ side wall nitride layer 13) thickness of bottom surface and gate lateral wall, the thickness that deducts silicon nitride layer 11 and side wall oxide layer 12 with this thickness promptly obtains the actual (real) thickness of the side wall nitride layer 13 of deposit, utilizes the actual (real) thickness of side wall nitride layer 13 just can calculate the step coverage rate and the loading effect of side wall nitride layer 13.
The method of measurement of film step coverage rate of the present invention and loading effect utilizes mask pattern to have the test zone that is spaced figure in substrate surface formation, at described test zone surface deposition thin dielectric film; Utilize OCD to measure the thickness of described film; Utilize described one-tenth-value thickness 1/10 to calculate film step coverage rate and loading effect again.Method of the present invention can obtain film step coverage rate and loading effect in nondestructive mode, has reduced manufacturing cost, has improved production efficiency.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (8)
1. the method for measurement of film step coverage rate and loading effect comprises:
Semi-conductive substrate is provided;
Form test zone at described substrate surface, described test zone comprises fin compact district and fin non-dense set district, and fin is in the compact district and the medium gap periods arrangement in non-dense set district;
At described test zone surface deposition thin dielectric film;
Utilize the optical signature dimension measurement method to measure the thickness of described film;
Utilize described THICKNESS CALCULATION film step coverage rate and loading effect.
2. the method for claim 1, it is characterized in that: described fin is a grid.
3. method as claimed in claim 2 is characterized in that: in described compact district, the ratio of the width between the width of described grid and the described grid is 1: 1 to 1: 4.
4. method as claimed in claim 2 is characterized in that: in described non-dense set district, the ratio of the width between the width of described grid and the described grid is 1: 4 to 1: 10.
5. method as claimed in claim 2 is characterized in that: described thickness comprises the thickness of the film that covers described gate lateral wall and covers the thickness of the film between the described grid.
6. method as claimed in claim 5 is characterized in that: described step coverage rate equal to cover described gate lateral wall film thickness and cover the ratio of the thickness of the film between the described grid.
7. method as claimed in claim 5 is characterized in that: described loading effect comprises a line loading effect and a loading effect.
8. method as claimed in claim 7 is characterized in that:
Described line loading effect equals: the thickness of (thickness of the thickness of non-dense set district gate lateral wall film-compact district gate lateral wall film)/non-dense set district gate lateral wall film;
Described loading effect equals: the thickness of film between (between the non-dense set district grid between the thickness of film-compact district grid the thickness of film)/non-dense set district grid.
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| CN2006101474369A CN101207056B (en) | 2006-12-18 | 2006-12-18 | Method for measuring loading effect and percentage of coverage for thin membrane stairway |
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| CN2006101474369A CN101207056B (en) | 2006-12-18 | 2006-12-18 | Method for measuring loading effect and percentage of coverage for thin membrane stairway |
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