CN101206354A - Liquid crystal panel drive circuit and LCD - Google Patents
Liquid crystal panel drive circuit and LCD Download PDFInfo
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- CN101206354A CN101206354A CNA2006101576911A CN200610157691A CN101206354A CN 101206354 A CN101206354 A CN 101206354A CN A2006101576911 A CNA2006101576911 A CN A2006101576911A CN 200610157691 A CN200610157691 A CN 200610157691A CN 101206354 A CN101206354 A CN 101206354A
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Abstract
The present invention relates to a liquid crystal panel driving circuit and a LCD. The liquid crystal panel driving circuit comprises a plurality of mutually parallel data lines, a plurality of mutually parallel scan lines in vertical insulated intersection with the data lines, a plurality of thin film transistors positioned at the intersections of the scan lines and the data lines, a plurality of pixel electrodes, a plurality of common electrodes, a comparison circuit and a reversed-phase mean circuit. The pixel electrodes are connected with the data lines via the thin film transistors. The common electrodes are arranged oppositely to the pixel electrodes. The comparison circuit compares the voltage of at least one pixel electrode and the voltage of the data lines connected with the pixel electrode. The reversed-phase mean circuit performs reversed-phase mean calculation to the voltage difference value gained by the comparison circuit, and feeds back the voltage mean value gained to the common electrodes. The liquid crystal panel driving circuit and the LCD can achieve the objective of adjusting liquid crystal clamp voltage automatically so as to avoid picture flicker.
Description
Technical field
The present invention relates to a kind of liquid crystal panel drive circuit and LCD.
Background technology
Because LCD has advantages such as frivolous, that power consumption is little, radiation is low, has been widely used in the modern communication equipment such as notebook computer, mobile phone, personal digital assistant.
Usually, LCD comprises that a liquid crystal panel, provides the module backlight of planar light and the driving circuit that this liquid crystal panel of control shows for this liquid crystal panel.This liquid crystal panel comprises that a upper substrate, an infrabasal plate and are clamped in the liquid crystal layer between two substrates.
Seeing also Fig. 1, is a kind of circuit structure diagram of prior art liquid crystal panel drive circuit.This liquid crystal panel drive circuit 2 comprise a control circuit 20, a public electrode voltage regulating circuit 21, scan driving circuit 22, a data drive circuit 23, many sweep traces that are parallel to each other 24, many be parallel to each other and with the vertically insulated crossing data line 25 of this sweep trace 24 and a plurality of thin film transistor (TFT)s that are positioned at this sweep trace 24 and data line 25 infalls (Thin Film Transistor, TFT) 261, a plurality of pixel electrode 262 and the public electrode 263 that is oppositely arranged with this pixel electrode 262.
This sweep trace 24 is defined as a pixel cell 26 with the Minimum Area that this data line 25 is defined.The grid 2611 of this thin film transistor (TFT) 261 is connected to this sweep trace 24, and this source electrode 2615 is connected to this data line 25, and this drain electrode 2613 is connected to this pixel electrode 262.
This control circuit 20 receives from the external circuit steering order of (figure does not show), and the output control signal makes this data drive circuit 23 start working with this scan drive circuit 22.This scan drive circuit 22 is by the grid 2611 output scanning voltage Vgs of this sweep trace 24 to this thin film transistor (TFT) 261, thus the conducting of controlling this thin film transistor (TFT) 261 with end.23 voltage Vs that import the representative of graphics data messages by this data line 25 to the source electrode 2615 of this thin film transistor (TFT) 261 of this data drive circuit.When these thin film transistor (TFT) 261 conductings, the voltage Vs that is carried on this source electrode 2615 is sent to this pixel electrode 262 via this drain electrode 2613.Simultaneously, this public electrode voltage regulating circuit 21 outputs one public electrode voltages is to this public electrode 263, and then this pixel electrode 262 produces an electric field with the rotation of control liquid crystal molecule with this public electrode 263.
For each pixel cell 26, owing to can form stray capacitance between each electrode of thin film transistor (TFT) 261, this stray capacitance can exert an influence to pixel electrode 262 voltages, cause under same GTG, the voltage at liquid crystal molecule two ends is that the liquid crystal cramping is inconsistent, thereby causes display frame glimmer (Flicker).Usually, when making liquid crystal panel, industry is often according to the display frame state, set a best public electrode voltages value, utilize One Time Programmable (One Time Programmable again, OTP) method for burn-recording should the best public electrode voltages value writes the public electrode 263 of this liquid crystal panel drive circuit 2, makes the liquid crystal cramping keep certain value, thereby reduces scintillation.Yet, along with LCD temperature variation and service time increase, stray capacitance can change, and causes the liquid crystal cramping generation certain deviation of originally adjusting, be the voltage Vs that pixel electrode voltage Vd departs from corresponding connection data line 25 with it, cause the film flicker phenomenon to produce once more.
Summary of the invention
In order to solve that prior art liquid crystal cramping easily is offset and the problem that causes film flicker can be adjusted the liquid crystal panel drive circuit that the liquid crystal cramping prevents film flicker automatically thereby be necessary to provide a kind of.
In addition, in order to solve that prior art liquid crystal cramping easily is offset and the problem that causes film flicker can be adjusted the LCD that the liquid crystal cramping prevents film flicker automatically thereby also be necessary to provide a kind of.
A kind of liquid crystal panel drive circuit, it comprise that many data lines that are parallel to each other, many are parallel to each other and with the vertically insulated crossing sweep trace of this data line, a plurality of thin film transistor (TFT) of this sweep trace and data line intersection, a plurality of pixel electrode, a plurality of public electrode, a comparator circuit and anti-phase average circuit of being positioned at.This pixel electrode links to each other with this data line via this thin film transistor (TFT).This public electrode and this pixel electrode are oppositely arranged.More at least one pixel electrode voltage of this comparator circuit and the data line voltage that links to each other with this pixel electrode.This anti-phase average circuit carries out anti-phase mean value computation with the voltage difference of this comparator circuit gained, and the gained average voltage is fed back to this public electrode.
A kind of LCD, it comprises a liquid crystal panel and a liquid crystal panel drive circuit.This liquid crystal panel drive circuit is used for controlling the show state of this liquid crystal panel, it comprise that many data lines that are parallel to each other, many are parallel to each other and with the vertically insulated crossing sweep trace of this data line, a plurality of thin film transistor (TFT) of sweep trace and data line intersection, a plurality of pixel electrode, a plurality of public electrode, a comparator circuit and anti-phase average circuit of being positioned at.This pixel electrode links to each other with this data line via this thin film transistor (TFT).This public electrode and this pixel electrode are oppositely arranged.More at least one pixel electrode voltage of this comparator circuit and the data line voltage that links to each other with this pixel electrode.This anti-phase average circuit carries out anti-phase mean value computation with the voltage difference of this comparator circuit gained, and the gained average voltage is fed back to this public electrode.
Compared with prior art, when this pixel electrode is subjected to effect of parasitic capacitance and is offset, this liquid crystal panel drive circuit and this LCD can utilize this comparator circuit to detect this side-play amount automatically, it is the voltage difference of data line voltage and pixel electrode voltage, and become a voltage compensation value that this public electrode is compensated by this anti-phase average circuit conversion this side-play amount, thereby realize to this pixel electrode and this public electrode both end voltage being the automatic adjustment of liquid crystal cramping, make it should under same GTG, keep constant, avoid picture to produce scintillation.
Description of drawings
Fig. 1 is a kind of circuit diagram of liquid crystal panel drive circuit of prior art LCD.
Fig. 2 is the structural representation of LCD one better embodiment of the present invention.
Fig. 3 is the circuit diagram that is used for driving the liquid crystal panel drive circuit of liquid crystal panel shown in Figure 2.
Fig. 4 is the circuit structure diagram that constitutes a subtracter of comparator circuit in the liquid crystal panel drive circuit shown in Figure 3.
Fig. 5 is the circuit structure diagram of the anti-phase average circuit of liquid crystal panel drive circuit shown in Figure 3.
Embodiment
Seeing also Fig. 2, is the structural representation of LCD one better embodiment of the present invention.This LCD 3 comprises that a liquid crystal panel 5, provides the module backlight 7 of planar light for this liquid crystal panel 5.This liquid crystal panel 5 comprises that a upper substrate 51, an infrabasal plate 53 and are clamped in the liquid crystal layer 52 of 53 of upper substrate 51 and infrabasal plates.This liquid crystal panel 5 is driven by a liquid crystal panel drive circuit (figure does not show).
Seeing also Fig. 3, is the circuit diagram that is used for driving the liquid crystal panel drive circuit of this liquid crystal panel 5.This liquid crystal panel drive circuit 30 comprises a control circuit 31, one data drive circuit 32, scan driving circuit 33, many the sweep traces that are parallel to each other 34, many be parallel to each other and with these sweep trace 34 vertically insulated crossing data lines 35, a plurality of thin film transistor (TFT)s 361 that are positioned at this sweep trace 34 and data line 35 infalls, a plurality of pixel electrodes 362, a plurality of public electrodes 363 that are oppositely arranged with this pixel electrode 362, one comparator circuit 37, an one anti-phase average circuit 38 and a public electrode voltage regulating circuit 39.
This sweep trace 34 is defined as a pixel cell 36 with the Minimum Area that this data line 35 is defined.The grid 3611 of this thin film transistor (TFT) 361 is connected to this sweep trace 34, and this source electrode 3615 is connected to this data line 35, and this drain electrode 3613 is connected to this pixel electrode 362.This control circuit 31 receives from the external circuit steering order of (figure does not show), and the output control signal makes this data drive circuit 32 start working with this scan drive circuit 33.This scan drive circuit 33 is by the grid 3611 output scanning voltage Vgs of this sweep trace 34 to this thin film transistor (TFT) 361, thus the conducting of controlling this thin film transistor (TFT) 361 with end.32 voltage Vs that import the representative of graphics data by this data line 35 to the source electrode 3615 of this thin film transistor (TFT) 361 of this data drive circuit.When these thin film transistor (TFT) 361 conductings, the voltage Vs that is carried on this source electrode 3615 is sent to this pixel electrode 362 via this drain electrode 3613, thereby obtains a pixel electrode voltage Vd.Simultaneously, this public electrode voltage regulating circuit 39 outputs one public electrode voltages is to this public electrode 363, and then this pixel electrode 362 produces the rotation of an electric field with the control liquid crystal molecule with this public electrode 363.
This comparator circuit 37 is to be made of a plurality of subtracters 40.Constituting this comparator circuit 37 with three subtracters 40 in the present embodiment is that example describes.This three subtracter 40 is electrically connected with a pixel cell 36 corresponding data lines 35 and corresponding pixel electrode 362 thereof respectively, and exports a variation value Δ V respectively to this anti-phase average circuit 38.Wherein, are zones of being defined by different pieces of information line 35 and different scanning line 34 with three pixel cells 36 of these three subtracters, 40 corresponding connections.This variation value Δ V is the difference of the voltage Vs of this pixel electrode voltage Vd and this data line 35.38 pairs of these three voltage deviations Δs of this anti-phase average circuit V carries out anti-phase average computing, thereby obtains the common electric voltage offset Vout an of the best, and this common electric voltage offset Vout is fed back to this public electrode voltage regulating circuit 39.This public electrode voltage regulating circuit 39 is adjusted the public electrode voltages that inputs to this public electrode 363 according to this common electric voltage offset Vout.
Seeing also Fig. 4, is the circuit structure diagram of a subtracter 40 of this comparator circuit 37.This subtracter 40 comprises one first operational amplification circuit 401, one first resistance 402, one second resistance 403, a stake resistance 404, one first feedback resistance 405 and an output terminal 406.The resistance of this first resistance 402, second resistance 403 and this first feedback resistance 405 is identical.This first operational amplification circuit 401 comprises a normal phase input end (not label) and an inverting input (not label).The voltage Vs of this data line 35 inputs to the inverting input of this first operational amplification circuit 401 via first resistance 402 of this subtracter 40, and its pixel electrode voltage Vd then inputs to the normal phase input end of this first operational amplification circuit 401 via this second resistance 403.This stake resistance 404 is connected between this normal phase input end and the ground, and this first feedback resistance 405 is connected between this output terminal 406 and this inverting input.
Seeing also Fig. 5, is the circuit structure diagram of this anti-phase average circuit 38.This anti-phase average circuit 38 is an anti-phase totalizer, and it comprises one second operational amplification circuit 381, a plurality of input resistance 382, a stake resistance 383, one second feedback resistance 384 and an output terminal 385.This second operational amplification circuit 381 comprises a homophase input end (not label) and an inverting input (not label).The resistance of these a plurality of input resistances 382 equates, all is designated as R.This second feedback resistance 384 is connected between this output terminal 385 and the inverting input, and its resistance is designated as Rf.This stake resistance 383 is connected between this in-phase input end and the ground.The voltage deviation Δ V that each subtracter 40 obtains inputs to this inverting input via an input resistance 382 respectively.This output terminal 385 outputting common voltage offset Vout are to this public electrode voltage regulating circuit 39, and this common electric voltage offset Vout=(∑ Δ V) Rf/R, wherein, Rf=R/n, n is the number of subtracter 40, n gets 3 in the present embodiment.
When making this LCD 3, because its pixel cell 36 is to form simultaneously under same manufacturing process, then only there is minute differences in each pixel cell 36 measured voltage deviation Δ V, the plurality of pixel cells 36 of former only need selecting arbitrarily can realize the adjustment to the liquid crystal cramping, as the plurality of pixel cells 36 that can select to be defined, also can select the plurality of pixel cells 36 that is defined by same data line 35 and different scanning line 34 by different pieces of information line 35 and same sweep trace 34.
Under same GTG, when the pixel electrode 362 of the pixel cell 36 of this LCD 3 is subjected to the effect of parasitic capacitance of thin film transistor (TFT) 361 and produces variation and when causing the liquid crystal cramping to change, this voltage deviation Δ V will be responded to and calculate to this subtracter 40 automatically, and this voltage deviation Δ V carried out anti-phase averaging, and then export a common electric voltage offset Vout to this public electrode voltage regulating circuit 39.When this voltage deviation Δ V be on the occasion of the time, this common electric voltage offset Vout is negative value, then this public electrode voltage regulating circuit 39 will make public electrode voltages reduce the magnitude of voltage of a common electric voltage offset Vout size, thereby the liquid crystal cramping that guarantees the liquid crystal molecule two ends is constant.Otherwise when this voltage deviation is negative value, this public electrode voltage regulating circuit 39 will make common electric voltage increase the magnitude of voltage of a common electric voltage offset Vout size, also guarantee the constant of liquid crystal cramping.Therefore, this LCD 3 can realize the automatic adjustment to the liquid crystal cramping, makes its liquid crystal cramping keep constant under same GTG, thereby avoids picture to produce scintillation.
Claims (10)
1. a liquid crystal panel drive circuit, it comprises many data lines that are parallel to each other, many be parallel to each other and with the vertically insulated crossing sweep trace of this data line, a plurality of thin film transistor (TFT)s that are positioned at data line and sweep trace infall, a plurality of pixel electrodes and public electrode a plurality of and that this pixel electrode is oppositely arranged, these a plurality of pixel electrodes link to each other with this data line via this thin film transistor (TFT), it is characterized in that: this liquid crystal panel drive circuit further comprises a comparator circuit and an anti-phase average circuit, the voltage of more at least one pixel electrode voltage of this comparator circuit and the data line that links to each other with this pixel electrode, this anti-phase average circuit carries out anti-phase mean value computation with the voltage difference of this comparator circuit gained, and the gained average voltage is fed back to this public electrode.
2. liquid crystal panel drive circuit as claimed in claim 1 is characterized in that: this comparator circuit comprises at least one subtracter.
3. liquid crystal panel drive circuit as claimed in claim 2, it is characterized in that: this subtracter comprises one first operational amplification circuit, one first resistance, one second resistance, one first stake resistance, one first feedback resistance and an output terminal, this first operational amplification circuit comprises one first normal phase input end and one first inverting input, one pixel electrode voltage is sent to this first normal phase input end via this first resistance, provide the data line voltage of data-signal to be sent to this first inverting input via this second resistance for this pixel electrode, this first stake resistance is connected between this first normal phase input end and the ground, and this first feedback resistance is connected between this output terminal and this first inverting input.
4. liquid crystal panel drive circuit as claimed in claim 3 is characterized in that: this first resistance, this second resistance equate with the resistance of this first feedback resistance.
5. liquid crystal panel drive circuit as claimed in claim 1 is characterized in that: this anti-phase average circuit is an anti-phase totalizer.
6. liquid crystal panel drive circuit as claimed in claim 5, it is characterized in that: this anti-phase average circuit comprises one second operational amplification circuit, at least one input resistance, one second stake resistance, one second feedback resistance and an output terminal, this second operational amplification circuit comprises one second in-phase input end and one second inverting input, this second feedback resistance is connected between this output terminal and second inverting input, this stake resistance is connected between this second in-phase input end and the ground, and the voltage fiducial value that obtains through this comparator circuit inputs to this second inverting input via an input resistance.
7. liquid crystal panel drive circuit as claimed in claim 6 is characterized in that: the resistance of each input resistance equates.
8. liquid crystal panel drive circuit as claimed in claim 7 is characterized in that: the resistance of this second feedback resistance is n/one of this input resistance resistance, n by this comparator circuit the number of company's pixel electrode.
9. liquid crystal panel drive circuit as claimed in claim 1, it is characterized in that: this liquid crystal panel drive circuit further comprises a public electrode voltage regulating circuit, this public electrode voltage regulating circuit is adjusted this public electrode voltages according to the average voltage of this anti-phase average circuit gained.
10. LCD, it comprises a liquid crystal panel and a liquid crystal panel drive circuit, this liquid crystal panel drive circuit is controlled the show state of this liquid crystal panel, it is characterized in that: this liquid crystal panel drive circuit is any described liquid crystal panel drive circuit of claim 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101576911A CN100543562C (en) | 2006-12-20 | 2006-12-20 | Liquid crystal panel drive circuit and LCD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101576911A CN100543562C (en) | 2006-12-20 | 2006-12-20 | Liquid crystal panel drive circuit and LCD |
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| Publication Number | Publication Date |
|---|---|
| CN101206354A true CN101206354A (en) | 2008-06-25 |
| CN100543562C CN100543562C (en) | 2009-09-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2006101576911A Expired - Fee Related CN100543562C (en) | 2006-12-20 | 2006-12-20 | Liquid crystal panel drive circuit and LCD |
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| CN (1) | CN100543562C (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105301858A (en) * | 2015-11-06 | 2016-02-03 | 深圳市华星光电技术有限公司 | Display panel, preparation method of display panel and array substrate |
| WO2016179847A1 (en) * | 2015-05-11 | 2016-11-17 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and device |
| CN106292016A (en) * | 2015-05-29 | 2017-01-04 | 鸿富锦精密工业（深圳）有限公司 | Display device |
| CN107123408A (en) * | 2017-06-22 | 2017-09-01 | 深圳市华星光电技术有限公司 | Public voltage generating circuit and liquid crystal display |
| CN108831402A (en) * | 2018-08-24 | 2018-11-16 | 南京中电熊猫液晶显示科技有限公司 | Display device and its driving method and voltage adjusting method |
| US10395614B2 (en) | 2017-06-22 | 2019-08-27 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Common voltage generating circuit and LCD |
| CN113223449A (en) * | 2021-05-08 | 2021-08-06 | 厦门寒烁微电子有限公司 | Driving circuit of LED display and capacitance compensation method |
| CN116486746A (en) * | 2023-04-28 | 2023-07-25 | 惠科股份有限公司 | Display panel and display device |
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2006
- 2006-12-20 CN CNB2006101576911A patent/CN100543562C/en not_active Expired - Fee Related
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016179847A1 (en) * | 2015-05-11 | 2016-11-17 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and device |
| CN106292016A (en) * | 2015-05-29 | 2017-01-04 | 鸿富锦精密工业（深圳）有限公司 | Display device |
| CN106292016B (en) * | 2015-05-29 | 2019-08-13 | 鸿富锦精密工业（深圳）有限公司 | Display device |
| CN105301858A (en) * | 2015-11-06 | 2016-02-03 | 深圳市华星光电技术有限公司 | Display panel, preparation method of display panel and array substrate |
| CN105301858B (en) * | 2015-11-06 | 2018-09-18 | 深圳市华星光电技术有限公司 | The preparation method and array substrate of a kind of display panel, display panel |
| CN107123408A (en) * | 2017-06-22 | 2017-09-01 | 深圳市华星光电技术有限公司 | Public voltage generating circuit and liquid crystal display |
| US10395614B2 (en) | 2017-06-22 | 2019-08-27 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Common voltage generating circuit and LCD |
| CN108831402A (en) * | 2018-08-24 | 2018-11-16 | 南京中电熊猫液晶显示科技有限公司 | Display device and its driving method and voltage adjusting method |
| CN108831402B (en) * | 2018-08-24 | 2021-04-16 | 南京中电熊猫液晶显示科技有限公司 | Display device, driving method thereof and voltage adjusting method |
| CN113223449A (en) * | 2021-05-08 | 2021-08-06 | 厦门寒烁微电子有限公司 | Driving circuit of LED display and capacitance compensation method |
| CN116486746A (en) * | 2023-04-28 | 2023-07-25 | 惠科股份有限公司 | Display panel and display device |
| CN116486746B (en) * | 2023-04-28 | 2024-04-12 | 惠科股份有限公司 | Display panel and display device |
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|---|---|
| CN100543562C (en) | 2009-09-23 |
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