CN101201869A - System and method for generating routing restriction area - Google Patents
System and method for generating routing restriction area Download PDFInfo
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- CN101201869A CN101201869A CNA2006101694509A CN200610169450A CN101201869A CN 101201869 A CN101201869 A CN 101201869A CN A2006101694509 A CNA2006101694509 A CN A2006101694509A CN 200610169450 A CN200610169450 A CN 200610169450A CN 101201869 A CN101201869 A CN 101201869A
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- circuit board
- sensitive element
- restriction area
- routing restriction
- projection
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Abstract
The invention discloses a generation system of routing constraint domain and a method thereof, which is applied to the routing software of a multi-layer circuit board. A detection module is employed to detect whether a sensor is on the circuit board and outputs type information of a sensor if the sensor is detected on a signal layer of the circuit board; shape coordinates of the module and the sensor are captured; a projection module projects the shape of the sensor at other signal layers of the circuit board according to the type information of the sensor detected and the shape coordinates of the module; the shapes of sensors at the other signal layers are projected by a characteristic setting module, and the characteristics are set to form a routing constraint domain, thus the routing software automatically avoids the routing constraint domain when routing signal lines, thereby preventing signal lines from crossing layers, improving the routing quality of signal lines and working efficiency and avoiding operation repetition.
Description
Technical field
The present invention relates to a kind of routing restriction area generation system and method, more specifically, relate to routing restriction area generation system and method in a kind of wiring software that is applied to a multilayer circuit board.
Background technology
Along with the development of integrated circuit densification, enlarged electric design automation (Electronic Design Automation, EDA) demand that connects up of software utilized.The method that at present comparatively general wiring method adopts self routing to combine with manual wiring.Because than manual wiring, self routing has characteristics such as the speed of finishing is fast, accuracy height, more can respond market fast to the product design requirement, manual wiring then can be made adjustment to the wire laying mode that the part does not meet design, to promote the efficient of wiring.
By eda software on a multilayer board during laying signal wire, need consider some routing restriction areas of circuit board in advance, for example in the zone of the opposing pad (Anti Pad) of striding power supply cutting, cooling pad (Thermal Pad) around crystal oscillator element, inductance element, IO element, high speed signal and being connected with this cooling pad etc. by through hole, phenomenon such as in case locking system connects up electromagnetic interference (EMI) takes place in this routing restriction area, crosstalk influences product quality.Wherein, for crystal oscillator element, IO element, its routing restriction area on this circuit board is distributed in all signals layers of this circuit board, and stride power supply cutting, cooling pad and opposing pad for inductance element, high speed signal, its routing restriction area on this circuit board is distributed in striding power supply cutting, cooling pad and resist the adjacent signals layer of pad place signals layer with inductance element, high speed signal of this circuit board.When by eda software on this circuit board during laying signal wire, signal wire is crossed over striden power supply cutting, cooling pad and opposing pad in the routing restriction area that this circuit board produced by above-mentioned these crystal oscillator elements, inductance element, IO element, high speed signal, and then make the signal wire generation of being laid stride a layer phenomenon, and existing eda software can not be discerned the mistake in this kind design automatically, thereby can't provide effective prompting.Follow-up, wiring installation teacher needs the signal wire of being laid is carried out hand inspection, in order to avoid above-mentioned mistake takes place for it, and need carry out the heavy industry operation when being checked through mistake.But for the large scale circuit plate, the common quantity of the signal wire of laying on this circuit board is huge, seek one by one with modification and obviously reduced work efficiency, and there is the possibility of omitting, and then influence the wire quality of signal wire itself, also can cause larger interference, thereby influence the quality of entire circuit plate layout other signal wires.
Therefore, how a kind of routing restriction area generation system and method are provided, need the caused inefficiency of hand inspection, check and have omissions, influence signal wire and lay quality, other signal wires are produced interference and influence disappearance such as circuit board integral layout quality to avoid prior art to stride a layer phenomenon owing to identification signal line automatically produces, become the problem that needs to be resolved hurrily in fact.
Summary of the invention
Shortcoming in view of above-mentioned prior art, fundamental purpose of the present invention is to provide a kind of routing restriction area generation system and method, automatically avoided the routing restriction area that generated by routing restriction area generation system of the present invention when making wiring software connect up operation, use and avoid producing signal wire and stride a layer phenomenon, thereby promote the efficient and the quality of circuit-board laying-out.
For reaching above-mentioned and other purpose, the invention provides a kind of routing restriction area generation system, be applied in the wiring software of a multilayer circuit board, this system comprises: detecting module, in order to detect whether have sensitive element on this circuit board, as if there being sensitive element then the type information of this sensitive element to be exported on the signals layer that detects this circuit board; Acquisition module is used to this detecting module and detects when having sensitive element on this circuit board, captures the profile coordinate of this sensitive element on this circuit board; Projection module, according to the profile coordinate of this sensitive element that type information and this acquisition module captured of the sensitive element of this detecting module output with the profile projection of this sensitive element in other signals layers of this circuit board; And attribute setting module, set on other signals layers of this circuit board, forming routing restriction area in order to giving attribute in the profile of the sensitive element on other signals layers of this circuit board, thereby avoided this routing restriction area when making this wiring software laying signal wire automatically through the projection module projection.
In the present invention, this sensitive element be arranged at crystal oscillator on this circuit board and IO element wherein one of at least.Correspondingly, this projection module removes the profile projection of this sensitive element all the other signals layers of this sensitive element place signals layer on this circuit board.
In addition, this sensitive element is inductance element, cooling pad and the opposing pad that is arranged on this circuit board.
The present invention also proposes a kind of routing restriction area generation method, be applied in the wiring software of a multilayer circuit board, this method comprises: detect whether have sensitive element on this circuit board, has sensitive element if detect a signals layer of this circuit board, then the type information of this sensitive element is exported, and proceed to next step, otherwise repeat this step; The profile coordinate of this sensitive element of acquisition on this circuit board; According to the profile coordinate of the type information of the sensitive element that detects and this sensitive element of being captured with the profile projection of this sensitive element in other signals layers of this circuit board; And projection is given attribute in the profile of this sensitive element of other signals layers of this circuit board set with other signals layers and form routing restriction areas, thereby avoided this routing restriction area when making this wiring software laying signal wire automatically in this circuit board.
This sensitive element be arranged at crystal oscillator on this circuit board and IO element wherein one of at least.Correspondingly, the profile projection of this sensitive element removes all the other signals layers of this sensitive element place signals layer on this circuit board.
In addition, this sensitive element is inductance element, cooling pad and the opposing pad that is arranged on this circuit board.Correspondingly, the adjacent signals layer of the profile projection of this sensitive element this sensitive element place signals layer on this circuit board.
In sum, routing restriction area generation system of the present invention and method, mainly be by the phase interworking between detecting module, acquisition module, projection module and the attribute setting module, so that when having sensitive element on the multilayer circuit board, on this circuit board, set up the routing restriction area corresponding with the profile of this sensitive element, so that wiring software is avoided this routing restriction area during laying signal wire automatically on this circuit board, and then can avoid taking place signal wire and stride a layer phenomenon, with laying quality and the circuit board integral layout quality that promotes this signal wire.In addition, by the present invention, whether wiring installation Shi Wuxu exists and strides a layer phenomenon as needing as existing hand inspection to lay the signal wire of finishing, thereby can significantly promote work efficiency, avoids the heavy industry operation, and the possibility of avoiding omitting inspection.
Description of drawings
Fig. 1 is the basic framework block schematic diagram of routing restriction area generation system of the present invention;
Fig. 2 is the flow chart of steps of routing restriction area generation method of the present invention; And
Fig. 3 and 4 is the Application Example synoptic diagram of routing restriction area generation method of the present invention.
The main element symbol description
1 routing restriction area generation system
10 detecting modules
11 acquisition modules
12 projection modules
13 attribute setting modules
The P1 cooling pad
P2 revolts pad
L1, L2 signals layer
2 wiring software
Embodiment
Below by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the content that this instructions disclosed.The present invention also can be implemented or be used by other different instantiations, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications and change under the spirit of the present invention not deviating from.
Fig. 1 is in order to the basic framework block schematic diagram of routing restriction area generation system of the present invention to be described.As shown in the figure, routing restriction area generation system 1 of the present invention is applied in the wiring software 2 of a multilayer circuit board, it comprises: detecting module 10, acquisition module 11, projection module 12 and attribute setting module 13 below promptly are elaborated to routing restriction area generation system 1 of the present invention.
Detecting module 10 is in order to detect whether sensitive element is arranged on this multilayer circuit.If a signals layer that detects this circuit board has sensitive element, then the type information with the sensitive element that detected transfers to projection module 12.This sensitive element for example is crystal oscillator, IO element, inductance, cooling pad and the resistance pad that is communicated with this cooling pad.
In the present invention, when detecting module 10 above-mentioned sensitive elements were crystal oscillator or IO element, projection module 12 was projected to all the other signals layers that remove this sensitive element place signals layer on this circuit board with the profile of this sensitive element.And when detecting module 10 above-mentioned sensitive elements be inductance, cooling pad and during with resistance pad that this cooling pad is communicated with, projection module 12 is projected to the profile of this sensitive element on the adjacent signals layer of this sensitive element place signals layer on this circuit board.
Attribute is provided with module 13 and generates routing restriction areas in order to the profile of the sensitive element that is projected to these other signals layers of circuit board through projection module 12 is carried out the attribute setting with other signals layers in this circuit board.Profile attribute that for example can this sensitive element is set to the GND signal.
Follow-up wiring software 2 is avoided the routing restriction area that routing restriction area generation system 1 of the present invention is generated during laying signal wire automatically on this circuit board, and then can avoid signal wire to stride layer phenomenon taking place.
The steps flow chart of carrying out routing restriction area generation method of the present invention by routing restriction area generation system of the present invention 1 as shown in Figure 2, this method comprises following detailed implementation step: at first in step S20, make on detecting module 10 these circuit boards of detecting whether sensitive element is arranged, if a signals layer of this circuit board of detecting has sensitive element then with the type information output of the sensitive element that detected, and proceed to step S21, otherwise repeat this step.
This sensitive element for example is crystal oscillator, IO element, inductance, cooling pad and the resistance pad that is communicated with this cooling pad.
In step S21, make acquisition module 11 capture the profile coordinate of this sensitive element in this signals layer of this circuit board.Then proceed to step S22.
In step S22, make projection module 12 according to the profile coordinate of the type information of this sensitive element of detecting module 11 output and this sensitive element that acquisition module 11 is captured with the profile projection of this sensitive element in other signals layers of this circuit board.Then proceed to step S23.
If to detect this sensitive element be crystal oscillator or IO element to detecting module 10 among the above-mentioned steps S20, then in step S22, projection module 12 with the profile projection of this sensitive element in all signals layers except that this sensitive element place signals layer on this circuit board.Otherwise, detecting this sensitive element as if detecting module 10 among the above-mentioned steps S20 is inductance, cooling pad, opposing pad etc., then in step S22, projection module 12 is with the adjacent signals layer of profile projection this sensitive element place signals layer on this circuit board of this sensitive element.
In step S23, make attribute setting module 13 that the projection of profile other signals layers on this circuit board of this sensitive element is given attribute and set with other signals layers and produce routing restriction areas in this circuit board.
Follow-up wiring software 2 is avoided the routing restriction area that routing restriction area generation system 1 of the present invention is generated during laying signal wire automatically on this circuit board, and then can avoid signal wire to stride layer phenomenon taking place.
Below be that six laminates (have signals layer L1, L2 with above-mentioned multilayer circuit board ...) describe for example, as shown in Figure 3, the signals layer L1 of this circuit board has a cooling pad P1, and signals layer L2 (being a bus plane) has the resistance pad P2 that is communicated with this cooling pad P1, wherein, the overall diameter of cooling pad P1 is A, and the overall diameter of resistance pad P2 is B.Cross wiring software 2 right overhead and go up the cooling pad P1 that can avoid the L1 layer when laying a HW High Way automatically, yet this HW High Way also might be crossed over the resistance pad of L2 and be produced signal wire and stride a layer phenomenon in the signals layer L1 of this circuit board.
Can address the above problem by wiring constrained system 1 of the present invention.The signals layer L2 that detecting module 10 detects this circuit board has resistance pad P2, acquisition module 11 can capture the profile coordinate of this resistance pad P2 from the L2 of this circuit board layer afterwards, the profile of this resistance pad P2 is the circle that a diameter is B, as shown in Figure 4, then projection module 12 can project to L1 layer and L3 layer (not shown) with the profile of resistance pad P2, and by attribute setting module 13 projection of the profile of the resistance pad P2 of L1 layer and L3 layer is given attribute and set, to form routing restriction area, promptly form the circular constraint that a diameter is B in L1 layer and L3 layer.Wiring software 2 can be avoided this routing restriction area automatically when the L1 of this circuit board layer is laid HW High Way afterwards, strides a layer phenomenon thereby can avoid producing HW High Way, uses the laying quality that promotes this HW High Way.
In sum, routing restriction area generation system of the present invention and method, mainly be by the phase interworking between detecting module, acquisition module, projection module and the attribute setting module, so that when having sensitive element on the multilayer circuit board, on this circuit board, set up the routing restriction area corresponding with the profile of this sensitive element, so that wiring software is avoided this routing restriction area during laying signal wire automatically on this circuit board, and then can avoid taking place signal wire and stride a layer phenomenon, with laying quality and the circuit board integral layout quality that promotes this signal wire.In addition, by the present invention, whether wiring installation Shi Wuxu exists and strides a layer phenomenon as needing as existing hand inspection to lay the signal wire of finishing, thereby can significantly promote work efficiency, avoids the heavy industry operation, and the possibility of avoiding omitting inspection.
The foregoing description is illustrative principle of the present invention and effect thereof only, but not is used to limit the present invention.Any those skilled in the art all can be under spirit of the present invention and scope, and the foregoing description is modified and changed.Therefore, the scope of the present invention should be listed as the claim of enclosing.
Claims (10)
1. a routing restriction area generation system is applied in the wiring software of a multilayer circuit board, and this system comprises:
Detecting module is in order to detect whether have sensitive element on this circuit board, as if there being sensitive element then the type information of this sensitive element to be exported on the signals layer that detects this circuit board;
Acquisition module is used to this detecting module and detects when having sensitive element on this circuit board, captures the profile coordinate of this sensitive element on this circuit board;
Projection module, according to the profile coordinate of this sensitive element that type information and this acquisition module captured of this sensitive element that detects with the profile projection of this sensitive element on other signals layers of this circuit board; And
The attribute setting module, set on other signals layers of this circuit board, forming routing restriction area in order to giving attribute in the profile of the sensitive element on other signals layers of this circuit board, thereby avoided this routing restriction area when making this wiring software laying signal wire automatically through the projection module projection.
2. routing restriction area generation system according to claim 1, wherein, this sensitive element be arranged at crystal oscillator on this circuit board and IO element wherein one of at least.
3. routing restriction area generation system according to claim 2, wherein, this projection module removes the profile projection of this sensitive element all the other signals layers of this sensitive element place signals layer on this circuit board.
4. routing restriction area generation system according to claim 1, wherein, this sensitive element is inductance element, cooling pad and the opposing pad that is arranged on this circuit board.
5. routing restriction area generation system according to claim 4, wherein, this projection module is with the adjacent signals layer of profile projection this sensitive element place signals layer on this circuit board of this sensitive element.
6. a routing restriction area generation method is applied in the wiring software, lays a signal wire with auxiliary this wiring software on a multilayer circuit board, and this method comprises:
Detect whether have sensitive element on this circuit board, have sensitive element, then the type information of this sensitive element is exported, and proceeded to next step, otherwise repeat this step if detect a signals layer of this circuit board;
The profile coordinate of this sensitive element of acquisition on this circuit board;
According to the profile coordinate of the type information of the sensitive element that detects and this sensitive element of being captured with the profile projection of this sensitive element in other signals layers of this circuit board; And
Projection is given attribute in the profile of this sensitive element of other signals layers of this circuit board set with other signals layers and form routing restriction areas, thereby avoided this routing restriction area when making this wiring software laying signal wire automatically in this circuit board.
7. routing restriction area generation method according to claim 6, wherein, this sensitive element be arranged at crystal oscillator on this circuit board and IO element wherein one of at least.
8. routing restriction area generation method according to claim 7, the profile projection of this sensitive element are removed all the other signals layers of this sensitive element place signals layer on this circuit board.
9. routing restriction area generation method according to claim 6, wherein, this sensitive element is inductance element, cooling pad and the opposing pad that is arranged on this circuit board.
10. routing restriction area generation method according to claim 9, wherein, the adjacent signals layer of the profile projection of this sensitive element this sensitive element place signals layer on this circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101694509A CN101201869A (en) | 2006-12-15 | 2006-12-15 | System and method for generating routing restriction area |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101694509A CN101201869A (en) | 2006-12-15 | 2006-12-15 | System and method for generating routing restriction area |
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| CN101201869A true CN101201869A (en) | 2008-06-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2006101694509A Pending CN101201869A (en) | 2006-12-15 | 2006-12-15 | System and method for generating routing restriction area |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101782931B (en) * | 2009-01-20 | 2012-02-08 | 英业达股份有限公司 | Processing method and system of constraint areas of circuit board wiring |
| CN107229799A (en) * | 2017-06-05 | 2017-10-03 | 合肥佳洋电子科技有限公司 | A kind of wiring method of high-speed rod |
| CN110135082A (en) * | 2019-05-20 | 2019-08-16 | 苏州浪潮智能科技有限公司 | A kind of method of negative film layer copper sheet evacuation via hole in PCB design |
-
2006
- 2006-12-15 CN CNA2006101694509A patent/CN101201869A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101782931B (en) * | 2009-01-20 | 2012-02-08 | 英业达股份有限公司 | Processing method and system of constraint areas of circuit board wiring |
| CN107229799A (en) * | 2017-06-05 | 2017-10-03 | 合肥佳洋电子科技有限公司 | A kind of wiring method of high-speed rod |
| CN110135082A (en) * | 2019-05-20 | 2019-08-16 | 苏州浪潮智能科技有限公司 | A kind of method of negative film layer copper sheet evacuation via hole in PCB design |
| CN110135082B (en) * | 2019-05-20 | 2022-07-08 | 苏州浪潮智能科技有限公司 | Method for avoiding via hole by copper sheet on negative film layer in PCB design |
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Open date: 20080618 |