CN101197195A - Data coding and decoding method and device in NOT-AND flash memory device - Google Patents
Data coding and decoding method and device in NOT-AND flash memory device Download PDFInfo
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Abstract
The invention is applied in the communication field and provides a data encoding and decoding method and a device for a NAND flash memory. The encoding method includes the following steps: transmit data is divided into three data segments which are respectively performed Golay code; valid data of the three data segments after Golay code is combined with checking information generated when Golay code is performed to form a complete data block. The decoding method includes the following steps: the data block after Golay code is received, the data block comprises the valid data of the three data segments after Golay code of the transmit data and the checking information generated when the data segments are performed Golay code; the valid data of the three data segments after Golay code in the data block after Golay code is combined with the checking information generated when the data segments are performed Golay code to form three data segments, and then a demoding circuit is input respectively to the three data segments to decode. The invention divides the transmit data into segments and encodes the segments to form the data block which is received, then divided and respectively decoded, covering a web page of the NAND flash memory, thereby improving error correcting capability of the data.
Description
Technical field
The invention belongs to the communications field, relate in particular to data decoding method and device in a kind of and the NOT-AND flash memory.
Background technology
With NOT-AND flash memory (Nandflash) because production defective and long-term use aging can make some bit occur losing efficacy, thereby it is wrong and unreliable to make that the full page data content occurs.If adopt error correcting code that data are protected, can improve serviceable life and utilization factor with NOT-AND flash memory.
At present with NOT-AND flash memory in widely used error correcting code be a kind of Hamming code, this sign indicating number only can realize entangling the 1bit mistake.Along with the increase of NOT-AND flash memory capacity and the progress of production technology; the error correcting code that only can entangle the 1bit mistake can't satisfy with NOT-AND flash memory to the error correcting code performance demands; and existing Hamming code algorithm can not realize to all standing of NOT-AND flash memory page protection, do not satisfy with NOT-AND flash memory to the error correcting code performance demands.
Summary of the invention
The object of the present invention is to provide the data-encoding scheme in a kind of and the NOT-AND flash memory; it is lower to be intended to solve in the prior art error correcting code error-correcting performance that uses with NOT-AND flash memory, be difficult to realize to the problem of all standing protection of the NOT-AND flash memory page.
Another object of the present invention is to provide the data decoding method in a kind of and the NOT-AND flash memory.
Another object of the present invention is to provide the data coding device in a kind of and the NOT-AND flash memory.
Another object of the present invention is to provide the data deciphering device in a kind of and the NOT-AND flash memory.
The present invention is achieved in that the data-encoding scheme in a kind of and the NOT-AND flash memory, said method comprising the steps of:
To transmit data and be divided into three data segments;
Described three data segments are carried out Error Correction of Coding respectively;
The check information that produces during with valid data after described three data segment Error Corrections of Coding and Error Correction of Coding is combined into a complete data block.
The described step that described three data segments are carried out Error Correction of Coding respectively specifically comprises:
Receive the data segment of input;
Data segment to input carries out Error Correction of Coding;
The check information that produces during the record Error Correction of Coding.
When described three data segments were carried out Error Correction of Coding respectively, first data segment adopted the RS coding, and second data segment adopts the RS coding, and the 3rd data segment adopts Bose-Chaudhuri-Hocquenghem Code.
Described complete data block successively by first data segment through the valid data behind the RS coding and check information thereof, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, perhaps encode through RS respectively by first, second and third data segment successively, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, second and third data segment is respectively through RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
The rhizosphere that described RS is encoded to all generator polynomials is the RS sign indicating number of GF (255), and described Bose-Chaudhuri-Hocquenghem Code is the BCH code of GF (255) for the rhizosphere of all generator polynomials.
Data decoding method in a kind of and the NOT-AND flash memory said method comprising the steps of:
Receive the data block after the Error Correction of Coding, described data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding;
With the valid data after three data segment Error Corrections of Coding in the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments.
Data coding device in a kind of and the NOT-AND flash memory, described device comprises:
The data sementation module is used for the transmission data are divided into three data segments;
Data coding module is used for described three data segments are carried out Error Correction of Coding respectively; And
The data segment composite module, the check information that produces when being used for valid data after described three data segment Error Corrections of Coding and Error Correction of Coding is combined into a complete data block.
Described coding module further comprises:
Data reception module is used to receive the data segment of input;
The data segment coding module is used for the data segment of input is carried out Error Correction of Coding; And
The check information logging modle, the check information that produces when being used to write down Error Correction of Coding.
When described three data segments were carried out Error Correction of Coding respectively, first data segment adopted the RS coding, and second data segment adopts the RS coding, and the 3rd data segment adopts Bose-Chaudhuri-Hocquenghem Code.
Described complete data block successively by first data segment through the valid data behind the RS coding and check information thereof, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, perhaps encode through RS respectively by first, second and third data segment successively, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, second and third data segment is respectively through RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
The rhizosphere that described RS is encoded to all generator polynomials is the RS sign indicating number of GF (255), and described Bose-Chaudhuri-Hocquenghem Code is the BCH code of GF (255) for the rhizosphere of all generator polynomials.
Data deciphering device in a kind of and the NOT-AND flash memory, described device comprises:
Data reception module is used to receive the data block after the Error Correction of Coding, and described data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding; And
The data sementation decoder module is used for the valid data after three data segment Error Corrections of Coding of the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments.
The present invention is divided into three sections with the data of transmission, then data segment is carried out Error Correction of Coding respectively, and the check information that three data segments after will encoding produce during with coding is combined into a complete data block, realized to all standing of the NOT-AND flash memory page, improved the correcting data error performance.
Description of drawings
Fig. 1 is the realization flow figure of the data-encoding scheme in provided by the invention and the NOT-AND flash memory;
Fig. 2 is the data structure variation diagram before and after the coding in the data-encoding scheme in provided by the invention and the NOT-AND flash memory;
Fig. 3 is the realization flow figure of the data decoding method in provided by the invention and the NOT-AND flash memory;
Fig. 4 is the structural drawing of the data coding device in provided by the invention and the NOT-AND flash memory;
Fig. 5 is the structural drawing of the data deciphering device in provided by the invention and the NOT-AND flash memory.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In the present invention, will transmit data and be divided into three sections, these three data segments are carried out Error Correction of Coding respectively, and the check information that three data segments after will encoding produce during with coding is combined into a complete data block, improved the error-correcting performance of digital coding.In when decoding three sections coded datas being merged into three data segments with its corresponding check information respectively imports decoding circuit respectively and decodes.
As one embodiment of the present of invention, three data segments are carried out the RS coding respectively, RS coding and Bose-Chaudhuri-Hocquenghem Code.Wherein, RS (Reed-Solomon) coding is a kind of Error Correction of Coding that Irving's Reed (Irving Reed) and Gus Saloman (Gus Solomon) issued in nineteen sixty, use Galois Field (GF) algorithm, can be provided at Redundant Array of Independent Disks (RAID) (Redundant Array of Independent Disks, RAID) coefficient that the Q verification is calculated in 6, and wrong restore funcitons is provided.BCH (Bose-Chaudhuri-Hocquenghem) coding is one group of powerful circulatory blockage forward error correction coding in the data transmission procedure.
Fig. 1 shows the realization flow of the data-encoding scheme in provided by the invention and the NOT-AND flash memory, and details are as follows.
In step S101, will transmit data and be divided into three data segments.
In step S102, these three data segments are carried out the RS coding respectively, RS coding and Bose-Chaudhuri-Hocquenghem Code.
As one embodiment of the present of invention, the RS coding that this place adopts comprises that the rhizosphere of all generator polynomials is the RS sign indicating number of GF (255), and the Bose-Chaudhuri-Hocquenghem Code of employing is the sign indicating number of GF (255) for the rhizosphere of all generator polynomials.
With RS (255,251) and BCH (255,239) shortening sign indicating number BCH (144,128) be example, owing to the base page structure with NOT-AND flash memory is 512 bytes+16 bytes or 2048 bytes+64 bytes, so this two RS (255,251) and a BCH (255,239) coded combination of shortening sign indicating number BCH (144,128) can be realized the base page structure with NOT-AND flash memory comprehensively covering.
First data segment adopts RS (255,251) sign indicating number to protect, and comprises the valid data of 251 bytes, and to the automatic check information that produces 4 bytes in valid data coding back of 251 bytes, the check information of 4 bytes is finished the protection to whole 255 byte datas.Second data segment adopted in the same way and handled.The 3rd data segment adopts BCH (255; 239) shortening sign indicating number BCH (144; 128) sign indicating number is protected; comprise the 16 bytes valid data of totally 128 bit data; produce the check information of 2 bytes totally after the valid data of 128 bit data are encoded to 16 bytes, the check information of 2 bytes is finished the protection of 144 bit data of 18 bytes totally.
As one embodiment of the present of invention, after beginning to encode, first 251 byte data section of input is carried out RS (255,251) coding, produce 4 byte check informations, the record check information; Continuation is carried out RS (255,251) coding to importing second 251 byte data section, produces the check information of 4 bytes, the record check information; The 3rd 16 byte data section of input carried out BCH (144,128) coding, produce the check information of 2 bytes, the record check information.
In step S103, the check information that produces automatically during with valid data behind three data segments Error Correction of Coding and Error Correction of Coding is merged into a complete data block.Obviously, this data block carries the error correcting code protection.
These three data segments produce check information when the valid data after the Error Correction of Coding and Error Correction of Coding automatically can multiple array mode, as shown in Figure 2, as embodiments of the invention, this complete data block can be successively by valid data and the check information thereof of first data segment behind the RS coding, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, also can be successively by first, two, three data segments are respectively through the RS coding, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, two, three data segments are respectively through the RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
Fig. 3 shows the realization flow of the data decoding method in provided by the invention and the NOT-AND flash memory, and details are as follows.
In step S301, receive the data block after the segmentation Error Correction of Coding, this data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding.
In step S302, with the valid data after three data segment Error Corrections of Coding in the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments.
Wherein, identical with existing decoding technique when decoding circuit is decoded, whether at first the data according to input produce syndrome (syndrome), wrong according to this syndrome judgment data.Stagger the time when judging these data, calculate the proper polynomial of these data according to this syndrome, then according to this proper polynomial, utilize money searching algorithm (chien search) to find out the errors present of these data, according to this errors present, the error correction values that this proper polynomial and this syndrome calculate these data carries out error correction at last.
Because the RS that adopts coding has consistent rhizosphere with the generator polynomial of Bose-Chaudhuri-Hocquenghem Code, thus in decoding circuit except syndrome calculating, two kinds of codings of other circuit can be multiplexing, reduced the area of circuit.And, because the base unit of the coded data of the shortening sign indicating number BCH (144,128) of BCH (255,239) is a bit data, therefore do not need the computing error correction value.
Fig. 4 shows the structure of the data coding device in provided by the invention and the NOT-AND flash memory, and data sementation module 41 will be transmitted data and be divided into three sections, and three data segments after 42 pairs of segmentations of coding module carry out Error Correction of Coding respectively.As one embodiment of the present of invention, three data segments are carried out the RS coding respectively, RS coding and Bose-Chaudhuri-Hocquenghem Code.
When encoding, data reception module 421 receives the data segment of input, data segment coding module 422 carries out RS (255 to data segment, the data segment of second 251 byte and the data segment of the 3rd 16 bytes of first 251 byte of data receiver module 421 respectively, 251) coding, RS (255,251) coding and BCH (144,128) coding.The check information that check information logging modle 423 records produce when valid data are encoded.
After coding is finished, data segment composite module 43 after with three data segment Error Corrections of Coding valid data and the check information that produces during Error Correction of Coding be combined into a complete data block.
As embodiments of the invention, this complete data block can be successively by valid data and the check information thereof of first data segment behind the RS coding, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, also can be successively by first, two, three data segments are respectively through the RS coding, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, two, three data segments are respectively through the RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
Fig. 5 shows the structure of the data deciphering device in provided by the invention and the NOT-AND flash memory, data reception module 51 receives the data block after the Error Correction of Coding, this data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding.The valid data of data sementation decoder module 52 after with three data segment Error Corrections of Coding in the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments, decode procedure is stated at preamble, repeats no more herein.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (12)
- One kind with NOT-AND flash memory in data-encoding scheme, it is characterized in that, said method comprising the steps of:To transmit data and be divided into three data segments;Described three data segments are carried out Error Correction of Coding respectively;The check information that produces during with valid data after described three data segment Error Corrections of Coding and Error Correction of Coding is combined into a complete data block.
- 2. the data-encoding scheme in as claimed in claim 1 and the NOT-AND flash memory is characterized in that the described step that described three data segments are carried out Error Correction of Coding respectively specifically comprises:Receive the data segment of input;Data segment to input carries out Error Correction of Coding;The check information that produces during the record Error Correction of Coding.
- 3. the data-encoding scheme in as claimed in claim 1 or 2 and the NOT-AND flash memory, it is characterized in that when described three data segments were carried out Error Correction of Coding respectively, first data segment adopted the RS coding, second data segment adopts the RS coding, and the 3rd data segment adopts Bose-Chaudhuri-Hocquenghem Code.
- 4. the data-encoding scheme in as claimed in claim 3 and the NOT-AND flash memory, it is characterized in that, described complete data block is successively by valid data and the check information thereof of first data segment behind the RS coding, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, perhaps successively by first, two, three data segments are respectively through the RS coding, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, two, three data segments are respectively through the RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
- 5. as the data-encoding scheme in claim 3 or 4 described and the NOT-AND flash memories, it is characterized in that, the rhizosphere that described RS is encoded to all generator polynomials is the RS sign indicating number of GF (255), and described Bose-Chaudhuri-Hocquenghem Code is the BCH code of GF (255) for the rhizosphere of all generator polynomials.
- One kind with NOT-AND flash memory in data decoding method, it is characterized in that, said method comprising the steps of:Receive the data block after the Error Correction of Coding, described data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding;With the valid data after three data segment Error Corrections of Coding in the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments.
- One kind with NOT-AND flash memory in data coding device, it is characterized in that described device comprises:The data sementation module is used for the transmission data are divided into three data segments;Data coding module is used for described three data segments are carried out Error Correction of Coding respectively; AndThe data segment composite module, the check information that produces when being used for valid data after described three data segment Error Corrections of Coding and Error Correction of Coding is combined into a complete data block.
- 8. the data coding device in as claimed in claim 7 and the NOT-AND flash memory is characterized in that described coding module further comprises:Data reception module is used to receive the data segment of input;The data segment coding module is used for the data segment of input is carried out Error Correction of Coding; AndThe check information logging modle, the check information that produces when being used to write down Error Correction of Coding.
- 9. as the data-encoding scheme in claim 7 or 8 described and the NOT-AND flash memories, it is characterized in that when described three data segments were carried out Error Correction of Coding respectively, first data segment adopted the RS coding, second data segment adopts the RS coding, and the 3rd data segment adopts Bose-Chaudhuri-Hocquenghem Code.
- 10. the data coding device in as claimed in claim 7 and the NOT-AND flash memory, it is characterized in that, described complete data block is successively by valid data and the check information thereof of first data segment behind the RS coding, valid data and the check information thereof of second data segment behind the RS coding, and valid data and the check information thereof of the 3rd data segment behind Bose-Chaudhuri-Hocquenghem Code combines, perhaps successively by first, two, three data segments are respectively through the RS coding, valid data behind RS coding and the Bose-Chaudhuri-Hocquenghem Code, and first, two, three data segments are respectively through the RS coding, and the check information that produces behind RS coding and the Bose-Chaudhuri-Hocquenghem Code combines.
- 11. as the data coding device in claim 9 or 10 described and the NOT-AND flash memories, it is characterized in that, the rhizosphere that described RS is encoded to all generator polynomials is the RS sign indicating number of GF (255), and described Bose-Chaudhuri-Hocquenghem Code is the BCH code of GF (255) for the rhizosphere of all generator polynomials.
- 12. one kind with NOT-AND flash memory in data deciphering device, it is characterized in that described device comprises:Data reception module is used to receive the data block after the Error Correction of Coding, and described data block comprises the valid data after three data segment Error Corrections of Coding transmitting data, and the check information that produces during the data segment Error Correction of Coding; AndThe data sementation decoder module is used for the valid data after three data segment Error Corrections of Coding of the data block after the Error Correction of Coding, and the check information that produces during the data segment Error Correction of Coding is imported the decoding circuit decoding respectively after merging into three data segments.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102323901A (en) * | 2011-07-28 | 2012-01-18 | 张岭 | A kind of method that improves solid-state memory system error correcting code service efficiency |
| CN102543207A (en) * | 2010-12-17 | 2012-07-04 | 西安奇维测控科技有限公司 | Method for efficiently utilizing Reed-Solomon (RS) error detection and correction algorithm in flash memory controller |
| CN103164292A (en) * | 2013-02-20 | 2013-06-19 | 深圳市硅格半导体有限公司 | Error correction method and device of data |
| CN101931415B (en) * | 2009-06-19 | 2014-04-30 | 成都市华为赛门铁克科技有限公司 | Encoding device and method, decoding device and method as well as error correction system |
| CN108170554A (en) * | 2016-12-07 | 2018-06-15 | 北京京存技术有限公司 | The data-encoding scheme and device of a kind of NAND |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100556844B1 (en) * | 2003-04-19 | 2006-03-10 | 엘지전자 주식회사 | Method for error detection of moving picture transmission system |
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| CN101931415B (en) * | 2009-06-19 | 2014-04-30 | 成都市华为赛门铁克科技有限公司 | Encoding device and method, decoding device and method as well as error correction system |
| CN102543207A (en) * | 2010-12-17 | 2012-07-04 | 西安奇维测控科技有限公司 | Method for efficiently utilizing Reed-Solomon (RS) error detection and correction algorithm in flash memory controller |
| CN102323901A (en) * | 2011-07-28 | 2012-01-18 | 张岭 | A kind of method that improves solid-state memory system error correcting code service efficiency |
| CN103164292A (en) * | 2013-02-20 | 2013-06-19 | 深圳市硅格半导体有限公司 | Error correction method and device of data |
| CN103164292B (en) * | 2013-02-20 | 2016-05-25 | 深圳市硅格半导体有限公司 | The error correction method of data and device |
| CN108170554A (en) * | 2016-12-07 | 2018-06-15 | 北京京存技术有限公司 | The data-encoding scheme and device of a kind of NAND |
| CN108170554B (en) * | 2016-12-07 | 2021-11-23 | 北京兆易创新科技股份有限公司 | NAND data coding method and device |
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Effective date of registration: 20100205 Address after: C1, 3 floor, Chuangxin building, 182 science Avenue, Science Town, Guangdong, Guangzhou Province, China: 510600 Applicant after: Anyka (Guangzhou) Microelectronics Technology Co., Ltd. Address before: A3, building 2, building 518000, building, Shenzhen digital technology park, Nanshan District hi tech Industrial Zone, Shenzhen, Guangdong, China Applicant before: Shenzhen Anyka Microelectronics Technology Co., Ltd. |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee before: ANYKA (GUANGZHOU) MICROELECTRONICS TECHNOLOGY Co.,Ltd. |
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| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: 510555 No. 107 Bowen Road, Huangpu District, Guangzhou, Guangdong Patentee after: Guangzhou Ankai Microelectronics Co.,Ltd. Address before: 510600, Guangzhou Science City, Guangdong science Road, 182 innovation building, C1 District, 3 floor Patentee before: Guangzhou Ankai Microelectronics Co.,Ltd. |