CN101196774A - Feed circuit of mainboard - Google Patents
Feed circuit of mainboard Download PDFInfo
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- CN101196774A CN101196774A CNA200610201230XA CN200610201230A CN101196774A CN 101196774 A CN101196774 A CN 101196774A CN A200610201230X A CNA200610201230X A CN A200610201230XA CN 200610201230 A CN200610201230 A CN 200610201230A CN 101196774 A CN101196774 A CN 101196774A
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Abstract
A mainboard power supply circuit is provided, which is used for providing voltage for the mainboard when the mainboard exceeds frequency, and comprises a south bridge chip and a voltage transversion circuit, the voltage transversion circuit comprises an output end, the south bridge chip comprises at least one universal input output port, the each universal input output port is connected to the voltage transversion circuit through a resistance. Compared with the prior art, the mainboard power supply circuit controls output of the universal input output port through the controlling of a computer basic input output system, so as to control whether the resistance connected with the universal input output port is accessed into the voltage transversion circuit, the voltage transversion circuit can output different voltage at the output end according to the resistance value of the accessed resistance.
Description
Technical field
The present invention relates to a kind of feed circuit of mainboard, the feed circuit of mainboard of voltage is provided for mainboard during overclocking on particularly a kind of computer main board.
Background technology
Along with the continuous development of mainboard technology, overclocking has become an important technology of mainboard, but because problems such as heat radiation and power consumption make that the stability of mainboard reduces greatly when overclocking.And the output of power supply unit also usually is lower than lower limit during overclocking, can't provide enough voltage for mainboard.Be illustrated in figure 1 as existing feed circuit of mainboard 100.Described feed circuit of mainboard 100 comprises a pulse width modulation controlled chip U, and described pulse width modulation controlled chip U comprises pipe drive end 12 on the start end 11,, manages drive end 14, a common terminal 15, a feedback end 16, an overcurrent protection end 17 and a phase terminal 18 once.Described common terminal 15 is connected to a 12V power supply through a resistance R 6, described common terminal 15 also is connected to the anode of a diode D1, the negative electrode of described diode D1 is connected to described start end 11, and the negative electrode of described diode D1 also is connected to phase terminal 18 through a capacitor C 4.Described going up managed the grid that drive end 12 is connected to one first field effect transistor Q1, the drain electrode of the described first field effect transistor Q1 is connected to a 5V power supply, the described drive end 14 of pipe down is connected to the grid of one second field effect transistor Q2, the source ground of the described second field effect transistor Q2.The source electrode of the described first field effect transistor Q1 links to each other with the drain electrode of the second field effect transistor Q2; described phase terminal 18 is connected to the node between described first field effect transistor Q1 source electrode and the second field effect transistor Q2 drain electrode; node between described first field effect transistor Q1 source electrode and the second field effect transistor Q2 drain electrode is connected to an output end vo ut; described phase terminal 18 also is connected to described overcurrent protection end 17 through a resistance R 7; described output end vo ut is connected to described feedback end 16 through a resistance R 5, and described feedback end 16 is through a resistance R 4 ground connection.The pipe drive end 12 of going up of described pulse width modulation controlled chip U is exported the corresponding described first field effect transistor Q1 of control of one road pulse-width signal and the second field effect transistor Q2 alternate conduction respectively with following pipe drive end 14, exports the voltage of 1.2V thus at described output end vo ut.
In the feed circuit of mainboard of existing design proposal, under the input voltage of a 5V, can only export fixing 1.2V voltage, when overclocking, can't provide enough voltage for mainboard.
Summary of the invention
In view of above content, be necessary to provide a kind of feed circuit of mainboard, when overclocking,, promote the stability of mainboard simultaneously for mainboard provides enough voltage.
A kind of feed circuit of mainboard, it comprises a South Bridge chip and a voltage conversion circuit, described voltage conversion circuit comprises an output terminal, described South Bridge chip comprises at least one universal input and output port, described each universal input and output port is connected to described voltage conversion circuit through a resistance, described feed circuit of mainboard is controlled the output of described universal input and output port by the computer Basic Input or Output System (BIOS), whether the resistance that is connected with described universal input and output port with control inserts described voltage conversion circuit, and described voltage conversion circuit is exported different voltage according to the resistance of access resistance at output terminal.
Compare prior art, described feed circuit of mainboard is controlled the output of described universal input and output port by the computer Basic Input or Output System (BIOS), whether the resistance that is connected with described universal input and output port with control inserts described voltage conversion circuit, and described voltage conversion circuit is exported different voltage according to the resistance of access resistance at output terminal.
Description of drawings
Below in conjunction with accompanying drawing and better embodiment the present invention is described in further detail:
Fig. 1 is the synoptic diagram of existing feed circuit of mainboard.
Fig. 2 is the synoptic diagram of feed circuit of mainboard of the present invention.
Embodiment
Please refer to Fig. 2; feed circuit of mainboard preferred embodiment of the present invention comprises a South Bridge chip U2 and a voltage conversion circuit 200; described voltage conversion circuit 200 comprises a pulse width modulation controlled chip U1, and described pulse width modulation controlled chip U1 comprises pipe drive end 121 on the start end 111,, manages drive end 141, a common terminal 151, a feedback end 161, an overcurrent protection end 171 and a phase terminal 181 once.Described common terminal 151 is connected to a 12V power supply through a resistance R 61, described common terminal 151 also is connected to the anode of a diode D11, the negative electrode of described diode D11 is connected to described start end 111, and the negative electrode of described diode D11 also is connected to phase terminal 181 through a capacitor C 41.Described going up managed the grid that drive end 121 is connected to one first field effect transistor Q11, the drain electrode of the described first field effect transistor Q11 is connected to a 5V power supply, the described drive end 141 of pipe down is connected to the grid of one second field effect transistor Q21, the source ground of the described second field effect transistor Q21.The source electrode of the described first field effect transistor Q11 links to each other with the drain electrode of the second field effect transistor Q21; described phase terminal 181 is connected to the node between described first field effect transistor Q11 source electrode and the second field effect transistor Q21 drain electrode; node between described first field effect transistor Q11 source electrode and the second field effect transistor Q21 drain electrode is connected to an output end vo ut1; described phase terminal 181 also is connected to described overcurrent protection end 171 through a resistance R 71; described output end vo ut1 is connected to described feedback end 161 through a resistance R 51, and described feedback end 161 is through a resistance R 41 ground connection.Described South Bridge chip U2 is provided with three universal input and output port GPIO 1, GPIO 2 and GPIO 3, and described universal input and output port GPIO 1, GPIO 2 and the corresponding resistance R 1 of GPIO 3 each process, R2, R3 are connected to the feedback end 161 of described voltage conversion circuit 200.
Described universal input and output port GPIO 1, GPIO 2, GPIO 3 are by computer Basic Input or Output System (BIOS) control difference output signal VID1, VID2, VID3, during a port output low level among described universal input and output port GPIO 1, GPIO 2, the GPIO 3, be equivalent to the resistance eutral grounding with this universal input and output port connection, this resistance is with described resistance R 41 parallel connections; And during the output of the port among described universal input and output port GPIO 1, GPIO 2, the GPIO 3 high level, be equivalent to not place in circuit of the resistance that connects with this universal input and output port.
The feedback end 161 of described pulse width modulation controlled chip U1 and the output end vo ut1 of described voltage conversion circuit 200 satisfy following relation:
Vout1＝Vref*(R+R51)/R＝Vref+Vref*R51/R
Wherein Vref is the reference voltage of feedback end 161, and R is the parallel impedance of R1, R2, R3, R41.
When VID1, VID2, VID3 all are high level, the size of R is the value of R41, and the magnitude of voltage minimum of Vout1 output this moment is when VID1, VID2, VID3 all are low level, the size of R is the parallel impedance value of resistance R 1, R2, R3, R41, the magnitude of voltage maximum of Vout1 output this moment.Set different level for VID1, VID2, VID3 by the computer Basic Input or Output System (BIOS), can be at the different voltage of described output end vo ut1 output, for the mainboard overclocking provides required voltage.
In feed circuit of mainboard specific embodiment of the present invention, the RT9214 that described pulse width modulation controlled chip U1 provides for TaiWan, China RICHTEK company, described resistance R 1, R2, R3, R41, R51 size are respectively 1.3 kilohms, 2.67 kilohm, 5.11 kilohm, 590 ohm, 330 ohm.Set described feedback end reference voltage Vref size according to the specification of described pulse width modulation controlled chip RT9214 and be 0.8V, thus can be at the voltage of the exportable 1.24V～1.59V of voltage output end Vout1, VID level (0 expression low level; 1 expression high level) as shown in the table with the corresponding relation of Vout1:
| VID3 | VID2 | VID1 | Vout1 |
| 0 | 0 | 0 | 1.59 |
| 0 | 0 | 1 | 1.54 |
| 0 | 1 | 0 | 1.49 |
| 0 | 1 | 1 | 1.44 |
| 1 | 0 | 0 | 1.39 |
| 1 | 0 | 1 | 1.34 |
| 1 | 1 | 0 | 1.29 |
| 1 | 1 | 1 | 1.24 |
As can be seen from the table, the various combination of the output signal VID1 of described South Bridge chip U2, VID2, VID3 can obtain different output voltage V out1, can provide required voltage for mainboard when overclocking.
Claims (5)
1. feed circuit of mainboard, it comprises a voltage conversion circuit, described voltage conversion circuit comprises an output terminal, it is characterized in that: described feed circuit of mainboard also comprises a South Bridge chip, described South Bridge chip comprises at least one universal input and output port, described each universal input and output port is connected to described voltage conversion circuit through a resistance, described feed circuit of mainboard is controlled the output of described universal input and output port by the computer Basic Input or Output System (BIOS), whether the resistance that is connected with described universal input and output port with control inserts described voltage conversion circuit, and described voltage conversion circuit is exported different voltage according to the resistance of access resistance at output terminal.
2. feed circuit of mainboard as claimed in claim 1; it is characterized in that: described voltage conversion circuit comprises a pulse width modulation controlled chip; described pulse width modulation controlled chip comprises a start end; manage drive end on one; manage drive end once; one common terminal; one feedback end; an one overcurrent protection end and a phase terminal; described common terminal is connected to one first power supply through a resistance; described common terminal also is connected to the anode of a diode; the negative electrode of described diode is connected to described start end; the negative electrode of described diode also is connected to phase terminal through an electric capacity; described going up managed the grid that drive end is connected to one first field effect transistor; the drain electrode of described first field effect transistor is connected to a second source; the described drive end of pipe down is connected to the grid of one second field effect transistor; the source ground of described second field effect transistor; the source electrode of described first field effect transistor links to each other with the drain electrode of second field effect transistor; described phase terminal is connected to the node between described first field effect transistor source electrode and the drain electrode of second field effect transistor; node between described first field effect transistor source electrode and the drain electrode of second field effect transistor is connected to described output terminal; described phase terminal also is connected to described overcurrent protection end through a resistance; described output terminal is connected to described feedback end through a resistance, and described feedback end is through a resistance eutral grounding.
3. feed circuit of mainboard as claimed in claim 1 is characterized in that: described South Bridge chip comprises two universal input and output port, and described each universal input and output port is connected to described voltage conversion circuit through a resistance.
4. feed circuit of mainboard as claimed in claim 1 is characterized in that: described South Bridge chip comprises three universal input and output port, and described each universal input and output port is connected to described voltage conversion circuit through a resistance.
5. as any described feed circuit of mainboard in the claim 1 to 4, it is characterized in that: the computer Basic Input or Output System (BIOS) is controlled the universal input and output port output high-low level of described South Bridge chip, and whether the resistance that is connected with described universal input and output port with control inserts described voltage conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200610201230XA CN101196774A (en) | 2006-12-07 | 2006-12-07 | Feed circuit of mainboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA200610201230XA CN101196774A (en) | 2006-12-07 | 2006-12-07 | Feed circuit of mainboard |
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| Publication Number | Publication Date |
|---|---|
| CN101196774A true CN101196774A (en) | 2008-06-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA200610201230XA Pending CN101196774A (en) | 2006-12-07 | 2006-12-07 | Feed circuit of mainboard |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930272A (en) * | 2009-06-25 | 2010-12-29 | 鸿富锦精密工业（深圳）有限公司 | South bridge chip power supply circuit |
| CN101625585B (en) * | 2008-07-10 | 2011-06-08 | 鸿富锦精密工业（深圳）有限公司 | Mainboard power supply circuit |
| CN101727158B (en) * | 2008-10-16 | 2011-06-22 | 鸿富锦精密工业（深圳）有限公司 | Mainboard supply circuit |
| CN102221868A (en) * | 2010-04-15 | 2011-10-19 | 鸿富锦精密工业（深圳）有限公司 | Standby power generating circuit |
| CN102044285B (en) * | 2009-10-22 | 2013-11-06 | 鸿富锦精密工业（深圳）有限公司 | Memory power supply circuit |
| CN106843453A (en) * | 2017-02-15 | 2017-06-13 | 湖南长城银河科技有限公司 | The control device and method of the CPU power consumption soared under platform |
| CN113835506A (en) * | 2021-08-16 | 2021-12-24 | 深圳微步信息股份有限公司 | Terminal equipment and overpressure control method for multi-gear adjustment of terminal equipment |
-
2006
- 2006-12-07 CN CNA200610201230XA patent/CN101196774A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101625585B (en) * | 2008-07-10 | 2011-06-08 | 鸿富锦精密工业（深圳）有限公司 | Mainboard power supply circuit |
| CN101727158B (en) * | 2008-10-16 | 2011-06-22 | 鸿富锦精密工业（深圳）有限公司 | Mainboard supply circuit |
| CN101930272A (en) * | 2009-06-25 | 2010-12-29 | 鸿富锦精密工业（深圳）有限公司 | South bridge chip power supply circuit |
| CN102044285B (en) * | 2009-10-22 | 2013-11-06 | 鸿富锦精密工业（深圳）有限公司 | Memory power supply circuit |
| CN102221868A (en) * | 2010-04-15 | 2011-10-19 | 鸿富锦精密工业（深圳）有限公司 | Standby power generating circuit |
| CN106843453A (en) * | 2017-02-15 | 2017-06-13 | 湖南长城银河科技有限公司 | The control device and method of the CPU power consumption soared under platform |
| CN113835506A (en) * | 2021-08-16 | 2021-12-24 | 深圳微步信息股份有限公司 | Terminal equipment and overpressure control method for multi-gear adjustment of terminal equipment |
| CN113835506B (en) * | 2021-08-16 | 2023-12-08 | 深圳微步信息股份有限公司 | Terminal equipment and overpressure control method for multi-gear adjustment of terminal equipment |
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Application publication date: 20080611 |