CN101193358A - GPIO control system for dual CPU by using RIL - Google Patents

GPIO control system for dual CPU by using RIL Download PDF

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Publication number
CN101193358A
CN101193358A CNA2006100979243A CN200610097924A CN101193358A CN 101193358 A CN101193358 A CN 101193358A CN A2006100979243 A CNA2006100979243 A CN A2006100979243A CN 200610097924 A CN200610097924 A CN 200610097924A CN 101193358 A CN101193358 A CN 101193358A
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China
Prior art keywords
cpu
ril
gpio
mentioned
controlled
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Pending
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CNA2006100979243A
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Chinese (zh)
Inventor
张泽寿
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LG Electronics Kunshan Computer Co Ltd
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LG Electronics Kunshan Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by LG Electronics Kunshan Computer Co Ltd filed Critical LG Electronics Kunshan Computer Co Ltd
Priority to CNA2006100979243A priority Critical patent/CN101193358A/en
Publication of CN101193358A publication Critical patent/CN101193358A/en
Pending legal-status Critical Current

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Abstract

The invention relates to a GPIO control system utilizing dual CPUs of RIL. In the prior art, even for the system utilizing dual CPUs, a device is arranged on a main CPU and a controlled CPU is only purely used as a modem, and thus the defect of insufficient of the GPIO pins for dual CPUs is caused. This is a problem existing in the prior art. Aiming at the problem, the main CPU of the invention in a dual-CPU system comprising the main CPU and the controlled CPU comprises an application program generating an instruction signal which controls the GPIO of the controlled CPU, an Radio Interface Layer ( RIL) driver driving the controlled CPU, an RIL proxy server calling a corresponding function of the application and the RIL driver and transmitting the instruction signal generated therefrom to the RIL agent server. The controlled CPU utilizes a instruction processor controlling the running of the GPIO of the CPU according to the instruction signal, thus overcoming the defect of insufficient of the GPIO pins in the dual-CPU system.

Description

Utilize the GPIO control system of two CPU of RIL
Technical field
The present invention relates to utilize the GPIO control system of two CPU of RIL, especially about on the GPIO of the controlled CPU that constitutes two CPU, connecting various device, with the GPIO control system of the two CPU that utilize RIL of the GPIO of the controlled CPU of RIL driver control of host CPU.
Background technology
Smart phone combines the function of portable phone and PDA (Personal DigitalAssistant palmtop PC) expansionaryly, is high-performance portable phone of new generation.Its exploitation makes driven by program on OS (the Operation System operating system) basis that can't realize, data communication easily and becomes possibility with the synchronization (Synchronization) of PC (Personal Computer PC) in the standard portable phone.
Compare with the low capacity memory of conventional cellular phone, smart phone has adopted the mass storage under the OS, can use multiple program and data, renewable OS itself or program etc.
Smart phone (Smart phone) is aspect making, in view of MSM CPU (MobileStation Modem travelling carriage modulator-demodulator, Central Processing Units central processing unit) performance deficiency, and in the system that adopts relevant CPU, drive the material of software one BSP (Board Support Package plate level support package) of OS, use two CPU mostly.
Dual-CPU system is divided into host CPU and controlled CPU, and OS drives in host CPU, and the MSM CPU of standard drives with controlled CPU, generally only uses modem feature.
The H/W interface of the serial of communicating by letter (Serial), USB (Universal SerialBus USB) and DPRAM (Dual Port RAM dual-ported memory) etc. between host CPU and controlled CPU, the RIL driver that the utilization of host CPU end is fit to system communicates.
Fig. 1 is the pie graph according to the dual-CPU system of prior art.As shown in the figure, hardware is made of host CPU and controlled CPU, utilizes the GPIO (the general input/output interface of GeneralPurpose Input Output) of the host CPU of comprehensive control system to connect various devices (main device 1-n).
Top phone (High-end Phone) must be installed the device with various functions because of it is inner and more and more intensify, the interface of and related hardware satisfied because of need, and the GPIO number of employed CPU becomes not enough.This is that most device must be connected with host CPU because controlled CPU only plays the effect of simple modulator-demodulator, and therefore this situation is more outstanding.
Solve the problem of this GPIO number deficiency, can use and between device that will be installed in host CPU and host CPU, add CPLD (the complicated programmable logic module of Complex Programmable Logic Device), enlarge the method for GPIO, perhaps use the method that reduces the device number, this is basic solution countermeasure.
As mentioned above, in the prior art, when using the system of two CPU, erection unit on host CPU only, controlled CPU only uses as modulator-demodulator merely, causes the GPIO pin deficiency of two CPU.This is the problem of its existence.
Summary of the invention
The present invention is directed to the problems referred to above researches and develops.The object of the present invention is to provide: on the controlled CPU of two CPU, connect various devices, be connected the GPIO control system of the two CPU that utilize RIL that the device on the controlled CPU controls by the RIL driver of host CPU.
For achieving the above object, the present invention is in the dual-CPU system that comprises host CPU and controlled CPU, and host CPU comprises: the application program that generates the command signal of the GPIO that controls controlled CPU; Drive RIL (the Radio Interface Layer) driver of controlled CPU; Above-mentioned application program is called out and RIL driver respective function, the RIL acting server of the command signal that generates thus to the transmission of RIL driver.Above-mentioned controlled CPU utilizes the instruction processing unit according to the GPIO operation of above-mentioned command signal Controlled CPU.
As mentioned above, the present invention maximally utilises the GPIO of controlled CPU, does not add other hardware, solves the deficiency of GPIO, utilizes the standard drive one RIL driver that suits the smart phone software configuration that identical interface is provided.This is an effect of the present invention.
Description of drawings
Fig. 1 is the pie graph according to the dual-CPU system of prior art.
Fig. 2 is the pie graph according to dual-CPU system of the present invention.
The symbol description * * of major part in the * accompanying drawing
110: host CPU 111,121:GPIO
112: main device 1-n 120: controlled CPU
122: service unit 1-m 210: application/driver
220:RIL acting server 230:RIL driver
240,250: media drive 260: the instruction parser
270: instruction processing unit
Embodiment
Below, with reference to the accompanying drawings embodiments of the invention are elaborated.
Fig. 2 is the system's pie graph according to of the present invention couple of CPU.With reference to accompanying drawing, host CPU 110 is transplanted the smart phone OS of MS (Microsoft Microsoft) company, and controlled CPU120 uses MSM (Mobile Station Modem travelling carriage modulator-demodulator) chip.
Hardware aspect, the same with prior art, the main device 1-n112 that on the GPIO111 of above-mentioned host CPU 110, connects application/driver (Application/Driver) 210 controls, the GPIO121 of above-mentioned controlled CPU120 goes up to connect and compares with main device, to insensitive service unit 1~m122 running time.
The software aspect, above-mentioned host CPU 110 is made of application/driver 210, RIL acting server 220, RIL driver 230 and media drive 240.Above-mentioned controlled CPU120 is made of media drive 250, instruction parser (Command Parser) 260 and instruction processing unit (Command Handler) 270.Between two CPU110,120 other communication mediums such as Serial, USB, DPRAM are arranged, utilize RIL driver 230 to constitute interfaces.
Above-mentioned RIL driver 230 is by the modem section under the smart phone OS of MS company, and the standard set-up that promptly drives controlled CPU120 constitutes, and all provides identical interface to the kind of any modem section.Above-mentioned RIL driver 230 firsthand information are disclosed, so the smart phone developer can revise use as required.Therefore, can add related protocol according to developer's intention according to the specification change of CDAM/GSM etc. agreement by RIL.
At this moment, utilize all application programs of RIL driver 230 must generate RIL acting server 220 and carry out access, an application program 210 is used a RIL acting server 220, and each RIL acting server 220 all can use RIL driver 230.
Above-mentioned media drive 240,250 for example, as Serial or USB device, is the general communication port that communicates between CPU, and it drives the media (Medium) that communicates between two CPU.
Above-mentioned instruction parser (Command Parser) 260 and instruction processing unit (CommandHandler) the 270th by communication medium, are carried out the module of operation according to the instruction of input.The common instruction that can be called the CDMA chip of modulator-demodulator is the text of AT cmd because of link definition, and instruction parser 260 execution analyses (Parsing) program is so that computer can be understood.Instruction processing unit 270 is carried out suitable operation on the content basis of this deciphering.
Describe in detail below in the dual-CPU system of above-mentioned formation, control is installed in the running of the service unit on the controlled CPU.
At first, application/driver 210 is called out RIL API (Application ProgrammingInterface application programming interface) if want to control the GPIO121 of controlled CPU120 by RIL acting server 220.Called RIL API calls out RIL driver 230 corresponding Mapping by the employed function IOCTL of control input/output unit) instruction (Command).That is, application/driver 210 utilizes RIL acting server 220 to obtain necessary information.
Therefore, above-mentioned RIL driver 230 obtains employed instruction for control service unit 1-m122 from RIL acting server 220, passes on to controlled CPU120 by media drive 240.
Then, the routine analyzer of the above-mentioned instruction of instruction parser 260 execution analyses of controlled CPU120, the instruction processing unit 270 of reply RIL driver 230 agreements is according to the operation of dependent instruction control service unit 1-m122.
Therefore, for realizing the present invention, host CPU 110 ends must generate RIL driver 230 and RIL acting server 220, and it is instruction processing unit 270 that controlled CPU120 end must generate reply RIL communicating devices.
In addition, among the OS between host CPU 110 and controlled CPU120, must define the agreement of the GPIO121 that controls the CPU120 that realizes driver drives.Therefore, the general protocol specification is to instruct the expansion of (command) to realize by the AT that the modulator-demodulator control command that begins from AT is set.Protocol specification does not belong to the scope of the invention, omits herein.

Claims (6)

1. a GPIO control system of utilizing two CPU of RIL is characterized in that, comprising:
In the dual-CPU system that comprises host CPU and controlled CPU, host CPU comprises: the application program that generates the command signal of the GPIO that controls controlled CPU; Drive the RIL driver of controlled CPU; Call out above-mentioned application program and RIL driver respective function, the RIL acting server of the command signal that generates thus to the transmission of RIL driver;
Above-mentioned controlled CPU comprises the instruction processing unit of controlling the GPIO operation of controlled CPU according to described command signal.
2. the GPIO control system of two CPU of RIL as claimed in claim 1 is characterized in that:
Above-mentioned RIL acting server is called out RIL API, and RIL API calls out the corresponding function of RIL driver by the function IOCTL of control input/output unit.
3. the GPIO control system of two CPU of RIL as claimed in claim 1 is characterized in that:
The expansion of controlling the AT instruction that the protocol specification of the GPIO of above-mentioned couple of CPU can set by the modulator-demodulator control command that begins from AT realizes.
4. the GPIO control system of two CPU of RIL as claimed in claim 1 is characterized in that:
Above-mentioned controlled CPU also comprises the instruction parser that the above-mentioned command signal of analysis is passed on to above-mentioned instruction processing unit.
5. the GPIO control system of two CPU of RIL as claimed in claim 1 is characterized in that:
Above-mentioned controlled CPU control is compared with the GPIO device that is connected above-mentioned host CPU, to the device of relative insensitivity running time.
6. the GPIO control system of two CPU of RIL as claimed in claim 1 is characterized in that:
Above-mentioned host CPU and controlled CPU comprise each media drive, form any one communication medium among serial, USB and the DPRAM between above-mentioned media drive.
CNA2006100979243A 2006-11-22 2006-11-22 GPIO control system for dual CPU by using RIL Pending CN101193358A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2006100979243A CN101193358A (en) 2006-11-22 2006-11-22 GPIO control system for dual CPU by using RIL

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2006100979243A CN101193358A (en) 2006-11-22 2006-11-22 GPIO control system for dual CPU by using RIL

Publications (1)

Publication Number Publication Date
CN101193358A true CN101193358A (en) 2008-06-04

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115883288A (en) * 2022-11-29 2023-03-31 四川天邑康和通信股份有限公司 Fusion gateway-based double-CPU interaction efficiency improving method, system and storage medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115883288A (en) * 2022-11-29 2023-03-31 四川天邑康和通信股份有限公司 Fusion gateway-based double-CPU interaction efficiency improving method, system and storage medium
CN115883288B (en) * 2022-11-29 2024-04-19 四川天邑康和通信股份有限公司 Dual-CPU interaction efficiency improving method, system and storage medium based on fusion gateway

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Open date: 20080604