CN101188090A - Control method for display panel color gray rank of LCD - Google Patents
Control method for display panel color gray rank of LCD Download PDFInfo
- Publication number
- CN101188090A CN101188090A CNA2006101184722A CN200610118472A CN101188090A CN 101188090 A CN101188090 A CN 101188090A CN A2006101184722 A CNA2006101184722 A CN A2006101184722A CN 200610118472 A CN200610118472 A CN 200610118472A CN 101188090 A CN101188090 A CN 101188090A
- Authority
- CN
- China
- Prior art keywords
- frame
- gtg
- gtgs
- revisal
- frames
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Video Image Reproduction Devices For Color Tv Systems (AREA)
Abstract
The invention discloses a control method of the color gray-scale of a liquid crystal display panel, which is used in liquid crystal display devices. The invention is characterized in that two frame speed control algorithms, the cycle numbers of which are both less than 8, and the frame cycles of which are integrated and adopted; wherein, one frame cycle is A, the gray-scale range processed by is from 0 to Alpha A (Alpha A-1); and the other frame cycle is B, the gray-scale range processed by which is Alpha A +1 (Alpha A) to 2 <p> <-1>; the gray scale at the junction is processed by frame cycle A or frame cycle B. A and B are both integers and satisfied with the equation that Alpha A + B [(2 < p-2 > -1)-Alpha] +1 is equal to 2 <p>; wherein, p is the bit value of the panel which generally is 8 bit or 10 bit; and the corresponding color gray-scale value is 16.77 M or 1074 M. Due to the FRC algorithm used in the invention, the (2 < p >) < 3 > color gray-scale can be realized on the liquid crystal display panel of a liquid crystal display device, meanwhile, the noise of the FRC also can be reduced.
Description
Technical field
The present invention relates to a kind of display panels color gray rank control method that is used for liquid crystal indicator.
Background technology
The color display capabilities of liquid crystal panel is with on each color channel, and liquid crystal panel can show that the figure place of GTG is described.The 6bit panel is meant can show 26 powers on each passage, 64 grades of GTGs just, and panel has three color channels of R.G.B (RGB), just can show 262144 kinds of colors (64 * 64 * 64=262144).By that analogy, the 8bit panel shows 256 grades of GTGs, can show that 16777216 (16.77M) plant color.The 10bit panel shows 1024 grades of GTGs, can show 1074M kind color.From here as can be seen, physically the 6bit panel color that can show is less than 2% of 8bit panel, and the color that the 8bit panel can show is less than 2% of 10bit panel.
In general, the bit number that is input to the picture signal of time schedule controller (Timing controller) in the ideal case is consistent with the bit number that data-driven portion (source driving chip) can handle.But, can adopt the low slightly source driving chip of data processing number in order to reduce the manufacturing cost of liquid-crystal apparatus.For example, when the picture signal that is input to signal control part was the situation of 8bit, if use the source driving chip of 8bit processing power, cost was very high.If use the source driving chip of the low slightly 6bit of data processing number this moment, just can reduce the cost.Correspondingly, when the picture signal that is input to signal control part is the situation of 10bit,, also can reduce the cost if use the source driving chip of the low slightly 8bit of data processing number.
But under the situation of the source driving chip that uses 6bit, make the color display capabilities near the 16.77M of 8bit or under the situation of the source driving chip that uses 8bit, when making the color display capabilities near the 1074M of 10bit, just need to adopt FRC (Frame Rate Control, frame rate control) technology.It is output as the picture signal of 6bit to the image signal transformation that is input to the 8bit of signal control part or the image signal transformation that is input to the 10bit of signal control part is output as the picture signal of 8bit.Its principle is to utilize the residual effect of human eye to obtain the disappearance color.For former instance, the 6bit picture signal of output provides discontinuous GTG 0,4,8,12,16,20, ... up to 252, FRC handles and uses on same sub-pixel, in 0 grade of gray scale of T0 sub-pixel demonstration constantly, in 4 grades of gray scales of T1 sub-pixel demonstration constantly, so go round and begin again, utilize the persistence of vision of human eye to mix two kinds of gray level information, obtained 2 grades of gray scales so just be similar to.For latter instance, the 8bit picture signal of output provides discontinuous GTG 0,4,8,12,16,20, ... up to 1020, FRC handles and uses on same sub-pixel, in 0 grade of gray scale of T0 sub-pixel demonstration constantly, in 4 grades of gray scales of T1 sub-pixel demonstration constantly, so go round and begin again, utilize the persistence of vision of human eye to mix two kinds of gray level information, obtained 2 grades of gray scales so just be similar to.
Existing FRC form has two kinds:
1. having adopted with 4 frames is the disposal route in cycle, and it can realize 253
3The number of colors of=16.2M;
What table 1 was represented is 8bit input GTG
Table 1 is to be the disposal route in cycle with 4 frames
Revisal GTG nidus shown in the table is an example, and the FRC disposal route can be changed in the position of revisal GTG:
One. the 8bit GTG of input is in the 0-252 scope time
The 8bit GTG that is input to signal control part divided by 4, is obtained quotient and the remainder (basic GTG=merchant; Revisal GTG=merchant+1)
(1) if remainder is 0, then Shu Chu 4 frame 6bit GTGs all are basic GTGs.
For example: the input GTG is 0,4,8 ... 248,252.
(2) if remainder is 1, then Shu Chu 4 frame 6bit GTGs are: 3 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1,5,9..., 245,249.
(3) if remainder is 2, then Shu Chu 4 frame 6bit GTGs are: 2 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 2,6,10..., 246,250.
(4) if remainder is 3, then Shu Chu 4 frame 6bit GTGs are: 1 frame is basic GTG, and 3 frames are revisal GTGs.
For example: the input GTG is 3,7,11 ..., 247,251.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The 4 frame 6bit GTGs that the 8bit GTG of two inputs is exported when the 253-255 scope all are 63.
2. adopt the disposal route in 4 frame period+8 frame periods, it can realize 256
3The number of colors of=16.77M.
Table 2 is the disposal routes with cycle+8 frame period.
Revisal GTG nidus shown in the table is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
One. the 8bit GTG of input is in the 0-248 scope time
With 1. 4 frames is that the disposal route in cycle is carried out
Two. the 8bit GTG of input is in the 249-255 scope time
Disposal route with table 2 is carried out, and the position of revisal GTG can be changed.
The defective of prior art and deficiency:
If 1. adopting with 4 frames is the FRC disposal route in cycle, attainable number of colors is 16.2M, less than the attainable number of colors 16.77M of common 8bit picture signal.
If 2. adopt the FRC disposal route in 4 frame period+8 frame periods, though the number of colors that can realize is 16.77M, when showing the grey menu that is in 8 frame period FRC processing, because cycle length is oversize, human eye is felt flicker easily when observing picture, promptly said FRC noise.
Summary of the invention
In sum, how on the 8bit of project one liquid crystal panel, to use the source driving chip of 6bit to realize that the color gray rank number is 256
3=16.77M and on the 10bit of project two liquid crystal panel, use the source driving chip of 8bit to realize that the color gray rank number is 1024
3=1074M, and can alleviate frame rate control noise, be technical matters to be solved by this invention,, the objective of the invention is to for this reason, a kind of control method that is used for the liquid crystal panel color gray rank of liquid crystal indicator is provided.
Technical scheme of the present invention is as follows:
According to a kind of control method that is used for the display panels color gray rank of liquid crystal indicator of the present invention, the FRC processing mode that it adopts two kinds of frame periods (any cycle is all less than 8 frames) to combine: a kind of frame period wherein is A, and the grey-scale range of processing is 0～aA (aA-1); The another kind of frame period is B, and the grey-scale range of its processing is aA+1 (aA)～2
p-1; And the GTG of processing intersection, can handle by frame week A or B; A, B is integer, and satisfies aA+B[(2
P-2-1)+a]+1=2
p, P is the panel bit number.
Corresponding to the 8bit panel:
A kind of frame period wherein is A, and the grey-scale range that it is handled is 0～aA (aA-1); A kind of frame period in addition is B, and the grey-scale range that it is handled is aA+1 (aA)～255.For the boundary GTG of handling at two kinds of frame period FRC, it can belong to frame period A handles, and also can belong to frame period B and handle, and wherein: A, B, a are integers, and satisfy formula aA+B (63-a)+1=256.
Particularly, Dui Ying FRC disposal route has:
1.A=4, B=5, a=60 or A=5, B=4, a=3;
2.A=3, B=5, a=30 or A=5, B=3, a=33;
3.A=3, B=6, a=41 or A=6, B=3, a=22;
4.A=2, B=5, a=20 or A=5, B=2, a=43;
5.A=1, B=5, a=15 or A=5, B=1, a=48; And A=4, B=6, aA=244 or A=6, B=4, aA=11.
Advantage of the present invention is: can realize 256 on liquid crystal indicator
3In the time of the number of colors of=16.77M, alleviated the FRC noise.
Corresponding to the 10bit panel:
A kind of frame period wherein is A, and the grey-scale range that it is handled is 0～aA (aA-1); A kind of frame period in addition is B, and the grey-scale range that it is handled is aA+1 (aA)～1023.For the boundary GTG of handling at two kinds of frame period FRC, it can belong to frame period A handles, and also can belong to frame period B and handle, and wherein: A, B, a are integers, and satisfy formula aA+B (255-a)+1=1024.
Particularly, Dui Ying FRC disposal route has:
1.A=4, B=5, a=252 or A=5, B=4, a=3;
2.A=3, B=5, a=126 or A=5, B=3, a=129;
3.A=3, B=6, a=169 or A=6, B=3, a=86;
4.A=2, B=5, a=84 or A=5, B=2, a=171;
5.A=1, B=5, a=63 or A=5, B=1, a=192; And A=4, B=6, aA=1012 or A=6, B=4, aA=11.
Advantage of the present invention is: can realize 1024 on liquid crystal indicator
3In the time of the number of colors of=1074M, alleviated the FRC noise.
Embodiment:
Technical scheme according to the inventive method, project one and project two are respectively provided six kinds of embodiment, and the description of being known clearly, understand the technical characterictic and the function characteristics of the inventive method in the hope of those skilled in the art are easier to, and be not to be used for limiting scope of the present invention.
Embodiment one is corresponding to the 8bit panel:
Adopt the FRC processing mode that two kinds of frame periods (any cycle is all less than 8 frames) combine: a kind of frame period wherein is A, and the grey-scale range that its is handled is 0～α A (α A-1); A kind of frame period in addition is B, and the grey-scale range that it is handled is α A+1 (α A)～255; For the boundary GTG of handling at two kinds of frame period FRC, it can belong to frame period A handles, and also can belong to the frame period is B, and wherein: A, B, a are integers, and satisfy formula α A+B (63-a)+1=256.
Particularly, Dui Ying FRC disposal route has:
1.A=4, B=5, a=60 or A=5, B=4, a=3;
2.A=3, B=5, a=30 or A=5, B=3, a=33;
3.A=3, B=6, a=41 or A=6, B=3, a=22;
4.A=2, B=5, a=20 or A=5, B=2, a=43;
5.A=1, B=5, a=15 or A=5, B=1, a=48; And A=4, B=6, α A=244 or A=6, B=4, α A=11
The FRC disposal route in (one) 4 frame period+5 frame period
I.5 the frame period handles and carries out at the high gray place
One. the 8bit GTG of input is in 0～240 scope the time
The 8bit GTG of table 3 input is in 0～240 scope the time, is that the disposal route in cycle is carried out with 4 frames.
Table 3
Revisal GTG nidus shown in the table 3 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit GTG that is input to signal control part divided by 4, is obtained quotient and the remainder (basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 4 frame 6bit GTGs all are basic GTGs.
For example: the input GTG is 0,4,8 ... 236,240.
(2) if remainder is 1, then Shu Chu 4 frame 6bit GTGs are: 3 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1,5,9 ... 233,237.
(3) if remainder is 2, then Shu Chu 4 frame 6bit GTGs are: 2 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 2,6,10 ..., 234,238.
(4) if remainder is 3, then Shu Chu 4 frame 6bit GTGs are: 1 frame is basic GTG, and 3 frames are revisal GTGs.
For example: the input GTG is 3,7,11 ..., 235,239.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 241-255 scope
The 8bit GTG of table 4 input is in 241～255 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 4
The 8bit GTG that is input to signal control part is deducted 240 later on again divided by 5, obtain quotient and the remainder.
(basic GTG=merchant+60; Revisal GTG=merchant+61).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
For example: the input GTG is 245,250,255.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 241,246,251.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 242,247,252.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
For example: the input GTG is 243,248,253.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
For example: the input GTG is 244,249,254.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, Shu Ru 8bit GTG is in the 0-14 scope
The 8bit GTG of table 5 input is in 0～14 scope the time, is that the disposal route in cycle is carried out with 5 frames.
Table 5
Revisal GTG nidus in the table 5 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit GTG that is input to signal control part divided by 5, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame bit GTGs all are basic GTGs.
For example: input GTG 0,5,10.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1,6,11.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: 2,7,12.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
For example: 3,8,13.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
For example: 4,9,14.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in 15～255 scopes
The 8bit GTG of table 6 input is in 15～255 scopes the time, is that the disposal route in cycle is carried out with 4 frames.
Table 6
The 8bit GTG that is input to signal control part is deducted 15 later on again divided by 4, obtain quotient and the remainder
(basic GTG=merchant+3; Revisal GTG=merchant+4).
(1) if remainder is 0, then Shu Chu 4 frame 6bit GTGs all are basic GTGs.
For example: the input GTG is 15,19,23 ... 251,255.
(2) if remainder is 1, then Shu Chu 4 frame 6bit GTGs are: 3 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 16,20,24 ... 248,252.
(3) if remainder is 2, then Shu Chu 4 frame 6bit GTGs are: 2 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 17,21,25 ... 249,253.
(4) if remainder is 3, then Shu Chu 4 frame 6bit GTGs are: 1 frame is basic GTG, and 3 frames are revisal GTGs.
For example: the input GTG is 18,22,26 ... 250,254.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (two) 3 frame period+5 frame periods
I, 5 frame periods handle and carry out at the high gray place
The 8bit GTG of table 7 input is in the 0-90 scope time, is that the disposal route in cycle is carried out with 3 frames.
Table 7
Revisal GTG nidus in the table 7 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
When one, Shu Ru 8bit GTG is in the 0-90 scope
The 8bit GTG of the signal control part of input divided by 3, is obtained quotient and the remainder (basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 3 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 6bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 6bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 91-255 scope
The 8bit GTG of table 8 input is in 91～255 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 8
The 8bit GTG that is input to signal control part is deducted 90 later on again divided by 5, obtain quotient and the remainder
(basic GTG=merchant+30; Revisal GTG=merchant+31).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(2) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, Shu Ru 8bit GTG is in 0～164 scope
The 8bit GTG of table 9 input is in 0～164 scope the time, is that the disposal route in cycle is carried out with 5 frames.
Table 9
Revisal GTG nidus is an example in the table 9, and the position of revisal GTG can be changed.
The FRC disposal route
One, the 8bit GTG that is input to signal control part divided by 5, obtain quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 165-255 scope
The 8bit GTG of table 10 input is in 165～255 scopes the time, is that the disposal route in cycle is carried out with 3 frames.
Table 10
The 8bit GTG that is input to signal control part is deducted 165 later on again divided by 3, obtain quotient and the remainder
(basic GTG=merchant+33; Revisal GTG=merchant+34).
(1) if remainder is 0, then Shu Chu 3 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 6bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 6bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (three) 3 frame period+6 frame periods
I.6 the frame period handles and carries out at the high gray place
When one, Shu Ru 8bit GTG is in the 0-123 scope
The 8bit GTG of table 11 input is in 0～123 scope the time, is that the disposal route in cycle is carried out with 3 frames.
Table 11
Revisal GTG nidus is an example in the table 11, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit GTG that is input to signal control part divided by 3, is obtained quotient and the remainder.
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 3 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 6bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 6bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
Two, be input to the 8bit GTG in the 124-255 scope time
The 8bit GTG of table 12 input is in 124～255 scopes the time, is that the disposal route in cycle is carried out with 6 frames.
Table 12
The 8bit GTG that is input to signal control part is deducted 123 later on again divided by 6, obtain quotient and the remainder
(basic GTG=merchant+41; Revisal GTG=merchant+42).
(1) if remainder is 0, then Shu Chu 6 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 6 frame 6bit GTGs are: 5 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 6 frame 6bit GTGs are: 4 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 6 frame 6bit GTGs are: 3 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 6 frame 6bit GTGs are: 2 frames are basic GTGs, and 4 frames are revisal GTGs.
(6) if remainder is 5, then Shu Chu 6 frame 6bit GTGs are: 1 frame is basic GTG, and 5 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.6 frame period handles at low GTG place and carries out
When one, Shu Ru 8bit GTG is in the 0-131 scope
The 8bit GTG of table 13 input is in 0～131 scope the time, is that the disposal route in cycle is carried out with 6 frames.
Table 13
Revisal GTG nidus is an example in the table 13, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit GTG that is input to signal control part divided by 6, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 6 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 6 frame 6bit GTGs are: 5 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 6 frame 6bit GTGs are: 4 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 6 frame 6bit GTGs are: 3 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 6 frame 6bit GTGs are: 2 frames are basic GTGs, and 4 frames are revisal GTGs.
(6) if remainder is 5, then Shu Chu 6 frame 6bit GTGs are: 1 frame is basic GTG, and 5 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 132-255 scope
The 8bit GTG of table 14 input is in 132～255 scopes the time, is that the disposal route in cycle is carried out with 3 frames.
Table 14
The 8bit GTG that is input to signal control part is deducted 132 later on again divided by 3, obtain quotient and the remainder.
(basic GTG=merchant+22; Revisal GTG=merchant+23).
(1) if remainder is 0, then Shu Chu 3 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 6bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 6bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (four) 2 frame period+5 frame periods
I.5 the frame period handles and carries out at the high gray place
One, is input to the 8bit GTG in the 0-40 scope time
The 8bit GTG of table 15 input is in 0～40 scope the time, is that the disposal route in cycle is carried out with 2 frames.
Table 15
Revisal GTG nidus is an example in the table 15, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit GTG that is input to signal control part divided by 2, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 2 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 2 frame 6bit GTGs are: 1 frame is basic GTG, and 1 frame is the revisal GTG.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 41-255 scope
The 8bit GTG of table 16 input is in 41～255 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 16
The 8bit GTG that is input to signal control part is deducted 40 later on again divided by 5, obtain quotient and the remainder
(basic GTG=merchant+20; Revisal GTG=merchant+21).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, Shu Ru 8bit GTG is in the 0-214 scope
The 8bit GTG of table 17 input is in 0～214 scope the time, is that the disposal route in cycle is carried out with 5 frames.
Table 17
Table 17 kind of a revisal GTG nidus is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 8bit that is input to signal control part divided by 5, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 8bit GTG is in the 215-255 scope
The 8bit GTG of table 18 input is in 215～255 scopes the time, is that the disposal route in cycle is carried out with 2 frames.
Table 18
The 8bit GTG that is input to signal control part is deducted 215 later on again divided by 2, obtain quotient and the remainder.
(basic GTG=merchant+43; Revisal GTG=merchant+44).
(1) if remainder is 0, then Shu Chu 2 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 2 frame 6bit GTGs are: 1 frame is basic GTG, and 1 frame is the revisal GTG.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (five) 1 frame period+5 frame periods
I.5 the frame period handles and carries out at the high gray place
When one, Shu Ru 8bit GTG is in the 0-15 scope
The 8bit GTG of table 19 input is in 0～15 scope the time, is that the disposal route in cycle is carried out with 1 frame.
Table 19
Revisal GTG nidus is an example in the table 19, and the position of revisal GTG can be changed.
The FRC disposal route:
The output GTG equals to import GTG.
When two, the 8bit GTG of table 20 input is in 16～255 scopes, be that the disposal route in cycle is carried out with 5 frames.
Table 20
After deducting 15 to the 8bit GTG that is input to signal control part in the 16-255 scope time, the 8bit GTG of input, obtains quotient and the remainder again divided by 5
(basic GTG=merchant+15; Revisal GTG=merchant+16).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, the 8bit GTG of table 21 input is in 0～239 scope, be that the disposal route in cycle is carried out with 5 frames.
Table 21
Revisal GTG nidus is an example in the table 21, and the position of revisal GTG can be changed.
The FRC disposal route
The 8bit GTG that is input to signal control part obtains quotient and the remainder divided by 5
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 6bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 6bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 6bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 6bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 6bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, the 8bit GTG of table 22 input is in 240～255 scopes, be that the disposal route in cycle is carried out with 1 frame.
Table 22
The 8bit GTG of input time output GTG in the 240-255 scope equals to import GTG and deducts 192.The FRC disposal route in (six) 4 frame period+6 frame periods
I.6 the frame period handles and carries out at the high gray place
When 1. Shu Ru 8bit GTG is in 0～244 scope, be that the disposal route in cycle is carried out with 4 frames.
When 2. Shu Ru 8bit GTG is in 245～255 scopes, be that the disposal route in cycle is carried out with 6 frames.
The II6 frame period handles at low GTG place and carries out
When 1. Shu Ru 8bit GTG is in 0～10 scope, be that the disposal route in cycle is carried out with 6 frames.
2. Shu Ru 8bit GTG is in 11～255 scopes, is that the disposal route in cycle is carried out with 4 frames.
Project two (corresponding to the 10bit panel):
The FRC disposal route in (two) 4 frame period+5 frame periods
I.5 the frame period handles and carries out at the high gray place
One. the 10bit GTG of input is in 0～1008 scope the time
The 10bit GTG of table 23 input is in 0～1008 scope the time, is that the disposal route in cycle is carried out with 4 frames.
Table 23
Revisal GTG nidus shown in the table 23 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG that is input to signal control part divided by 4, is obtained quotient and the remainder (basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 4 frame 8bit GTGs all are basic GTGs.
For example: the input GTG is 0,4,8 ... 1004,1008.
(2) if remainder is 1, then Shu Chu 4 frame 8bit GTGs are: 3 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1,5,9 ... 1001,1005.
(3) if remainder is 2, then Shu Chu 4 frame 8bit GTGs are: 2 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 2,6,10 ..., 1002,1006.
(4) if remainder is 3, then Shu Chu 4 frame 8bit GTGs are: 1 frame is basic GTG, and 3 frames are revisal GTGs.
For example: the input GTG is 3,7,11 ..., 1003,1007.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 1009-1023 scope
The 10bit GTG of table 24 input is in 1009～1023 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 24
The 10bit GTG that is input to signal control part is deducted 1008 later on again divided by 5, obtain quotient and the remainder.
(basic GTG=merchant+252; Revisal GTG=merchant+253).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
For example: the input GTG is 1013,1018,1023.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1009,1014,1019.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 1010,1015,1020.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
For example: the input GTG is 1011,1016,1021.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
For example: the input GTG is 1012,1017,1022.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, Shu Ru 10bit GTG is in the 0-14 scope
The 10bit GTG of table 25 input is in 0～14 scope the time, is that the disposal route in cycle is carried out with 5 frames.
Table 25
Revisal GTG nidus in the table 25 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG that is input to signal control part divided by 5, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
For example: input GTG 0,5,10.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 1,6,11.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: 2,7,12.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
For example: 3,8,13.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
For example: 4,9,14.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in 15～255 scopes
The 10bit GTG of table 26 input is in 15～1023 scopes the time, is that the disposal route in cycle is carried out with 4 frames.
Table 26
The 10bit GTG that is input to signal control part is deducted 15 later on again divided by 4, obtain quotient and the remainder (basic GTG=merchant+3; Revisal GTG=merchant+4).
(1) if remainder is 0, then Shu Chu 4 frame 8bit GTGs all are basic GTGs.
For example: the input GTG is 15,19,23 ... 1019,1023.
(2) if remainder is 1, then Shu Chu 4 frame 8bit GTGs are: 3 frames are basic GTGs, and 1 frame is the revisal GTG.
For example: the input GTG is 16,20,24 ... 1016,1020.
(3) if remainder is 2, then Shu Chu 4 frame 8bit GTGs are: 2 frames are basic GTGs, and 2 frames are revisal GTGs.
For example: the input GTG is 17,21,25 ... 1017,1021.
(4) if remainder is 3, then Shu Chu 4 frame 8bit GTGs are: 1 frame is basic GTG, and 3 frames are revisal GTGs.
For example: the input GTG is 18,22,26 ... 1018,1022.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (two) 3 frame period+5 frame periods
I, 5 frame periods handle and carry out at the high gray place
When one, Shu Ru 10bit GTG is in the 0-378 scope
The 10bit GTG of table 27 input is in the 0-378 scope time, is that the disposal route in cycle is carried out with 3 frames.
Table 27
Revisal GTG nidus in the table 27 is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG of the signal control part of input divided by 3, is obtained quotient and the remainder (basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 3 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 8bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 8bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 379-1023 scope
The 10bit GTG of table 28 input is in 379～1023 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 28
The 10bit GTG that is input to signal control part is deducted 378 later on again divided by 5, obtain quotient and the remainder
(basic GTG=merchant+126; Revisal GTG=merchant+127).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(2) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, the 10bit GTG of table 29 input is in 0～644 scope, be that the disposal route in cycle is carried out with 5 frames.
Table 29
Revisal GTG nidus is an example in the table 29, and the position of revisal GTG can be changed.
The FRC disposal route
The 10bit GTG that is input to signal control part divided by 5, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 645-1023 scope
The 10bit GTG of table 30 input is in 645～1023 scopes the time, is that the disposal route in cycle is carried out with 3 frames.
Table 30
The 10bit GTG that is input to signal control part is deducted 645 later on again divided by 3, obtain quotient and the remainder
(basic GTG=merchant+129; Revisal GTG=merchant+130).
(1) if remainder is 0, then Shu Chu 3 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 8bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 8bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When one, Shu Ru 10bit GTG is in the 0-507 scope
The FRC disposal route in (three) 3 frame period+6 frame periods
I.6 the frame period handles and carries out at the high gray place
The 10bit GTG of table 31 input is in 0～507 scope the time, is that the disposal route in cycle is carried out with 3 frames.
Table 31
Revisal GTG nidus is an example in the table 31, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG that is input to signal control part divided by 3, is obtained quotient and the remainder.
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 3 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 8bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 8bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 508-1023 scope
The 10bit GTG of table 32 input is in 508～1023 scopes the time, is that the disposal route in cycle is carried out with 6 frames.
Table 32
The 10bit GTG that is input to signal control part is deducted 507 later on again divided by 6, obtain quotient and the remainder
(basic GTG=merchant+169; Revisal GTG=merchant+170).
(1) if remainder is 0, then Shu Chu 6 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 6 frame 8bit GTGs are: 5 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 6 frame 8bit GTGs are: 4 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 6 frame 8bit GTGs are: 3 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 6 frame 8bit GTGs are: 2 frames are basic GTGs, and 4 frames are revisal GTGs.
(6) if remainder is 5, then Shu Chu 6 frame 8bit GTGs are: 1 frame is basic GTG, and 5 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.6 frame period handles at low GTG place
When one, Shu Ru 10bit GTG is in the 0-515 scope
The 10bit GTG of table 33 input is in 0～515 scope the time, is that the disposal route in cycle is carried out with 6 frames.
Table 33
Revisal GTG nidus is an example in the table 33, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG that is input to signal control part divided by 6, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 6 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 6 frame 8bit GTGs are: 5 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 6 frame 8bit GTGs are: 4 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 6 frame 8bit GTGs are: 3 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 6 frame 8bit GTGs are: 2 frames are basic GTGs, and 4 frames are revisal GTGs.
(6) if remainder is 5, then Shu Chu 6 frame 8bit GTGs are: 1 frame is basic GTG, and 5 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 516-1023 scope
The 10bit GTG of table 34 input is in 516～1023 scopes the time, is that the disposal route in cycle is carried out with 3 frames.
Table 34
The 10bit GTG that is input to signal control part is deducted 516 later on again divided by 3, obtain quotient and the remainder.
(basic GTG=merchant+86; Revisal GTG=merchant+87).
(1) if remainder is 0, then Shu Chu 3 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 3 frame 8bit GTGs are: 2 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 3 frame 8bit GTGs are: 1 frame is basic GTG, and 2 frames are revisal GTGs.Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (four) 2 frame period+5 frame periods
I.5 the frame period handles and carries out at the high gray place
One, is input to the 10bit GTG in the 0-168 scope time
The 10bit GTG of table 35 input is in 0～168 scope the time, is that the disposal route in cycle is carried out with 2 frames.
Table 35
Revisal GTG nidus is an example in the table 35, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit GTG that is input to signal control part divided by 2, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 2 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 2 frame 8bit GTGs are: 1 frame is basic GTG, and 1 frame is the revisal GTG.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 169-1023 scope
The 10bit GTG of table 36 input is in 169～1023 scopes the time, is that the disposal route in cycle is carried out with 5 frames.
Table 36
The 10bit GTG that is input to signal control part is deducted 168 later on again divided by 5, obtain quotient and the remainder
(basic GTG=merchant+84; Revisal GTG=merchant+85).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, Shu Ru 10bit GTG is in the 0-854 scope
The 10bit GTG of table 37 input is in 0～854 scope the time, is that the disposal route in cycle is carried out with 5 frames.
Table 37
Table 37 kind of a revisal GTG nidus is an example, and the position of revisal GTG can be changed.
The FRC disposal route:
The 10bit that is input to signal control part divided by 5, is obtained quotient and the remainder
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, Shu Ru 10bit GTG is in the 855-1023 scope
The 10bit GTG of table 38 input is in 855～1023 scopes the time, is that the disposal route in cycle is carried out with 2 frames.
Table 38
The 10bit GTG that is input to signal control part is deducted 855 later on again divided by 2, obtain quotient and the remainder.
(basic GTG=merchant+171; Revisal GTG=merchant+172).
(1) if remainder is 0, then Shu Chu 2 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 2 frame 8bit GTGs are: 1 frame is basic GTG, and 1 frame is the revisal GTG.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The FRC disposal route in (five) 1 frame period+5 frame periods
I.5 the frame period handles and carries out at the high gray place
When one, Shu Ru 10bit GTG is in the 0-63 scope
The 10bit GTG of table 39 input is in 0～63 scope the time, is that the disposal route in cycle is carried out with 1 frame.
Table 39
Revisal GTG nidus is an example in the table 39, and the position of revisal GTG can be changed.
The FRC disposal route:
The output GTG equals to import GTG.
When two, the 10bit GTG of table 40 input is in 64～1023 scopes, be that the disposal route in cycle is carried out with 5 frames.
Table 40
After deducting 63 to the 10bit GTG that is input to signal control part in the 64-1023 scope time, the 10bit GTG of input, obtains quotient and the remainder again divided by 5
(basic GTG=merchant+63; Revisal GTG=merchant+64).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
The II.5 frame period handles at low GTG place and carries out
When one, the 10bit GTG of table 41 input is in 0～959 scope, be that the disposal route in cycle is carried out with 5 frames.
Table 41
Revisal GTG nidus is an example in the table 41, and the position of revisal GTG can be changed.
The FRC disposal route
The 10bit GTG that is input to signal control part obtains quotient and the remainder divided by 5
(basic GTG=merchant; Revisal GTG=merchant+1).
(1) if remainder is 0, then Shu Chu 5 frame 8bit GTGs all are basic GTGs.
(2) if remainder is 1, then Shu Chu 5 frame 8bit GTGs are: 4 frames are basic GTGs, and 1 frame is the revisal GTG.
(3) if remainder is 2, then Shu Chu 5 frame 8bit GTGs are: 3 frames are basic GTGs, and 2 frames are revisal GTGs.
(4) if remainder is 3, then Shu Chu 5 frame 8bit GTGs are: 2 frames are basic GTGs, and 3 frames are revisal GTGs.
(5) if remainder is 4, then Shu Chu 5 frame 8bit GTGs are: 1 frame is basic GTG, and 4 frames are revisal GTGs.
Under the above-mentioned situation, the position of revisal GTG can be changed.
When two, the 10bit GTG of table 42 input is in 960～1023 scopes, be that the disposal route in cycle is carried out with 1 frame.
Table 42
The 10bit GTG of input time output GTG in the 960-1023 scope equals to import GTG and deducts 768.
The FRC disposal route in (six) 4 frame period+6 frame periods
I.6 the frame period handles and carries out at the high gray place
When 1. Shu Ru 10bit GTG is in 0～1012 scope, be that the disposal route in cycle is carried out with 4 frames.
When 2. Shu Ru 10bit GTG is in 1013～1023 scopes, be that the disposal route in cycle is carried out with 6 frames.
6 frame periods of II handle at low GTG place and carry out
When 1. Shu Ru 10bit GTG is in 0～10 scope, be that the disposal route in cycle is carried out with 6 frames.
2. Shu Ru 10bit GTG is in 11～1023 scopes, is that the disposal route in cycle is carried out with 4 frames.
Claims (15)
1. control method that is used for the display panels color gray rank of liquid crystal indicator is characterized in that: the frame control algolithm that adopts the cycle number average to combine less than two kinds of frame periods of 8; A kind of frame period wherein is A, and the grey-scale range of its processing is 0～α A (α A-1); The another kind of frame period is B, and the grey-scale range of its processing is α A+1 (α A)～2
p-1; And the GTG of processing intersection can be handled or be handled by frame phase B by frame period A; A, B are integers, satisfy α A+B[(2
P-2-1)-α]+1=2
p, P is the panel bit number.
2. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 1 corresponding to the 8bit panel, is characterized in that, the frame rate control algolithm that adopts the cycle number average to combine less than two kinds of frame periods of 8; A kind of frame period wherein is A, and the grey-scale range of its processing is 0～α A (α A-1); The another kind of frame period is B, and the grey-scale range of its processing is α A+1 (α A)～255; And the GTG of processing intersection, can handle or handle by frame period A by frame period B, A, B are integers, and satisfy α A+B (63-α)+1=256.
3. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 4 frame period+5 frame periods handles, correspondingly A=4, B=5, α=60 or A=5, B=4, α=3.
4. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 3 frame period+5 frame periods handles, correspondingly A=3, B=5, α=30 or A=5, B=3, α=33.
5. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 3 frame period+6 frame periods handles, correspondingly A=3, B=6, α=41 or A=6, B=3, α=22.
6. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 2 frame period+5 frame periods handles, correspondingly A=2, B=5, α=20 or A=5, B=2, α=43.
7. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 1 frame period+5 frame period handles, correspondingly A=1, B=5, α=15 or A=5, B=1, α=48.
8. the control method that is used for the display panels color gray rank of liquid crystal indicator according to claim 2, corresponding to the 8bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 4 frame period+6 frame periods handles, correspondingly A=4, B=6, α A=244 or A=6, B=4, α A=11.
9. according to claim 1, be used for the control method of the display panels color gray rank of liquid crystal indicator,, it is characterized in that the frame rate control algolithm that it adopts the cycle number average to combine less than two kinds of frame periods of 8 corresponding to the 10bit panel; A kind of frame period wherein is A, and the grey-scale range of its processing is 0～α A (α A-1); The another kind of frame period is B, and the grey-scale range of its processing is α A+1 (α A)～1023; And the GTG of processing intersection, can handle or handle by frame period A by frame period B, A, B are integers, and satisfy α A+B (255-α)+1=1024.
10. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 4 frame period+5 frame periods handles, correspondingly A=4, B=5, α=252 or A=5, B=4, α=3.
11. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 3 frame period+5 frame periods handles, correspondingly A=3, B=5, α=126 or A=5, B=3, α=129.
12. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 3 frame period+6 frame periods handles, correspondingly A=3, B=6, α=169 or A=6, B=3, α=86.
13. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine, the FRC in 2 frame period+5 frame periods handles, correspondingly A=2, B=5, α=84 or A=5, B=2, α=171.
14. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 1 frame period+5 frame period handles, correspondingly A=1, B=5, α=63 or A=5, B=1, α=192.
15. the control method that is used for the display panels color gray rank according to claim 9, corresponding to the 10bit panel, it is characterized in that, the frame rate control algolithm that said two kinds of frame periods combine is meant that the FRC in 4 frame period+6 frame periods handles, correspondingly A=4, B=6, α A=1012 or A=6, B=4, α A=11.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610118472 CN101188090B (en) | 2006-11-17 | 2006-11-17 | Control method for display panel color gray rank of LCD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610118472 CN101188090B (en) | 2006-11-17 | 2006-11-17 | Control method for display panel color gray rank of LCD |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101188090A true CN101188090A (en) | 2008-05-28 |
| CN101188090B CN101188090B (en) | 2010-05-26 |
Family
ID=39480449
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610118472 Active CN101188090B (en) | 2006-11-17 | 2006-11-17 | Control method for display panel color gray rank of LCD |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101188090B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105304062A (en) * | 2015-11-18 | 2016-02-03 | 合一智能科技（深圳）有限公司 | Chrominance adjustment method of liquid crystal display and device |
| CN107680549A (en) * | 2017-10-25 | 2018-02-09 | 昆山龙腾光电有限公司 | Frame rate control method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100235591B1 (en) * | 1997-01-24 | 1999-12-15 | 구본준 | Multi-gray processing device |
| CN100476944C (en) * | 2006-01-11 | 2009-04-08 | 浙江大学 | Method for processing space expansion FRC |
-
2006
- 2006-11-17 CN CN 200610118472 patent/CN101188090B/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105304062A (en) * | 2015-11-18 | 2016-02-03 | 合一智能科技（深圳）有限公司 | Chrominance adjustment method of liquid crystal display and device |
| CN107680549A (en) * | 2017-10-25 | 2018-02-09 | 昆山龙腾光电有限公司 | Frame rate control method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101188090B (en) | 2010-05-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104252852B (en) | Data driving apparatus for liquid crystal display device | |
| CN100524448C (en) | Display apparatus and control method thereof | |
| US8976206B2 (en) | Display device and method driving the same | |
| CN102063879B (en) | Liquid crystal display with dynamic backlight control and its drive method | |
| CN101714340B (en) | Display drive circuit | |
| US9875680B2 (en) | Method and apparatus for generation of gray scale adjustment voltage and panel driver circuit | |
| CN100373442C (en) | Liquid crystal display and driving method thereof | |
| US7580021B2 (en) | Display driver converting ki bits gray-scale data to converted gray-scale data of J bits, electro-optical device and gamma correction method | |
| CN102103838B (en) | Driving method for local dimming of liquid crystal display device and apparatus using the same | |
| CN100449603C (en) | Apparatus and method of driving liquid crystal display device | |
| US9001017B2 (en) | Liquid crystal display device using a mini-LVDS method | |
| CN101356570A (en) | Liquid crystal display device and method for driving the same | |
| CN104134422A (en) | Organic light-emitting diode display and method for driving the same | |
| CN101188093A (en) | Liquid crystal display and driving method thereof | |
| CN102087841A (en) | Apparatus for simultaneously performing gamma correction and contrast enhancement in display device | |
| CN107545874A (en) | Display driver circuit and its driving method, display driving system, display device | |
| CN101903937A (en) | Display device | |
| CN104299574A (en) | Automatic current limiting method for OLED (Organic Light Emitting Diode) display driving device | |
| CN101188090B (en) | Control method for display panel color gray rank of LCD | |
| CN104078020A (en) | Liquid-crystal display device, four-color converter and method for converting RGB data into RGBW data | |
| KR20090033565A (en) | Apparatus and method of converting image signal for four color display device | |
| CN101425273B (en) | LCD drive method and device | |
| TW200917209A (en) | Liquid crystal driving method and circuit | |
| US9916810B2 (en) | Method of driving a display apparatus | |
| CN101231399A (en) | Method and apparatus for regulating liquid crystal extremely drive precision |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI ZHONGHANG OPTOELECTRONICS CO., LTD. Free format text: FORMER OWNER: SHANGHAI SVA NEC LIQUID CRYSTAL DISPLAY CO., LTD. Effective date: 20100325 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201108 NO.3388, HUANING ROAD, MINHANG DISTRICT, SHANGHAI CITY TO: 201108 NO.3388, HUANING ROAD, SHANGHAI CITY |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20100325 Address after: 201108 Shanghai City Huaning Road No. 3388 Applicant after: Shanghai AVIC Optoelectronics Co., Ltd. Address before: 201108 Shanghai city Minhang District Huaning Road No. 3388 Applicant before: Shanghai SVA-NEC Liquid Crystal Display Co. Ltd. |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: CHENGDU TIANMA MICRO ELECTRONICS CO.,LTD. Free format text: FORMER OWNER: SHANGHAI AVIC OPTOELECTRONICS CO., LTD. Effective date: 20100802 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201108 NO.3388, HUANING ROAD, SHANGHAI CITY TO: 611730 NO.88, TIANYUAN ROAD, NEW + HIGH-TECHNOLOGY ZONE(WEST ZONE), CHENGDU CITY, SICHUAN PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20100802 Address after: Tianyuan road Chengdu City, Sichuan province 611730 high tech Zone No. 88 Patentee after: Tianma Micro-electronics Co. Address before: 201108 Shanghai City Huaning Road No. 3388 Patentee before: Shanghai AVIC Optoelectronics Co., Ltd. |