CN101179316B - Clock regulating method, device and access point - Google Patents

Abstract

The embodiment of the invention discloses a method for regulating a clock, which includes the following steps: a pilot signal sent by a macro base station is obtained; a frequency difference is obtained according to the pilot signal; the clock is regulated according to the frequency difference. The embodiment of the invention also discloses a device for regulating the clock and an access point (AP). By adopting the embodiment of the invention, the clock of the AP is regulated fast to a work scope as required according to the pilot signal sent from the macro station, thus lowering the cost on regulating the clock of the AP, further reducing the system cost, facilitating realization and guaranteeing the stability of the AP function.

Description

Method, device and the access point of clock adjustment

Technical field

The present invention relates to communication technical field, particularly relate to method, device and the access point of clock adjustment.

Background technology

UMTS (Universal Mobile Telecommunications System; UMTS) AP (Access Point; Access point) is a kind of UMTS wireless network access device of family oriented; Be mainly used in to family or SOHO (Small Office Home Office, small-sized family office) user the service of UMTS wireless access is provided.It is integrated WCDMA (Wideband Code DivisionMultiple Access; WCDMA) Node B (Node B) and part RNC (Radio NetworkController; Radio network controller) function comprises wireless modulation-demodulation, RRM, power control etc.; Support the UMTS benchmark service of 3GPP (3rd Generation Partnership Project, third generation partner program) standard terminal.Wireless aps (Access Point, access point) is one and comprises very wide title that it not only comprises simple property wireless access point AP, also is the general designation of wireless router kind equipments such as (containing radio network gateway, wireless bridge).

To family or SOHO user's AP product, limited by cost at present, should not as macro base station, utilize the high accuracy clock module to obtain clock signal, generally is when AP starts working, by the professional staff its clock frequency is adjusted.Because the use of AP is more flexible, operational environment is poor, and when receiving the influencing of extraneous factor such as temperature, deviation can take place the clock frequency of AP, and this just need adjust it, to obtain the required clock accuracy of operate as normal.

In realizing process of the present invention, the inventor finds that there is following problem at least in prior art:

The existing high accuracy clock module of utilizing is obtained clock signal, and to the method that the AP clock frequency is adjusted, cost is higher, is not suitable for the AP product to family or SOHO user.

Summary of the invention

The embodiment of the invention provides a kind of method, device and access point of clock adjustment, clock is adjusted according to the pilot signal that macro base station sends with realization.

For achieving the above object, the embodiment of the invention provides a kind of clock adjusting method on the one hand, may further comprise the steps: obtain the pilot signal that macro base station sends, specifically comprise: receive the signal that said macro base station sends through CPICH Common Pilot Channel; Said signal is carried out descrambling and de-spreading handle, to obtain said pilot signal; Obtain frequency difference according to said pilot signal, comprising: said pilot signal is carried out frequency discrimination handle, obtain the frequency difference numerical value of said pilot signal, saidly pilot signal is carried out frequency discrimination handle and specifically comprise: said r _kCarry out delay process, obtain the inhibit signal r of said pilot signal _K-1Calculate said r _kAnd r _K-1The conjugation cross product, obtain the frequency difference numerical value of said pilot signal according to said conjugation cross product; And carry out the adjustment of clock according to said frequency difference.

On the other hand; The embodiment of the invention also provides a kind of clock adjusting device, comprising: acquisition module is used to obtain the pilot signal that macro base station sends; Said acquisition module comprises: receive submodule, be used to receive the signal that said macro base station sends through CPICH Common Pilot Channel; Processing sub is used for that the signal that said reception submodule receives is carried out descrambling and de-spreading and handles, to obtain said pilot signal; Adjusting module is used for obtaining frequency difference according to the pilot signal that said acquisition module obtains, and comprising: said pilot signal is carried out frequency discrimination handle, obtain the frequency difference numerical value of said pilot signal, saidly pilot signal is carried out frequency discrimination handle and specifically comprise: to said r _kCarry out delay process, obtain the inhibit signal r of said pilot signal _K-1Calculate said r _kAnd r _K-1The conjugation cross product, obtain the frequency difference numerical value of said pilot signal according to said conjugation cross product; And carry out the adjustment of clock according to said frequency difference.

On the one hand, the embodiment of the invention also provides a kind of access point AP, comprises a kind of clock adjusting device again.

Compared with prior art; The embodiment of the invention has the following advantages: the embodiment of the invention is adjusted clock according to the pilot signal that macro base station sends; Thereby need not adopt the high accuracy clock module just can adjust to the clock of AP; Reduce the cost of AP, also can guarantee the stability of AP function simultaneously.

Description of drawings

Fig. 1 is the flow chart of embodiment of the invention clock adjusting method;

The Mathematical Modeling sketch map that Fig. 2 handles for embodiment of the invention frequency discrimination;

Fig. 3 is the sketch map of embodiment of the invention loop filtering;

Fig. 4 is the Mathematical Modeling sketch map of the embodiment of the invention;

Fig. 5 is the structure chart of embodiment of the invention clock adjusting device.

Embodiment

The embodiment of the invention provides a kind of clock adjusting method, clock is adjusted through the pilot signal that CPICH Common Pilot Channel sends based on macro base station, need not adopt the high accuracy clock module just can adjust clock.The method that the embodiment of the invention proposes not only can be used for AP, also can be used for small base stations such as Home eNodeB, mobile base station, describes but the embodiment of the invention is example with AP.

As shown in Figure 1, the flow chart for embodiment of the invention clock adjusting method specifically may further comprise the steps:

Step S101 obtains the pilot signal that macro base station sends.After receiving the signal that macro base station sends through CPICH (Common Pilot Channel, CPICH Common Pilot Channel), the pilot signal of certain paths that under non-diversity mode, carries out to the received signal obtaining after descrambling and de-spreading is handled does,

$r_k=\sqrt{P}A{h}_k{e}^{j{\mathrm{\ω}}_e\mathrm{KT}}+n---\left(1\right)$

In the formula (1), A=1+j is the CPICH data sequence of emission, h _kExpression k moment antenna is to the channel response of AP, ω _eBe frequency difference, the family is the gross power of CPICH emission; N representes noise.

Under diversity mode, the pilot signal of certain paths that carries out to the received signal obtaining after descrambling and de-spreading is handled does

$r_{p,m}=\sqrt{\frac{P}{2}}({\mathrm{Ah}}_1+f\left(m\right)A{h}_2)e^{j{\mathrm{\ω}}_e\mathrm{KT}}+n---\left(2\right)$

In the formula (2), A=1+j, h ₁The channel response of expression antenna 1 to AP; h ₂The channel response of expression antenna 2 to AP; P is two antenna total emission power; N representes noise; The frequency pilot sign PATTERN of f (m) expression antenna 2,

Wherein, r _{P, m}In m represent the frequency pilot sign sequence number, the value of m is 0 to 149; P representes frame number, r in the formula (1) _kFootnote k=150p+m.

If the frequency of AP is identical with the frequency of this pilot channel, obtain so $r_k=\sqrt{P}A{h}_k{e}^{j{\mathrm{\ω}}_e\mathrm{KT}}+n$ In ω _eBe 0.

Step S102 carries out frequency discrimination to pilot signal and handles, and obtains the frequency difference numerical value of this pilot signal.KT in the formula (1) is a time variable.T is the sampling period, and k represents sampling instant.The embodiment of the invention is according to ω _eNumerical value regulate the clock of AP, so will obtain the frequency difference numerical value of this pilot signal through computing.

Under non-diversity mode, to r _kCarry out delay process and obtain r _K-1, ask r then _kAnd r _K-1The conjugation cross product be:

$r_k+r_{k-1}^{*}=2P{\left|h_k\right|}^2{e}^{j{\mathrm{\ω}}_{e}T}+n^{\′}---\left(3\right)$

The time variable of so just having divided out, and then ask r _k* r _K-1 ^*Argument, be the frequency difference numerical value of this pilot signal.

Under diversity mode, according to the difference (r of f (m) value _{P, m-1}, r _{P, m}) have four kinds of combinations,

$(\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\ω}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\ω}}_e\mathrm{KT}}+n)$ Or,

$(\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n)$ Or,

$(\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n)$ Or,

$(\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{kT}}+n),$

For the two kinds of combinations in front, promptly $(\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n)$ With $(\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A({\mathrm{<figure-callout\; id="1"\; label="h"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">h</figure-callout>}}_1+h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n)$ The result who grips altogether after multiplying each other is respectively:

(P|h ₁-h ₂| ²e ^{J ω eT}+ n ') and (P|h ₁+ h ₂| ²e ^{J ω eT}+ n ')

Ask argument can obtain effective frequency difference to this formula.

For the two kinds of combinations in back, promptly $(\sqrt{\frac{P}{2}}A(h_1+h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n)$ With $(\sqrt{\frac{P}{2}}A(h_1-h_2)e^{j{\mathrm{\&omega;}}_e(k-1)T}+n,\sqrt{\frac{P}{2}}A(h_1+h_2)e^{j{\mathrm{\&omega;}}_e\mathrm{KT}}+n),$ r _{P, m-1}And r _{P, m}Grip altogether multiply each other after, can't be write as (real number * e ^{J ω eT}+ n ') form is so can not be used for frequency discrimination.Therefore if adopted diversity mode during emission, and adopt non-diversity mode to go to separate when receiving, then per 4 symbols can be introduced the frequency difference estimation value of two mistakes.If adopted non-diversity mode during emission; And go to receive according to diversity mode when receiving; It is half that effective frequency discrimination result is reduced; And can not introduce wrong frequency difference, adopting diversity mode when promptly no matter launching still is the non diversity mode, all can handle obtaining frequency difference during reception by diversity mode.The Mathematical Modeling sketch map that the frequency discrimination of step S102 is handled is as shown in Figure 2, the u among Fig. 2 _d(k) be the frequency difference numerical value that frequency discrimination is exported.

Step S103 adjusts clock according to frequency difference.After having obtained frequency difference numerical value, can carry out Filtering Processing to frequency difference numerical value earlier, so that more accurate to the adjustment of clock.The embodiment of the invention is regulated to handle through Integral Processing and PI (Proportion Integral, proportional integral) this frequency difference numerical value is carried out filtering, and is as shown in Figure 3.Fig. 3 is the sketch map of embodiment of the invention loop filtering, and wherein K_int is the coefficient that the embodiment of the invention is introduced, and can play the effect of filtering.K _pBe the proportionality coefficient of correspondence, Ki is corresponding integral coefficient, and in fact the accumulator among Fig. 3 plays integral action.The effect that PI regulates is

$F\left(s\right)=K_p+\frac{K_i}{s}---\left(4\right)$

After frequency difference numerical value is carried out Filtering Processing, convert frequency difference numerical value into the clock regulation signal, through the clock regulation signal clock of AP is adjusted.In embodiments of the present invention, this clock regulation signal is a voltage, and accomplishes the conversion of voltage to frequency through voltage controlled oscillator, and then accomplishes the adjustment to the clock of AP.Voltage controlled oscillator is accomplished the transfer process of voltage to frequency, and the relational expression of conversion is ω _v(t)=ω _o+ K _VCOu _c(t), wherein, K _VCOBe voltage controlled oscillator control sensitivity, ω _oBe the reference frequency of crystal oscillator, u _c(t) be control voltage.

Above-mentioned steps is together in series, can obtains Mathematical Modeling as shown in Figure 4, can be got by Fig. 4, closed loop transfer function, does $H_c\left(s\right)=\frac{W_v\left(s\right)}{W_1\left(s\right)}=\frac{W_v\left(s\right)}{\frac{1}{\mathrm{Kd}}\&CenterDot;W_e\left(s\right)+W_v\left(s\right)}$

$H_c\left(s\right)=\frac{W_e\left(s\right)\&CenterDot;(\mathrm{Kp}+\frac{\mathrm{Ki}}{s})\&CenterDot;\frac{1}{k\_\mathrm{int}}\&CenterDot;\frac{1}{s}\&CenterDot;{\mathrm{<figure-callout\; id="1"\; label="K\; vco"\; filenames="S2007101882930E00031.png"\; state="\{\{state\}\}">K</figure-callout>}}_{\mathrm{vco}}}{\frac{1}{\mathrm{Kd}}\&CenterDot;W_e\left(s\right)+W_e\left(s\right)\&CenterDot;(\mathrm{Kp}+\frac{\mathrm{Ki}}{s})\&CenterDot;\frac{1}{k\_\mathrm{int}}\&CenterDot;\frac{1}{s}\&CenterDot;K_{\mathrm{vco}}}=\frac{(\mathrm{Kp}\&CenterDot;s+\mathrm{Ki})\&CenterDot;\frac{\mathrm{Kd}\&CenterDot;K_{\mathrm{VCO}}}{k\_\mathrm{int}}}{s^2+\mathrm{Kp}\&CenterDot;\frac{\mathrm{Kd}\&CenterDot;K_{\mathrm{vco}}}{k\_\mathrm{int}}\&CenterDot;s+\mathrm{Ki}\&CenterDot;\frac{\mathrm{Kd}\&CenterDot;K_{\mathrm{vco}}}{k\_\mathrm{int}}}---\left(5\right)$

Can find out that by formula (5) method that the embodiment of the invention provides is the second order control system of a standard,, can obtain more excellent adjustment performance, further obtain the higher clock of precision through regulating corresponding parameters.

Above-mentioned clock adjusting method; The pilot signal of sending through macro base station can quick adjustment AP clock to required working range, then AP just is in normal mode of operation, has reduced the cost of AP clock adjustment; And realize easily, also can guarantee the stability of AP function.

As shown in Figure 5, the structure chart for embodiment of the invention clock adjusting device comprises: acquisition module 1 is used to obtain the pilot signal that macro base station sends; Adjusting module 2 is used for obtaining frequency difference according to the pilot signal that acquisition module 1 obtains, and carries out the adjustment of clock according to frequency difference.

Wherein, acquisition module 1 comprises:

Receive submodule 11, be used to receive the signal that macro base station sends through CPICH Common Pilot Channel;

Processing sub 12 is used for that the signal that receives submodule 11 receptions is carried out descrambling and de-spreading and handles, to obtain pilot signal.

Wherein, adjusting module 2 comprises:

Frequency discrimination processing sub 21 is used for that pilot signal is carried out frequency discrimination and handles, and obtains the frequency difference of pilot signal;

Conversion of signals submodule 22 is used for converting the frequency difference that frequency discrimination processing sub 21 is obtained into the clock regulation signal;

Frequency adjustment submodule 23 is used for the clock regulation signal adjustment clock that obtains according to conversion of signals submodule 22.When frequency adjustment submodule 23 was specially voltage controlled oscillator, conversion of signals submodule 22 was converted into voltage-controlled signal with the frequency difference of obtaining.

Adjusting module 2 can also comprise: Filtering Processing submodule 24 is used for regulating through Integral Processing and PI and handles the frequency difference that frequency discrimination processing sub 21 is obtained and carry out Filtering Processing, and the frequency difference that will pass through Filtering Processing passes to conversion of signals submodule 22; Conversion of signals submodule 22 also is used for converting the frequency difference of this process Filtering Processing into the clock regulation signal.

Above-mentioned clock adjusting device; The pilot signal that adjusting module 2 obtains according to acquisition module 1 can quick adjustment AP clock to required working range, then AP just is in normal mode of operation, has reduced the cost of AP clock adjustment; And realize easily, also can guarantee the stability of AP function.

Obviously the embodiment of the invention also provides a kind of access point AP that comprises above clock adjusting device, uses this access point AP, can obtain the clock of degree of precision, and reduce the cost of system.

Through the description of above execution mode, those skilled in the art can be well understood to the present invention and can realize by the mode that software adds essential general hardware platform, can certainly pass through hardware, but the former is better execution mode under a lot of situation.Based on such understanding; The part that technical scheme of the present invention contributes to prior art in essence in other words can be come out with the embodied of software product; This computer software product is stored in the storage medium; Comprise some instructions with so that computer equipment (can be personal computer, server, the perhaps network equipment etc.) carry out the described method of each embodiment of the present invention.

The above only is an execution mode of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; Can also make some improvement and retouching, these improvement and retouching also should be regarded as protection scope of the present invention.

Claims (7)

1. a clock adjusting method is characterized in that, may further comprise the steps:

Obtain the pilot signal that macro base station sends, specifically comprise: receive the signal that said macro base station sends through CPICH Common Pilot Channel; Said signal is carried out descrambling and de-spreading handle, to obtain said pilot signal;

Obtain frequency difference according to said pilot signal, comprising: said pilot signal is carried out frequency discrimination handle, obtain the frequency difference numerical value of said pilot signal, saidly pilot signal is carried out frequency discrimination handle and specifically comprise: pilot signal r _kCarry out delay process, obtain the inhibit signal r of said pilot signal _K-1Calculate said r _kAnd r _K-1The conjugation cross product, obtain the frequency difference numerical value of said pilot signal according to said conjugation cross product; And carry out the adjustment of clock according to said frequency difference.

2. clock adjusting method according to claim 1 is characterized in that, the said adjustment of carrying out clock according to frequency difference comprises:

Convert said frequency difference into the clock regulation signal, said clock is adjusted through said clock regulation signal.

3. like the said clock adjusting method of claim 2, it is characterized in that, said before converting said frequency difference into the clock regulation signal, also comprise: regulate to handle through Integral Processing and proportional integral PI said frequency difference is carried out Filtering Processing.

4. a clock adjusting device is characterized in that, comprising:

Acquisition module is used to obtain the pilot signal that macro base station sends, and said acquisition module comprises: receive submodule, be used to receive the signal that said macro base station sends through CPICH Common Pilot Channel; Processing sub is used for that the signal that said reception submodule receives is carried out descrambling and de-spreading and handles, to obtain said pilot signal;

Adjusting module is used for obtaining frequency difference according to the pilot signal that said acquisition module obtains, and comprising: said pilot signal is carried out frequency discrimination handle, obtain the frequency difference numerical value of said pilot signal, saidly pilot signal is carried out frequency discrimination handle and specifically comprise: to pilot signal r _kCarry out delay process, obtain the inhibit signal r of said pilot signal _K-1Calculate said r _kAnd r _K-1The conjugation cross product, obtain the frequency difference numerical value of said pilot signal according to said conjugation cross product; And carry out the adjustment of clock according to said frequency difference.

5. like the said clock adjusting device of claim 4, it is characterized in that said adjusting module comprises:

The frequency discrimination processing sub is used for that said pilot signal is carried out frequency discrimination and handles, and obtains the frequency difference of said pilot signal;

The conversion of signals submodule is used for converting the frequency difference that said frequency discrimination processing sub is obtained into the clock regulation signal;

Frequency adjustment submodule is used for carrying out the adjustment of clock according to the clock regulation signal that said conversion of signals submodule obtains.

6. like the said clock adjusting device of claim 5, it is characterized in that said adjusting module also comprises:

The Filtering Processing submodule is used for handling the frequency difference that said frequency discrimination processing sub is obtained through Integral Processing and proportional integral PI adjusting and carries out Filtering Processing, and said frequency difference through Filtering Processing is passed to said conversion of signals submodule; Said conversion of signals submodule also is used for converting said frequency difference through Filtering Processing into the clock regulation signal.

7. an access point AP is characterized in that, comprises like any described clock adjusting device of claim 4 to 6.

Images