CN101169981B - Semiconductor probe possessing high resolution resistance tip and method for manufacturing same - Google Patents
Semiconductor probe possessing high resolution resistance tip and method for manufacturing same Download PDFInfo
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- CN101169981B CN101169981B CN2006101428093A CN200610142809A CN101169981B CN 101169981 B CN101169981 B CN 101169981B CN 2006101428093 A CN2006101428093 A CN 2006101428093A CN 200610142809 A CN200610142809 A CN 200610142809A CN 101169981 B CN101169981 B CN 101169981B
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Abstract
The invention discloses a semiconductor probe and a manufacturing method thereof. The semiconductor probe comprises a cantilever doped by a first impurity, a resistor tip protruding from one end of the cantilever and doped by a second impurity; a doping control layer formed on both sides of the protrusion portion of the resistor tip; and a first electrode and a second electrode heavily-doped by the second impurity under the control of the doping control layer.
Description
Technical field
The present invention relates to a kind of semiconductor probe and manufacture method thereof, more specifically, relate to and have a kind of manufacture method with semiconductor probe and this semiconductor probe of high resolution resistance tip, this high resolution resistance tip has the doping control layer that is used to control profile of impurities.
Background technology
Along with increase in demand, also increased for the demand of small size, the non-volatile recording medium of high integration such as the portable unit of mobile phone.The integrated level that is difficult to reduce the size of conventional hard disk and is difficult to increase conventional flash memory.Therefore, in recent years, the information-storing device that uses scan-probe has been paid close attention in many researchs.
Probe is used in various scan-probes micro-(SPM) technology.For example, probe is used in the scanning tunnel microscope mirror (STM), with by surveying according to the voltage difference between probe and the sample and mobile electric current reads information; Probe is used in the atomic force microscope (AFM), reads information with the atomic force that produces between probe and sample by use; Probe is used in the magnetic force microscopy (MFM), with by using the power that produces between the magnetic field of sample and magnetized probe to read information; Probe is used in the optical microscope for scanning near field (SNOM), to improve the resolution limit that is caused by wavelength of visible light; Probe is used in the electrostatic force microscope (EFM), with by using the electrostatic force that produces between sample and the probe to read information, or the like.
In order to use the STM technology, the surface charge that exists must can be surveyed in the zone of the diameter with tens nanometers with write and read information thick and fast at a high speed.In addition, in order to improve Writing/Reading speed, the cantilever in must the manufacturing array structure.
Conventional cantilever with resistance tip is disclosed in the open NO.WO 03/096409 of PCT.
Fig. 1 is the sectional view with conventional cantilever of resistance tip.
In forming the technology of resistance tip 10, be formed at first and second semi-conducting electrodes 12 and 15 on most advanced and sophisticated 10 the inclined surface by excessive wet etching, reduced the area of heavily doped inclined surface thus.Therefore, the conductive area in inclined surface reduces, and causes the spatial resolution of resistance area 13 to worsen.In addition, in manufacturing process, the part that will form probe after carrying out etch process may be owing to the higher injection energy of the ratio of about 300keV is damaged.In addition, exist and not only to carry out thermal diffusion process, but also have the demand of the thermal oxidation technology of carrying out 1000 ℃ of following 30-40 minutes promptly in the demand of 1000 ℃ of following annealing processs of 12 hours.
Summary of the invention
The invention provides a kind of semiconductor probe with high resolution resistance tip, this tip has doping control layer.
The method that the present invention also provides a kind of manufacturing to have the semiconductor probe of high resolution resistance tip, this tip has doping control layer, wherein uses lower energy to carry out ion injection and the shortening of thermal anneal process time.
According to an aspect of the present invention, provide a kind of semiconductor probe, it comprises: with the cantilever of first doping impurity; Go out and with the lightly doped resistance tip of second impurity from a distal process of cantilever; Be formed at the doping control layer on the both sides of outshot of resistance tip; Be formed under the doping control layer and first and second electrode districts that form with the second impurity heavy doping.
Resistance tip can form the square column shape, and has less than 100nm, preferably at the width of the scope of 10-50nm.
Doping control layer can be formed by insulating material or metal material.
Metal material can be a kind of among Al, Ti, W, Sn, Cu or the Cr.
According to a further aspect in the invention, provide a kind of manufacturing to have to be formed at the method for the semiconductor probe of the resistance tip on the end of cantilever, described method comprises: form the bar pattern mask on the substrate of first doping impurity; By using the bar pattern mask to come etching substrates to form bar pattern outshot; On the both sides of bar pattern outshot, form doping control layer; Surface with the exposure of passing through substrate at the lateral parts of doping control layer, forms first and second electrode districts with the second doping impurity substrate.
Described method can also comprise: forming bar pattern photosensitive layer with bar pattern outshot on decussate direction on substrate; By using bar pattern photosensitive layer as mask, etching bar pattern outshot and substrate form resistance tip; And the basal surface by etching substrates forms cantilever, thereby resistance tip is positioned on this end of cantilever.
Form doping control layer and can be included in deposition of insulative material or metal material on bar pattern mask and the substrate, and on the both sides of bar pattern outshot, form doping control layer, the layer that forms by deposition of insulative material or metal material by anisotropic etching simultaneously, thus the surface of bar pattern mask and substrate exposed.
The ion implantation energy that is used for substrate is less than 10keV.
Forming first and second electrode districts can comprise by using the rapid thermal anneal process treatment substrate to activate first and second electrode districts.
The width of bar pattern mask can be less than 100nm.
Description of drawings
With reference to the accompanying drawings, by describing one exemplary embodiment in detail, it is more obvious that above and other features and advantages of the present invention will become, in the accompanying drawings:
Fig. 1 is the sectional view with conventional cantilever of resistance tip;
Fig. 2 is the sectional view of tip portion that has the semiconductor probe at high resolving power tip according to an embodiment of the invention, and this tip has doping control layer;
Fig. 3 has the semiconductor probe at high resolving power tip and the sectional view of recording medium according to an embodiment of the invention, and this tip has doping control layer;
Fig. 4 A is the view of manufacture method that has the semiconductor probe at high resolving power tip according to an embodiment of the invention to 4I, and this tip has doping control layer;
Fig. 5 is the view of the example when not forming doping control layer when the formation of first and second electrode districts;
Fig. 6 A and 6B are the curve maps of electrical property that the conventional semiconductor probe that does not have doping control layer is shown and has the semiconductor probe of doping control layer according to an embodiment of the invention; With
Fig. 7 A and 7B illustrate the conventional semiconductor probe that does not have doping control layer and have the susceptibility of semiconductor probe of doping control layer and the curve map of resolution performance according to an embodiment of the invention.
Embodiment
With reference to the accompanying drawing that wherein shows embodiments of the invention the present invention is described more all sidedly thereafter.In the accompanying drawings, for clear layer and the regional thickness exaggerated.
Fig. 2 is the sectional view of tip portion that has the semiconductor probe at high resolving power tip according to an embodiment of the invention, and this tip has doping control layer.
With reference to figure 2, resistance tip 20 is formed at an end of cantilever 21, and most advanced and sophisticated 20 are formed and projected upwards on the surface of vertical direction from cantilever 21 by the silicon substrate with first doping impurity.Resistance tip 20 has uses the second impurity lightly doped low-resistance region 24 different with the polarity of first impurity.Doping control layer 25 is formed at the outshot both sides of low-resistance region 24, in the surface of cantilever 21.Be formed at doping control layer 25 times with heavily doped first and second electrode districts 22 of second impurity and 23.Cantilever 21, resistance tip 20 and first and second electrode districts 22 and 23 can be formed in the process of predetermined technology of impurity.Here, first impurity can be n type impurity for p type impurity and second impurity.
The width W of resistance tip 20 is identical with the width of the mask that will use in manufacturing process described later.For example, when the width W of resistance tip 20 was 100nm, the ion implantation energy that is used to form first and second electrode districts 22 and 23 can be reduced to for example 10keV.Therefore, during ion implantation technology, can prevent damage for probe.First and second electrode districts 22 and 23 must be formed in the zone that the doping control layer 25 by the both sides that are formed on resistance tip 20 limits, and have improved the susceptibility of resistance tip 20 thus, have kept its electric current resolution simultaneously.According to present embodiment, the width W of resistance tip 20 can be lower than 100nm, is preferably lower than 50nm, so that high resolving power to be provided.
Can inject when forming first and second electrode districts 22 and 23 when arsenic (As) is injected with the ion of 10keV, the distribution of As density changes according to the degree of depth.This moment, to become the highest the degree of depth be drop shadow spread (projected range) to As density.The degree of depth that As density becomes the highest is about 10nm.From the cross direction profiles of the As of an end of ion injecting mask is about 30%-40% that the As from this end of ion injecting mask to drop shadow spread distributes.In addition, the width along with resistance tip 20 reduces the spatial resolution increase of resistance tip 20.Yet, when the width of the ion injecting mask of the width that defines resistance tip 20 reduces, may be difficult to prevent because the short circuit between first and second electrode districts 22 and 23 that the thermal anneal process that carries out after finishing ion implantation technology causes.The doping control layer 25 that this problem can form by the both sides that are provided at resistance tip 20 and solve by the width that increases the ion injecting mask.When doping control layer 25 was formed by metal material, they can be used as the shielding of resistance tip 20, have improved spatial resolution thus.
First and second electrode districts 22 and 23 have prevented the zone of surface charge influence except resistance tip 20 of recording medium.Therefore, the electric field that is produced by the surface charge of recording medium has caused the variation of the resistance value of resistance tip 20.The polarity of surface charge and quantity can be from the variations of the resistance value of resistance tip 20 and are accurately surveyed.
Fig. 3 has the semiconductor probe at high resolving power tip and the sectional view of recording medium according to an embodiment of the invention, and this tip has doping control layer.
With reference to figure 3, when surveying the surface charge 137 of recording medium 133, by reduce the area of the low-resistance region 24 of resistance tip 20 for non-conductive depletion region 138, even extend to first and second electrode districts 22 and 23 when it.Therefore, the polarity of the surface charge 137 of recording medium 133 and quantity can be detected owing to the resistance value of the variation of low-resistance region 24.Shown that the depletion region 138 that is formed in the low-resistance region 24 extends to first and second electrode districts 22 and 23 gradually owing to pass through the electric field that surface charge 137 produces.Because can prevent by doping control layer 25, kept current path by resistance tip 20, and made the resistance tip 20 of spatial resolution easily with improvement as the short circuit between first and second electrode districts 22 and 23 of conductive layer.
Fig. 4 A is the view of manufacture method that has the semiconductor probe at high resolving power tip according to an embodiment of the invention to 4I, and this tip has doping control layer.
With reference to figure 4A, on silicon substrate 41, formed mask layer 42, and on mask layer 42, formed photosensitive layer 43 such as silicon oxide layer or silicon nitride layer with first doping impurity, after it, on photosensitive layer 43, be provided with bar pattern mask 44.
With reference to figure 4B,, on substrate 41, formed bar pattern mask 42a by using exposure, development and etch process.This moment, the width of bar pattern mask 42a is less than 100nm, preferably in the scope of 10-50nm.
With reference to figure 4C, use bar pattern mask 42a, with substrate 41 dry etchings to the degree of depth less than 100nm.As a result, on substrate 41, formed bar pattern outshot.This pattern outshot is in the back as the electronics cusp field.
With reference to figure 4D, in order on substrate 41, to form doping control layer 45 (seeing Fig. 4 E), deposition rate such as SiO on substrate 41
2Insulating material or such as the metal material of Al, Ti, W, Sn or Cr, and carry out anisotropic etching process in direction perpendicular to substrate 41, expose the surface of substrate 41 thus.On the both side surface of bar pattern outshot, formed doping control layer 45.This moment, the width of doping control layer 45 is less than 1/3rd of the height of bar pattern outshot.
With reference to figure 4E, the surface of the exposure by substrate 41 is an As heavy doping substrate with second impurity, to form first and second electrode districts 51 and 52.This moment, ion injects and can be able to be lowered, for example 10keV.That is, because do not have etch process for first and second electrode districts 51 and 52, first and second electrode districts 51 and 52 the degree of depth can be reduced, and can reduce ion thus and inject energy.
After finishing ion implantation technology, carry out the impurity that rapid thermal anneal process activates doping.For example, under 1000 ℃ temperature, carry out the rapid thermal anneal process of several seconds and a few minutes.Because, after having formed doping control layer 45, carried out being used to activating the rapid thermal anneal process of the impurity of doping, can prevent in the rapid thermal anneal process process, by the lower part of resistance tip, first and second electrode districts 51 and 52 phenomenons that contact with each other.
Fig. 5 is the view of the example when not forming doping control layer when the formation of first and second electrode districts.In this situation, first and second electrode districts 51 and 52 second impurity are spread, and first and second electrode districts 51 and 52 are extended in the bar pattern outshot 53.This moment, if the width of bar pattern outshot 53 is very narrow, then first and second electrode districts 51 and 52 can contact with each other.Therefore, as shown in Fig. 4 E, pass through to form doping control layer 45, even very narrow, also can prevent reducing of short circuit between first and second electrode districts 51 and 52 and the resistance area area between first and second electrode districts 51 and 52 when the width of bar pattern mask 42a.First and second electrode districts 51 and 52 resistance are very low, thereby first and second electrode districts 51 and 52 are as conduction region.
When carrying out rapid thermal anneal process, the part between heavily doped first and second electrode districts 51 and 52 is owing to thermal diffusion and by light dope second impurity.That is, the part under the bar pattern outshot 53 and first and second electrode districts 51 and 52 can be low-resistance district, its by thermal diffusion by light dope second impurity.Perhaps, by used the silicon substrate 41 of first doping impurity with the second impurity light dope, can be pre-formed low-resistance zone.
After finishing ion implantation technology or after other technologies are subsequently finished, can remove bar pattern mask 42a.
With reference to figure 4F, on the top surface of the resulting structures of Fig. 4 E, form photosensitive layer 61, on the photosensitive layer 61 with the direction of bar pattern outshot 53 with right angle intersection on bar pattern photomask 62 is set.
With reference to figure 4G, on photosensitive layer 61, expose, development and etch process, to form the bar pattern photosensitive layer 63 identical with bar pattern photomask 62 shapes.
With reference to figure 4H, use bar pattern photosensitive layer 63 as mask, etching bar pattern outshot 53 is outstanding to form the square column that will become resistance tip 53a., be clear that the exposed surface of the substrate 51 under bar pattern photosensitive layer 63a is not etched yet this moment.
With reference to figure 4I, when removing bar pattern photosensitive layer 63a from substrate, resistance tip 53a forms the square column shape and is exposed on the substrate 41, and doping control layer 45a is formed on the both side surface of most advanced and sophisticated 53a.The first and second electrode district 51a and 52a are formed under the doping control layer 45a.
Then, the basal surface of etching substrates 41 forms cantilever, is connected to first and second electrode district 51a and the 52a thereby resistance tip 53a is positioned at an end and the electronic pads of cantilever.Because forming the technology of cantilever is known for those of ordinary skill in the art, so will omit its detailed description.
Fig. 6 A and 6B are that the electrical property that the conventional semiconductor probe that does not have doping control layer that uses affairs TC drivers (transaction TC drive TACD) is shown and has a semiconductor probe of doping control layer is the curve map of the analog result of susceptibility.For this simulation, gate electrode is positioned at the resistance tip top, and electric current provides between first (source electrode) and second (drain electrode) electrode district.In addition, the grid voltage of 0V or 1.0V is applied to gate electrode, and with 0 or the voltage of 1.0V be applied to first and second electrode districts.
Fig. 6 A has shown when the situation of the grid voltage that apply 0V with there is the very little difference of leakage current between the situation of grid voltage that apply 1V.Fig. 6 B has shown when applying the grid voltage of 1V, compares with the situation of the grid voltage that applies 0V, and leakage current has increased up to twice.This has shown that susceptibility significantly improves when forming doping control layer.
Fig. 7 A illustrates the conventional semiconductor probe and the curve map of the susceptibility of semiconductor probe according to an embodiment of the invention, according to whether having formed doping control layer, the wide variety of resistance tip.Formed respectively and had 40,50 and three resistance tips of the width of 80nm.When the semiconductor probe with the resistance tip that has formed doping control layer on it and do not form on it doping control layer resistance tip semiconductor probe relatively, shown in Fig. 7 A, regardless of the width of resistance tip, the susceptibility with semiconductor probe of doping control layer is shown significantly and increases.
Fig. 7 B is the curve map of resolution that the semiconductor probe of Fig. 7 A is shown.With reference to figure 7B, when the tip was mutually the same on width, no matter whether doping control layer formed, and most advanced and sophisticated resolution is also mutually the same.This has shown compares very good according to the resolution of semiconductor probe of the present invention with the prior art semiconductor probe of the resolution with hundreds of nm.That is, be clear that though the resistance tip of semiconductor probe of the present invention has the width of tens nanometers, its resolution has also been improved, because first and second electrode districts are formed at the both sides of resistance tip.
According to the present invention, form doping control layer by both sides, even when the width of resistance tip is very narrow, also can form down conduction region effectively at resistance tip.Therefore, the susceptibility of semiconductor probe can significantly increase, and does not reduce the resolution of resistance area.
In addition, because carry out the ion injection, so can prevent damage for probe with lower energy.In addition, because do not need to carry out long ions diffusion technology, profile of impurities can be accurately controlled, the probe that makes easier manufacturing expectation thus.
Though specifically show and described the present invention with reference to its one exemplary embodiment, yet one of ordinary skill in the art is appreciated that and do not breaking away under the situation of the spirit and scope of the present invention that defined by claim, can carry out the different variations on form and the details.
Claims (12)
1. semiconductor probe comprises:
Cantilever with first doping impurity;
Go out and with the lightly doped resistance tip of second impurity from a distal process of described cantilever;
Be formed at the doping control layer on the both sides of outshot of described resistance tip; With
Be formed under the described doping control layer and first and second electrode districts that form with the described second impurity heavy doping.
2. semiconductor probe according to claim 1, wherein said resistance tip forms the square column shape, and has the width less than 100nm.
3. semiconductor probe according to claim 2, the width of wherein said resistance tip is in the scope of 10-50nm.
4. semiconductor probe according to claim 1, wherein said doping control layer is formed by insulating material or metal material.
5. semiconductor probe according to claim 4, wherein said metal material are a kind of among Al, Ti, W, Sn, Cu or the Cr.
6. a manufacturing has the method for the semiconductor probe of the resistance tip on the end that is formed at cantilever, and described method comprises:
On with the substrate of first doping impurity, form the bar pattern mask;
By using described pattern mask to come the described substrate of etching to form bar pattern outshot;
On the both sides of described pattern outshot, form doping control layer; With
The surface of the exposure by described substrate at the lateral parts of doping control layer, forms first and second electrode districts with the described substrate of second doping impurity.
7. method according to claim 6 also comprises:
With the direction of bar pattern outshot with right angle intersection on, on described substrate, form bar pattern photosensitive layer;
By using described pattern photosensitive layer as mask, described pattern outshot of etching and substrate form described resistance tip; And
Basal surface by the described substrate of etching forms described cantilever, thereby described resistance tip is positioned on this end of described cantilever.
8. method according to claim 6, wherein said formation doping control layer comprises:
Deposition of insulative material or metal material on described pattern mask and described substrate, and
On the both sides of described pattern outshot, form doping control layer, simultaneously by anisotropic etching by deposition described insulating material or described metal material forms layer, thereby expose the surface of described pattern mask and described substrate.
9. method according to claim 6, the ion implantation energy that wherein is used for described substrate is less than 10keV.
10. method according to claim 6, wherein said formation first and second electrode districts comprise that handling described substrate by the use rapid thermal anneal process activates first and second electrode districts.
11. method according to claim 6, the width of wherein said pattern mask is less than 100nm.
12. described according to Claim 8 method, wherein said metal material are a kind of among Al, Ti, W, Sn, Cu or the Cr.
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CN104808017B (en) * | 2014-01-26 | 2018-08-24 | 中国科学院苏州纳米技术与纳米仿生研究所 | Probe and preparation method thereof for near-field optical microscope |
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WO2004090971A1 (en) * | 2003-04-10 | 2004-10-21 | Samsung Electronics Co., Ltd. | Method of fabricating semiconductor probe with resistive tip |
CN1653605A (en) * | 2002-05-08 | 2005-08-10 | 三星电子株式会社 | Semiconductor probe with resistive tip and method of fabricating the same, and information recording apparatus, information reproducing apparatus, and information measuring apparatus having the semico |
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CN1653605A (en) * | 2002-05-08 | 2005-08-10 | 三星电子株式会社 | Semiconductor probe with resistive tip and method of fabricating the same, and information recording apparatus, information reproducing apparatus, and information measuring apparatus having the semico |
WO2004090971A1 (en) * | 2003-04-10 | 2004-10-21 | Samsung Electronics Co., Ltd. | Method of fabricating semiconductor probe with resistive tip |
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