CN101167177A - Integration process for fabricating stressed transistor structure - Google Patents
Integration process for fabricating stressed transistor structure Download PDFInfo
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- CN101167177A CN101167177A CNA2006800146276A CN200680014627A CN101167177A CN 101167177 A CN101167177 A CN 101167177A CN A2006800146276 A CNA2006800146276 A CN A2006800146276A CN 200680014627 A CN200680014627 A CN 200680014627A CN 101167177 A CN101167177 A CN 101167177A
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Abstract
A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.
Description
Background technology
In a substrate being processed, substrate to be exposed to one usually and can deposit material on it or the process gas that is stimulated of the material of etching on it with the process of making circuit or display.The chemical vapor deposition (CVD) processing procedure uses the process gas excited by a high frequency voltage or microwave energy, and material is deposited on the substrate, and it can be optionally depositional fabric of one deck, contact hole charges or other.This sedimentary deposit can or adopt method for distinguishing processing and forms on substrate initiatively or passive device, for example metal-oxide-semiconductor (MOS) field effect electric crystal (metal-oxide-semiconductor field effecttransistors through etching; MOSFETs) and other elements.Have one source pole (source) district, passage (channel) district of drain electrode (drain) district and between between source electrode and drain electrode on the MOSFET typical case.In the MOSFET element, a grid (gate electrode) is formed at the top, and by a grid dielectric medium and a channel separation, with the conduction between control source electrode and drain electrode.
This class component can utilize as lowering method such as service voltage, grid dielectric medium thickness or passage length and improve its performance.Yet, becoming in size of component and gap and more diminish instantly, such a conventional method faces the problem of loading (mounting).For example, under the very short situation of passage length, by reducing the increase unit are electric crystal number that passage length produces and the benefit of saturation current, can be fallen by unwelcome bearer rate saturation effect (carrier velocity saturation effect) payment.And by reducing the similar advantage that grid dielectric medium thickness is brought,, then on miniaturized component, limited to as the reduction of grid retardance, this be because gate leakage current increase and electric charge connects dielectric medium, thereby damage electric crystal gradually.Reduce service voltage the operand power degree is descended, but the critical voltage of electric crystal (threshold voltage) makes that falling situation under above-mentioned is restricted equally.
One quite in the recent period just development come out and in order to the method for promoting electric crystal usefulness, be stress application in the atomic lattice (atomic lattice) of a deposition material, with promote this material itself or by one be subjected to stress to deposit the material application of force and produce strain (strain) above or below the characteristic electron of material.Lattice strain (lattice strain) can promote the carrier mobility of semiconductor (for example silicon), thereby improves the saturation current of the silicon electric crystal through mixing, and then promotes its performance.For example, have compression (compressive) or the electric crystal composition material of (tensile) stress essence that stretches via deposition, then local lattice strain can be initiated in the electric crystal channel region.For example, be used as the silicon nitride material of interlayer between etch-stop material and the gate silicide material, can be through deposition and as the stress material, and can in the electric crystal channel region, cause a strain.The required stress kenel of deposition material is then decided on the kind that is subjected to the stress material.For example, in the cmos element processing procedure, negative passage (NMOS) doped region is covered with a tension material (tensilestressed material) with positive tensile stress (positive tensile stress), and positive passage MOS (PMOS) doped region is covered with a high compression material (compressive stressed material) with negative stress value.
Therefore, expectation can make have a predetermined stress kenel be subjected to the stress material, similarly be tensile stress or compression stress; Also may command deposits the dynamics of answering of material generation; What more can deposit this type of is subjected to the stress material, and can produce uniform local stress or strain on substrate; In addition also expectation have one can be on substrate active or form above the passive device and be subjected to the stress material, and do not damage the processing procedure of element.Expect that further depositional coating is highly evenly to cover (or conformal; Conformal), with basis as surface topography (topography).
Summary of the invention
There are many technology can be separately or merge ground and use, are subjected to the stress rete with what make the tool demand characteristics.One first group of embodiment of the present invention is the element defective that reduces the element made from the high compression stress silicon nitride film layer, and the silicon nitride film layer of this tool high compression stress is to form down in the state that has hydrogen.Can be by before deposition, carrying out plasma treatment in the surface, with and/or before deposition, form a resilient coating and suppress the infiltration of hydrogen in the surface.One silicon nitride film layer can comprise an initiation layer, and it flows down formation in no hydrogen, as the bottom of a heavily stressed nitride layer of making under the hydrogen stream.Another embodiment then utilizes the relative motion of a radiation source and a workpiece (workpiece), with and/or make an abutment wall of characteristic portions less than 90 degree, and promote radiation hardening usefulness.Another promotes the embodiment of stress in thin film, is to follow deposition manufacture process with a pore former (porogen), and disengages when making pore former be exposed to UV radiation or plasma treatment in continuing.Another embodiment then utilizes the RTP (rapid thermal treatment processing procedure) of mononitride separation material and polycrystalline grid, and the cumulative stress that deposition constituted of a follow-up heavily stressed etch stop layer is promoted strain and improved usefulness.
In order to an embodiment of the method that forms silicon nitride, it comprises: configuration one contains the workpiece (workpiece) on a surface in a deposition chamber according to the present invention; Under the condition that lacks deposition, this surface is exposed to a plasma, to remove pollutant; Under the state that has a hydrogen stream, on the surface that plasma treatment is crossed, deposit a silicon nitride layer in this.
In order to another embodiment of the method that forms silicon nitride, it comprises: configuration one contains the workpiece on a surface in a deposition chamber according to the present invention; Go up formation one resilient coating in this surface; In the presence of a hydrogen stream, deposition one silicon nitride layer on this resilient coating.
In order to an embodiment again of the method that forms silicon nitride, it comprises: configuration one contains the workpiece on a surface in a deposition chamber according to the present invention; In this surperficial deposition one rete repeatedly (film stack) of going up, this rete repeatedly comprises a silicon nitride initiation layer that forms under the state of no hydrogen stream, and the silicon nitride layer of following a formed high compression stress in the presence of hydrogen stream.
One embodiment of a method that forms in order to the defective of avoiding in the element according to the present invention, it comprises: with a surface with a plasma treatment, and in the presence of a hydrogen stream, deposition one silicon nitride layer on this surface treated.
Another embodiment of a method that forms in order to the defective of avoiding in the element according to the present invention, it comprises: deposition one resilient coating on a surface, and in the presence of a hydrogen stream, deposition one silicon nitride layer on this resilient coating.
An embodiment again of a method that forms in order to the defective of avoiding in the element according to the present invention, it comprises: under the state of no hydrogen stream, go up deposition one silicon nitride initiation layer in a surface; In the presence of a hydrogen stream, a high compression stress silicon nitride layer is deposited on this silicon nitride initiation layer; And with a NF who dilutes
3Plasma eat-backs this high compression stress silicon nitride layer.
The embodiment that a rete according to the present invention changes, it comprises: an oxidation buffer layer, and a silicon nitride layer thereon, this silicon nitride layer exists deposit and tool one high compression stress in hydrogen.
The embodiment that a rete according to the present invention changes, it comprises: the silicon nitride layer of an oxidation buffer layer, a high compression stress, and a marginal silicon nitride initiation layer, and initiation layer has lower compression stress compared to the silicon nitride layer above it.
With the embodiment of UV radiation in order to a method of the depositional coating that hardens, it comprises according to the present invention: dispose a workpiece in a process chamber, and workpiece has deposition rete thereon; And when making this workpiece and expose to the sun between the source generation relative motion, then this rete can be exposed to the radiation emitted by UV source institute, and ultra-violet radiation is radiated on this surface with a brewster angle degree (Brewster angle).
With UV radiation another embodiment in order to a method of the depositional coating that hardens, it comprises according to the present invention: dispose a workpiece in a process chamber, form a plurality of characteristic portions on it, the rising abutment wall of this characteristic portion forms one in fact less than 90 ° angle; And this workpiece is exposed to by a UV source radiation emitted, thereby the angle that the abutment wall of the characteristic portion of this rising had makes ultra-violet radiation be exposed on a rete of this workpiece with a brewster angle degree by this radiation source.
In order to an embodiment of a method of the silicon nitride film layer that forms the high tensile stress of a tool, it comprises according to the present invention: under the state that has a pore former (porogen), and the deposited silicon nitride rete; This silicon nitride depositional coating is exposed to a plasma or both processing of one at least of ultra-violet radiation, to disengage pore former; And this rete of multiviscosisty, lowering because of disengaging the pore size that pore former causes, and the interior N-H key of silicon nitride film layer is stretched (generation strain), and then gives a tensile stress in this rete.
According to the present invention in order to an embodiment of the method for promoting a MOSFET element function, it comprises: deposition one evenly covers the silicon nitride film layer of a polysilicon gate, mat applies strain to a silicon crystal lattice that is positioned at the below now, and to these grid and this silicon nitride film layer execution rapid thermal treatment processing procedure (RTP), with the tensile stress by improving this silicon nitride film layer and by initiative structure and corresponding stress thereof in polysilicon gate, and this silicon crystal lattice that is positioned at the below is applied strain.The one silicon nitride etch stop layer with tensile stress is deposited on this with on the finished silicon nitride film layer of RTP, and the tensile stress in this silicon nitride etch stop layer is to strengthen by the one that plasma treatment and ultra-violet radiation expose both to the open air.
Make an embodiment of a method of a MOS electric crystal structure according to the present invention, it comprises: form a polysilicon layer on a gate oxide layers; Insert that germanium is that make to be contacted with a first this polysilicon layer; To be positioned at the selected part of making one grid polysilicon layer and gate oxide layers in addition removes.Formation one has the even cover nitride layer of tensile stress above this grid, uses heat energy in this grid.Then this nitride layer that evenly covers is carried out etching, with in forming a separation material structure in abutting connection with this grid place.
Make another embodiment of a method of a MOS electric crystal structure according to the present invention, it comprises: form a polysilicon layer above a gate oxide layers; To be positioned at the selected part of making one grid polysilicon layer and gate oxide layers in addition removes; Formation one has the even cover nitride layer of tensile stress on this grid.This grid is imposed heat energy, and this nitride layer that evenly covers is carried out etching, with in forming a separation material structure in abutting connection with this grid place, form a silicon nitride etch stop layer on this grid and this gap thing structure, the tensile stress of this etch stop layer strengthens.
Make another embodiment of a method of a MOS electric crystal structure according to the present invention, it comprises: form a polysilicon layer on a gate oxide layers; Insert the first contact of the polysilicon layer therewith that germanium makes; And the polysilicon layer and the gate oxide layers that will be positioned at beyond the selected part of making one grid remove.Form a silicon nitride etch stop layer on this grid, the tensile stress of this silicon nitride etch stop layer is by exposing to the open air both one promoting wherein of a plasma or UV radiation.
One embodiment of one method of silicon nitride formed according to the present invention, it comprises: (i) configuration one contains the substrate on a surface in a deposition chamber; (ii) under no isoionic state, this surface that is arranged in this deposition chamber is exposed to a siliceous preceding conductive gas, on this surface, forms a silicon-containing layer thus; Reach this silicon-containing layer that (iii) will be positioned at this deposition chamber and be exposed to a nitrogenous plasma, form silicon nitride thus.Repeating step is (ii)-(iii) to increase the thickness of this silicon nitride.
In order to an embodiment of the method that forms silicon nitride, it comprises: (i) configuration one contains the substrate on a surface in a deposition chamber according to the present invention; (ii) in one first nitrogenous plasma, this surface that will be positioned at this deposition chamber is exposed to a siliceous preceding conductive gas; And (iii) this exposed surface is sentenced one second nitrogenous plasma, to form silicon nitride.Repeating step is (ii)-(iii) to increase the thickness of this silicon nitride.
In order to an embodiment of the method that forms silicon nitride, it comprises: configuration one contains the substrate on a surface in a process chamber according to the present invention; And this surface that is arranged in deposition chamber is exposed to a siliceous lead in a hydrogeneous plasma, thus silicon nitride is deposited on this surface.
Purpose of the present invention and advantage can further be understood by ensuing detailed description and with the diagram that it is enclosed.
Description of drawings
The 1st figure is that one of a substrate is simplified profile, shows that the top is covered with the some of an electric crystal structure of tension silicon nitride deposition material;
The 2nd icon is painted on the compression stress and the refractive index of the CVD SiN rete that forms under several different process conditions;
The 3rd figure is presented at the FT-IR spectrum of the CVD SiN rete that forms under several different process conditions;
4A figure marks and draws with different silane (silane) the CVD SiN rete that flow velocity was deposited, its compression stress and refractive index;
4B figure marks and draws with different panels the CVD SiN rete that wafer gap was deposited, its compression stress and refractive index;
4C figure marks and draws with the different CVD SiN retes that hydrogen flow rate was deposited, its compression stress and refractive index;
The 4D icon is painted on the CVD SiN rete that is deposited under the different power degree of using, its compression stress and refractive index;
The CVD SiN rete that the 5A icon is painted under the hydrogen and no hydrogen is deposited down, its compression stress and refractive index;
The 5B icon is painted on the CVD SiN rete that is deposited under different capacity and the different temperatures, its compression stress and refractive index;
The 6th figure is a plot, is presented at the high RF voltage power degree of raising and reaches in the measured tensile stress of different nitrogen plasma treatment process cycle;
The 7th figure is a plot, is presented at not under the synsedimentary and plasma treatment process cycle the compression stress of sedimentary deposit and refractive index;
The 8th figure is a plot, shows along with N
2The plasma treatment time, the variation of the tensile stress values of deposition material;
The 9th figure is a sign picture, is presented under the processing procedure of different scrubbing and suction circulation N
2The plasma treatment time is to the influence of tensile stress values;
The 10th figure marks and draws with the formed CVD SiN of different deposition/treatment cycle rete, and its rete tensile stress is to relation of yield figure;
11A figure is presented at
Table IVThe CVD SiN rete of the multiple cycling condition deposit gained of listing, its N-H: the ratio of Si-N key;
11B figure is presented at
Table IVThe multiple circulation of listing and under the time is with the FT-IR spectrum of the CVD SiN rete of 400 ℃ of deposition gained;
The 12A-D icon is painted under the multiple different process conditions, in the stress in thin film of a CVDSiN rete of 450 ℃ of formation;
13A figure was to being subjected to do with plasma the CVD SiN rete of deposit post-treatment under 400 ℃, draw the tensile stress chart and mark and draw the reduction amount of hydrogen content, and this plasma is made of the gas that contains amount argon not at the same level;
13B figure has marked and drawed the CVD SiN rete that deposits among the 13A figure, the spike area of the FT-IR spectrum of its tensile stress, hydrogen content and N-H and Si-H key;
13C figure was to being subjected to do with the Ar plasma of different capacity degree the CVD SiN rete of deposit post-treatment, and the tabular tensile stress is is also marked and drawed the reduction amount of hydrogen content;
13D figure has marked and drawed the CVD SiN rete that deposits among the 13C figure, the spike area of the FT-IR spectrum of its tensile stress, hydrogen content and N-H and Si-H key;
13E figure was to being subjected to do with plasma the CVD SiN rete of deposit post-treatment under 550 ℃, draw stretching tensile stress chart and mark and draw the reduction amount of hydrogen content, and this plasma is made of the gas that contains amount argon not at the same level;
13F figure has marked and drawed the CVD SiN rete that deposits among the 13E figure, the spike area of the FT-IR spectrum of its tensile stress, hydrogen content and N-H and Si-H key;
The 14th figure has marked and drawed and has sentenced or do not sentenced the cleaning of Ar plasma and the CVD SiN rete of deposition between each circulation, and its thicknesses of layers is to the graph of a relation of deposition/treatment cycle number;
The 15th figure has marked and drawed and has not sentenced the cleaning of Ar plasma and the CVD SiN rete of deposition between each circulation, and its thicknesses of layers is to the graph of a relation of deposition/treatment cycle number;
The 16th figure has marked and drawed the CVD SiN rete that forms under multiple condition between successive cycle, its thicknesses of layers is to the graph of a relation of deposition/treatment cycle number;
The 17th figure has marked and drawed the CVD SiN rete that forms under multiple condition between successive cycle, its thicknesses of layers is to the graph of a relation of deposition/treatment cycle number;
The 18th figure is the diagram of an exposure cell, and it is applicable to a silicon nitride material is exposed to a suitable energy light beam source;
The 19th figure is a block diagram, is presented at the material of (A and B) deposition gained under the different process conditions, and it increases down in the ultra-violet radiation irradiation time, the variation of tensile stress values;
The 20th figure is a plot, be presented at first plating (as-deposited) state (just plate-representing) with continuous lines and after ultraviolet radiation treatment (handled rete-be represented by dotted lines) one be subjected to the stress silicon nitride material, one fourier transform infrared ray (FT-IR) spectrum;
21A to 21E figure is a plot, and the tensile stress of demonstration silicon nitride deposition material improves with the increase of ultra-violet radiation irradiation time, and in 21A figure, it is subjected to single wavelength (handling 1) and two kinds of UV-irradiation of broad band wavelength (handling 2);
22A figure has marked and drawed the CVD SiN rete that was subjected to do with the UV radiation deposit post-treatment, and its tensile stress and contraction are to the graph of a relation of depositing temperature;
22B figure has marked and drawed the CVD SiN rete among the 22A figure, the spike area ratio of the FT-IR spectrum of its hydrogen total content and N-H and Si-H key;
The CVD SiN rete that the 23rd figure shows plating just with and FT-IR spectrum after the UV radiation treatment;
The 24th figure shows the FT-IR spectrum that is exposed to the isoionic CVD SiN of deposit post-treatment rete, and this plasma is generated by different mist;
25A-D figure is the electron microscopic profile, is presented at the even spreadability (conformality) of the CVDSiN rete that forms under the different process conditions;
26A-B figure is the electron microscopic profile that amplifies, and is presented at the CVD SiN rete form (morphology) that forms under the different process conditions;
The 27th figure is that the material deposition rate is mapped to exposure (exposure dose);
28A figure is that deposition rate is mapped to exposure;
28B figure is a micro-profile, shows a characteristic portion that has a sedimentary deposit, and this layer is through a 500mT
*The SiH4 of s dosage exposes the back deposition to the open air and gets;
29A-H figure is the electron microscopic profile, is presented at the form of formed CVDSiN rete under the different process conditions;
The 30th figure is the diagram of an embodiment of a basal plate making process chamber, and it is a PECVD settling chamber;
The 31st figure is the simple profile of the conventional process chamber of a relative higher pressure, and a deposition chamber of revising according to one embodiment of the invention, and it is to operate than under the low pressure;
The 32nd figure is a perspective view of the deposition chamber of the modification that shows of the 31st figure midship section;
The 33rd figure is a block diagram, is presented under the situation that adds the monoxide layer performance of deposited particles and annealing back (post annealed) particle;
34A-C figure is when illustrating the initiation layer that thickens when use one, the performance of deposited particles and annealing back particle;
The 35th figure is a block diagram, shows the initiation layer and the time spent that thicken when with monoxide layer and, the performance of deposited particles and annealing back particle;
The 36th figure is a block diagram, shows when using the method for multiple enhancement compression stress reliability the performance of deposited particles and annealing back particle;
37A figure one highlights the figure of Fresnel principle (Fresnal Principle);
37B figure is a micro-profile of describing the Fresnel principle;
38A-B figure is a diagram brewster angle degree opinion (Brewster angle theory);
39A-M figure describes a simple profile of integrating flow process, and this flow process uses stress from multiple source to promote element function;
The 40th figure is that diagram is when being used in company with rapid thermal treatment processing procedure (RapidThermal Processing) by stress nitride thing rete, to the reaction of rete composition (Si-H/N-H) and hydrogen total content;
The 41st figure is diagram one deposition back NF
3Eat-backing processing procedure makes area of isolation obtain a high etch rate;
The 42nd figure is an electron micrograph, shows through a NF according to an embodiment of the invention
3Eat-back profile variation and pattern load effect (Pattern Loading Effect (PLE)) behind the processing procedure.
The main element symbol description
20 silicon nitride materials, 24 electric crystals (or MOSFET)
28 channel regions, 32 substrates (or workpiece)
36 source areas, 40 drain regions
44 irrigation canals and ditches, 46 irrigation canals and ditches materials
48 gate oxidation materials, 52 grids
54 Metal Contact, 56 silicide materials
60 separation materials, 64 oxide pad materials
68 (grid) sidewall 72 is implanted
Metal and dielectric matter (PMD) material before 76
80 deposition chamber/CVD settling chamber/chamber 84 enclosure walls
88 ceilings, 92 abutment walls
96 end walls, 100 processing procedure districts
104 substrate supports, 105 electrodes
106 substrates are carried 107 heaters
108 gas distributors, 109 (the second) electrodes
110 inlet port 110a, first inlet
110b second inlet 111 panels
112 hole 124a, 124b gas are supplied with
128a, 128b source of the gas 132a, 132b wireway
144a, 144b air valve 182 blast pipes
184 suction channels, 185 exhaust ports
186 air throttles, 188 exhaust pumps
198 supplies of electric power of 196 controllers
The source of exposing to the sun, 200 exposure cells (chamber) 204
206 heaters, 208 gas accesses
210 gas vents
3100 than low-pressure chamber's 3102 higher pressure chambers
3103 transfer tubes, 3104 heaters
3106 pump interfaces, 3108 wafer holder
3110 elevate a turnable ladder tightening latches, 3112 heater adapter plugs
3114 spacers, 3900 CMOS preamble structures
3902 PMOS districts, 3904 nmos areas
3903 grids, 3905 grids
3906 shallow slot isolation structures, 3908 gate oxide layers
3910 gate polysilicon layers, 3912 photoresistance shade
3912a is 3930 nitride layers (SiN layer) at interval
3931 shades 3932 cause the structure of stress
3934 nitride layers (SiN layer)
3936,3938 silicon nitride etch stop layers (SiN ESL)
3950,3952 separation material structures
Embodiment
There are many technology can separately or merge ground and use, utilize the even spreadability (conformality of the formed rete of chemical vapor deposition (CVD) with enhancement; Or claim conformality) and stress.Be specially adapted to make the even cover layer of tool stretching or compression stress according to embodiment proposed by the invention, it applies strain to a silicon crystal lattice that is positioned at the below.
In an exemplary applications, this high elongation (tensile stressed) or high compression (compressive stressed) silicon nitride material 20 form on a substrate or workpiece 32, to make a MOSFET structure 392, this structure delineation is in the simple profile of the 1st figure.The silicon nitride material 20 of this deposition or treated mistake, it has higher relatively inherent strain, thereby causes a strain in a channel region 28 of electric crystal 24.This strain that is initiated has improved the carrier mobility in the channel region 28, thereby the performance of promoting electric crystal 24, for example promotes the saturation current of electric crystal 24.Silicon nitride material 20 also has other purposes in MOSFET 24, for example as an etch-stop material.This is subjected to the silicon nitride material 20 of high levels useful too in other structures, such as: other electric crystals, including, but are not limited to is that two utmost points engage electric crystal, capacitor, inductor and actuator etc.Substrate 32 wherein can be a silicon wafer, or can be made by other materials, as germanium, SiGe, GaAs and combination thereof.This substrate or workpiece 32 also can be a dielectric medium, and are used to make display, as glass.
The electric crystal of describing among the 1st figure 24 is a negative passage (or claiming the n-passage) MOSFET (NMOS), has source electrode and drain region 36,40, and it is to form a n-N-type semiconductor N via doped substrate 32 1 VA family elements.In the NMOS electric crystal, the IIIA family element that mixing on the outer substrate of source electrode and drain region 36,40 or workpiece 32 typical cases, and form a p-N-type semiconductor N.The stress silicon nitride material that is subjected to that NMOS channel region top covers is made with a tensile stress.
In another program, MOSFET electric crystal 24 comprises a positive passage or a p-passage MOSFET (PMOS), and it has source electrode and drain region (not with diagram), is to form a p-N-type semiconductor N via doped substrate one IIIA family element.In a PMOS electric crystal, electric crystal 24 can comprise a substrate 32, and it comprises a n-N-type semiconductor N, or electric crystal 24 has a well region (well region; Not with diagram), well region comprises a n-N-type semiconductor N that is formed at a substrate or workpiece 32, and substrate 32 comprises a p-N-type semiconductor N.This PMOS channel region is covered with a high compression silicon nitride.
Shown in the scheme, electric crystal 24 comprises irrigation canals and ditches 44, is to be made for isolation between 24 groups of 24 of the electric crystals on the substrate 32 or electric crystals, that is a kind of known techniques: shallow trench isolation (shallowtrench isolation).Irrigation canals and ditches 44 typical cases go up and are formed at before source electrode and the drain region 36,40 with an etch process.The lining material of one trench sidewall (not with diagram) for instance, can be utilized the rapid thermal oxidation in monoxide/nitrogen oxide environment and forms irrigation canals and ditches 44 in, and it also can become the wedge angle on the irrigation canals and ditches 44 (or other places) and justify.In a scheme, but the also irrigation canals and ditches material 46 of filling tool one tensile stress of irrigation canals and ditches 44, and it also can be used to provide a tensile stress to channel region 28.The deposition of irrigation canals and ditches material 46 can comprise uses a high aspect ratio processing procedure (High Aspect RatioProcess (HARP)), and it can comprise use one and use O
3Subatmospheric chemical vapour deposition (CVD) (SACVD) processing procedure of/tetraethoxysilane (TEOS).Too much irrigation canals and ditches material 46 can be utilized as removing that cmp (chemical mechanical polishing) is incited somebody to action.
This electric crystal comprises a gate oxidation material 48 and a grid 52, and it is above the channel region 28 between source electrode and the drain region 36,40.In the scheme that shows, electric crystal 24 also comprises silicide material 56, and it is positioned on source electrode and the drain region 36,40, also is positioned on the grid 52.This silicide material 56 and the source electrode that is positioned at the below and drain region 36,40 and grid 52 are compared, and are to be highly conductive, and help via Metal Contact 54 and electric signal to be passed into and spread out of electric crystal 24.And look the processing procedure that uses material and formation, silicide material 56 also can comprise a tensile stress and produce elongation strain in channel region 28.The diagram electric crystal also comprises separation material 60 and oxide pad material 64, and it can be positioned on the opposition sidewall 68 of grid 52, makes silicide material 56 keep separating in the silicidation process of a making silicide material 56.In silicidation process, a continuous metal material (not with diagram) is deposited on oxidiferous source electrode and drain region 36,40 and the grid 52, also on the separation material 60 of nitrogenate.This metal and the pasc reaction that is positioned at below source electrode and drain region 36,40 and grid 52, and form metal-silicon alloy silicide material, but it does not more have a reactivity to the nitride material in the separation material 60.Therefore, separation material 60 allows the top unreacted metal by etching off, and does not influence the metal alloy in the silicide material 56.
The length of channel region 28 is short than the length of gate oxide material 48.Measure channel region 28 length that define between source area 36 and 40 edges, drain region and be about 90 nanometers or shorter, for example by about 90 nanometers to about 10 nanometers.Because the length of channel region 28 shortens, implant (implant) 72 (what also claim is that annular is implanted (halo)) and may be reversed in the doping stand in channel district 28, jump to drain region 40 by source area 36 out of control to avoid charge carrier, vice versa.
In the scheme that the 1st figure shows, silicon nitride material 20 is to be formed at silicide material 56 tops.Silicon nitride material 20 typical cases go up the termination material as a contact etch, also provide strain to channel region 28 simultaneously.Silicon nitride material 20 can have a stress value through deposition, its scope by compression stress until tensile stress.Select the stress kind of silicon nitride material 20 that is chosen the strain kenel that electric crystal 24 channel regions 28 are provided.
As previously mentioned, stress in thin film and even spreadability are to applying two principal characters that film had of strain on the silicon crystal lattice of below.Incorporate into the whole subjects under discussion of this paper for your guidance be the non-temporary patent application book the 11/055th of the U.S. that proposed on February 11st, 2005, No. 936, exercise question is " high elongation that semiconductor is used and compression material (TENSILE AND COMPRESSIVE STRESSEDMATERIALS FOR SEMICONDUCTORS) ".This previous application for patent that proposes is described the multiple technology that can be used for controlling a depositional coating stress.
This temporary application is described more controls one by the stress of the formed rete of chemical vapor deposition (CVD) and the technology of even spreadability.Through finding that the silicon nitride of deposition is subjected to the stress of two kinds of kenels of stress material, promptly stretch and compress, and stress value all can set in the deposition material, be by control processing procedure parameter or by as following as processing that the deposition material is carried out.These processing procedure parameters will individually or with special combination be described in down, yet the present invention should not be limited to indivedual or combination example described herein, knows down but can show this skill person, comprises other the individual or combination of parameter.
With the lower part is respectively the control proposition of compressive films ply stress, stretch film layers stress and even film layer spreadability to be stated.
I high compression material (Compressive Stressed Materials)
Deposition manufacture process and treatment conditions can be adjusted and be suitable for depositing a high compression material on substrate, or handle a material between depositional stage or after the deposition, and its compression stress value is improved.Be not subject under the explanation, found that desire obtains a silicon nitride with higher compression stress value and is subjected to the stress material, can clash into via raising RF and obtain higher rete density, and this is owing to have more Si-N key and the cause of Si-H and the minimizing of N-H key in the deposition material.Higher depositing temperature and RF power have been promoted the compression stress degree of depositional coating.In addition, in the material that the plasma kind of higher kinetic energy values is deposited, can obtain higher compression stress degree.The bombardment meeting that it is believed that the plasma kind (as plasma ions and neutron) of high energy causes the reason of compression stress to be the increase of rete density in the deposition material.
The process gas that is used for the height of deposition compressive silicon nitride comprises the siliceous and nitrogenous gas of (relevant with the formation of high elongation material) as described below.And unless special declaration arranged, the condition of general deposition manufacture process similarly is radio frequency (radio frequency) form and power level, specific gas flow rate and pressure, substrate temperature and other processing procedure in this way, and is roughly similar with those processing procedures that are used to deposit the tension material.
Deposit a high compression silicon nitride material, the process gas of introducing chamber comprises: contain a silicon-containing gas first composition, contain second composition of a nitrogenous gas and contain the 3rd composition of carbon, boron or germanium.For instance, siliceous composition can be silane, disilane, trimethyl silane (TMS), three (dimethylamino) silane (TDMAS), two (the 3rd-butyl amino) silane (BTBAS), dichlorosilane (DCS), and their combination.Except that above-mentioned compound, carbonaceous component can be ethene (C
2H
4), propylene (C
3H
6), toluene (C
7H
8), and their combination.Boracic and germanic composition can be respectively diborane (B
2H
6), boron chloride (B
2Cl
4), and germane (GeH
4).One suitable silane flow rate is for example for about 10 to about 200sccm.For example, nitrogenous gas can be ammonia, nitrogen and their combination.One suitable ammonia flow rate is for about 50 to about 600sccm.This process gas also can contain a diluent gas, and its volume that infeeds is more a lot of greatly than reacting gas composition.This diluent gas also can be used as a dilution, and simultaneously to small part as nitrogenous reacting gas, for example flow rate is about 500 to about 20, the nitrogen of 000sccm.Other other gases that can be contained in the process gas are blunt gas, and for example helium and argon gas, its tool one about 100 be to about 5, the flow rate of 000sccm.When deposition silicon oxynitride material, this process gas also can contain gas in addition, as an oxygen-containing gas, similarly is oxygen.Unless special declaration is arranged, in these processing procedures, maintain about 100 to about 400 watts on the power degree typical case of electrode, electrode gap is about 5 millimeters (200 mils) to about 12 millimeters (600 mil), processing procedure air pressure is extremely about 4 holders of about 1 holder, and substrate temperature is about 300 to about 600 ℃.
Through finding, hydrogen is introduced sedimentation chemistry, the compression stress of shaping rete is improved.The below
Table IList indivedual conditions of three kinds of silicon nitride film layer depositions.
Table I
| Rete # | SiH 4(sccm) | ?NH 3(sccm) | N 2(liter) | Ar (liter) | H 2(liter) |
| 1 | 60 | ?30 | 1 | 3 | 0 |
| 2 | 60 | ?30 | 1 | 3 | 1 |
| 3 | 60 | ?30 | 0 | 3 | 1 |
The 2nd figure marks and draws above side
Table IIn the stress in thin film and the refractive index of listed three kinds of SiN retes that indivedual sedimentary condition deposited.The 2nd figure shows the influence of adding hydrogen to gained rete institute tool compression stress.The 2nd figure is presented at known H
2Under the Ar air-flow, with SiH
4/ NH
3Ratio optimization and reach a N of maximal pressure stress under compression
2/ Ar/H
2Ratio is 0/3/1.
The 3rd figure marks and draws the top
Table IIn the FT-IR absorption spectrum of listed silicon nitride film layer # 1 and #3.The FT-IR spectrum of CVD SiN rete # 3 is compared with CVD SiN rete # 1, can have a suitable evident difference.The spectrum of the 3rd figure shows that the layer of nitride film # 3 that is deposited is at the about 3330cm of wave number under the situation that has hydrogen
-1Place's intensity increases, and these spectral regions are equivalent to the N-H deformation behaviour of tensile stress, express the increase of compression stress.
In known relative ratios's process gas scope, also can change other parameters and promote compression stress.For example, with the CVD processing procedure, and at the SiH of different in flow rate
4And NH
3Adopt aforementioned 0/3/1 N down,
2/ Ar/H
2The flow velocity ratio deposits the SiN rete.These experiments disclosed a maximal compressed stress (G～-2.8GPa) central point, its SiH
4Flow velocity is 60sccm and NH
3Flow velocity is 150sccm.
4A-D figure points out that the compression stress degree in the depositional coating can further be promoted to more than the pact-2.8GPa via changing other process parameter.For example, the 4A icon is painted on three kinds of different SiH
4Under the flow velocity, the stress and the refractive index of the CVD SiN rete that is deposited.4A figure shows SiH
4Flow velocity can be promoted compression stress through optimization.
The 4B icon is painted under the spacing (wafer-to-faceplatespacing) of three kinds of different wafer counter plates, the stress and the refractive index of the CVD SiN rete that is deposited.4B figure shows that also this gap difference can promote compression stress through optimization.
The 4C icon is painted under three kinds of different hydrogen flow velocitys, the stress and the refractive index of the CVD SiN rete that is deposited, and 4C figure shows H
2Flow velocity can be promoted compression stress through optimization.
The 4D icon is painted under three kinds of different RF power, the stress and the refractive index of the CVD SiN rete that is deposited.4D figure shows via this process parameter of control, can obtain a maximal compressed stress.
5A and 5B figure are presented at also using of many process parameter to be changed down, can make a CVD SiN rete have the compression stress of an approaching-3.0GPa.In particular, the 5A icon is painted under three kinds of different temperature, in the SiN rete that reaches the no hydrogen deposit under the hydrogen, stress that it had and refractive index are arranged.5A figure is shown in 480 ℃ and comprise the rete that is deposited under the condition of hydrogen, has the compressive films ply stress of an approaching-3GPa.The 5B icon is painted on 480 ℃ and comprise H
2And under the condition of Ar, with the SiN rete of the high frequency power deposition of one 75 watts or 100 watts, stress that it had and refractive index.5B figure shows that the rete with one 75 watts of low frequency depositions gets the compression stress of one-3GPa.With the combination in this gas/pressure/gap, use 75 watts of power the suitableeest, obtain a rete with maximal pressure stress under compression.
As described above, the deposition that silicon nitride is done in having under the hydrogen, on the compression stress of the SiN rete that enhancement makes, can reach a gratifying degree.Yet, it is reported that hydrogen can spread dielectric material easily, and this hydrogen will reduce the reliability of element, especially in the electric crystal rank in case the district is partly led in infiltration.And when using heavily stressed rete as etch stop layer, this phenomenon will be more remarkable.
And according to the observation, hydrogen can be accumulated in nitride/element (NiSix) interface, and the hydrogen that this gathers also can cause the defective of object, for example bubbles or layering in ensuing fabrication steps.In one check of being done at layering position residue, find the existence of Zn and Na, belonged to typical metal pollutant.The chance of this object defective improves along with the compression stress degree, and is getting over the low temperature deposit when layer of nitride film, and this is also just obvious more.
According to a plurality of embodiment of the present invention, have three kinds of methods can be separately or merge and use, in order to when the layer of nitride film of high compression stress when hydrogen exists deposit to form, can avoid the generation of defective, and then the reliability of enhancement element.According to an embodiment, impose preceding (pre-deposition) plasma treatment of deposition by continuing surface to this high compression stress silicon nitride, can reduce defective.According to another embodiment, before this high compression stress silicon nitride layer of deposition, on the continuing surface of this nitride layer, form a resilient coating, and can reduce defective earlier.According to an embodiment more of the present invention, under no hydrogen, form a SiN rete in advance, there is the heavily stressed SiN rete that covers on the deposit one in hydrogen again, can reduce defective by this.These methods are now in discussing in regular turn down.
According to first embodiment that mentioned just now, in the presence of hydrogen and before the deposited silicon nitride, can use plasma pre-process (pre-treatment) step.Plasma treatment is with wafer surface cleaning before this deposition, and removal can make this surface have to allow that hydrogen penetrates the pollutant in leeway, similarly be remaining silane or metal pollutant, as Zn and Na.Be used for the plasma of this preposition treatment step can be by some different arround air constitute, comprise but be not limited to and contain N
2O, contain O
2, and contain NH
3Plasma, these plasmas have been successfully used to reduce the number of defects after the layer of nitride film annealing.This preposition processing can be applicable to SiN to be carried out in the identical or different deposition chamber of lodgment.This plasma treatment can be before carrying out ensuing deposition step just finishes, or also can continue and deepening to the SiN deposition step.For reaching certain demand effect, the special parameter of this plasma pre-process, similarly be duration, power, temperature and arround air, can change according to the application of each uniqueness.
According to second embodiment of the invention described above, form a resilient coating on the surface of high compression stress nitride being used to accept, defective is reduced and promote reliability.A kind of resilient coating like this comprises oxide on the typical case, will be positioned at nitride/NiSix interface afterwards.This oxide is as a resilient coating, and blocking-up hydrogen diffuses through the SiN depositional coating.The atom form hydrogen that arrives at the oxidation buffer thing is attempted combine with other hydrogen atoms forming the hydrogen of molecular conformation, but unsuccessful, and this is owing to Si-N, Si-H, reaches the bond intensity of N-H.Clearly, hydrogen is to spread by skipping another key from a Si-H or N-H key.For be shifted out and entered oxide skin(coating) by nitride layer, a Si-N key forms just the Si-O key must disconnect.This energy viewpoint that reacts on is by preference, so hydrogen will fall into and stay in nitride layer.After this manner, this oxide buffer layer serves as a face wall, prevents gas buildup at the Si/SiN interface, reduces the situation of bubbling and annealing the back layering.
The 33rd figure is the pollutant that high compression stress silicon nitride that comparison deposits above the oxide buffer layer of three kinds of different-thickness is had.The 33rd figure shows, even use extremely thin oxide buffer layer, area counting (post-anneal area count) for about 2adders (number of defects of unit wafer) or still less after the annealing that causes.
According to the 3rd embodiment of the invention described above, before introduction is used to form the hydrogen of high compression stress nitride, form an initiation layer earlier, number of defects is reduced, and promote reliability.As above-mentioned, the required high compression stress characteristic of nitride layer is to be derived to have hydrogen to exist between deposition process.According to this 3rd embodiment, the diffusion of hydrogen can reduce by carry out the starting stage deposition under no hydrogen, and makes the silicon nitride initiation layer of gained not have a high compression stress.In case initiation layer has formed, just hydrogen is introduced in the deposition mist, so that be positioned at the compression stress that the silicon nitride of top has desirability.
The electronics that the task of this initiation layer is avoided occurring in the plasma between the high compression stress deposition at protection component increases suddenly.Initiation layer thickness is done suitably to adjust, also can make it serve as a barrier of hydrogen diffusion.This initiation layer substantially forms a barrier, helps to get rid of the accumulation situation of hydrogen.
34A figure is presented under the initiation layer of different-thickness, and in the observed adder number that gets of a high compression stress silicon nitride layer, this layer is to form down at 400 ℃, and anneals 5 hours down at 400 ℃.34A figure shows the particle performance of using after thick more initiation layer can be promoted annealing.34A figure also demonstrates, when comparing with initiation layer with about 35 dusts (deposit 5 seconds) thickness, only at initiation layer thickness greater than about 90 dusts (depositing 12 seconds), the area after the annealing is counted and is just reduced to less than about 3adder.
34B figure is presented at the initiation layer top of same thickness (depositing 10 seconds), in 480 ℃ of particle performances of formed multiple thickness high compression stress rete down.34B figure shows 10 seconds formed initiation layers of a deposition, and it has improved the performance of rete particle, and forms the film that thickness reaches 1500 dusts at least.
34C figure is the mapping of the relative thicknesses of layers of stress in thin film of high compression stress rete, and this rete contains an initiation layer that has deposited 5 seconds or 10 seconds.34C illustrates when initial processing procedure was increased to 10 seconds by 5 seconds, and for having the rete greater than about 350 dust thickness, the variation of stress aspect is also little.
Though the aforementioned three kinds methods that promote the compression stress reliabilities have been done explanation respectively, these methods also can adopt various combinations and merge use.For example, the 35th figure marks and draws the particle counting of four kinds of different high compression stress silicon nitride films stacking (film stack), and these retes repeatedly after 480 ℃ of depositions, were annealed through 5 hours under 400 ℃ again.First and second retes wherein repeatedly comprise respectively the initiation layer through 5 seconds and 10 seconds depositions; Third and fourth rete contains initiation layer, and it is formed on the oxide skin(coating), and its sedimentation time as shown in the figure.
The 35th figure shows the particle performance that the thicker initiation layer of use obtains on " plating (as-deposited) just " rete.The 35th figure be presented at add below the initiation layer with an oxidation buffer layer (the tool thickness 30-50 of institute dust) rete is changed that the particle performance becomes is better.
The 36th icon is painted under the multiple different condition, the particle counting of formed high compression stress silicon nitride layer and area counting.The 36th figure shows with ammonia (NH
3) make plasma treatment before the deposition, for promoting the foaming resistance, be otherwise effective technique.Utilization oxidation buffer layer and initiation layer have also shown good result.
Aforementioned three embodiment of the present invention can integrate relevant subject under discussion with solving with other dielectric film layers, and rete similarly are low k dielectric medium and the high tensile stress silicon nitride that uses hydrogen or heavy hydrogen when deposition.According to other embodiments of the invention, heavy hydrogen also can be used for replacing hydrogen between deposition, to form the silicon nitride film layer of compression stress greater than 3GPa.
Deposition back NF
3Eat-back processing procedure
As above-mentioned, the silicon nitride dielectric film layer can be as a barrier or etch stop layer in many application.The inconsistency of the thicknesses of layers of wafer integral body (as the bottom surface to top thickness to abutment wall) can cause negative influence to promoting by the drive current of an element to another element.The isolated area of PECVD dielectric film layer and the corner place may be because of a high deposition rate impaired (for example: (bread-loafing) be got through in tunnel, the left and right sides) on multiple-grid.Adjusting the processing procedure parameter may be little for the effect of improving ladder covering (step coverage) or pattern load (pattem loading).
According to one embodiment of the invention, a NF
3Eat-back processing procedure and adjust the ladder covering and the pattern load of a PECVD nitride.The NF of dilution
3Plasma can be used to eat-back layer of nitride film after deposition, to adjust the distribution curve that ladder covers.This eat-backs processing procedure and causes a low rate of etch and a gratifying etching consistency.And this eat-back distribution curve can be similar to the deposition profile of a PECVD.Among one embodiment, this NF
3Eat-back processing procedure and be executed in the chamber identical, and can when deposition finishes, begin to carry out with deposition manufacture process.Otherwise this eat-backs processing procedure and can a deposition/etched order carry out.NF
3Process parameter can match and the etch profile curve can be adjusted to deposition profile through adjusting.
The 41st figure describes a deposition back NF
3Eat-back the result of processing procedure.Among the 41st figure, isolated area demonstrates a higher rate of etch.Moreover, the NF of a dilution
3Eat-backing is not influencing under the stress in thin film, has reduced about 30% bottom surface covering load.The method has potential ability on the ladder that is applied to adjust other PECVD dielectric film layers covers.
The 42nd figure is presented at NF
3After eat-backing silicon nitride layer (being denoted as M3), the improvement of distribution curve change and pattern load effect (PLE).M3 describes the distribution curve that (bread-loafing) got through in tunnel, the nitride left and right sides.Through NF
3After eat-backing processing procedure, the M3 distribution curve changes.NF after the M3 compressive nitride is carried out deposition
3After eat-backing, PLE improves.
II. high elongation material (Tensile Stressed Materials)
Under the prerequisite that is not subject to an explanation, have been found that will obtain a silicon nitride with higher tensile stress value is subjected to the stress material, but being used alone or in combination of mat multiple technologies, and clean hydrogen content or silicon-hydrogen and nitrogen-hydrogen bond content (distinctly representing Si-H and N-H key) in the reduction silicon nitride deposition material.Generally believe, reduce the hydrogen content of deposition material, make can detect in the silicon nitride material Si-H and N-H linkage content less, and the tensile stress values of deposition material is improved.Also, can be used to reach the hydrogen content that reduces the deposition material, just as described herein through finding have several different deposition manufacture process parameters, deposition material to handle or above-mentioned combination.
What all subjects under discussion were incorporated this paper reference into is published in the 137th phase the 2nd of electrochemical society periodical volume " by NH by people such as Smiths February nineteen ninety
3-SiH
4Plasma deposition SiN
xMechanism " (Mechanism of SiN
xDeposition from NH
3-SiH
4Plasma, Smith et al.,
J. Electrochem.Soc., Vol.137, No.2 (Feb.1990)).This piece article is the formation of a CVD SiN rete tensile stress, and owing to the multiviscosisty of the inferior rim surface zona (subsurface zone) of rete, and multiviscosisty is by to volatile ammonia (NH
3) eliminating of class.Clearly, the nitrogen base in the plasma can be extracted hydrogen out and discharge ammonia, stays the Si and the N key that are separately being dangled by the space.The Si-N key that is elongated then forms and can be recorded by the FT-IR check, and it is in 840cm
-1Occur one and characterize spike.The Si-N key of these elongations by arround material hold onto and can't relax and cause tensile stress.
There are many technology can be used for promoting tensile stress degree by derivation.The following detailed description in detail according to a kind of technology, by form the composite bed material under a plurality of deposition/processing (dep/treat) circulations in succession, can be promoted tensile stress.According to another embodiment, also can then be exposed in the radiation and harden, and promote tensile stress by carry out the material deposition at lower temperature.
Deposit a tension silicon nitride material, the process gas of introducing chamber can comprise: contain first composition of a silicon-containing gas, second composition that contains a nitrogenous gas, and the 3rd composition of a carbon containing, boron or phosphorus.For instance, silicon-containing gas can be silane, disilane, trimethyl silane (TMS), three (dimethylamino) silane (TDMAS), two (the 3rd-butyl amino) silane (BTBAS), dichlorosilane (DCS), and their combination.Except that above-mentioned gas, carbonaceous component can be ethene (C
2H
4), propylene (C
3H
6), toluene (C
7H
8), and their combination.Boracic and phosphorus containing components can be respectively diborane (B
2H
6), boron chloride (B
2Cl
4), and phosphine (PH
3).One suitable silane flow rate is for example for about 5 to about 100sccm.For example, nitrogenous gas can be ammonia, nitrogen and their combination.One suitable ammonia flow rate is for about 10 to about 200sccm.Process gas also can contain a diluent gas, and its volume that infeeds is more a lot of greatly than reacting gas composition.This diluent gas also can be used as a dilution, and simultaneously to small part as nitrogenous reacting gas, for example flow rate is about 5000 to about 30, the nitrogen of 000sccm.When deposition silicon oxynitride material, this process gas also can contain other gas in addition, as an oxygen-containing gas, similarly is oxygen.Unless special declaration is arranged, in these processing procedures, typical gas pressure is for about 3 to about 10 holders, and substrate temperature is about 300 to about 600 ℃, and electrode spacing is about 5 millimeters (200 mils) to about 12 millimeters (600 mil), and RF power degree is about 5 to about 100 watts.
A.
The circulation of nitrogen plasma treatment
Also through finding that the stress value that just plates the silicon nitride material can increase by the silicon nitride depositional coating being sentenced a nitrogen plasma treatment step (treat).A cycle of treatment like this can be modified as deposition manufacture process two fabrication steps and carry out.First or deposition manufacture process step (dep) in, process gas comprises: one first composition that contains silicon-containing gas and nitrogenous gas, and one second composition that comprises a diluent nitrogen, it is to be introduced into deposition chamber, and, just form a plasma by process gas via the voltage that the chamber electrode is imposed a high frequency or low frequency.Second or the nitrogen plasma cycle of treatment in, the first composition air-flow that contains silicon-containing gas and nitrogenous gas in the process gas is switched off or is stopped in fact, the second composition air-flow that contains diluent nitrogen then still continues opening, and is applied in electrode and also continues to keep to form isoionic high frequency or low-frequency voltage.Between silicon nitride material depositional stage, these two process cycle are repeated for several times.
Moreover, be not subject under the explanation, believe that generally the circulation of nitrogen plasma further reduces the hydrogen content of deposited silicon nitride.It is believed that the nitrogen plasma cycles through the silicon-hydrogen bond that removes the deposition material, and promote the formation of silicon-nitrogen key in the silicon nitride deposition material.But can only influence a thin surface district of silicon nitride deposition material because of the nitrogen plasma treatment, so a nitrogen cycle of treatment is promptly carried out after of short duration deposition manufacture process circulation, and in this of short duration deposition manufacture process circulation, have only the silicon nitride of a rete to be deposited on the substrate, and rete is thinned to and is enough to allow the nitrogen plasma treatment penetrate the whole thickness of depositional coating substantially.If the nitrogen plasma treatment is just carried out after fully at the nitrogenize film deposition of whole layer thickness, have only the deposition material in a thin surface district to be cut suitablely and handled.
Corrected deposition manufacture process comprises enough number of deposition cycles, then carries out plasma treatment again, to get required thicknesses of layers.For example, a deposition manufacture process deposits the tension silicon nitride material of a thickness 500 dusts, and this processing procedure comprises 20 process cycle, and each circulation comprises one first deposition cycle and the circulation of one second nitrogen plasma treatment.Each deposition cycle is carried out about 2 to about 10 seconds, and is typically about 5 seconds, and the circulation of each nitrogen plasma treatment carried out about 10 to about 30 seconds, and is typically 20 seconds.The thickness of tension silicon nitride material tool one 500 dusts of resultant deposition, and the tensile stress values of deposition material increases to 1.4GPa under the nitrogen plasma treatment.This compares with the tensile stress of just plating the silicon nitride material, is equivalent to improve 10 to 20%, and is as follows
Table IIShown in.
Table II
NPT=nitrogen plasma treatment
| Stretch film layers stress (GPa) | |||||
| |
400 |
430 |
450 |
480 |
500℃ |
| Baseline (single material) | 1.0 | 1.1 | 1.2 | 1.3 | 1.35 |
| Handled in NPT (1)-20 second | 1.3 | 1.35 | 1.44 | 1.44 | 1.43 |
| Handled in NPT (2)-10 second | 1.3 | 1.35 | 1.4 | 1.4 | 1.43 |
Table II shows the raising of the silicon nitride material of a deposition along with substrate temperature between depositional stage, has and does not have under the multiple nitrogen plasma treatment circulation, the lifting situation of its tensile stress.Baseline (single material) silicon nitride film layer is in a single deposition manufacture process circulation deposit, employed process conditions such as above-mentioned, and do not have a nitrogen plasma treatment circulation.The baseline rete shows that tensile stress increases to about 1.35GPa by 1GPa when substrate temperature is increased to 500 ℃ by 400.NPT (nitrogen plasma treatment) rete is then with multiple deposition and nitrogen plasma processing cyclic deposition, and wherein NPT (1) is equivalent to nitrogen plasma treatment circulation in 20 seconds, and NPT (2) is equivalent to nitrogen plasma treatment circulation in 10 seconds.By two NPT retes as can be seen, compare with the baseline rete, the nitrogen plasma treatment has promoted tensile stress, and tensile stress also improves with substrate temperature.
The 6th figure is presented under the different nitrogen plasma treatment process conditions, improves the high RF voltage power value that is applied to electrode 105 and 109, for the influence of the tensile stress values that deposits material.First processing procedure (A) comprises one 7 seconds depositional phase, plasma treatment stage of one 40 seconds then, and repeat 20 circulations.Second processing procedure (B) contains one 5 seconds depositional phase, plasma treatment stage of one 40 seconds then, and repeat 30 circulations.The 3rd processing procedure (C) contains deposition, and 40 seconds the plasma treatment of 4 seconds plasma stabilization sub stage, 5 seconds, and repeats 30 circulations.When firing frequency is set in the power that slightly surpasses 40 watts when spending, the first and the 3rd processing procedure has the highest tensile stress values and draws, and tensile stress values is descended toward both sides by the summit height.The 3rd processing procedure is along with power increases, and tensile stress values surpasses 1000MPa by omiting under 0 watts constantly, and drops to the 900MPa under 100 watts.So one 20 to 60 watts power degree, and be preferably 45 watts, be selected to nitrogen plasma/deposition manufacture process.
The 7th figure shows the tensile stress values and the refractive index of sedimentary deposit gained under different deposition manufacture process and the circulation of different nitrogen plasma treatment.Top curve indicates the tensile stress values that measures, and lower curve indicates the refractive index that measures.This processing procedure comprises: the processing procedure of tool deposition only; One have one 40 seconds scrubbing (purge) processing procedure, do not having under the RF power in order to observe, promptly only under the heat energy effect, the effect that is produced; One has one 20 seconds scrubbing then processing procedure of 20 seconds plasma step again; One has the processing procedure of one 40 seconds plasma step; One has one 20 seconds plasma step then processing procedure of 20 seconds scrubbing again; One has one 3 seconds quick scrubbing then processing procedure of 20 seconds plasma step again; One has the processing procedure of suction (pump) in one 3 seconds and 20 seconds plasma step; An and processing procedure with one 3 seconds quick scrubbing and 10 seconds plasma step.These retes form carrying out under a succession of 30 continuous circulation.
The highest tensile stress values occurs in suction in 3 seconds and adds 20 seconds plasmas and 3 seconds quick scrubbing, adds 10 seconds isoionic processing procedures.Minimum tensile stress values then measures in the processing procedure that deposition is only arranged and 10 seconds scrubbing processing procedures.In general, under the phase, the gained stress value reaches maximum and tends to balance in the plasma treatment above 10 seconds, but when having added the suction circulation time, the stress value that surpasses gained under 20 seconds processing phase just is not saturated.
As follows
Table IIIBe described in the exemplary process conditions of each step that shows among the 7th figure.
Table III
Institute carries out under 400 ℃ in steps, and the spacing of wafer counter plate is 430 mils
TFO=air throttle standard-sized sheet
| Step | SiH 4 (sccm) | NH 3 (sccm) | N 2(litre) | Pressure (holder) | Power (watt) | Duration (second) |
| Stable (stab) | 25 | 50 | 20 | 6 | 0 | 4 |
| Deposition (dep) | 25 | 50 | 20 | 6 | 45 | 5 |
| Suction (pump) | 0 | 0 | 0 | |
0 | 30 |
| Quick scrubbing | 0 | 0 | 20 | |
0 | 30 |
| Scrubbing (purge) | 0 | 0 | 20 | 6 | 0 | 5-40 |
| Handle (treat) | 0 | 0 | 20 | 6 | 45 | 20-40 |
The 8th figure shows N
2The plasma treatment phase is to the influence of the tensile stress values of deposition material.Tensile stress values will arrive the processing phase always and reach 10 seconds and just increase, and after this, tensile stress values seemingly is " saturated " and no longer increases.Refractive index then improves a little along with the processing time.
The 9th figure is presented under the processing procedure of one 3 seconds quick scrubbing of tool and suction in one 3 seconds, and the processing phase is to the influence of tensile stress values.Even and the processing time up to about 20 seconds, the tensile stress values of the 9th figure as the 8th figure as do not show " saturated shape ".
Through finding, in the nitrogen plasma treatment, add step and give execution, can make the tensile stress of gained rete obtain bigger enhancement.
Table IVSummarize multiple different N
2Plasma exposes the process sequence of circulation to the open air.
Table IV
| Process sequence | The step time (* period) (second) | Thickness (dust) | RI | Stress (MPa) | Output Shuangzi instrument (the wafer number/hour) |
| Dep (baseline) only | 134 | 500 | 1.847 | 1000 | 20 |
| Dep/Treat (DP) | 10/20(×5) | 525 | 1.874 | 1100 | 10 |
| Stab/Dep/ Treat (SDT) | 4/5/20(×25) | 580 | 1.892 | 1180 | 6 |
| Stab/Dep/ suction/scrubbing/Treat (SDPPuT) | 4/5/3/5/20 (×30) | 510 | 1.891 | 1230 | 4.5 |
The 10th figure marks and draws with a pair of seed cell instrument (twin chamber tool),
Table IVEach shown N
2Plasma exposes circulation to the open air down, and stress in thin film is to the graph of a relation of process yields.The 10th figure is presented in each circulation and adds the output that step then reduces processing procedure.
11B figure is presented at
Table IVThe multiple circulation of listing and under the time, in the FT-IR spectrum of the about 2800 dust CVD SiN retes of a thickness of 400 ℃ of deposit gained.11B figure shows N
2Processing is removed hydrogen by Si-H and N-H key, it is respectively at 2200cm
-1And 3330cm
-1Spike all reduce.N-H is through N
2Handling another performance that promptly reduces is the 1167cm that is reducing
-1Spike/shoulder district, it is equivalent to the Si-NH-Si key.When having the N-H key of a great deal of in the rete, 1167cm
-1It is comparatively remarkable that spike becomes.
Under not wishing, generally believe N by any particular theory restriction
2Handle to reduce the hydrogen content in the rete, and cause the formation of the Si-N key that elongates.After deposition, introduce other step (similarly being scrubbing or suction), owing to no longer include deposition gases in the chamber, so N
2Treatment Effects can be promoted.Otherwise, remaining SiH
4And NH
3Remain in during handling in the chamber, some depositions continue carrying out, and handle just can't diffuse into so well to deposit in the material.
The 11A icon is painted on
Table IVThe CVD SiN rete of the multiple circulation deposit gained of listing, its N-H: the ratio of Si-N key.11A figure is presented at N
2The circulation add-on step that plasma exposes to the open air can reduce the N-H amount and reach about 40%.
Table VBe listed in the stress result that heats down the formed CVD SiN of the Producer SE instrument of use rete.
Table V
| Circulation | Stretch film layers stress (GPa) | ||
| Temperature (℃) | 400 | 430 | 450 |
| Baseline | 1.0 | 1.1 | 1.2 |
| D/T | 1.1 | 1.2 | - |
| S/D/T | 1.2 | 1 | 1.44 |
| S/D/P/Pu/T | 1.3 | - | 1.4 |
Table VShow and use the stretching processing procedure mode of revising, can in one 450 ℃ of heat budgets (thermalbudget), form a CVD SiN rete of tool one 1.5Gpa tensile stress.
12A-D figure has confirmed this result, and it is marked and drawed under different process conditions, in a plurality of attributes of a CVD SiN rete of 450 ℃ of formation.12A figure is that stress in thin film is to NH
3The flow mapping shows the tensile stress that reaches a 1.5GPa.12B figure is that stress in thin film is to N
2The flow mapping shows with low N
2Flow rate reaches the tensile stress of a 1.5GPa.12C figure is that stress in thin film is to SiH
4And NH
3Total flow mapping, show that stress in thin film is not the force function that has of this process parameter.12D figure to being executed the mapping of RF power, shows the stretch film layers stress that reaches a 1.5GPa with low RF power by stress in thin film.
B. argon (plasma treatment)
As described above, a cvd film layer is exposed to a plasma that includes a nitrogenous gas, the tensile stress that can promote rete.According to another embodiment of the present invention, the stress of a cvd film layer also can utilize with rete between depositional stage or the deposition after be exposed to one contain the plasma of argon gas and obtain the enhancement.
13A-F figure is described in
Table VIUnder the condition of listing, the characteristic of a CVD SiN rete that forms via a deposition/processing (dep/treat) circulation.
Table VI
Pressure=8.5 holders
The spacing of wafer counter plate=300 mils
| Circulation step | SiH 4 (sccm) | NH 3 (sccm) | N 2(litre) | N 2+ Ar (litre) | RF power (watt) |
| Deposition (Dep) | 60 | 900 | 1 | -- | 100 |
| Handle (Treat) | 0 | 0 | -- | 20 | Indefinite |
13A-B figure is presented at during the deposit post-treatment, changes the influence that argon flow amount % is brought, and wherein deposits and handle all and carry out under 400 ℃.The hydrogen content ((H)) that is reduced in the tensile stress amount that 13A-B figure shows depositional coating and the gained rete has directly related.13A-B figure shows that also the increase of tensile stress is a function of argon content, and tensile stress reaches saturated at Ar content greater than about 25% place.
13C-D figure is presented at during the Ar processing of deposition back, changes the RF power degree of being used and the influence that brings, and wherein Ar accounts for 25% of air-flow, and deposits and handle and all carry out under 400 ℃.13C-D figure shows that the lifting of tensile stress is quite insensitive for the RF power degree of handling.
13E-F figure displays temperature changes the influence that depositional coating was brought of crossing for the plasma treatment that contains different amount argons.Definitely, the deposition/treatment cycle of 13E-F figure is to carry out under 550 ℃.13E-F figure has confirmed that the lifting of tensile stress of gained rete is directly relevant with the minimizing of hydrogen content in the rete.13E-F figure also illustrate when be deposited under the higher temperatures (as 550 ℃ in 400 ℃) carry out, handle processing procedure and just relatively and do not imitate.The hydrogen total content of the first coatings of 13E-F figure demonstration is low than the rete (13A-B figure) of 400 ℃ of deposit, causes during plasma treatment, and the reduction amount of hydrogen total content is less.
C.
UV-irradiation
Handle the deposition material with a suitable energy light beam (energy beam), as ultra-violet radiation or electron beam, then a tensile stress of just plating the silicon nitride material can further increase.It is believed that and use ultraviolet ray and electron beam irradiation can further reduce the hydrogen content that deposits in the material.The energy light beam irradiates can be carried out in CVD chamber itself or in another chamber.For example, a tool is subjected to the substrate of stress deposition material, can accept ultraviolet ray or electron beam radiation irradiation in the CVD process chamber.In a such embodiment, the injury of protecting the source (explosure source) of exposing to the sun to avoid the CVD reaction can utilize a guard shield or chamber is introduced in the source of just will exposing to the sun after following the processing procedure air-flow.The CVD between the stage of reaction that this ultraviolet ray or electron beam can be subjected to the stress material in a deposition in former CVD settling chamber, is applied to substrate.In this scheme, it is believed that and between deposition reaction, accept ultraviolet ray or electron beam irradiation, undesired key is disintegrated, so promote the stress value that is subjected to stress deposition material when forming.
The 18th figure shows the example embodiment of an exposure cell 200, and it can be used for making a substrate 32 to be exposed to ultra-violet radiation or electron beam is handled.Shown in the scheme, chamber 200 comprises a substrate support 104, it is removable in nearest one holding high between the position away from the off-position in the source 204 of exposing to the sun and from the source 204 of exposing to the sun, thereby adjusts interval between the two.Substrate support 104 is supporting substrate 32 in chamber 200.During exposure cell 200 is inserted or shifted out to substrate 32, substrate support 104 can be moved to a " loaded " position, afterwards, and during the substrate 32 that will have the deposited silicon nitride material is exposed to ultra-violet radiation or electron beam, then substrate support 104 is increased to and holds the position high, make irradiance reach maximum.Chamber 200 also comprises a heater 206, a resistive heating elements (resistiveheating element) for example, and it can be used for substrate 32 is heated to a demand temperature during substrate 32 exposes to the open air.One gas access 208 is arranged to introduces exposure cell's 200, one gas vents 210 with gas and then is used for making gas 200 to discharge from the exposure cell.
Exposure cell 200 also comprises the source 204 of exposing to the sun, and it provides a suitable energy light beam, as ultra-violet radiation or electron beam.One suitable UV source can be launched the ultraviolet ray of a single wavelength or the ultraviolet ray of a broadband (broadband) wavelength.One suitable single wavelength ultraviolet source comprises a quasi-molecule (excimer) ultraviolet source, and it provides single wavelength ultraviolet ray of one 172 nanometers or 222 nanometers.One suitable wideband light source produces about 200 ultra-violet radiations to about 400 nano wave lengths.Such ultraviolet source can derive from the U.S. and merge (Fusion) company or U.S. Nuo Desen (Nordson) company.Other wavelength ultra-violet radiations that also can be exposed to by the stress silicon nitride material to originate from irradiator, these irradiators contain when being subjected to electric power to stimulate the i.e. gas of radiation under special wavelength.For example, suitable UV-irradiation device can comprise Xe gas (xenon), and it produces the ultra-violet radiation of 172 nano wave lengths.In other schemes, irradiator can comprise other gases of different corresponding wavelength, produces radiation and KrCl in 243 nano wave lengths generation radiation, heavy hydrogen in 140 nano wave lengths as the mercury irradiator
2Then produce radiation in 222 nano wave lengths.In addition, in a scheme, the system of measuring especially produces ultra-violet radiation and is subjected to stress to deposit the stress value of material with correction, can reach by a mist is introduced irradiator, and wherein each gas can excite the radiation of radiation tool one specific wavelength down.Via the relative concentration that changes gas, can select wavelength kind by radiation source output, receiving the wavelength that all are wanted simultaneously, thereby allow required exposure time reduce to minimum.The wavelength of ultra-violet radiation and intensity can be through picks, to obtain predetermined tensile stress values in silicon nitride deposition material.
CVD settling chamber 80 (seeing the 30th figure) and exposure cell 200 also can be incorporated on the processing procedure platform (not with diagram) of a multi-cavity chamber, and the processing procedure platform has a machine single armed for use.Expose to the sun the strutting piece of source 204, exposure cell 200 and the assembly of CVD settling chamber 80 (comprise: substrate support 104, motor, valve or flow controller, gas delivery be system, air throttle, High frequency power supply, and heater 206, to also have processing procedure to integrate be the robotic arm of system), can be that the system controller is controlled suitable control line comprehensively all by one.Be that the system controller relies on the feedback of optical sensor and determines the position that moving machinery assembles, the moving machinery assembling is that the suitable motor of utilization moves under the controlling of controller as air throttle and substrate support 104.
In exposure cell 200, expose processing about described to the open air, be to insert in the exposure cell 200 through the substrate of the tool one silicon nitride material of other deposition manufacture process known to any deposition manufacture process as herein described or this skill person, and place it on the substrate support of loweing the position 104.Then substrate support 104 is increased to one and holds the position high, open the optics heater 206 in the strutting piece 104, and start the source 204 of exposing to the sun.During exposing to the open air, a gas similarly is helium, can be in the exposure cell 200 circulations everywhere, to promote the thermal conduction rate of 104 of substrate 32 and strutting pieces.Other gases also can be used.Behind the radiant exposure of length, the source 204 of exposing to the sun that starts is removed, and substrate support 104 is lowered to the off-position.To have the silicon nitride that was exposed to the sun then shifted out by exposure cell 200 by the substrate 32 of stress material.
The 19th figure is a block diagram, show ultraviolet radiation treatment for the influence in the tensile stress values of different process conditions deposit gained materials, and process conditions comprises-A: compression rete (45sccmSiH
4/ 600sccm NH
3/ 2000sccm He/30 watt HF/30 watt LF/2.5T/480 mil/430 ℃) and B: stretch film layers (75sccm SiH
4/ 1600sccm NH
3/ 5000sccm N
2/ 50 watts of HF/5 watt LF/6T/480 mils/430 ℃).And in 400 ℃ use down 5 minutes with 10 minutes two kinds of different broadband UV processing times.For all depositional coatings, ultra-violet radiation exposes to the open air has promoted tensile stress values, and the material with minimum tensile stress values promotes at most, that is material A and B.The tensile stress of A and B increases to pact-1300MPa by pact-1500MPa.Material C and D also increase.Therefore, treatment with ultraviolet light can increase the tensile stress values of deposition material.
Through determining, silicon nitride is deposited material is exposed to ultra-violet radiation or electron beam can reduce the hydrogen content of deposition material, and then promote the tensile stress values of material.It is believed that ultra-violet radiation exposes the chemical bond that undesired chemical bond is compared want to the open air and replaces.For example, the wavelength of the UV radiation that transmits in exposing to the open air can to interrupt undesired hydrogen bond, similarly be Si-H and the N-H key that absorbs this wavelength through pick.A Sheng Xia silicon atom and a nitrogen-atoms that can get form a bond then, form the Si-N key of wanting.For example, the 20th figure be presented at first plating state (just plate-representing) with continuous lines and after ultraviolet radiation treatment (handled rete-be represented by dotted lines) one be subjected to the stress silicon nitride material, one fourier transform infrared ray (FT-IR) spectrum (Fourier Transformed Infrared spetrum).Thus FT-IR spectrum as seen, after ultraviolet radiation treatment, N-H stretches spike and Si-H and stretches both sizes of spike and obviously diminish, and Si-N stretches the size of spike and becomes big.This has shown that the silicon nitride material of gained after treatment with ultraviolet light contains less N-H and Si-H key, and contains the Si-N key of an increment, and the Si-N key is kind to want the key that obtains for the tensile stress that improves the deposition material.
The silicon nitride that 21A to 21E figure demonstration is subjected to the UV-irradiation processing time during the difference just plates material, the improvement of its tensile stress values.Silicon nitride material among the 21A figure is in following process conditions deposit: 60sccm silane flow rate; 90sccm ammonia flow rate; 10,000sccm nitrogen flow rate; 6 holder process gas pressure; 100 watts electrode power degree; And the electrode spacing of 11 millimeters (430 mils).The silicon nitride depositional coating tensile stress that is measured at first plating state is about 700MPa.On X-axis, indicate 0 to 6 each point and be equivalent to 0 minute respectively (plating just), 10 minutes, 30 minutes, 45 minutes, 1 hour, 2 hours, and different treatment with ultraviolet light time such as 3 hours.The first plating silicon nitride material that is indicating tetrahedron (◆ handle 1) on the line is exposed to the sun in a broadband UV source, and the first plating silicon nitride material that is indicating square (■ handles 2) is then exposed to the sun in single wavelength UV source of one 172 nanometers.Through determining that when comparing with a single wavelength UV source, the broadband UV source provides the tensile stress that increases for the deposition material.
Generally speaking, increase when the treatment with ultraviolet light time, the tensile stress of first coatings is also increased to by original 700MPa and surpasses about 1.6GPa.The silicon nitride material of 21B and 21C figure is in the condition deposit identical with sample shown in the 21A figure, and except following difference: the sample of 21B figure uses silane, the ammonia of 600sccm flow rate and 150 watts the electrode power of 60sccm flow rate when deposition; The sample of 21C figure uses silane, the ammonia of 300sccm flow rate and 150 watts the electrode power of 60sccm flow rate when deposition.Among 21B and the 21C figure, just plate material only with a broadband ultraviolet radiation treatment, and also changed the processing time in 0 minute, but time interval difference is separated into 8 or 9 sections between 3 hours, just as diagram.Optimum is shown in 21C figure, and after about 3 hours UV-irradiation, the tensile stress of just plating the silicon nitride material increases to 1.8GPa by 800MPa, almost is 2 times of former tensile stress values.
Deposition material shown in the 21D figure is used 60sccm silane flow rate, 900sccm ammonia flow rate, 10 in when deposition, 000sccm nitrogen flow rate, 100 watts electrode power, 7 backing pressure power, and 11 millimeters electrode spacing.Line (a) is to handle with a Fusion H UV light source, and it provides the UV wavelength of about 200 to 400 nanometers, and line (b) is then handled with an Excimer UV light source, and it provides the UV wavelength of about 172 nanometers.Material is through after about 50 minutes UV-irradiation, and these two processing are increased to 1.8 and 1.4GPa with tensile stress by about 800MPa (at first plating silicon nitride) respectively.By the further optimization of UV irradiator is improved the luminous intensity that arrives at wafer, also can significantly reduce sclerosis (cure) time.21E figure sample uses 60sccm silane flow rate, 300sccm ammonia flow rate, 10 in when deposition, 000sccm nitrogen flow rate, 150 watts of electrode powers, 6 backing pressure power, and 11 millimeters spacings.The deposition material is handled with a Fusion H light source.As preceding, after the about 50 minutes processing of process, the tensile stress of just plating the silicon nitride material is increased to 1.6GPa by about 700MPa.
According to aforesaid method, the tensile stress of a CVD material can obtain to promote by post-depositional ultra-violet radiation irradiation.The carrier gas scale of construction during by change process parameter such as UV processing time and deposition promptly might reach the effect that strengthens this stress.
It has been determined that also the UV-irradiation effect can obtain to promote by " plating just " membranous layer ingredient is carried out optimization.Again through finding that tensile stress is adjusted to about 1: 1 along with the raising of hydrogen content in " plating just " rete and with Si-H/N-H key ratio and becomes big.Hydrogen total content in the rete can improve with the decline of UV pre-irradiation depositing temperature.Definitely, the temperature when reducing deposition can increase the tensile stress of dividing with a rete, and this rete will harden in the follow-up UV of acceptance radiation.
Table VIIIList two kinds of FT-I R spectroscopic datas that are exposed to the CVD silicon nitride film layer of deposition back UV radiation irradiation.Wherein a CVD layer of nitride film is in 400 ℃ of deposit, and second layer of nitride film is in 300 ℃ of deposit.
Table VIII
| The FT-IR spectroscopic data (being normalized to the FT-IR data of 300 dusts) of the depositional coating after the UV sclerosis | |||||||
| Depositing temperature | NH spike center (centimetre -1) | NH spike area | SiH spike center (centimetre -1) | SiH spike area | SiN spike center (centimetre -1) | |
|
| 400℃ | Plating just | 3355 | 0.033 | 2159 | 0.031 | 842 | 0.491 |
| Handled by UV | 3355 | 0.022 | 2170 | 0.024 | 836 | 0.497 | |
| Change % | -- | 33.8 | -- | 23.5 | -- | 1.1 | |
| ?300℃ | Plating just | 3359 | 0.042 | 2146 | 0.05 | 847 | 0.43 |
| Handled by UV | 3360 | 0.011 | 2171 | 0.01 | 833 | 0.5 | |
| Change % | -- | 73.8 | -- | 70.8 | -- | 17.0 | |
Table VIIIShow that execution UV in deposition back handles, and when increasing Si-N key network, has reduced the number of Si-H and N-H two keys.Be not subject under the certain illustrated,
Table VIIIMay point out, deposit at a lower temperature, make to admit of more film layer structure change during the UV cure step, and make the tensile stress of gained rete higher.
22A figure marks and draws a plurality of in the CVD of different temperatures deposit layer of nitride film, stress and rete degree of shrinkage after being subjected to the UV sclerosis.22A figure demonstrates stress and descends along with depositing temperature and increase.22A figure shows that also degree of shrinkage also descends along with depositing temperature and increases.22A schemes this and reduces the anti-relation that improves degree of shrinkage of depositing temperature, has met this saying that can be subjected to bigger structure modify at first at the rete of low temperature depositing.
The 22B icon is painted under the different temperatures, with the SiN rete that CVD forms, the spike area ratio of its hydrogen total content ([H]) and SiH/NH.22B figure is presented at than under the low deposition temperature, and the tensile stress of rete increases along with hydrogen content.
The 23rd figure marks and draws a CVD layer of nitride film at the FT-IR spectrum behind 400 ℃ of UV radiation irradiations later and again of plating at the beginning of 300 ℃.
Table I XList the composition of plating just and the CVD SiN rete after the UV sclerosis, it is to return to scattering spectrum art (Rutherford BackscatteringSpectrometry (RBS)) and hydrogen forward scattering spectrometry (Hydrogen-Forward Scattering (HFS)) decision with rutherford.
Table I X
| RBS/HFS | H(％) | N(％) | Si(％) | Si/ |
| First coatings | ||||
| 25 | 43 | 32 | 0.74 | |
| UV handles rete later | 16.5 | 48.5 | 35 | 0.73 |
The 23rd figure reaches
Table I XShow that a lower depositing temperature makes more SiN key form in UV sclerosis back, and then make the stress in thin film that hardened higher.
N
2Processing and UV handle the both and lay a foundation in identical principle.Exactly, interrupt Si-H and N-H key and by removing hydrogen in the rete.Removed hydrogen, stayed the Si and the N key that are dangling in the rete, new Si-N key has been formed and hold.And can't be added to alleviate strain in certain position by network lock because of Si and N atom, so the Si-N key of these new formation then is stretched.
Yet, N
2Treatment technology is subject to diffusion depth and those N base/energy of ions of N base/ion.May be harmful to and improve energy,, reduce tensile stress because N can become in the implanted rete.
In comparison, UV treatment technology tool one group effect then.Whole rete can be handled immediately, and processing procedure is more effective, and can interrupt more key.And because use a radiation to be low to moderate the broadband UV light source of 200 nano wave lengths, this UV energy also just helps making the key that is dangling to form the Si-N key that is subjected to stretching (strain).Exactly, at all rete shapings, retaining some keys that dangle.These keys that dangle have the effect that makes the electrical variation of rete.These bond energys that dangle are enough remaining under subsequent treatment, if especially the Si distance that key and a N dangle between the key that dangles is too far away.The UV treatment technology provides necessary excitation energy, makes the bond energy that dangles of two kinds of kenels (Si and N) enough form the Si-N key of a demand.
As above discuss, UV handle be used for promoting the nitride layer tensile stress technology one.UV sclerosis usefulness has directly related property with the optical characteristics and the substrate pattern of silicon nitride layer.
What promote that UV sclerosis usefulness can promote heavily stressed layer of nitride film answers dynamics and the property made.Fresnel shown in 37A figure (Fresnel) principle if the crack is the ad eundem size with the UV optical wavelength between describing between grid and the grid, then will produce diffraction, and make some zones pass through processing, as the abutment wall and the base angle of polysilicon gate.37B figure shows the photo once the zone of shining, and dark wave band is arranged against the edge, then light again and dark wave band.37B figure has shown a large amount of darker regions near bottom and abutment wall, this has met the Fresnel principle.
Cut and design the incident of handling UV light and the profile of element abutment wall suitablely, avoiding the Fresnel effect, and utilize the advantage of brewster angle degree opinion (Brewster angle theory), just can promote the UV usefulness of hardening.According to this principle, under a critical angle that refractive index calculated by vacuum and nitride (critical angle), light absorption is ideal.To some SiN
xRete, this angle are as calculated between 63 and 66 degree.38A figure describes this principle via geometrical orientation and the p-and the s-composition of definition polarization (polarization).38B figure shows the reflectivity of each composition (p and s) and the functional relation of incident angle, and the p-composition shows a minimum value at the brewster angle degree.Under this brewster angle degree, so because do not have diffraction phenomenon trap to reach maximum.
According to embodiments of the invention, two kinds of methods can be used to utilize the advantage of brewster angle degree opinion, and guarantee that UV light is to rete diverse location uniformity of treatment.According to one first embodiment, substrate can move with respect to the UV light source, to guarantee light incident with multiple angles, comprises the brewster angle degree.According to another embodiment, can form the characteristic portion of promotion on the substrate, and tool thereby makes luminous energy with the incident of brewster angle degree less than the abutment walls of 90 degree, to diffuse to substrate surface.
As mentioned above, the absorption maximum degree occur in when rete vertical plane and UV incident direction between 63 and 66 degree.For code-pattern (blanket) wafer or be covered with large-area characteristic portion, rete has only a kind of location with respect to wafer surface, therefore becomes a fixed angle with incident light.So according to one embodiment of the invention, utilize and rotating light source around optical axis or on a semicircle above the wafer, or with respect to light source and rotational substrate can be revised the UV incident direction by this.This rotation has guaranteed that each part of silicon nitride film layer is all exposed to the sun in the UV light with the angle incident of 63-66 degree on the wafer.
According to another embodiment of the present invention, the modified elements structure makes it become an angle less than 90 degree with wafer surface, can strengthen the absorption of layer of nitride film to UV by this.On the wafer of casting mold (patterned), rete is following element profile and UV projection and rete vertical plane folder to establish the angle that 0 to 180 degree changes.When characteristic portion has formed the angles less than 90 degree, the possibility that satisfies brewster angle scale standard just improved, and this makes that the UV trap obtains to promote, and causes tensile stress directly to strengthen.
The embodiment that embodiment that the UV light source rotates and element angle design are controlled also can use together, to promote the usefulness of UV sclerosis.These two embodiment also can be used for promoting the character of other retes after the UV sclerosis, similarly are low k dielectric medium.
Other embodiment again according to the present invention add pore former and can promote UV sclerosis usefulness.The UV hardening effect is with the hardening potential of UV irradiator usefulness and depositional coating directly related property to be arranged.Hardening potential is relevant with the variation of film layer structure in hardening.Eliminating and amorphous that structural change comprises hydrogen are the reconstructions of nitride network.These structural changes cause the change that matches of membranous layer property successively, i.e. residual stress in thin-film refractive index and density raising, rete contraction and the rete becomes and more strains at.Make the tensile stress after the sclerosis reach maximum, need be in keeping rete between SiH and NH under the balance of content, the hydrogen content in the rete is increased to maximum.Hydrogen content in the layer of nitride film is an important function of depositing temperature, and is confined to about 30%.
According to one embodiment of the invention, the multiple unstable temperature molecule is introduced can be formed a silicon nitride film layer in the sedimentation chemistry, to promote its hardening potential.This unstable temperature molecule is generally large scale, and between deposition, sneaks in the rete and unlikely fracture.
After the deposition, can use UV to handle or carry out plasma treatment in the original place and this molecule is removed.During post-depositional sclerosis processing procedure, originally will be closed to the occupied space of unstable temperature molecule in the rete by this, and in rete, obtain the Si-N key that is stretched, and improve tensile stress.This can comprise the unstable temperature molecule but not be subject to as follows
Table XListed person.
Table X
To unstable temperature molecule (pore former)
| Title | Chemical formula |
| α terpinenes (alpha-terpinene) | C 10H 10 |
| Toluene (toluene) | C 7H 8 |
| Ning alkene (limonene) | C 10H 16 |
| Pyrans (pyran) | C 6H 10O 2 |
| Vinyl acetate (vinyl acetate) | C 4H 6O 2 |
| Cyclopentene (cyclo-penetene) | C 8H 14 |
| 1 methyl cyclopentene (1 methyl cyclo-pentene) | C 6H 10 |
| 5 vinyl, two ring alkene in heptan 2 (5 vinyl bicyclo hept-2-ene) | C 9H 12 |
| Cyclopentene oxide (cyclo-pentene oxide) | C 5H 8O |
III. cause the separation material of strain
According to further embodiment of this invention, an integrated scheme is proposed, cause the nitride layer STRESS VARIATION by spike anneal (spikeannealing) processing procedure, get this advantage and help the performance of further promoting a NMOS element.39A-M figure describes this simplification profile of integrating fabrication steps.
Shown in 39A figure, the starting point that processing procedure is integrated is a CMOS preamble structure 3900, and it comprises PMOS district 3902, and it separates by the nmos area 3904 of shallow trench isolation (STI) structure 3906 with adjacency.Gate oxide layers 3908 and be positioned at the top gate polysilicon layer 3910 be formed on the CMOS preamble structure 3900 with a laminated shape.
39B figure shows that the pattern of photoresistance shade (photoresist mask) 3912 forms, and to define (gap) 3912a at interval, it is laminated that it exposes gate polysilicon/oxide in NMOS grid position.39C figure is depicted in the preposition processing procedure of noncrystallineization of carrying out on the polysilicon of irradiated region.Two kinds of possibility methods that so are prepended to noncrystallineization contain (1) and germanium are implanted the NMOS polysilicon gate or (2) form recess at the NMOS polysilicon gate, then carry out selectivity SiGe deposition again.For this second kind of option, available monoxide shade is to determine the result.
39D figure shows with standard fabrication steps formation PMOS and indivedual grids 3903 of NMOS electric crystal structure and 3905 achievement.This conventional process comprises uses discardable (sacrifice) separation material to implant in source/drain, and then annular is implanted (Halo implants).
The load of tensile stress has been promoted the rate of current of whole NMOS channel region.On the contrary, the burden of compression stress is then promoted the speed that hole moves in the PMOS channel region.In view of the above, it is preceding that 39E figure is presented at rapid thermal treatment processing procedure (RTP), and tension nitride layer 3930 is deposited on PMOS and the NMOS grid 3903,3905.
Removing of the tension nitride layer 3930 of 39F-G figure demonstration 3902 tops, PMOS district.Shown in 39F figure, a shade 3931 at first by casting mold to expose the SiN that is positioned at 3902 tops, PMOS district.Among the 39G figure, the SiN that exposes utilizes shade 3931 and through selective etch, promptly is removed after shade 3931 usefulness.
39H figure shows the achievement of a RTP spike anneal step, and its stress that will cover uniform layer of nitride film is increased to about 2GPa by＜1GPa.This RTP spike anneal creates a structure 3932 that causes stress in polysilicon gate.Say that alternately the annealing form desirable during this step is used for the dynamic surface annealing of dopant activation.These method for annealing or other any method for annealing also can be used for the polysilicon of crystallization NMOS grid again, improve nitride stress thus to 2.0GPa.Rete adds the performance that negative tensile stress can be used for promoting the NMOS element thus.
The composition of silicon nitride layer can be through optimization, to obtain the SiN rete of high tensile stress behind RTP.The 40th figure is that the different deposition SiN retes of forming are marked and drawed stresss in thin film to the happen suddenly graph of a relation of temperature (RTP temperature spike) of RTP.The 40th figure shows the reaction of PECVD layer of nitride film to RTP, forms the relation of (Si-H/N-H) and hydrogen total content with respect to rete.The stress of SiN rete behind RTP is 2GPa (stretching), and via further with the sedimentation chemistry optimization, this stress value has the possibility that improves again.
Next of 39I-L figure demonstration integration flow process is the row steps, and wherein the nitride separation material is in connection with the laminated formation of gate oxide/polysilicon, with complete formation grid structure.In particular, among the 39I figure, the nitride layer 3934 of neutral (neutral) or tool compression stress forms in the total top.Shown in 39J-K figure, carving (lithography) and etching are used to nitride layer 3934 is removed from nmos area 3904.
39L figure describes the separation material structure 3950 of NMOS and PMOS element and 3952 formation, and it is to form by distinguishing etching tensile stress SiN layer 3930 and neutral (neutral)/compression SiN layer 3934.
At last, 39M figure shows two (dual) stressor layers integration.Carry out annular earlier and implant, and contact, for example form NiSix, form nitride etch stop layer (ESL) then.Above the NMOS element, produce the SiN ESL (silicon nitride etch stop layer) 3936 of a tool tensile stress.Above the PMOS element, produce the SiN ESL 3938 of a tool compression stress.
In case deposition is finished, the silicon nitride etch stop layer can be treated to promote its tensile stress.For example this etch stop layer through deposition can be accepted plasma treatment in the original place.Replace or connecting plasma treatment, this can accept UV sclerosis, to adjust the suffered radiation of rete at tool or not under the tool one cover layer (capping layer) through etch stop layer of deposition.The example of such cover layer has the material of different extinction coefficients (extinction coefficient) including but not limited to non-crystalline carbon, nitrogen oxide or other with heavily stressed nitride layer.
Integrated structure shown in the 39A-L figure is to get the advantage of tensile stress of multiple separate sources to promote element function.At first, use the tensile stress of nitride clearance layer.And second kind of stress source is to be caused in polysilicon gate by the RTP step.The third stress source is then from the nitride etch stop layer that is formed at the grid top.
IV. the even film layer spreadability of Zeng Jining
The description of top focuses on the enhancement stress in thin film.Yet, relevant with the 1st figure reach as mentioned above shown in, a rete desires to apply strain on a silicon crystal lattice another key property is to be even spreadability.According to embodiments of the invention, it allows in low-pressure and carries out down deposition and handle, thereby has removed at film deposition and independent and scrubbing step consuming time between handling, and the even spreadability of a cvd film layer is promoted.
So far described substrate manufacture technology is to be executed under about 1 holder or the bigger pressure.Yet as implied above and described, one has in the process cycle of CVD of controlled characteristic rete, can comprise the deposition and the processing of follow-up different condition.
Operate down in about 1 holder or above pressure when deposition chamber, so change condition may need suction or scrubbing step usually, to reach optimum.Yet, with
Table IVReach as implied above and described that the 10th figure is correlated with, a such a suction/scrubbing step of therefrom inserting can be consumed a large amount of processing procedure time, substantially reduces output.
In view of the above, embodiments of the invention also relevant for than (as between about 20-150 millitorr) under the low pressure with the method and the device of chemical vapour deposition technique depositional coating.Keep chamber required pump step of carrying out in this low pressure range,, guarantee to such an extent that cause an of short duration residence time (residence time), thereby removed the needs of an independent suction and scrubbing step from for the gas that is used to deposit and handle.
Also through finding, the CVD processing procedure under the low pressure, and got rid of the separate gas suction/scrubbing step of therefrom inserting in the processing procedure simultaneously, fully having reduced the processing procedure time and output is increased to is enough to make making highly evenly to cover the SiN rete in viable commercial.Particularly, this CVD SiN rete that highly evenly covers is to form with repetitive cycling, and wherein an initial step comprises the silicon lead under the no plasma, and it causes the deposition of amorphous silicon (a-Si) layer that highly evenly covers.Connect a treatment step behind this deposition step, wherein evenly cover-the Si rete is exposed to a nitrogenous plasma.This circulating production method is to be commericially feasible, and it has got rid of the needs that therefrom insert separate gas suction and scrubbing step between the subsequent deposition and treatment step of circulation.
According to one embodiment of the invention, a SiN layer that evenly covers can under low pressure utilize a circulating deposition manufacture process and form, silane dipping (soak) deposition step in no plasma under wherein, after follow with one by N
2The processing that the plasma that forms as nitrogenous class is done.In certain embodiments, plasma also can comprise argon, and it can bombard depositional coating or help and make N
2Cracking, thereby the N-H content of reduction depositional coating, and form dense SiN key.
According to another embodiment of the present invention, a SiN layer that evenly covers can utilize the circulating deposition manufacture process under the low pressure to form, a silane dipping processing procedure in no plasma under wherein, after follow with one by N
2And NH
3Deal with as the formed plasma of nitrogenous class.
The 24th figure shows a FT-IR spectrum of CVD SiN rete, and rete is with one 20 seconds silane dipping, after connect the processing that exposed to the open air through one 10 seconds with a plasma and form, and plasma is by N
2+ Ar or by N
2+ NH
3And form.The 24th figure shows that having argon gas during the processing can make N-H content reduce, and forms dense SiN key.
In another experiment, this SiN processing procedure form is with tool or tool one SiH not
4Scrubbing step behind the dipping is carried out.Through finding, remove the SiH that carries out at low temperatures
4Dipping back scrubbing step, the thickness did not influence of the SiN layer that each circulation is formed.In particular, SiH has been disturbed in low pressure and effective suction effectively
4Impregnation steps.
Also through finding, with NH
3/ N
2Plasma is compared, with N
2/ Ar plasma is handled, and has promoted the SiN material thickness that each circulation deposited.Exactly, with N
2/ Ar plasma is handled, and obtains the material thickness that each circulation deposited of an about 3-5 dust, and with NH
3/ N
2Plasma is handled, and then gets the material thickness that each circulation deposited of an about 2-5 dust.
25A and 25B figure show pattern (topographic) the feature electron micrograph of dense arrangement, and this feature has the SiN cvd film layer that forms down in 350 ℃ of chip temperatures, and uses N respectively
2+ NH
3And N
2+ Ar plasma treatment.25A figure is compared with 25B figure, be presented at that the existence of Ar has improved N in the treatment step
2Cracking and promoted the rete form and ladder covers.
25C figure shows an electron micrograph of the shape characteristic of dense arrangement, and this feature has in 430 ℃ of higher chip temperatures and by N
2The formed SiN cvd film layer of+Ar plasma.25C figure is compared with 25B figure, show and improve the ladder covering that temperature has been promoted the gained rete.
25D figure shows an electron micrograph of more not intensive pattern, and it has under 430 ℃ of chip temperatures, by N
2The CVD SiN rete that+Ar plasma forms.With 25D figure and 25C figure relatively, show that this depositional mode also promoted pattern load effect (Pattern Loading Effect (PLE)).
Be not entangled under any certain principles N
2Handle to reduce the hydrogen content in the rete, the formation of the Si-N key that causes being stretched.Via after deposition, introducing more multistep rapid (for example scrubbing and/or suction), there is in the chamber N owing to no longer include deposition gases
2Treatment Effects is also just promoted.Work as SiH
4And NH
3In the time of in the still residual chamber, the deposition during the processing is also still proceeded, and the processing of being done during the step of this attempt deposition also can be spread the already material of deposition.
26A-B figure is the section micrograph that amplifies, and shows the top of a high characteristic portion that rises, and its tool one SiN layer is through a SiH
4Dipping, and follow-up respectively with N
2/ Ar and N
2/ NH
3Plasma treatment and forming.Relatively 26A-B figure shows and sentences N
2/ NH
3Isoionic nitride layer is compared to being exposed to N
2The isoionic rete of/Ar has the granular rete form of a cylinder.
The visual SiH of the speciality of gained rete
4The immersion deposition step is also decided by the follow-up processing of being done with a nitrogenous plasma.For example, SiH
4Exposure during the impregnation steps (exposure dose) can influence the form quality of gained depositional coating.Xia Fang argumentation for the benefit of, exposure defines with following formula (I):
(I) D=T * PP; Wherein
The D=exposure;
The T=exposure time; And
PP=SiH
4Dividing potential drop
The saturated thicknesses of layers of each dep/treat circulation is to look the SiH that reaches the surface
4Inbound traffics and SiH
4The adsorption rate of going by this surface is decided.And SiH
4Inbound traffics are decided on exposure, SiH
4Go then apparent temperature and deciding of adsorption rate.In view of the above, the 27th figure is that the material deposition rate is mapped to exposure.The deposition rate that shows the 27th figure improves along with temperature and descends.
28A figure is that deposition rate is mapped to exposure.28B figure shows a micro-profile, and it shows a characteristic portion, and it has at a 500mT
*The SiH of s
4The one deck that is deposited behind the exposure.28B figure shows that the ladder with the silicon nitride film layer that process conditions was deposited that is equivalent to the 4th group of data point of 28A figure covers achievement.
29A-H figure is the electron microscopic profile, show the form of depositional coating, and the deposition of rete is to use a SiH
4The immersion deposition step is then passed through again
Table X IExposed to the sun under the multiple condition of listing and handled in a nitrogenous plasma.
Table X I
| # figure | Whether is scrubbing? | Temperature (℃) | Handle plasma | The relative form of |
| 29A | Not | 400 | NH 3 | Cylindric |
| 29B | N 2+Ar | The | ||
| 29C | ||||
| 500 | NH 3 | Cylindric | ||
| 29D | N 2+Ar | The homogeneous shape | ||
| 29E | Be | 400 | NH 3 | Cylindric |
| 29F | N 2+Ar | The | ||
| 29G | ||||
| 500 | NH 3 | Cylindric | ||
| 29H | N 2+Ar | The homogeneous shape |
29A-H figure focuses on the temperature between processing and adds Ar to the form of gained depositional coating and the effect of ladder covering.These figure show that high temperature promotes that ladder covers and the rete form both.Especially on ladder covers, the abutment wall of characteristic portion when top ratio (side wall-to-top (S/T)) 30% during by 400 ℃ increase to 500 ℃ 60%.The rete form then by column/granular improvement to fine and close homogeneous rete.
Be not entangled under any theory, will be with NH
3Handle (on the typical case with N
2Dilute) and with N
2+ Ar handles and does one relatively, because N has been promoted in the adding of Ar
2Cracking, and improved plasma density, thus the latter of two processing be belong to comparatively useful.It provides more N base and ion, and with previous SiH
4Dipping (soak) both had been stored in lip-deep SiH
4Reaction.
Also through finding, be exposed to the deposition rate that a plasma (comprising argon gas) can be promoted a rete that forms according to the embodiment of the invention in fact.
For example, the aforementioned processing procedure mode that focuses on so far, wherein SiN contains SiH by one
4And NH
3Both plasma depositions and getting, this is in the present invention and inessential.According to alternative embodiment of the present invention, when material in no plasma deposit, NH
3: SiH
4Than can be zero.In embodiment so, an amorphous silicon layer (a-Si) is at first under low pressure by SiH
4Deposition.Then, this amorphous silicon layer is sentenced a nitrogenous plasma, wherein also may contain argon and helium, to form SiN.
The usefulness of deposition manufacture process partly is subject to the surface coverage of first lead.Silicon source lead must all carry out chemical method absorption with 100% surface coverage on both at initial surface and the new surface that forms.Yet known nitrogenous lead suppresses silane (SiH from the teeth outwards
4) suction-operated, it can make deposition rate descend with period.
Keeping constant speed deposition at whole deposition manufacture process is important for the controlling diaphragm layer thickness.Use a surface active processing procedure, it removes unreacted lead and promotes SiH
4Chemisorbed on the SiNx surface then can be reached a fixing in fact deposition rate.This surface active processing procedure can use an argon (Ar) cleanup step and realize.The effect of Ar base be will with absorption unnecessary from the teeth outwards lead spatter from.
According to embodiments of the invention, Ar introduced in the chamber and in order to stablizing processing procedure, or wear after stable and pass through the pipeline that changes its course.Excite Ar, be to use an electric capacity plasma (capacitive plasma) release in the chamber, or use a distant place plasma apparatus (Remote Plasma Unit (RPS)).The parameter that plasma power, gas flow and clearance time restore for the influence surface.
The 14th figure is presented at and contains and do not contain an Ar plasma cleanup step after handling, its thicknesses of layers difference that mapping is produced to period in the mode.When no Ar plasma cleaning, through 120 circulations, deposition rate reduces by 10 times.When using the Ar cleaning, reach the fixedly deposition rate of 0.5 milliliter of every approximately circulation.One in handling the rete that the similar notion of clearing up the back also can be used for forming other types, for example other dielectric barrier retes.
The 15th figure is plotted on the below
Table VIIUnder the specified conditions of listing, SiN thicknesses of layers and deposition-dipping (SiH
4)/handle (NH
3) graph of a relation of period:
Table VII
| Process parameter | Circulation step | ||||
| Step | SiH 4Dipping | Scrubbing | NH 3Stable | NH 3Plasma | Scrubbing |
| The step time (second) | 20 | 10 | 10 | 10 | 10 |
| Pressure (holder) | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 |
| HF RF power (watt) | 0 | 0 | 0 | 400 | 0 |
| Heter temperature (℃) | 400 | 400 | 400 | 400 | 400 |
| Raised position (rank) | 450 | 450 | 450 | 450 | 450 |
| SiH 4Flow (sccm) | 230 | 0 | 0 | 0 | 0 |
| NH 3Flow (sccm) | 0 | 0 | 100 | 100 | 0 |
| N 2Flow (sccm) | 2000 | 2000 | 2000 | 2000 | 2000 |
The 15th figure point out deposition rate along with the time by 8 dusts/every cycle down to less than 1 dust/every circulation.The decline of this deposition rate may be because NH
3And NH
3Prolong biological after each deposition/treatment cycle due to the film surface accumulation.In view of the above, rebuild and prepare the surface, in the depositional phase of next one circulation, to absorb SiH in a last available cleanup step of each circulation
4
The 16th figure marks and draws utilization
Table VIIDescribed circulating deposition manufacture process mode and the thickness of the SiN rete that deposits, wherein the surface is being exposed under the different conditions between the deposition/treatment cycle that continues.The 16th figure shows that be exposed to an argon plasma is to be method for cleaning between the circulation of tool effect.
The 17th figure marks and draws utilization
Table VIIDescribed circulating deposition manufacture process mode and the thickness of the SiN rete that deposits, wherein the surface is being exposed under the different conditions between deposition/treatment cycle in succession.The 17th figure shows to reduce provides generation Ar to clear up isoionic power, can make that deposition rate is better.
V. the embodiment of basal plate making process chamber
One embodiment who is used to deposit the basal plate making process chamber 80 that is subjected to the stress material is described in the 30th figure with diagram.When an example chamber is used to describe when of the present invention, other this skill person shows the chamber of knowing and also can be used.In view of the above, scope of the present invention is when other assemblies that are not limited to the exemplary embodiment of chamber or propose herein.In general, chamber 80 is a chemical vapour deposition (CVD) with plasma strengthening (PE-CVD) chambers, is suitable for a substrate 32 as a silicon wafer, is processed.For example, a suitable chamber is a Producer SE die cavity chamber of drawing (Santa Clara) Applied Materials (Applied Materials) to make by California (California) holy big carat.Chamber 80 comprises enclosure wall 84, and it contains a ceiling 88, abutment wall 92, reaches an end wall 96, and enclosure wall 84 is to cross a processing procedure district 100.Chamber 80 also can comprise a back boxing (not shown), its at least lining be processing procedure district 100 some of enclosure wall 84 everywhere.When one 300 millimeters silicon wafers are added man-hour, have one about 20,000 on chamber 80 typical cases to about 30,000 cubic centimeters volume, more typical is about 24,000 cubic centimeters.
During a process cycle, reduce substrate support 104, and a substrate 32 is to carry 106 by a substrate, as a robotic arm, and by an inlet port 110 and be placed on the strutting piece 104.Substrate support 104 can be used to load or the lower position and of removal is used for being moved between the higher position adjustable of substrate processing 32 one.Substrate support 104 can contain the electrode 105 of a built-in, and makes the process gas of introducing chamber 80 produce a plasma.Substrate support 104 can be heated by heater 107, and heater 107 can be a resistive heating elements (not shown), a heating irradiator (not shown) or a plasma itself.Comprise a ceramic structure on substrate support 104 typical cases, its tool one continuing surface to be accepting substrate 32, and its guard electrode 105 and heater 107 are avoided the influence of cavity environment.Between the operating period, electrode 105 is imposed a radio frequency (RF) voltage, and heater 107 is imposed a direct current (DC) voltage.Electrode 105 in the substrate support 104 also is used for static substrate 32 pincers bundles in strutting piece 104.Substrate support 104 also can comprise one or more ring (not shown)s, a periphery of its 104 upper substrates 32 to small part round strutting piece.
After being loaded into a substrate 32 on the strutting piece 104, strutting piece 104 is increased to one than the Working position near gas distributor 108, so that a demand spacing distance d to be provided betwixt
sSpacing distance d
sCan be by about 2 millimeters to about 12 millimeters.Gas distributor 108 is positioned at 100 tops, processing procedure district, and a process gas is interspersed among whole base plate 32 equably.Gas distributor 108 can transmit two kinds of indivedual air-flows of first and second process gas respectively to processing procedure district 100, and air-flow is mixed, or can to deposition chamber 100, just in advance process gas be mixed at supply premix process gas.Gas distributor 108 comprises a panel 111, panel 111 tool holes 112 and process gas is therefrom passed through.Panel 111 typical cases go up to metallic, and voltage or electrical potential energy are applied to now, thereby as the electrode in the chamber 80.One suitable panel 111 can be aluminum and is covered with an anodization layer.Basal plate making process chamber 80 also comprises first and second gas and supplies with 124a, 124b, to transmit first and second process gas to gas distributor 108, gas is supplied with 124a, 124b and is respectively comprised a source of the gas 128a, 128b, one or more wireway 132a, 132b and one or more air valve 144a, 144b.For example, in a scheme, first gas is supplied with 124a and is comprised one first wireway 132a and one first air valve 144a so that one first process gas is delivered to one first inlet 110a of gas distributor 108 by source of the gas 128a, and second gas is supplied with 124b and comprised one second wireway 132b and one second air valve 144b one second process gas is delivered to one second inlet 110b of gas distributor 108 by source of the gas 128b.
By process gas being excited, for example, process gas high frequency voltage energy is provided and makes process gas form a plasma in conjunction with electromagnetic energy.Excite first process gas, execute a voltage in down between the two: (i) electrode in the strutting piece 104 105 and (ii) one second electrode 109, it can be gas distributor 108, ceiling 88 or chamber abutment wall 92.Bestow and the voltage by bipolar electrode 105 and 109 to be condenser type ground be coupled to process gas in the processing procedure district 100 with energy.On the typical case, the voltage that imposes on electrode 105 and 109 is to be in a radio frequency.Generally speaking, the scope that contains of radio frequency is about 3kHz about 300GHz extremely.At the application's purpose, low radio frequency is less than about 1MHz, and is from about 100KHz to 1MHz than preference, for example the frequency of an about 300kHz.In addition also at the application's purpose, firing frequency is about 3MHz about 60MHz extremely, and is about 13.56MHz than preference.To impose on first electrode 105 to about 1000 watts power degree with one by about 10 watts through the radio-frequency voltage of pick, and be ground connection on second electrode, 109 typical cases.Yet the power degree of the radio-frequency region of specific use and applied voltage is to become with the type class that is subjected to the stress material that deposits.
One controller 196 also is being equipped with, with the activity and the operating parameter of control chamber 80.Controller 196 can comprise for example a processor and memory body.This processor is carried out chamber and is controlled software, for example a computer program that is stored in memory body.This memory body can be a Hard Magnetic disc player, ROM, fast flash memory bank or other types memory body.Controller 196 also can comprise other assemblies, for example a soft magnetism disc player and a card mount.This card mount can contain a single-borad computer, class when numerical digit input/output board, interface panel and stepper motor control board (stepper motor controller boards).Chamber control software comprises complete instruction, the power degree of the pressure of the mensuration of its stipulated time, the mixing of gas, chamber, the temperature of chamber, microwave, the power degree of high frequency, the position of support and other parameters of a particular process.
Chamber 80 also comprises a supply of electric power 198, electric power is delivered to multiple chamber combination, and for example first electrode 105 in the substrate support 104 and second electrode 109 in the chamber 80.For chamber electrode 105 and 109 of will transmitting electric power, supply of electric power 198 comprises a radio-frequency voltage source, and it is supplied with the voltage of a radio frequency of choosing and wants and selectable power degree.Supply of electric power 198 can comprise injection frequency voltage source or have both firing frequency and the combined type voltage source of low radio frequency.Supply of electric power 198 also comprises RF pairing circuit (matching circuit).Supply of electric power 198 also can comprise the charging source of a static, and the charging of a static is provided for an electrode that is subjected to static in the substrate support 104 of being everlasting.When using the heater 107 of substrate support 104 inside, supply of electric power 198 also comprises a heater power source, the voltage that its accommodating heater 107 1 is suitable and controlled.When a DC bias voltage was imposed on gas distributor 108 or substrate support 104, supply of electric power 198 also comprised a DC biasing voltage source, and it is connected in a conducting metal part of the panel 111 of gas distributor 108.Supply of electric power 198 also can comprise the power supply of other chamber combinations, for example chamber motor and automation.
Basal plate making process chamber 80 also comprises a temperature inductor (not shown), as a thermocouple (thermocouple) or an interferometer (interfermeter), in order to the surface temperature of detection chamber 80 inside, as assembly surface or substrate surface.This temperature inductor can be transferred to its data chamber controller 196, and 196 temperature that can use this temperature data to control deposition chamber 80 of controller for example are controlled at the resistive heating elements in the substrate support 104 then.
State on relevant with the 30th figure be configured on the chamber embodiment typical case about 1 the holder and carry out processing procedure with under the upward pressure.As implied above and described, however for will be under rational high yield, height of deposition evenly covers rete, and carrying out processing procedure than the mode of low pressure in fact with one may be than the tool advantage.
In view of the above, the 31st figure shows a simple profile, to be configured to deposition chamber, and be mixed with at the chamber embodiment that operates down than low pressure (～20-150 millitorr) with another and making comparisons in Applied Materials (Applied Materials) the Producer SE die cavity chamber that elevated pressures (〉=1 holder) is operated down.One perspective view of the chamber that the 32nd figure display update is crossed.
In following several respects, be different from higher pressure chamber 3102 than low-pressure chamber 3100.At first, low-pressure chamber 3100 through revising, is increased the space of heater 3104 belows, to promote the well-balanced property and the efficient of turbine suction.This makes the chamber revised to carry the pump (not shown) of a higher-wattage with a transfer tube 3103 and a turbine section air valve (not shown), and the pipeline part that adds a new turbine adapter is adjusted these parts.This chamber has been created a low-lift pump interface 3106 through redesign, and it probably is positioned at the height identical with wafer holder 3108.This comprises successively deepens about 2 inches with the chamber body profile, and it comprises successively elevate a turnable ladder tightening latch (lift pin rods) 3110 and heater adapter plug (heater adapter block) 3112 have been prolonged identical approximately distance.
Be positioned at the zone of wafer holder 3108 tops, use both spacers 3114 through measuring of a thickness, the separation material (not shown) then is used for according to need and the rising assembly of lid.
Can deposit the dissimilar stress materials that are subjected to according to the embodiment of the invention.A kind of stress material that is subjected to that often is deposited comprises silicon nitride.With regard to silicon nitride, it refers to one and has the material of silicon-nitrogen (Si-N) key, comprises material and similarly be silicon oxynitride, silicon-oxygen-hydrogen-nitrogen and other silicon, nitrogen, oxygen, hydrogen, and even the stoichiometry or the non-stoichiometry combination of carbon.This paper describes deposited silicon nitride and is subjected to the sample method of stress material to describe the present invention; But what should understand is the material that these methods also can be used to deposit other types, comprises to be subjected to the stress silica, to be subjected to stressed dielectric layer and other.Therefore, purpose of the present invention should not be defined in and described hereinly be subjected to stress silicon nitride embodiment as illustration.
Though exemplary embodiment of the present invention is both through showing and describe, those are known the general skill person in this area and may find out other and included embodiments of the invention in, and it is also in category of the present invention.For example, other radiation treatment, the visible wavelength of crossing as infrared radiation or pick also can be used for handling depositional coating.Also have, also can use the combination of different radiation irradiations.In addition, word below, top, the end, top, upper and lower, first and second and other relatively or the word of aspect, position be relevant with exemplary embodiment among the figure and show, and be interchangeable.Therefore, this paper claim of adding should not be subject in order to describe preferred version described herein of the present invention, material or spatial configuration.
Claims (20)
1. method of making a MOS electric crystal structure, this method comprises:
On a gate oxide layers, form a polysilicon layer;
Insert germanium, make it to contact with a first of this polysilicon layer;
Remove to be positioned at and make the selected part of a grid this polysilicon layer and this gate oxide layers in addition;
The even cover nitride layer that has tensile stress in this grid top formation one;
Use heat energy in this grid; And
Nitride layer that etching should evenly cover is with in forming a separation material structure in abutting connection with this grid place.
2. the method for claim 1, the step that wherein above-mentioned even cover nitride layer forms comprises:
(i) under none isoionic state, a siliceous leading gas is flowed in the deposition chamber, form a silicon layer thus;
(ii) flow into a gas should siliceous preceding conductive gas washing away by this deposition chamber;
This silicon layer that (iii) this is arranged in this deposition chamber is exposed to a nitrogenous plasma, forms silicon nitride thus; And
Repeating step (i)-(iii) is to increase a thickness of this silicon nitride.
3. method as claimed in claim 2, also be included in wash away this siliceous before before conductive gas, this deposition chamber is vacuumized.
4. method as claimed in claim 2, wherein above-mentioned silicon and silicon nitride are to form down in the pressure between about 20 to 150 millitorrs (mTorr).
5. the method for claim 1, wherein above-mentioned germanium are to utilize implantation to be placed into and first partly contact with this.
6. the method for claim 1, wherein above-mentioned germanium are placed into this and first partly contacts, are by formation one recess in this polysilicon layer, then at this recess inside deposition SiGe (silicongermanium; SiGe).
7. the method for claim 1, wherein above-mentioned heat energy are promoted evenly tectal this tensile stress to 2.0GPa or higher.
8. the method for claim 1 also comprises:
Form a silicon nitride etch stop layer in this grid and this separation material superstructure; And
Handle this etch stop layer to promote a tensile stress of this etch stop layer.
9. method as claimed in claim 8, wherein above-mentioned this etch stop layer of processing comprise this etch stop layer is exposed to and are selected from both one at least of a plasma or UV radiation and handle.
10. method as claimed in claim 8, wherein above-mentioned etch stop layer is exposed under the UV radiation irradiation after a cover layer (capping layer) is formed on this etch stop layer top again.
11. a method of making a MOS electric crystal structure, this method comprises:
Form a polysilicon layer in gate oxide layers top;
Remove to be positioned at and make the selected part of a grid this polysilicon layer and this gate oxide layers in addition;
The even cover nitride layer that has tensile stress in this grid top formation one;
Use heat energy in this grid;
Nitride layer that etching should evenly cover is with in forming a separation material structure in abutting connection with this grid place;
Form a silicon nitride etch stop layer in this grid and this separation material superstructure; And
Promote a tensile stress of this etch stop layer.
12. method as claimed in claim 11, wherein above-mentioned heat energy are promoted this tensile stress of this nitride layer that evenly covers to 2.0GPa or higher.
13. method as claimed in claim 11, this tensile stress of wherein above-mentioned etch stop layer are to strengthen by being exposed under the UV radiation irradiation.
14. method as claimed in claim 13, wherein above-mentioned etch stop layer is exposed under the UV radiation irradiation after a cover layer (capping layer) is formed at this etch stop layer top.
15. as claim 14 described methods, wherein above-mentioned cover layer has an extinction coefficient (extinction coefficient) different with this etch stop layer.
16. method as claimed in claim 15, wherein above-mentioned cover layer comprise one deck and are selected from following one at least: an antireflection skin, amorphous silicon, and silicon oxynitride.
17. method as claimed in claim 12, this tensile stress of wherein above-mentioned etch stop layer are to promote by being exposed to the energy that is produced by a plasma.
18. a method of making a MOS electric crystal structure, this method comprises:
Form a polysilicon layer in gate oxide layers top;
Insert germanium, that make contact with a first this polysilicon layer;
Remove to be positioned at and make the selected part of a grid this polysilicon layer and this gate oxide layers in addition;
Form a silicon nitride etch stop layer in this grid top; And
By being exposed to, this silicon nitride etch stop layer is selected from a plasma or both processing of one at least of UV radiation, and a tensile stress of promoting this silicon nitride etch stop layer.
19. method as claimed in claim 18, wherein above-mentioned etch stop layer are after a cover layer is formed at this etch stop layer top, are exposed under the UV radiation irradiation.
20. method as claimed in claim 19, wherein above-mentioned cover layer have an extinction coefficient different with this etch stop layer.
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|---|---|---|---|
| US68536505P | 2005-05-26 | 2005-05-26 | |
| US60/685,365 | 2005-05-26 | ||
| US60/701,854 | 2005-07-21 | ||
| US11/398,436 | 2006-04-05 |
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| CN2006800146257A Expired - Fee Related CN101167165B (en) | 2005-05-26 | 2006-05-18 | Method to increase the compressive stress of PECVD silicon nitride films |
| CN2006800147298A Expired - Fee Related CN101208783B (en) | 2005-05-26 | 2006-05-18 | Method to increase silicon nitride film tensile stress using post PECVD deposition and UV processing |
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| CN101958341A (en) * | 2009-07-15 | 2011-01-26 | 台湾积体电路制造股份有限公司 | Dwindle EOT by removing boundary layer from the high K/ metal gates of MOS device |
| CN102468170A (en) * | 2010-11-05 | 2012-05-23 | 中芯国际集成电路制造(上海)有限公司 | Method for forming stress layer for improving n-type field effect transistor (NFET) performance |
| CN102369598B (en) * | 2008-11-28 | 2014-08-27 | 格罗方德半导体公司 | Reduced topography-related irregularities during the patterning of two different stress-inducing layers in the contact level of a semiconductor device |
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2006
- 2006-05-18 CN CNB2006800146276A patent/CN100561708C/en not_active Expired - Fee Related
- 2006-05-18 CN CN2006800146257A patent/CN101167165B/en not_active Expired - Fee Related
- 2006-05-18 CN CN2006800147298A patent/CN101208783B/en not_active Expired - Fee Related
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| CN102369598B (en) * | 2008-11-28 | 2014-08-27 | 格罗方德半导体公司 | Reduced topography-related irregularities during the patterning of two different stress-inducing layers in the contact level of a semiconductor device |
| CN101958341A (en) * | 2009-07-15 | 2011-01-26 | 台湾积体电路制造股份有限公司 | Dwindle EOT by removing boundary layer from the high K/ metal gates of MOS device |
| CN101958341B (en) * | 2009-07-15 | 2015-11-25 | 台湾积体电路制造股份有限公司 | EOT is reduced by removing boundary layer from the high K/ metal gates of MOS device |
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| Publication number | Publication date |
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| CN101208783A (en) | 2008-06-25 |
| CN100561708C (en) | 2009-11-18 |
| CN101167165A (en) | 2008-04-23 |
| CN101208783B (en) | 2010-05-19 |
| CN101167165B (en) | 2011-12-21 |
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