CN101163237A - Image processing process and device - Google Patents
Image processing process and device Download PDFInfo
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- CN101163237A CN101163237A CNA2006101424001A CN200610142400A CN101163237A CN 101163237 A CN101163237 A CN 101163237A CN A2006101424001 A CNA2006101424001 A CN A2006101424001A CN 200610142400 A CN200610142400 A CN 200610142400A CN 101163237 A CN101163237 A CN 101163237A
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Abstract
The invention provides an image processing method, including: decoding bit stream to rebuild a B image frame and to generate corresponding data to a first image field and corresponding data to a second image field; memorizing the corresponding data to the first image field and the corresponding data to the second image field respectively into a drawing frame buffer used for memorizing the self-used part of the first area of the buffer area of the B image frame and the second area; or at the different times memorizing the data corresponding to the first image field and the corresponding data corresponding to the second image field respectively into the second area at the different times. The content of the second area is capable of memorizing a whole complete field, while the content of the self-used part of the first area can not memorize a complete image field.
Description
Technical field
The invention relates to the MPEG2 decoding function of low order video product (low-end video product), refer to a kind of image processing method and device especially.
Background technology
The image processing apparatus that has the MPEG2 decoding function on the market, for example: digital multi-purpose CD player (Digital Versatile Disc player, DVD player) or set-top box (Set Top Box, STB), usually have the memory that is used for being used as buffer, so as the I picture frame (I frame) that is produced when storing the MPEG2 decoding, P picture frame (P frame), with B picture frame (B frame).
Because I picture frame and P picture frame all can be used as with reference to picture frame, thus to be retained in usually memory central, up to no longer by reference.On the other hand, the B picture frame is not to be used as with reference to picture frame but to be used for showing, needs temporarily to be stored in the middle of the memory yet.According to known technology, keeping under the prerequisite of image quality, if will with three big little for the I picture frame of (720*576) individual pixel (pixel), P picture frame, and the B picture frame all temporarily be stored in this memory, then the storage area of each picture frame needs is about 608 kilobytes (608 kilobytes), promptly needs to be about the storage area of 1824 kilobytes altogether.
In low-order digit multipurpose CD player (low-end DVD player) or low order set-top box (low-end STB), the size of storage volume of memory that is used for being used as buffer is very little usually, and for example: the size of storage volume is to be less than or equal to two Mbytes (2megabytes).Optionally some function, characteristic in the higher-order product are implemented in low order digital multi-purpose CD player or the low order set-top box if desire, then often need to consume central processing unit resource (central processor resource) and carry out desire newly-increased function, characteristic, and the storage volume of memory that need be sufficient is in order to high-speed computation.In addition, these newly-increased pairing excessive datas of function, characteristic also all need extra storage area.Therefore, though above-mentioned I picture frame, P picture frame, with the B picture frame all be compressed data (for example: be compressed to 66.7% size approximately), the storage volume of memory is still very not enough.
Summary of the invention
Therefore one of purpose of the present invention is to provide a kind of image processing method and device, to address the above problem.
Another object of the present invention is to provide a kind of image processing method and device, so that optionally some function, characteristic in the higher-order product are implemented in the low end.
Another object of the present invention is to provide a kind of image processing method and device, so that when optionally being implemented in some function, characteristic in the higher-order product in the low end, still can keep the storage volume of sufficient memory and carry out high-speed computation, and guarantee the definition and the fluency of display image in order to central processing unit resource (central processor resource).
Another object of the present invention is to provide a kind of image processing method and device,, allow numerous users receive benefits so that realize cheap and good-quality low end; Because product itself is good and cheap, its occupation rate of market (market share) will promote accordingly.
A kind of image processing method is provided in one embodiment of the invention.This image processing method includes: decoding bit stream (bit stream) is to rebuild (reconstruct) B picture frame (B frame), and produce respectively corresponding to the data of the first figure field (field) and corresponding to the data of the second figure field, the figure field of representing this B picture frame at first will be shown, this first figure field wherein, and its less important figure field that is shown of this B picture frame is represented in this second figure field; And will temporarily be stored in respectively in the middle of the picture frame buffer (frame buffer) to data that should the first figure field and to data that should the second figure field, be used for storing the personal part (private use portion) and the second area of the first area in the buffer area of this B picture frame, or will temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time, wherein the size of the storage volume of this second area is enough to store a complete figure field, and the size of the storage volume of the part of should using by oneself of this first area then is not enough to store a complete figure field.
The present invention also provides a kind of image processing apparatus accordingly when above-mentioned image processing method is provided.This image processing apparatus includes: central processing unit (central processor) is used for controlling the running of this image processing apparatus; The picture frame buffer is used for temporarily storage data; Video processor (video processor), be coupled to this picture frame buffer and this central processing unit, be used for decoding bit stream to rebuild the B picture frame, and produce respectively corresponding to the data of the first figure field and corresponding to the data of the second figure field, and will temporarily be stored in respectively in the middle of this picture frame buffer to data that should the first figure field and to data that should the second figure field, the figure field of representing this B picture frame at first will be shown, this first figure field wherein, and its less important figure field that is shown of this B picture frame is represented in this second figure field, and this video processor includes core circuit (core circuit), is used for controlling the running of this video processor; And video-stream processor (display processor), be coupled to this video processor, this picture frame buffer, with this central processing unit, be used for controlling the demonstration of this B picture frame, and this video-stream processor includes core circuit, be used for controlling the running of this video-stream processor.Wherein this video processor will also include data that should the first figure field and the running that data that should the second figure field temporarily are stored in respectively in the middle of this picture frame buffer: will temporarily be stored in respectively in the middle of this picture frame buffer to data that should the first figure field and to data that should the second figure field, be used for storing the personal part and the second area of the first area in the buffer area of this B picture frame, wherein the size of the storage volume of this second area is enough to store a complete figure field, and the size of the storage volume of the part of should using by oneself of this first area then is not enough to store a complete figure field; Perhaps will temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time.
Description of drawings
The schematic diagram of the image processing apparatus that Fig. 1 is provided for foundation one embodiment of the invention.
Fig. 2 be the handled picture frame of image processing apparatus (frame) shown in Figure 1 macro zone block (macroblock, MB) and the schematic diagram of the macro block column that is constituted (MB row).
Fig. 3 in the picture frame buffer (frame buffer) shown in Figure 1, be used for temporarily storing the schematic diagram of buffer area (buffering region) of B picture frame (B frame).
The schematic diagram of Fig. 4 for pulling together each other according to one embodiment of the invention, video processor shown in Figure 1 and video-stream processor to operate.
[main element label declaration]
| 100 | |
| 106 | |
| 108 | The |
| 108I，108P，108B | The buffer area |
| 110 | |
| 120 | |
| 122，132 | |
| 130 | Video-stream processor |
| MB(1，1)，MB(1，2)，...，MB(P，Q) | Macro zone block |
| R(1)，R(2)，...，R(P) | Macro |
| 310，310U，310V，320 | Zone in the buffer area or part |
| Vsync | Vertical synchronization |
| t B1-DIS，t B2-DIS，t B2-DEC | Time point |
| O，E，O，E，... | Strange figure the display sequence with the bigraph field |
| T B1-DEC，T D，T，T 1，T 2，T 3 | Time interval |
Embodiment
Please refer to Fig. 1, the schematic diagram of the image processing apparatus 100 that Fig. 1 is provided for foundation one embodiment of the invention, wherein image processing apparatus 100 can be the image processing apparatus with MPEG2 decoding function, for example: digital multi-purpose CD player (Digital Versatile Disc player, DVDplayer), set-top box (Set Top Box, STB) ... etc.
As shown in Figure 1, image processing apparatus 100 includes bus (bus) 106, picture frame buffer (framebuffer) 108, central processing unit (central processor) 110, video processor (videoprocessor) 120 and video-stream processor (display processor) 130, wherein video processor 120 includes core circuit (core circuit) 122, video-stream processor 130 then includes core circuit 132, and core circuit 122 and the running of core circuit 132 difference control of video processors 120 and the running of video-stream processor 130.According to present embodiment, picture frame buffer 108 is random access memory (random access memory, RAM), the size of its storage volume is to be less than or equal to two Mbytes (2megabytes), wherein in this random access memory the data that temporarily store be not limited to drawing frame data (frame data).In addition, the video processor 120 of present embodiment be video engine (videoengine, VE), and the video-stream processor 130 of present embodiment be display engine (display engine, DE).
In present embodiment, the running of central processing unit 110 may command image processing apparatus 100.For example: the bit stream (bit stream) of control desire decoding enters video processor 120, carries out the MPEG2 decoding for video processor 120.So 120 pairs of these bit streams of video processor carry out after the MPEG2 decoding, rebuild respectively successively (reconstruct) I picture frame (I frame), P picture frame (P frame), with B picture frame (B frame).Fig. 2 has illustrated macro zone block (the macro block of each picture frame in these picture frames (frame), MB) MB (p, q) (p=1,2 ..., P, q=1,2 ..., Q), and each row (row) macro block column that macro zone block constituted (MB row) R (p) (p=1,2 ..., P).According to present embodiment, each picture frame has (720*576) individual pixel (pixel), and each macro zone block is the size of (16*16) individual pixel, so P=36 and Q=45.In addition, the height of each macro block column is the height of 16 lines (line), promptly corresponding to the height of 16 pixels.
According to present embodiment, video processor 120 can temporarily be stored in all or part of of the data of a picture frame a certain or some buffer area (buffering region) in picture frame buffer 108.For example: video processor 120 can be successively temporarily be stored in buffer area 108I in the picture frame buffer 108 with the data of an entire I picture frame, also can be successively the data of a whole P picture frame temporarily be stored in buffer area 108P in the picture frame buffer 108.Again for example: video processor 120 can temporarily be stored in a part of data of B picture frame the buffer area 108B in the picture frame buffer 108, also the subsequent decoding data of this B picture frame can be override (overwrite) in the 108B of buffer area, at least a portion of this partial data whereabouts; Clearer and more definite, video processor 120 is substituted among the 108B of buffer area, is shown processor 130 and utilizes (utilize) decoded datas later with the new decoding data, wherein by core circuit 122 and 132 control, video processor 120 and video-stream processor 130 can reuse that this picture frame buffer is central, the data of at least a portion in same buffer area (for example: buffer area 108I, 108P or 108B).
Among the buffer area 108B of present embodiment, the size that is used for storing the storage area of this B picture frame can be reduced.As shown in Figure 3, the buffer area 108B of present embodiment includes first area 310 and second area 320, correspond respectively to the first figure field (field) and the second figure field, the figure field of representing this B picture frame at first will be shown, this first figure field wherein, and its less important figure field that is shown of this B picture frame is represented in this second figure field.In addition, personal part (private use portion) 310U and virtual part (virtual portion) 310V can be divided in first area 310.According to present embodiment, among the 108B of buffer area, the size that is used for storing the storage area of this B picture frame can be dynamically adjusted, to move out of extra storage area, for example: the virtual part 310V in the first area 310 shown in Figure 3.Therefore, the present invention can utilize these extra storage areas (for example: virtual part 310V) as other running (running of non-B picture frame buffer storage) required storage area, especially the newly-increased function of image processing apparatus 100, the required storage area of running of characteristic, for example: increase recreational recreation, make the OSD color abundant more ... etc.So, above-mentionedly move out of extra storage area and can be used to temporarily to store buffered data and the required initial data of computing that central processing unit 110 carries out higher speed or produced during than complex calculations.
In present embodiment, control by core circuit 122 and 132, the running of the running of video processor 120 and video-stream processor 130 can be worked in coordination, so as in the 108B of buffer area, be used for storing this B picture frame the storage area size in fact (substantially) reduced (for example: deduct above-mentioned virtual part 310V at least under) the situation, video-stream processor 130 still can normally be controlled the demonstration of this B picture frame, maintains the correctness of its fluency and demonstration.
According to present embodiment, video-stream processor 130 is the control that unit shows with the macro block column.For example: video-stream processor 130 is whenever handled the data of 16 lines, and the shared storage area of the data of these 16 lines promptly is released.Video processor 120 can be finished the decoding of data of a fragment (slice) immediately producing the data of a macro block column, and the data of this macro block column are write among the 108B of buffer area.If the decoding speed of video processor 120 surpasses the display speed that video-stream processor 130 is controlled, then video processor 120 can be waited for video-stream processor 130, is released up to next macro block column again.After video processor 120 is write full buffer storage space (for example: above-mentioned personal part 310U and/or above-mentioned second area 320) set in the 108B of buffer area, order when video processor 120 can be written into this buffer storage space according to previous data, the decoded result of the ensuing macro block column section start from this buffer storage space is begun to override, that is start anew to write according to identical order.
What need be careful is that video-stream processor 130 also is designed to repeat in order stored at least a portion data among the 108B of display buffer zone accordingly.Different enforcement according to present embodiment is selected, and the size that is used for temporarily storing the storage area of this B picture frame may be different, so the number of times of stored at least a portion data also can change accordingly among the 108B of above-mentioned repetition display buffer zone.
According to present embodiment, at picture frame image (frame picture), video processor 120 can be decoded simultaneously to reconstruct the data of two figure fields, the data of promptly last figure (top field) and the data of figure below field (bottomfield).Video processor 120 is divided into first above-mentioned figure field and the second above-mentioned figure field according to the order that these data will be shown, and represents figure field that at first is shown and the figure field that secondly is shown respectively.
What need be careful is, at the picture frame image, video processor 120 can temporarily deposit the data of its second figure field in complete figure field buffer storage area when the arbitrary B picture frame of decoding, for example: second area 320 shown in Figure 3, the size of its storage volume are enough to store a complete figure field.On the other hand, video processor 120 is when this B picture frame of decoding, can temporarily deposit another in to data that should the first figure field and have only the part size, be not enough to store the buffer storage space of a complete figure field, for example: the personal part 310U of first area 310 shown in Figure 3, the big or small N of its storage volume (N=0,1 ... or P) be to be that unit measures with the macro block column, wherein N can be dynamically adjusted.At the picture frame image, N 〉=2; That is under the typical situation, the big I of the storage volume of personal part 310U stores macro block column complete more than two.At above-mentioned I picture frame, P picture frame, all be compressed under the situation of 66.7% size, also can further save space about 11 kilobytes (11 kilobytes) to 191 kilobytes corresponding to the cushion space of B picture frame in the storage volume of memory with the data of B picture frame.
In addition, according to present embodiment, at figure field picture (field picture), the size of the personal part 310U of first area 310 is set to zero, be N=0, and the extra storage area that virtual part 310V provided is just extended, and the running of newly-increased function, characteristic that can be used as image processing apparatus 100 is required.For example: the size of the extra storage area that virtual part 310V provided is about 203 kilobytes, and the size of second area 320 also is about 203 kilobytes.
The schematic diagram of Fig. 4 for pulling together each other according to one embodiment of the invention, video processor shown in Figure 1 120 and video-stream processor 130 to operate, wherein present embodiment be used for illustrating in the various situations that embodiment shown in Figure 1 may face, the more harsh a kind of situation of condition; If more harsh situation can implement, then the enforcement of the looser situation of condition will be masterly.
As shown in Figure 4, time point t
B1-DISWith time point t
B2-DISRepresent two time points that B picture frame B1, B2 begin to show of video-stream processor 130 controls respectively, the B picture frame that is produced in the wherein general MPEG2 decode procedure may not be certain and can occur continuously, but decode according to the predetermined sequence of forming by I, P, with B, so as shown in Figure 4 situation in the various situations that may occur, more harsh a kind of of condition, the situation of two B picture frames promptly appears continuously.In addition, the sequence shown in Fig. 4 first half O, and E, 0, E ... represent the display sequence of Qi Tu field (odd field) and bigraph field (even field), and Fig. 4 Lower Half illustrates decoding relevant time point and time interval.
According to present embodiment, video processor 120 can decode the data of the first figure field of corresponding B picture frame B1 earlier, and deposits these data in second area 320.At this, the figure field data that at first will be shown in the data of the data represented B picture frame B1 of the first figure field of corresponding B picture frame B1, and the time interval that decodes data that should the first figure field does not exceed time interval T shown in Figure 4
B1-DECOutside.In time point t
B1-DISRise, video-stream processor 130 begins the data that show that firm decoding is finished, just is stored in the data in the second area 320.
In time point t
B1-DISThe time, video processor 120 can then not carry out the subsequent decoding of B picture frame B1 at once.Video processor 120 can wait for that video-stream processor 130 uses up the time T of second area 320 central at least one macro block column
DAfterwards, the data of the second figure field of corresponding B picture frame B1 just begin to decode, and begin the data that this second figure place of decoding produces are write second area 320 successively, gradually with data that should the second figure field are replaced in should the data of the first figure field, the part that do not re-use of video-stream processor 130.So video processor 120 will be overwritten in the storage area that originally is used for temporarily storing to data that should the first figure field successively in regular turn to data that should the second figure field.
Similarly, in time point t
B2-DECThe time, video processor 120 can not carry out the decoding of B picture frame B2 at once.Video processor 120 can wait for that also video-stream processor 130 uses up the time T of second area 320 central at least one macro block column
DAfterwards, the first figure field of B picture frame B2 just begins to decode, and begin the data that the first figure place with decoding B picture frame B2 produces and write second area 320 successively, gradually with the data of the first figure field of corresponding B picture frame B2 replace in the data of the second figure field of corresponding B picture frame B1, video-stream processor 130 does not re-use part.So video processor 120 is overwritten in the data of the first figure field of corresponding B picture frame B2 the storage area of the data of the second figure field that is used for temporarily storing corresponding B picture frame B1 originally successively in regular turn.So, in time point t
B2-DISRise, video-stream processor 130 begins to show B picture frame B2.Those skilled in the art should understand in time point t after the content of learning above-mentioned exposure
B2-DISDecoding afterwards and display operation be not so repeat to give unnecessary details at this.
Compared to known technology, the present invention more saves for the required buffer storage space of MPEG2 decoding function of low order video product (low-end video product), so that optionally some function, characteristic in the higher-order product are implemented in the low end.
Another benefit of the present invention is, image processing method of the present invention and device are when optionally being implemented in some function, characteristic in the higher-order product in the low end, still can keep the storage volume of sufficient memory and carry out high-speed computation, and guarantee the definition and the fluency of display image in order to central processing unit resource (central processor resource).
The above only is preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (12)
1. image processing method, it includes:
Decoding bit stream is to rebuild the B picture frame, and produce respectively corresponding to the data of the first figure field and corresponding to the data of the second figure field, the figure field of representing this B picture frame at first will be shown, this first figure field wherein, and its less important figure field that is shown of this B picture frame is represented in this second figure field; And
To temporarily be stored in the middle of the picture frame buffer respectively, be used for storing the personal part and the second area of the first area in the buffer area of this B picture frame to data that should the first figure field and to data that should the second figure field, or will temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time, wherein the size of the storage volume of this second area is enough to store a complete figure field, and the size of the storage volume of the part of should using by oneself of this first area then is not enough to store a complete figure field.
2. image processing method according to claim 1, it is at the picture frame image, be with to data that should the first figure field and to data that should the second figure field temporarily be stored in the middle of this picture frame buffer respectively, be used for storing this first area in the buffer area of this B picture frame should personal part and this second area.
3. image processing method according to claim 2, the big I of the storage volume of the part of wherein should using by oneself stores macro block column complete more than two.
4. image processing method according to claim 1, it is at the figure field picture, is will temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time.
5. image processing method according to claim 4, the size of the storage volume of the part of wherein should using by oneself is set to zero.
6. image processing method according to claim 1, wherein this personal part and virtual part can be divided in this first area, and this image processing method also includes:
By adjusting the size of this personal part, dynamically adjust the size of the storage area that is used for storing this B picture frame; Or
Utilize this virtual part as the required storage area of other running.
7. image processing method according to claim 1, wherein the size of the storage volume of this picture frame buffer is to be less than or equal to two Mbytes.
8. image processing apparatus, it includes:
Central processing unit is used for controlling the running of this image processing apparatus;
The picture frame buffer is used for temporarily storage data;
Video processor, be coupled to this picture frame buffer and this central processing unit, be used for decoding bit stream to rebuild the B picture frame, and produce respectively corresponding to the data of the first figure field and corresponding to the data of the second figure field, and will temporarily be stored in respectively in the middle of this picture frame buffer to data that should the first figure field and to data that should the second figure field, the figure field of representing this B picture frame at first will be shown, this first figure field wherein, and its less important figure field that is shown of this B picture frame is represented in this second figure field, and this video processor includes core circuit, is used for controlling the running of this video processor; And
Video-stream processor, be coupled to this video processor, this picture frame buffer, with this central processing unit, be used for controlling the demonstration of this B picture frame, and this video-stream processor includes core circuit, be used for controlling the running of this video-stream processor;
Wherein this video processor will also include data that should the first figure field and the running that data that should the second figure field temporarily are stored in respectively in the middle of this picture frame buffer:
To temporarily be stored in the middle of this picture frame buffer respectively, be used for storing the personal part and the second area of the first area in the buffer area of this B picture frame to data that should the first figure field and to data that should the second figure field, wherein the size of the storage volume of this second area is enough to store a complete figure field, and the size of the storage volume of the part of should using by oneself of this first area then is not enough to store a complete figure field; Perhaps
To temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time.
9. image processing apparatus according to claim 8, wherein at the picture frame image, this video processor be with to data that should the first figure field and to data that should the second figure field temporarily be stored in the middle of this picture frame buffer respectively, be used for storing this first area in the buffer area of this B picture frame should personal part and this second area.
10. image processing apparatus according to claim 8, wherein at the figure field picture, this video processor is will temporarily be stored in this second area respectively to data that should the first figure field and to data that should the second figure field in the different time.
11. image processing apparatus according to claim 8, wherein this video processor and this video-stream processor can reuse in the middle of this picture frame buffer, the data of at least a portion in the same buffer area.
12. image processing apparatus according to claim 8, wherein the size of the storage volume of this picture frame buffer is to be less than or equal to two Mbytes.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847394B (en) * | 2009-03-26 | 2012-03-07 | 珠海扬智电子有限公司 | Storage mapping method and device for encoding and displaying video files |
| CN103297792A (en) * | 2012-02-29 | 2013-09-11 | 联发科技股份有限公司 | Data buffering apparatus and related data buffering method |
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2006
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847394B (en) * | 2009-03-26 | 2012-03-07 | 珠海扬智电子有限公司 | Storage mapping method and device for encoding and displaying video files |
| CN103297792A (en) * | 2012-02-29 | 2013-09-11 | 联发科技股份有限公司 | Data buffering apparatus and related data buffering method |
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