CN101150053A - Nitride semiconductor base plate and its manufacturing method - Google Patents
Nitride semiconductor base plate and its manufacturing method Download PDFInfo
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- CN101150053A CN101150053A CNA2006101542934A CN200610154293A CN101150053A CN 101150053 A CN101150053 A CN 101150053A CN A2006101542934 A CNA2006101542934 A CN A2006101542934A CN 200610154293 A CN200610154293 A CN 200610154293A CN 101150053 A CN101150053 A CN 101150053A
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Abstract
This invention provides a nitride semiconductor base board and its manufacturing method, in which, the method includes: providing a base board, forming an epitaxial layer on the board, then forming a patternized mask layer on the epitaxial layer and exposing part of it, then carrying out oxidation technology to fully oxidate the exposed epitaxial layer to multiple staggered blocking structures, removing the mask layer and forming a nitride semiconductor layer on the epitaxial layer with the staggered blocking structures.
Description
Technical field
The present invention relates to three or five family's semiconductor substrate and manufacture methods thereof, especially, relate to nitride semiconductor base plate and manufacture method thereof.
Background technology
In recent years, light-emitting diode (LED) and laser diode (LD) are used on the market widely, for example the blue light and the yellow fluorescent powder combination made from gallium nitride (GaN) can obtain white light, just all do not steep the bright and power saving of light source in brightness or aspect the power consumption, can significantly reduce power consumption than tradition before.In addition, the life-span is longer than conventional bulb about more than tens thousand of hours the life-span of light-emitting diode.
From ruddiness, green glow, blue light is that compound by gallium nitride series is main to the light-emitting diode of ultraviolet light at the main on the market most product of element at present, but because the lattice constant (lattice constant) of aluminum oxide substrate (sapphire) itself and gallium nitride, the difference of thermal coefficient of expansion and chemical property, so at heterogeneous substrate (for example is silicon substrate, silicon carbide substrate or aluminum oxide substrate) gallium nitride layer of going up growth has many line defects, dislocation, and these dislocation meetings just form and penetrate dislocation along with the thickness of the gallium nitride layer of growth increases and extends.And the laser activity and the useful life of the light-emitting diode of this type of defective effect ultraviolet light and gallium nitride series.
In order to reduce threading dislocation, the known development several board structures.Fig. 1 illustrates the diagrammatic sectional view of known a kind of III-nitride substrate.Please refer to Fig. 1, GaN resilient coating 102 is arranged on the substrate 100, and several barrier pattern 104 of configuration on the GaN resilient coating 102, by grown semiconductor layer 106 on the GaN resilient coating that is exposed between the barrier pattern 104, GaN epitaxial loayer just, and coating barrier pattern 104.This kind board structure is to utilize barrier pattern to block partly dislocation, can not produce and penetrates dislocation so that be positioned at part GaN epitaxial loayer on the barrier pattern.Yet barrier pattern 104 is to utilize to carry out an at least lithography technology and form, and needs the application vacuum equipment to make, so step complexity and cost are higher.
Fig. 2 illustrates the diagrammatic sectional view of known another kind of III-nitride substrate.Please refer to Fig. 2, on substrate 200, form resilient coating 202 and inculating crystal layer 204, in substrate 200, form the groove 206 that penetrates resilient coating 202 and inculating crystal layer 204 afterwards, just resilient coating 202 and inculating crystal layer 204 are patterned to strip or dots structure.Utilize the selectivity lateral growth method of heterostructure, (Pendeo-epitaxy PE), makes only unsettled lateral growth on the sidewall of bar shaped inculating crystal layer 204 of GaN epitaxial loayer to be referred to as outstanding extension, cover then on the inculating crystal layer 204 of strip, in order to stop the dislocation that penetrates of part vertical direction.Similar to the described barrier pattern of Fig. 1 104, the groove 206 that penetrates resilient coating 202 and inculating crystal layer 204 must form via carrying out lithography technology at least, and need to use vacuum equipment and make, therefore same manufacturing step comparatively complexity and cost is higher.
Summary of the invention
One object of the present invention just provides a kind of manufacture method of nitride semiconductor base plate and can reduce manufacturing cost.
A further object of the present invention provides a kind of manufacture method of nitride semiconductor base plate and can simplify processing step.
Another purpose of the present invention provides a kind of nitride semiconductor base plate and can reduce the dislocation density of nitride semiconductor layer.
The present invention proposes a kind of manufacture method of nitride semiconductor base plate.This method comprises: substrate is provided, forms epitaxial loayer afterwards on this substrate.On this epitaxial loayer, form patterned mask layer, wherein the exposed partly epitaxial loayer of this patterned mask layer.Then, carry out oxidation technology so that exposed part epitaxial loayer is completely oxidized to a plurality of dislocation barrier structures.Remove this patterned mask layer.Then, on epitaxial loayer, form nitride semiconductor layer with dislocation barrier structure.
According to the manufacture method of the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.In the case, epitaxial loayer comprises the nitride epitaxial material layer.And the material of above-mentioned nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.In addition, when the material of the material of substrate and epitaxial loayer as mentioned above the time, oxidation technology comprises the use electrolytic solution.Wherein, the pH pH-value of electrolytic solution is about 3～10.In addition, oxidation technology also comprises carries out the high-energy illumination step, and the high-energy illumination step comprises the use ultraviolet light.
According to the manufacture method of the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.In in the case, the material of epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed, wherein, contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.When the material of substrate and epitaxial loayer as mentioned above, then oxidation technology comprises wet oxidation process, and wet oxidation process is included under the environment that contains steam, and is about in 200～600 ℃ in temperature and carries out.
The present invention also provides a kind of manufacture method of nitride semiconductor base plate.This method comprises: substrate is provided, wherein on this substrate epitaxial loayer is arranged.On this epitaxial loayer, form patterned mask layer, wherein exposed partly this epitaxial loayer of this patterned mask layer.Afterwards, carry out the oxidation technology partial oxidation and should become a plurality of dislocation barrier structures by exposed part epitaxial loayer, wherein those dislocation barrier structures are arranged in this epitaxial loayer.Remove this patterned mask layer.At last, form nitride semiconductor layer and cover this epitaxial loayer.
According to the manufacture method of the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.When the material of substrate as mentioned above, then epitaxial loayer comprises the nitride epitaxial material layer, and the material of this nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.When the material of substrate and epitaxial loayer as mentioned above, oxidation technology comprises the use electrolytic solution, and the pH pH-value of this electrolytic solution is about 3～10.In addition, oxidation technology also comprises and carries out the high-energy illumination step.
According to the manufacture method of the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.When the material of substrate as mentioned above the time, then the material of epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed, and this contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.When the material of substrate and epitaxial loayer as mentioned above the time, then oxidation technology comprises wet oxidation process, and this wet oxidation process is included under the environment that contains steam, and is about in 200～600 ℃ in temperature and carries out.
The present invention also provides a kind of nitride semiconductor base plate, and this nitride semiconductor base plate comprises: substrate, nitride semiconductor layer, several barrier structures and epitaxial loayer.This nitride semiconductor layer is positioned at this substrate top, and this barrier structure is between this substrate and this nitride semiconductor layer.This epitaxial loayer then is filled between this barrier structure.
According to the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.When the material of substrate as mentioned above the time, then epitaxial loayer comprises the nitride epitaxial material layer, and the material of this nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.
According to the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.When the material of substrate as mentioned above the time, then the material of epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed, and this contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.
According to the described nitride semiconductor base plate of preferred embodiment of the present invention, wherein the material of this barrier structure is selected from the group of being made up of aluminium oxide and gallium oxide.
Because the oxide porous crack character of dislocation barrier structure/barrier structure, therefore nitride semiconductor layer can extension on dislocation barrier structure/barrier structure, and only understand extension on the surface of epitaxial loayer, and lateral growth, therefore the part that can block in the nitride semiconductor layer penetrates dislocation, to reduce the dislocation density that penetrates in the nitride semiconductor layer of being grown.In addition, utilize the oxidation technology technology, the epitaxial loayer direct oxidation on the substrate is formed dislocation barrier structure/barrier structure.Form barrier pattern or groove can reduce manufacturing cost than known application engraving method.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 illustrates the diagrammatic sectional view of known a kind of III-nitride substrate.
Fig. 2 illustrates the diagrammatic sectional view of known another kind of III-nitride substrate.
Fig. 3 A to Fig. 3 C illustrates the manufacture method according to a kind of nitride semiconductor base plate of a preferred embodiment of the present invention.
Fig. 4 A to Fig. 4 C illustrates the manufacture method of a kind of nitride semiconductor base plate of another preferred embodiment according to the present invention.
[main description of reference numerals]
100,200,300,400: substrate
102,202: resilient coating
104: barrier pattern
204: inculating crystal layer
206: groove
106,208: semiconductor layer
302,402: epitaxial loayer
304,404: patterned mask layer
306,406: oxidation technology
308,408: barrier structure
310,410: nitride semiconductor layer
Embodiment
Fig. 3 A to Fig. 3 C illustrates the manufacture method according to a kind of nitride semiconductor base plate of a preferred embodiment of the present invention.
Please refer to Fig. 3 A, substrate 300 at first is provided.On substrate 300, form epitaxial loayer 302 afterwards.Then, form patterned mask layer 304 on epitaxial loayer 302, this patterned mask layer 304 exposes epitaxial loayer 302 partly.Wherein, patterned mask layer 304 for example is the photoresist layer.Afterwards, please refer to Fig. 3 B, is mask with patterned mask layer 304, carries out oxidation technology 306, is completely oxidized to several barrier structures 308 with the part epitaxial loayer 302 that will expose, that is is the dislocation barrier structure.
It should be noted that, in one embodiment of the invention, when the material of substrate 300 was selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide, formed epitaxial loayer 302 for example was the nitride epitaxial material layer on this substrate 300.And the material of above-mentioned nitride epitaxial material layer for example is to be selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.And when the material of substrate 300 and epitaxial loayer 302 as mentioned above the time, then oxidation technology 306 for example is to have the substrate 300 of epitaxial loayer 302 and patterned mask layer 304 under room temperature, about 0～80 ℃, immerse in the electrolytic solution and carry out oxidation reaction, so that the part epitaxial loayer 302 that is exposed is completely oxidized to barrier structure 308.Wherein, the pH pH-value of electrolytic solution is about 3～10, and the method for preparing this electrolytic solution for example is that nitrogen base three acetic acid (nitrilotriacetic acid) are dissolved in the potassium hydroxide aqueous solution.In addition, when carrying out oxidation technology 306, also comprising and carry out the high-energy illumination step, just with the high-energy light source, for example is ultraviolet light beam, quickens the oxidation reaction in the electrolytic solution.The wavelength of above-mentioned high-energy light source is approximately less than the wavelength of the minimum light source of penetrable epitaxial loayer 302.
On the other hand, in another embodiment, when the material of substrate 300 was selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide, epitaxial loayer 302 for example was the arsenide epitaxial material layer that contains aluminium.The above-mentioned arsenide epitaxial material layer that contains aluminium for example is to contain the arsenide (Al that aluminium contains gallium
XGa
(1-X) A
s) the epitaxial material layer.Wherein X is approximately greater than 0.8, just in containing the arsenide epitaxial material layer that aluminium contains gallium the quantity of aluminium atom than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.And when the material of substrate 300 and epitaxial loayer 302 as mentioned above the time, then oxidation technology 306 for example is will have the substrate 300 of epitaxial loayer 302 and patterned mask layer 304 as under the environment that contains steam, carries out wet oxidation process for about 200～600 ℃ with high temperature.
In the foregoing description, carry out oxidation technology 306, and the formed barrier structure 308 of part epitaxial loayer 302 complete oxidations that will expose, its material is selected from the group of being made up of aluminium oxide and gallium oxide.
Afterwards, please refer to Fig. 3 C, remove patterned mask layer 304.Afterwards, form nitride semiconductor layer 310 in substrate 300 tops.The method that forms this nitride semiconductor layer 310 comprises epitaxy technique, for example is organic metal vapour phase epitaxy method or Metalorganic Chemical Vapor Deposition.
In the process of carrying out epitaxy technique, because the oxide porous crack character of barrier structure 308, so nitride semiconductor layer 310, for example be semiconductor layers such as gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride, can extension on barrier structure 308, and only understand extension in filling out on the surface of the epitaxial loayer between the barrier structure 308 302, and lateral growth, therefore the part that can block in the nitride semiconductor layer penetrates dislocation, to reduce the dislocation density that penetrates in the nitride semiconductor layer of being grown.
Fig. 4 A to Fig. 4 C illustrates the manufacture method of a kind of nitride semiconductor base plate of another preferred embodiment according to the present invention.
Please refer to Fig. 4 A, substrate 400 at first is provided.On substrate 400, form epitaxial loayer 402 afterwards.Then, form patterned mask layer 404 on epitaxial loayer 402, this patterned mask layer 404 exposes epitaxial loayer 402 partly.Wherein, patterned mask layer 404 for example is the photoresist layer.Afterwards, please refer to Fig. 4 B, is mask with patterned mask layer 404, carries out oxidation technology 406, becomes several barrier structures 408 with part epitaxial loayer 402 partial oxidations that will expose, that is is the dislocation barrier structure.
It should be noted that in the present embodiment that barrier structure 408 is arranged in epitaxial loayer 402.Just the barrier structure 308 among the embodiment of Fig. 3 A to Fig. 3 C is located immediately on the substrate 300, and 302 of epitaxial loayers are also simultaneously on the substrate 300 and insert between the barrier structure 308.Different with the barrier structure 308 among the embodiment of Fig. 3 A to Fig. 3 C is, the barrier structure 408 in the present embodiment is arranged in epitaxial loayer 402, and the bottom of barrier structure 408 direct contact substrate 400.
In addition, in present embodiment, therefore the material of the material of the material of substrate 400 and epitaxial loayer 402 such as substrate described in the same embodiment 300 and epitaxial loayer 302 does not give unnecessary details at this.In addition, the method that forms barrier structure 408 in epitaxial loayer 402 as the method for the formation barrier structure 308 described in the embodiment before, therefore also is not described further at this yet.Moreover, the material of barrier structure 408, oxide material just, also the material with the barrier structure 308 described in the preceding embodiment is identical, does not also give unnecessary details at this equally.
Afterwards, please refer to Fig. 4 C, remove patterned mask layer 404.Afterwards, form nitride semiconductor layer 410 in substrate 400 tops.The method that forms this nitride semiconductor layer 410 comprises epitaxy technique, for example is organic metal vapour phase epitaxy method or Metalorganic Chemical Vapor Deposition.In the process of carrying out epitaxy technique, because the oxide porous crack character of barrier structure 408, so nitride semiconductor layer 410, for example be semiconductor layers such as gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride, can extension on barrier structure 408, and only understand extension on the surface of epitaxial loayer 402, and lateral growth, therefore the part that can block in the nitride semiconductor layer penetrates dislocation, to reduce the dislocation density that penetrates in the nitride semiconductor layer of being grown.
In addition, the present invention utilizes the oxidation technology technology, and the epitaxial loayer direct oxidation on the substrate is formed barrier structure.Form barrier structure than known application engraving method and can reduce manufacturing cost.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; should carry out some and change and retouching, so protection scope of the present invention is as the criterion when looking the claims person of defining.
Claims (27)
1. the manufacture method of a nitride semiconductor base plate comprises:
Substrate is provided;
On this substrate, form epitaxial loayer;
On this epitaxial loayer, form patterned mask layer, wherein exposed partly this epitaxial loayer of this patterned mask layer;
Carry out oxidation technology so that described exposed part epitaxial loayer is completely oxidized to a plurality of dislocation barrier structures;
Remove this patterned mask layer; And
Form nitride semiconductor layer having on the described epitaxial loayer of described dislocation barrier structure.
2. nitride semiconductor base plate manufacture method as claimed in claim 1, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.
3. nitride semiconductor base plate manufacture method as claimed in claim 2, wherein this epitaxial loayer comprises the nitride epitaxial material layer.
4. nitride semiconductor base plate manufacture method as claimed in claim 3, wherein the material of this nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.
5. nitride semiconductor base plate manufacture method as claimed in claim 2, wherein this oxidation technology comprises the use electrolytic solution.
6. nitride semiconductor base plate manufacture method as claimed in claim 5, wherein the pH pH-value of this electrolytic solution is about 3～10.
7. nitride semiconductor base plate manufacture method as claimed in claim 5, wherein this oxidation technology also comprises and carries out the high-energy illumination step.
8. nitride semiconductor base plate manufacture method as claimed in claim 7, wherein this high-energy illumination step comprises the use ultraviolet light.
9. nitride semiconductor base plate manufacture method as claimed in claim 1, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.
10. nitride semiconductor base plate manufacture method as claimed in claim 9, wherein the material of this epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed.
11. nitride semiconductor base plate manufacture method as claimed in claim 10, wherein this contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.
12. nitride semiconductor base plate manufacture method as claimed in claim 9, wherein this oxidation technology comprises wet oxidation process.
13. nitride semiconductor base plate manufacture method as claimed in claim 12, wherein this wet oxidation process is included under the environment that contains steam, and is about in 200～600 ℃ in temperature and carries out.
14. the manufacture method of a nitride semiconductor base plate comprises:
Substrate is provided, wherein on this substrate epitaxial loayer is arranged;
On this epitaxial loayer, form patterned mask layer, wherein exposed partly this epitaxial loayer of this patterned mask layer;
Carry out the described exposed part epitaxial loayer of oxidation technology partial oxidation and become a plurality of dislocation barrier structures, wherein said dislocation barrier structure is arranged in this epitaxial loayer;
Remove this patterned mask layer; And
Form nitride semiconductor layer and cover this epitaxial loayer.
15. nitride semiconductor base plate manufacture method as claimed in claim 14, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.
16. nitride semiconductor base plate manufacture method as claimed in claim 15, wherein this epitaxial loayer comprises the nitride epitaxial material layer, and the material of this nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.
17. nitride semiconductor base plate manufacture method as claimed in claim 15, wherein this oxidation technology comprises the use electrolytic solution, and the pH pH-value of this electrolytic solution is about 3～10.
18. nitride semiconductor base plate manufacture method as claimed in claim 15, wherein this oxidation technology also comprises and carries out the high-energy illumination step.
19. nitride semiconductor base plate manufacture method as claimed in claim 15, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.
20. nitride semiconductor base plate manufacture method as claimed in claim 19, wherein the material of this epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed, and this contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.
21. nitride semiconductor base plate manufacture method as claimed in claim 19, wherein this oxidation technology comprises wet oxidation process, and this wet oxidation process is included under the environment that contains steam, and is about in 200～600 ℃ in temperature and carries out.
22. a nitride semiconductor base plate comprises:
Substrate;
Nitride semiconductor layer is positioned at this substrate top;
A plurality of barrier structures are between this substrate and this nitride semiconductor layer; And
Epitaxial loayer fills up between the described barrier structure.
23. nitride semiconductor base plate as claimed in claim 22, wherein the material of this substrate is selected from the group of being made up of silicon, carborundum, aluminium oxide, sapphire, zinc oxide and magnesium oxide.
24. nitride semiconductor base plate as claimed in claim 23, wherein this epitaxial loayer comprises the nitride epitaxial material layer, and the material of this nitride epitaxial material layer is selected from the group of being made up of gallium nitride, indium nitride, aluminium nitride, InGaN, aluminum gallium nitride, indium nitride aluminium and Im-Ga-Al nitride.
25. nitride semiconductor base plate as claimed in claim 22, wherein the material of this substrate is selected from the group of being made up of GaAs, gallium phosphide, arsenic phosphide gallium, Aluminum gallium arsenide, other arsenide and phosphide.
26. nitride semiconductor base plate as claimed in claim 25, wherein the material of this epitaxial loayer be selected from by the arsenide epitaxial material that contains aluminium with contain in the group that arsenide epitaxial material that aluminium contains gallium formed, and this contain aluminium atomic quantity in the arsenide epitaxial material that aluminium contains gallium than the ratio of aluminium atom and the total quantity of gallium atom approximately greater than 0.8.
27. nitride semiconductor base plate as claimed in claim 22, the material of wherein said barrier structure comprises oxides such as aluminium oxide or gallium oxide at least.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112701030A (en) * | 2020-12-28 | 2021-04-23 | 瀚天天成电子科技（厦门）有限公司 | Method for reducing growth defects of silicon carbide epitaxial wafer and silicon carbide substrate |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112701030A (en) * | 2020-12-28 | 2021-04-23 | 瀚天天成电子科技（厦门）有限公司 | Method for reducing growth defects of silicon carbide epitaxial wafer and silicon carbide substrate |
| CN112701030B (en) * | 2020-12-28 | 2021-11-23 | 瀚天天成电子科技（厦门）有限公司 | Method for reducing growth defects of silicon carbide epitaxial wafer and silicon carbide substrate |
| CN113782422A (en) * | 2020-12-28 | 2021-12-10 | 瀚天天成电子科技（厦门）有限公司 | Method for reducing growth defects of silicon carbide epitaxial wafer and silicon carbide substrate |
| CN113782422B (en) * | 2020-12-28 | 2024-08-13 | 瀚天天成电子科技(厦门)股份有限公司 | Method for reducing growth defect of silicon carbide epitaxial wafer and silicon carbide substrate |
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