CN101141509A - Method of testing unsymmetrical digital subscriber line frequency spectrum using frequency integrating method - Google Patents

Abstract

The present invention relates to a method by adopting frequency to perform the frequency spectrum to an asymmetric digital subscriber route of a whole test, a testing procedure is as follows: a first procedure is to test the circuit initialization. A second procedure is to test the junction, different matching impedances are arranged according to a testing object. A third procedure is to perform the sampling start-up, a start up modulus converter sampling stores testing data, the sampling frequency is arranged according to an ADSL2/ADSL2+ standard frequency spectrum. A forth procedure is to amplify an adjustment, a signal is amplified to a proper amplitude value. A fifth procedure is a Fourier conversion. A sixth procedure is to perform the testing calculation of the route noise, a noise power spectrum density value of the route and a noise intensity level are got, the electric environment and the performance of the route is judged, and a connection status of the route is judged. A seventh procedure is to transmit the signal monitoring calculation, the spectrum density value of the data transmission signal voltage is got, the comparison and analysis is performed to a sending and receiving parameter, and the operating status and the performance of the route are evaluated. The present invention has the advantages of improving the measuring accuracy and widening the testing function.

Description

Method for testing frequency spectrum of asymmetric digital subscriber line by adopting frequency alignment method

Technical Field

The invention relates to a method for testing frequency spectrum of an asymmetric digital subscriber line by adopting a frequency alignment method, in particular to a frequency spectrum testing device applied to an Asymmetric Digital Subscriber Line (ADSL) comprehensive testing system, which is used for testing the noise power of a line and the frequency spectrum of a transmission signal and providing a line opening and maintenance testing method for ADSL data service of a fixed telephone network operator, and belongs to the technical field of communication.

Background

At present, with the continuous popularization of internet services, ADSL technology is widely applied to domestic fixed telephone networks, user capacity is rapidly expanded, workload of line opening tests is huge, and the number of reported accepts of users is rapidly increased, so that an effective test means is needed to test, analyze and evaluate electrical performance and operation state of a user line.

In an ADSL integrated test system, the function of spectrum testing is very important for judging the electrical environment condition and transmission state performance of a line. In the future, data services are gradually developed into a structural mode of 'optical fiber connection cell terminal + ADSL module', and in an integrated test system using a remote test module or a built-in test board card as a basic test device, functions of a spectrum test device include line noise test and transmission signal monitoring, so that the spectrum test device is an effective test means.

The existing frequency spectrum testing function of the similar device only tests the noise power of the line, the testing method is that the noise voltage v (t) on the standard sampling resistor is subjected to band-pass filtering and beta-time amplification, timing sampling and analog-to-digital conversion to obtain N-point noise voltage sampling data v (k), and the sampling frequency selects the working frequency of a CPU or a logic control circuit of the system, such as 20MHz, 10MHz, 8MHz and the like. And obtaining a discrete distribution function of the noise voltage on a frequency domain coordinate by Fourier transform operation:

the power of the noise signal at each frequency point on the 100 omega resistor is as follows:

the noise signal Power Spectral Density (PSD) at each frequency point is:

the units are calculated in decibel-milliwatts per hertz (dBm/Hz).

For the N-point noise voltage data v (k), the noise power strength, i.e. the power Root Mean Square (RMS) value of the noise signal, is calculated directly on the time domain coordinates:

the calculation unit is decibel-milliwatts (dBm).

Fig. 1 shows the distribution of the frequency spectrum of the ADSL transmission band, and both the digital transmission standards ADSL2 and ADSL2+ have 4.3125KHz as frequency step size, and 256 transmission sub-channels and 512 transmission sub-channels are respectively set. Tone6 to Tone31, i.e. 25.875KHz 133.6875KHz, are used as uplink transmission bands, tone33 to Tone256, i.e. 142.3125KHz 1104KHz, are used as downlink transmission bands in the ADSL2 standard, and Tone33 to Tone512, i.e. 142.3125KHz 2208KHz, are used as downlink transmission bands in the ADSL2+ standard.

In the ADSL subscriber line, noise components are mainly interference signals such as white noise, near-end crosstalk, far-end crosstalk, impulse white noise, etc., where the near-end crosstalk is a main component in a noise power spectrum and is a main factor affecting the transmission quality of data services. Therefore, the noise power spectrum on the subscriber line is mainly represented by the distribution of the ADSL2/ADSL2+ standard spectrum shown in fig. 1.

To illustrate the problem, one example was chosen for analysis. The Tone100 sub-channel 431.25KHz/100mV signal is connected to the input port of some other similar test device, the test device samples 10MHz,4096 sample data participate in Fourier operation, and the frequency step length is 2.44140625KHz. The PSD test result is shown in fig. 2, and it can be seen that the PSD data is affected to different degrees although no test signal of other frequency is input near the frequency point 431.25 KHz. The distribution of PSD data near several points at 431.25KHz is:

sample number 174 175 176 177 178 179 180

Frequency (KHz) 424.8047 427.2461 429.6875 432.1289 434.5703 437.0117 439.4531

PSD(dBm) -32.2 -28.1 -19.9 -14.9 -26.5 -31.3 -34.4

The RMS value of the signal power is-13.2 dBm, the RMS theoretical value calculated according to the formula (3) is-13.0 dBm, and the comparison with the PSD value shows that the PSD distribution data of the measurement results in the table introduces large dispersion errors.

Disclosure of Invention

The invention aims to overcome the defects in the prior art, and provides a novel frequency spectrum testing method, namely a frequency alignment method, so that the testing precision is improved, and the testing function is expanded.

In order to achieve the above object, a technical solution of the present invention is to provide a method for testing an asymmetric digital subscriber line spectrum by using a frequency alignment method, including: the method comprises the steps of test circuit initialization, test connection, sampling starting, amplification adjustment, fourier transformation, line noise test calculation, transmission signal monitoring calculation and the like, and is characterized in that in the test connection step, an impedance matching module is respectively set to be 100 omega and open according to two different test function requirements of test line noise and monitoring transmission signals set by test control.

The sampling starting step, the sampling frequency is set according to ADSL2/ADSL2+ standard frequency spectrum:

f _S ＝4.3125×10 ³ xSx 2S is an integer of 512 or more

The line noise test calculation step adopts a formula:

to obtain P _RMS The noise power level RMS value is calculated in decibel-milliwatts (dBm).

The transmission signal monitoring and calculating step adopts a formula:

to obtain V _VSD And (n) is a voltage spectral density value calculated in decibel-volts per hertz (dBv/Hz).

The principle analysis of the discrete error of the similar device test is as follows: for an input sinusoidal signal of frequency f _V At a sampling frequency f in time-domain coordinates _S Collecting N voltage data to perform Fourier transform operation, and displaying the voltage amplitude of the tested signal at the kth point of the frequency domain coordinate, wherein f is the voltage amplitude of the tested signal _V Can be expressed as:

k is less than

Positive integer of (8)

Such as Δ f _V =0, the signal frequency is consistent with a discrete point on a frequency domain coordinate, and the sampling frequency is called as sampling frequency alignment; such as Δ f _V And (3) not equal to 0, wherein the signal frequency is inconsistent with all discrete points on the frequency domain coordinate, and the sampling frequency is called as non-integer. The sine signal sequence sampled by the test circuit on the time domain coordinate is as follows:

τ＝1，2，3，......，N

wherein the content of the first and second substances,

and is and

when ξ =0, the sampling frequency is integer; when ξ ≠ 0, the sampling frequency is not integer, i.e. the sampling frequency cannot be divided by the frequency of the input signal. For the purpose of analysis, it is assumed that the phase angle of the input sinusoidal signal with respect to the sampling start pulse is zero.

The Fourier operation can obtain the frequency domain expression of the input signal:

when xi =0, the sum of the first three series of terms is zero, V _F (k) And = A.j is the result of the test calculation of the sampling frequency in the state of the whole. The sinusoidal input signal is used to analyze the error, let: v. of _Td (τ)＝v(τ)| _ξ＝0

Then the sampling frequency is not the error of the two input signals in the frequency domain:

unfolding to obtain:

(9)

when N is sufficiently large, the series of calculation errors and the formula of the above formula can be approximated as an integral calculation formula.

The real part of the error can be expressed as:

the imaginary part of the error can be expressed as:

different k values, namely errors of signals with different frequencies are different, and when k is larger, namely corresponding to a frequency band above a Tone6 subchannel, terms containing 4 pi k + xi N in real part and imaginary part expressions of the errors can be ignored. Additionally, sin2 π ξ and cos2 π ξ may be approximated as 0 and 1, respectively. The error is further simplified as:

from equation (10), it can be seen that there is a clear correspondence between the frequency-alignment error ξ and the spectrum-test dispersion error Δ V (k). When the sampling frequency is set to be the whole, namely ξ =0, substituting equation (9) or equation (10) can obtain the calculation result Δ V (k) =0, namely the discrete error theoretical value of the spectrum test is zero.

Drawings

FIG. 1 is a diagram of a sub-channel spectrum of ADSL transmission standard ADSL2/2 +;

FIG. 2 is a PSD distribution diagram of a 10MHz sampled 500mV/431.25KHz signal from a test apparatus;

FIG. 3 is a block diagram of a spectrum test device of an ADSL integrated test system;

FIG. 4 is a schematic diagram of a spectrum test device test interface and impedance matching circuit;

FIG. 5 is a schematic diagram of the spectrum test device embedded data processing unit ARM7 and its peripheral circuits;

FIG. 6 is a schematic diagram of a spectrum test device embedded data processing unit memory circuit;

FIG. 7 is a schematic diagram of a spectrum testing apparatus logic control circuit;

FIG. 8 is a schematic diagram of a filter amplification and data acquisition circuit of the spectrum testing apparatus;

FIG. 9 is a schematic diagram of a sample data buffer circuit of the spectrum test apparatus;

FIG. 10 is a flow chart of a noise test employing the present invention;

FIG. 11 is a PSD distribution diagram of 500mV/431.25KHz signal sampled by the testing apparatus of the present invention.

Detailed Description

The embodiments of the remote test module and the built-in test board according to the present invention are described in further detail with reference to the accompanying drawings, but the embodiments are not intended to limit the present invention, and all similar structures, similar methods, and similar changes thereof, which adopt the present invention, should be included in the scope of the present invention.

Example (b):

as shown in fig. 3, the test apparatus is a structural block diagram of an asymmetric digital subscriber line spectrum test apparatus, a circuit of the test apparatus is composed of an embedded data processing unit, a control logic, a sampling control unit, a test interface, an impedance matching unit, a filtering amplification unit, a data acquisition unit, a data cache unit and the like, the embedded data processing unit is respectively connected with the control logic unit and the data cache unit, the control logic unit is respectively connected with the sampling frequency unit, the test interface, the impedance matching unit, the filtering amplification unit, the data acquisition unit and the data cache unit, and the test interface is connected with the impedance matching unit, the filtering amplification unit, the data acquisition unit and the data cache unit.

As shown in fig. 4, the testing interface and impedance matching circuit schematic diagram of the spectrum testing device is shown, the testing interface and impedance matching unit is composed of relays RL101 to RL105 and a protection device D101 for high voltage isolation and bidirectional high pass filtering, the relay RL101 at the testing input end is a testing main interface of the device and is used for connection with the access and testing functions of a tested twisted pair, the relay RL101 is respectively connected with relays RL102 to RL105 through the device D101, and the relay RL102 is connected with spectrum testing.

As shown in fig. 5 and 6, an embedded control arithmetic circuit is composed of an embedded processor chip D201, a power conversion chip D202 and a reset control chip D203 of the ARM7 architecture, the power conversion chip D202 is connected to the embedded processor chip D201 to provide a 2.5V core power, and the reset control chip D203 is connected to the embedded processor chip D201 to complete a reset function of power monitoring and system control, for an embedded data processing unit ARM7 of the spectrum testing apparatus, a schematic diagram of a peripheral circuit thereof and a schematic diagram of a memory circuit of the embedded data processing unit of the spectrum testing apparatus. The FLASH memory D301 with the capacity of 128Mbit and the DRAM memory D302 with the capacity of 256Mbit form an embedded program and data storage circuit, and a data bus, an address bus and a control bus of the storage circuit are connected with a data bus, an address bus and a control bus of the embedded data processing unit ARM 7. The embedded data processing unit has the characteristics of high performance, large capacity, low power consumption and the like, and is an operation and control core of the frequency spectrum testing device.

As shown in fig. 7, which is a schematic diagram of a logic control unit circuit of the spectrum testing apparatus, the pin 125 GCLK1 of the CPLD chip D401 is connected to an output frequency circuit composed of a crystal oscillator X401, a resistor R406, an inductor L402, and a capacitor C410, and provides a 35.328MHz reference frequency signal for spectrum testing. RLC-D0 to RLC-D7 and RLCC0 to RLCC4 of the CPLD chip D401 are connected with data and control pins of the relay driving module D402, and driving outputs RLD101 to RLD105, RLD601 and RLD602 of the D402 are respectively connected with and control corresponding relays. The FIFO data and control interface of the CPLD chip D401 is connected with the FIFO data and control interface of the frequency spectrum testing device filtering amplification and data acquisition circuit. The data bus, the address bus and the control bus of the CPLD chip D401 are connected with the data bus, the address bus and the control bus of the embedded data processing unit ARM 7.

As shown in fig. 8, the circuit schematic diagram of the filtering amplification and data acquisition unit of the spectrum testing device is shown, the filtering amplification and data acquisition unit circuit includes a standard sampling resistor R601, relays RL601 to RL602, a programmable amplifier D601, a low-pass filter D602 and a high-speed analog-to-digital converter D603, wherein the 4 and 5 pins of the programmable amplifier D601 are connected with an input circuit composed of resistors R601 to R605, a diode Z601 and the relay RL601, the 7 pin of the programmable amplifier D601 is connected with the relay RL602, the 6 and 8 pins of the programmable amplifier D601 are respectively connected with capacitors C601 and C602, the 1 pin of the low-pass filter D602 is connected with the 3 pin of the relay RL602 through capacitors C603 to C605 and resistors R606 to R609, the 3 pin and 5 pin of the low-pass filter D602 are connected, the 2 pin of the low-pass filter D602 is connected with the capacitor C606 and the resistor R, the 4 pin of the low-pass filter D602 is connected with a capacitor C608, the pin 6 of the low-pass filter D602 is connected with a capacitor C607, the pin 8 of the low-pass filter D602 is connected with the pin 25 of the high-speed analog-digital converter D603 through a capacitor C609 and a resistor R610, the pin 7 of the low-pass filter D602 is connected with the pin 23 of the high-speed analog-digital converter D603 through a capacitor C610 and a resistor R611, the pins 16, 27 and 28 of the high-speed analog-digital converter D603 are connected with the capacitor C611 and a power supply, the pins 20 and 22 of the high-speed analog-digital converter D603, the capacitors C612 to C614 and the polar capacitor E601 form a loop, the pins 18 and 19 of the high-speed analog-digital converter D603, the capacitors C615 to C616 and the polar capacitor E602 form a loop, the pins 1 to 13 of the high-speed analog-digital converter D603 are respectively connected with the pins 1 to 2 of the chip D701, the pins 26 to 32 of the high-speed analog-digital converter D702 and the pins 1 to 2 and 31 to 32 of the chip D702, and the pins 1 to 2 of the chip D701 are connected with the pins 31 to 32.

The standard sampling resistor R601 is a resistor matched with 100 omega in noise test, the relay RL601 is switched by matching resistors, and the D601 is a program control amplifier and used for amplifying small noise signals so as to improve the test resolution. The low pass filter D602 has a 2.3MHz bandwidth and performs dc blocking, i.e. high pass filtering, on the signal in the impedance converter at the test input, so the test filter circuit is a band pass filter circuit and the signal is finally connected to the input of the analog to digital converter.

As shown in fig. 9, the schematic diagram of a FIFO memory circuit of a sampling data buffer unit of a spectrum test device is shown, the FIFO memory circuit is composed of 2 chips of 8-bit chips D701 and D702, pins 3 to 11, pins 22 to 25 and pins 12 to 20 of D701 are connected with pins 3 to 11, pins 22 to 25 and pins 12 to 20 of D702, and is used for storing test data continuously acquired by the test device in time domain coordinates, and the storage rate can be matched with a high-speed analog-to-digital converter. The 13-bit ADC data output by the high-speed analog-to-digital converter is connected to the 13-bit input end of the FIFO memory, the CPLD data and the control signal of the FIFO memory are connected to the CPLD, and the CPLD realizes storage timing control and data output reading.

The frequency domain passband parameters of the frequency spectrum test circuit are the requirements for the design of the bandpass filtering of the analog circuit, and the requirements for the setting of the sampling circuit and the data processing parameters. According to the frequency spectrum distribution of ADSL/ADSL2+, the test frequency band is from Tone6 frequency f _T6 (25.875 KHz) to Tone512 frequency f _T512 (2208 KHz), the subcarrier frequency interval is also considered to be 4.3125KHz, and the frequency band of the test band is taken as a discrete point between 21KHz and 2220 KHz.

The analog circuit amplifier properly amplifies and band-pass filters the signal, and then N-point noise voltage sampling data v (k) are obtained through timing sampling and analog-to-digital conversion, and all the data are distributed on a time domain coordinate at equal intervals. And then obtaining a discrete distribution function shown in the formula (1) through N-point discrete Fourier transformation.

The power spectral density of the signal at each frequency point on the 100 omega matching resistor is calculated according to the formula (3), and the signal power intensity in the passband or the window frequency band is calculated according to the formula (6).

The frequency reference signal output by the crystal oscillator X401 should be an integral multiple of the test sampling frequency f _S As determined by the calculation of equation (5), there may be three choices:

selecting 1: taking 2 times the lowest frequency, i.e. f _S ＝4.3125KHz×512×2×2＝8.832MHz， The upper limit of the frequency of the calculation result can reach 4.4116875MHz, and then part of effective data is intercepted from the test result.

Selecting 2: slightly greater than the lowest sampling frequency, i.e. f _S And the conversion operation of Fourier is complex and the utilization rate of hardware resources is highest if the value is 4.3125KHz multiplied by 513 multiplied by 2= 4.424625MHz.

Selecting 3: taking the lowest sampling frequency, i.e. f _S And (4) 4.3125KHz multiplied by 512 multiplied by 2=4.416MHz, so that the test data of the last sub-channel (2208 KHz) can not be obtained, and an estimation method can be adopted.

In the embodiment of the invention, the band-pass filter circuit selects the filter bandwidth from 3KHz to 2.3MHz and the sampling frequency f _S =8.832MHz, the number of sampling data points N =4096 is selected. The frequency reference signal output by the crystal oscillator X401 is set to 35.328MHz in consideration of the timing control.

As shown in fig. 10, a flowchart of a control program for testing the spectrum of an asymmetric digital subscriber line by using a frequency alignment method is shown, where the control program is programmed on a μ CLinux embedded operating system platform and runs in a control operation system composed of an embedded data processing unit ARM7 of a spectrum testing device, a peripheral circuit thereof, and a data processing unit memory circuit.

The spectrum testing steps are as follows:

the first step is as follows: the test circuit is initialized. And controlling to release all relays, setting the amplification factor of the programmable control amplifier to be 1, clearing the data cache unit FIFO, and clearing the sampling counter.

The second step is that: and testing and continuing. Controlling pull-in relays R101, R102 and R602, and if the operation is to test the circuit noise, pulling-in a relay RL601; if the operation is to monitor the transmission signal, the relay RL601 is not attracted.

The third step: sampling is initiated. And starting the analog-to-digital converter to sample the test data at the frequency of 8.832MHz, and controlling the data cache unit FIFO to synchronously store the sampled data.

The fourth step: and (5) amplification adjustment. And sampling 4096 point data every time, and adjusting the amplification times of the circuit according to the sampling data, wherein the adjustment times aim to amplify the maximum value of the signal to about 80% of the full scale of the analog-to-digital converter. 4096 points of data take about 0.5ms per sample, with a period of magnification adjustment of about 20ms each time.

The fifth step: fourier transform. 4096 valid sample data is read from FIFO memory, as per equation (1)The calculation result of the Fourier transform is a discrete distribution function V of the noise voltage in a frequency domain coordinate _F (n)， n＝1，2，...，2048。

And a sixth step: line noise test calculation, if the operation is to test line noise, calculating power spectral density P according to the formulas (2) and (3) _PSD (n), n =1,2,.., 2048, the power strength P of the selected window is calculated according to equation (6) _RMS . And judging the electrical environment and performance of the line according to the calculation result, and judging the connection state of the line.

The seventh step: and monitoring and calculating transmission signals. If the operation is to monitor the transmission signal, calculating the voltage spectral density V according to the equation (7) _VSD (n), n =1,2. And comparing and analyzing the calculation result with the sending and receiving parameters, and evaluating the running state and the performance of the line.

For the convenience of analysis and comparison, a Tone100 sub-channel 431.25KHz/100mV signal is also selected to be connected to an input port of the test device as a comparison test example, sampling frequency is 8.832mhz,4096 sampling data are involved in Fourier operation, PSD test results are shown in fig. 11, and distribution of PSD data near 431.25KHz is as follows:

sample number 197 198 199 200 201 202 203

Frequency (KHz) 424.7813 426.9375 429.0938 431.2500 433.4063.5625 437.7188

PSD(dBm) -101.0 -104.8 -98.5 -13.1 -103.0 -110.7 -102.6

The RMS value of the input signal power is-13.1 dBm, and the RMS theoretical value of the power intensity calculated according to equation (4) or equation (8) is-13.0 dBm. Comparing the signal power strength RMS with the PSD shows that the PSD distribution data in the measurement result has reached very high precision, the error between the 200 th point test data and the theoretical value is only 0.1dB, the data at other frequency points are caused by white noise of the line, and the relative value of the noise power spectrum is very small.

Claims (4)

1. A method for testing an asymmetric digital subscriber line spectrum using frequency alignment, comprising: the method comprises the steps of test circuit initialization, test connection, sampling starting, amplification adjustment, fourier transformation, line noise test calculation, transmission signal monitoring calculation and the like, and is characterized in that in the test connection step, an impedance matching module is respectively set to be 100 omega and open circuit according to two different test function requirements of test line noise and monitoring transmission signals set by test control.

2. The method for testing asymmetric digital subscriber line spectrum using frequency alignment as claimed in claim 1, wherein said sampling initiating step, the sampling frequency is set according to ADSL2/ADSL2+ standard spectrum:

f _S ＝4.3125×10 ³ xSx 2S is an integer of 512 or more

3. The method of claim 1 wherein the step of calculating the line noise test uses the formula:

to obtain P _RMS The noise power level RMS value is calculated in decibel-milliwatts (dBm).

4. The method of claim 1, wherein the step of monitoring and calculating the transmission signal comprises the following steps:

to obtain V _VSD And (n) is the spectral density value of voltage, calculated in decibel volts per hertz (dBv/Hz).

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