CN101141130B - D/A converter and correlation technique - Google Patents
D/A converter and correlation technique Download PDFInfo
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- CN101141130B CN101141130B CN2006101256434A CN200610125643A CN101141130B CN 101141130 B CN101141130 B CN 101141130B CN 2006101256434 A CN2006101256434 A CN 2006101256434A CN 200610125643 A CN200610125643 A CN 200610125643A CN 101141130 B CN101141130 B CN 101141130B
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- pulse width
- width modulating
- resistance
- voltage
- output voltage
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Abstract
The invention discloses a digital/analogue transformer that is used for generating an analogue output voltage according to a digital input value that consists of a plurality of sections. The invention consists of a plurality of pulse-width regulating units that are used for generating a plurality of pulse-width regulating signals according to a plurality of sections; a voltage generating circuit that is coupled with a plurality of width-pulse regulating unit and is used for generating the simulated output voltage according to a plurality of pulse-width signals.
Description
Technical field
The present invention relates to a kind of D/A, a kind of especially method and relevant apparatus that uses a plurality of use pwm unit to realize single D/A.
Background technology
(digital-to-analog converter DAC) is circuit unit common in the various electronic installations to D/A, and it can produce corresponding analog output voltage according to digital input value, for the circuit use of rear end.For instance, in television system, after the user has selected the television channel of desiring to view and admire, television system can determine a digital input value according to the selected television channel of user, and use a D/A to produce an analog output voltage according to this digital input value, come the TV signal that receives is carried out suitable processing according to this analog output voltage for a TV tuner (TV tuner).
Progress along with science and technology, electronic product is also more and more higher for the requirement of the resolution (resolution) of wherein D/A, more particularly, D/A must produce analog output voltage more accurately according to the more digital input value of figure place.Yet the resolution of D/A is high more, and its cost also can be high more, how to reduce the cost of high-resolution D/A, has become scientific and technological circle's problem to be solved.
Summary of the invention
Therefore, one of purpose of the present invention is to provide a kind of high-resolution D/A with lower cost, to solve the problem that prior art was faced.
The present invention discloses a kind of D/A, is used for producing an analog output voltage according to a digital input value.This digital input value includes a plurality of sections.This D/A includes: a plurality of pwm unit are used for respectively producing in a plurality of pulse width modulating signals corresponding one according in these a plurality of sections each; And a voltage generation unit, be coupled to this a plurality of pwm unit, be used for producing this analog output voltage according to these a plurality of pulse width modulating signals.
In above-mentioned D/A, first and second pwm unit in these a plurality of pwm unit is used for respectively producing first and second pulse width modulating signal in these a plurality of pulse width modulating signals according to first and second section in these a plurality of sections.And the significant degree of this first section in this digital input value is the doubly predetermined of the significant degree of this second section in this digital input value.
The present invention also discloses a kind of D/A switch method, is used for producing an analog output voltage according to a digital input value.This method includes: this digital input value is divided into a plurality of sections; Produce in a plurality of pulse width modulating signals corresponding one according in these a plurality of sections each respectively; And these a plurality of pulse width modulating signals of foundation produce this analog output voltage.Wherein, the work period of first pulse width modulating signal in these a plurality of pulse width modulating signals is when increasing by a percentage step, and the value that is about to this analog output voltage increases by one first voltage step; And work period of second pulse width modulating signal in this this a plurality of pulse width modulating signals when increasing this percentage step, the value that is about to this analog output voltage increases by one second voltage step; And this first voltage step is should being scheduled to doubly of this second voltage step.
In the above-mentioned D/A switch method, the step that produces these a plurality of pulse width modulating signals according to these a plurality of sections includes: first and second section in these a plurality of sections of foundation produces first and second pulse width modulating signal in these a plurality of pulse width modulating signals respectively; Wherein, the significant degree of this first section in this digital input value is that one of the significant degree of this second section in this digital input value is scheduled to doubly.
Description of drawings
Fig. 1 is the schematic diagram of D/A one embodiment of the present invention.
Fig. 2 is the schematic diagram of an aspect of the D/A of Fig. 1.
The reference numeral explanation
100 D/As
120_1,120_2 ..., the 120_M pwm unit
140 voltage generation units
R_1, R_2 ..., R_M resistance
C electric capacity
Embodiment
Pulse width modulation (pulse width modulation, PWM) being can be in order to realize a kind of technology of D/A, among prior art, when realizing high-resolution D/A, generally speaking all must use high-resolution pwm unit, for instance, if will realize the D/A of one 16 bit resolution, promptly must use the pwm unit of one 16 bit resolution.Yet the resolution of pwm unit is high more, and its cost also can be high more, and what is more, for pwm unit, along with the increase of resolution, the amplitude that its cost increases tends to the amplitude greater than its resolution increase.For instance, the cost of the pwm unit of one 16 bit resolution, can be higher than usually two 8 bit resolutions pwm unit cost and.
In order to reduce the cost of high-resolution D/A, the present invention proposes the notion of " use the relatively low pwm unit of a plurality of resolution, realize single the D/A that resolution is higher relatively ".Figure 1 shows that the schematic diagram of D/A one embodiment of the present invention.The resolution of the D/A 100 of present embodiment is M*N position (wherein, M and N are all positive integer), and in other words, it can produce an analog output voltage V according to the digital input value DI of a M*N position
OUT, wherein, the binary form of digital input value DI is B
M*N-1B
M*N-2B
M*N-3B
2B
1B
0, B
M*N-1Be highest significant position (MSB), the B among the digital input value DI
0It then is the least significant bit (LSB) among the digital input value DI.
The D/A 100 of present embodiment includes a M pwm unit 120_1～120_M and a voltage generation unit 140.The resolution of pwm unit 120_1～120_M is all the N position, and for an integer K (K is more than or equal to 1 and smaller or equal to M), a K pwm unit 120_K is used for a K position section B according among the digital input value DI
K*N-1B
K*N-2B
K*N-3B
(K-1) * N+2B
(K-1) * N+1B
(K-1) * NProduce a K pulse width modulating signal PWMS_K, briefly, the work period of K pulse width modulating signal PWMS_K, (duty cycle) was by K position section B
K*N-1B
K*N-2B
K*N-3B
(K-1) * N+2B
(K-1) * N+1B
(K-1) * NPairing value decides, because K position section B
K*N-1B
K*N-2B
K*N-3B
(K-1) * N+2B
(K-1) * N+1B
(K-1) * NIn include N position, so K pulse width modulating signal PWMS_K has the possible work period of 2^N kind, differ (2^N)-1 a percentage step between the work period of minimum and maximum.And under the situation of N=8, the size of a percentage step is about 0.3922%.
Whenever K position section B
K*N-1B
K*N-2B
K*N-3B
(K-1) * N+2B
(K-1) * N+1B
(K-1) * NValue increase at 1 o'clock, the work period of K pulse width modulating signal PWMS_K will increase a percentage step, this moment, voltage generation unit 140 can allow analog output voltage V
OUTIncrease a K voltage step VS_K.For different K values, the size of K voltage step VS_K can be different.For instance, because in digital input value DI, K
1The significant degree (significance) of position section is K
2The 2^[(K of the significant degree of position section
1-K
2) * N] doubly, so K
1Voltage step VS_K
1Also can be K
2Voltage step VS_K
22^[(K
1-K
2) * N] doubly.In other words, voltage step VS_1～VS_M meets following formula:
VS_M＝VS_(M-1)×2^N＝VS_(M-2)×2^(2*N)
＝……
＝VS_2×2^[(M-2)*N]＝VS_1×2^[(M-1)*N]
In order to make voltage step VS_1～VS_M meet above formula, voltage generation unit 140 in the present embodiment includes M resistance R _ 1-R_M and a capacitor C altogether, wherein, first end of K resistance R _ K is coupled to the output of K pwm unit 120_K to receive K pulse width modulating signal PWMS_K, second end of K resistance R _ K is coupled to first end of capacitor C, second end of capacitor C then is coupled to decides voltage node (for example earth point), then meets following formula as for the relation of the resistance between resistance R _ 1R_M:
R_M＝R_(M-1)×2^N＝R_(M-2)×2^(2*N)
＝……
＝R_2×2^[(M-2)*N]＝R_1×2^[(M-1)*N]
Though the resolution of the D/A 100 of present embodiment is the M*N position, but wherein do not use the pwm unit of M*N bit resolution, relatively, it is to use the pwm unit 120_1～120_M of M N bit resolution to realize the D/A 100 of M*N bit resolution.And,, can reduce the total cost of high-resolution D/A so use the practice of the present invention because the total cost of the pwm unit of M N bit resolution is lower than the cost of the pwm unit of a M*N bit resolution.
Shown in Figure 2 is the schematic diagram of an aspect of the D/A of Fig. 1.In Fig. 2, be as an example with M=2, N=8, at this moment, the binary form of digital input value DI is B
15B
14B
13B
2B
1B
0, first section is B
7B
6B
5B
2B
1B
0, second section is B
15B
14B
13B
10B
9B
8, the resolution of first, second pwm unit 120_1,120_2 is all 8, the resistance of second resistance R _ 2 be first resistance R _ 1 resistance 256 (that is 2^8) doubly.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.
Claims (8)
1. a D/A is used for producing an analog output voltage according to a digital input value, and this digital input value includes a plurality of sections, and this D/A includes:
A plurality of pwm unit are used for respectively producing in a plurality of pulse width modulating signals corresponding one according in these a plurality of sections each; And
One voltage generation unit, comprise a plurality of resistance and an electric capacity, first end of each of these a plurality of resistance is respectively coupled to these a plurality of pwm unit to receive corresponding in a plurality of pulse width modulating signals, first end of this electric capacity is coupled to second end of each resistance, second end of this electric capacity is coupled to decides voltage node, is used for producing this analog output voltage according to these a plurality of pulse width modulating signals.
2. D/A as claimed in claim 1, wherein, first and second pwm unit in these a plurality of pwm unit is used for respectively producing first and second pulse width modulating signal in these a plurality of pulse width modulating signals according to first and second section in these a plurality of sections.
3. D/A as claimed in claim 2, wherein, the significant degree of this first section in this digital input value is the doubly predetermined of the significant degree of this second section in this digital input value.
4. D/A as claimed in claim 3, wherein, when the work period of this first pulse width modulating signal increased by a percentage step, this voltage generation unit increased by one first voltage step with the value of this analog output voltage; When the work period of this second pulse width modulating signal increased this percentage step, this voltage generation unit increased by one second voltage step with the value of this analog output voltage; This first voltage step is should being scheduled to doubly of this second voltage step.
5. D/A as claimed in claim 3, wherein this voltage generation unit includes:
First resistance, first end of this first resistance are coupled to this first pwm unit to receive this first pulse width modulating signal;
Second resistance, first end of this second resistance are coupled to this second pwm unit to receive this second pulse width modulating signal; And
Electric capacity, first end of this electric capacity are coupled to second end of this first resistance and second end of this second resistance, are used for producing this analog output voltage, and second end of this electric capacity is coupled to the certain voltage node.
6. D/A as claimed in claim 5, wherein, the resistance of this first resistance is that being somebody's turn to do of resistance of this second resistance is scheduled to doubly.
7. a D/A switch method is used for producing an analog output voltage according to a digital input value, and this method includes:
This digital input value is divided into a plurality of sections;
Produce in a plurality of pulse width modulating signals corresponding one according in these a plurality of sections each respectively; And
Produce this analog output voltage according to these a plurality of pulse width modulating signals,
Wherein, the step that produces this analog output voltage according to these a plurality of pulse width modulating signals includes:
The work period of first pulse width modulating signal in these a plurality of pulse width modulating signals, the value that is about to this analog output voltage increased by one first voltage step when increasing by a percentage step; And
The work period of second pulse width modulating signal in this this a plurality of pulse width modulating signals, the value that is about to this analog output voltage increased by one second voltage step when increasing this percentage step;
Wherein, this first voltage step is the doubly predetermined of this second voltage step.
8. D/A switch method as claimed in claim 7, wherein, the step that produces these a plurality of pulse width modulating signals according to these a plurality of sections includes:
First and second section in these a plurality of sections of foundation produces first and second pulse width modulating signal in these a plurality of pulse width modulating signals respectively;
Wherein, the significant degree of this first section in this digital input value is the doubly predetermined of the significant degree of this second section in this digital input value.
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|---|---|---|---|
| CN2006101256434A CN101141130B (en) | 2006-09-04 | 2006-09-04 | D/A converter and correlation technique |
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|---|---|---|---|
| CN2006101256434A CN101141130B (en) | 2006-09-04 | 2006-09-04 | D/A converter and correlation technique |
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|---|---|
| CN101141130A CN101141130A (en) | 2008-03-12 |
| CN101141130B true CN101141130B (en) | 2011-06-01 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5872603A (en) * | 1993-10-29 | 1999-02-16 | Sanyo Electric Co., Ltd. | Analog circuit controller using signals indicative of control voltage and type of control voltage |
| CN1053300C (en) * | 1994-06-10 | 2000-06-07 | 诺思路·格鲁曼公司 | Digital pulse width modulator with integrated test and control |
| CN1484889A (en) * | 2001-04-06 | 2004-03-24 | 皇家菲利浦电子有限公司 | Digital to analogue converter |
-
2006
- 2006-09-04 CN CN2006101256434A patent/CN101141130B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5872603A (en) * | 1993-10-29 | 1999-02-16 | Sanyo Electric Co., Ltd. | Analog circuit controller using signals indicative of control voltage and type of control voltage |
| CN1053300C (en) * | 1994-06-10 | 2000-06-07 | 诺思路·格鲁曼公司 | Digital pulse width modulator with integrated test and control |
| CN1484889A (en) * | 2001-04-06 | 2004-03-24 | 皇家菲利浦电子有限公司 | Digital to analogue converter |
Non-Patent Citations (1)
| Title |
|---|
| 全文. |
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Effective date of registration: 20200416 Address after: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: Hsinchu County, Taiwan, China Patentee before: MStar Semiconductor, Inc. |
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