CN101083768B

CN101083768B - Coder for processing video data and coding method and decoder and decoding method

Info

Publication number: CN101083768B
Application number: CN2006100924467A
Authority: CN
Inventors: 张志明; 赵大星; 金铉文; 金大熙; 崔雄一
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 2006-06-02
Filing date: 2006-06-02
Publication date: 2010-04-14
Anticipated expiration: 2026-06-02
Also published as: KR20070115552A; KR101320611B1; CN101083768A

Abstract

Here, N bit original data can be processed without changing (1) the 16 bit storage used for the remain I/ O, (2) the 16 bit multiplier used for quantizing/ de-quantizing and (3) the arithmetic logic unit supporting 32 bit calculation.

Description

The encoder of processing video data and coding method and decoder and coding/decoding method

Technical field

The present invention relates to a kind of encoder and coding method and decoder and coding/decoding method that is used for processing video data.More particularly, the present invention relates to a kind of encoder and coding method and decoder and coding/decoding method that is used to handle the N bit video data, wherein, N is the integer greater than 8.

Background technology

Little by little, bigger screen and the resolution of Geng Gao are advocated in visual communication system and application.In consumer electronics market, because the appearance of big CRT, LCD, PDP and high definition projection TV has promoted this trend, and owing to the increase of the visual information of also storing with type number word processings such as MPEG, DVD, DV has further promoted this trend.Equally, improve with high-resolution and be presented at image on the large-screen and the quality of video becomes extremely important.

During processing video data, current codec adopts 16 bit memory and 16 bit multipliers can handle 8 bit inputting video datas.

Along with increase, need the audio-video codec to come to encoding more than the moving image of 8 bit pixel to high definition and high-quality Video service demand.Yet current codec only can be handled 8 bits input data, can not satisfy for the demand of carrying out coding/decoding greater than the input data of 8 bits.

Summary of the invention

Make the present invention in order to solve above-mentioned shortcoming and the other problem relevant with prior art.The objective of the invention is a kind of encoder and coding method and corresponding decoder and coding/decoding method that is used to handle the former data of N bit.

According to an aspect of the present invention, provide a kind of encoder that is used to handle the former data of N bit, it comprises coding controller, conversion and Zoom module and inverse transformation and Zoom module.

Wherein, coding controller extracts the information about the bit-depth N of input signal, and the whole operation of controlled encoder.

Conversion and Zoom module comprise: the dct transform module is used for input data matrix is carried out the integer dct transform, to produce first matrix; The first division module is used for producing second matrix according to first matrix and first predetermined value that are produced by the dct transform module; First multiplier is used for second matrix and the predetermined array S[i that produce by the first division module] carry out multiplying each other based on the array in territory, to produce the 3rd matrix; The second division module is used for producing the 4th matrix according to the 3rd matrix and second predetermined value that are produced by first multiplier; Second multiplier is used for the 4th matrix and the predetermined array q[QP that produce by the second division module] element multiply each other, to produce the 5th matrix; And shift module, be used for the 5th matrix and the predetermined value k sum that are produced by second multiplier are carried out shifting function, to produce the 6th matrix.

Inverse transformation and Zoom module comprise: the 3rd multiplier is used for the 6th matrix and the predetermined array r[QP that will be produced by shift module] element multiply each other, to produce the 7th matrix; The 3rd division module, the 7th matrix that is used for being produced by the 3rd multiplier is divided by predetermined array n[QP] element and get immediate integer, to produce the 8th matrix; With the idct transform module, be used for the 8th matrix that is produced by the 3rd division module is carried out integer idct transform and convergent-divergent computing, to produce the 9th matrix.

Wherein, N is the integer greater than 8, QP=[0,63+8* (N-8)], described first predetermined value and second predetermined value are determined according to the value of N.

According to a further aspect in the invention, provide a kind of coding method that is used to handle the former data of N bit, this method comprises: the information of (a) extracting the bit-depth N of indication input signal; (b) input data matrix is carried out the integer dct transform, to produce first matrix; (c) produce second matrix according to first matrix and first predetermined value; (d) with second matrix and predetermined array S[i] carry out multiplying each other based on the array in territory, to produce the 3rd matrix; (e) produce the 4th matrix according to the 3rd matrix and second predetermined value; (f) with the 4th matrix and predetermined array q[QP] in element multiply each other, to produce the 5th matrix; (g) the 5th matrix and predetermined value k sum are carried out shifting function, to produce the 6th matrix; (h) with the 6th matrix and predetermined array r[QP] in element multiply each other, to produce the 7th matrix; (i) with the 7th matrix divided by predetermined array n[QP] in element and get immediate integer, to produce the 8th matrix; (j) the 8th matrix is carried out integer idct transform and convergent-divergent computing, to produce the 9th matrix.

According to a further aspect in the invention, provide a kind of decoder that is used to handle with the corresponding incoming bit stream of the former data of N bit, it comprises decode controller, entropy decoder module and inverse transformation and Zoom module.

Wherein, the entropy decoder module is decoded to incoming bit stream, to produce control corresponding data, exercise data and quantized data, control data is outputed to decode controller, and quantized data is outputed to inverse transformation and Zoom module.

The decode controller reception comprises the control data about the information of the bit-depth N of incoming bit stream, and the whole operation of control decoder.

Inverse transformation and Zoom module are to quantized data execution integer idct transform and convergent-divergent computing from the output of entropy decoder module, and the output residual data,

Described inverse transformation and Zoom module comprise: first multiplier is used for first matrix and predetermined array r[QP with quantized data] in element multiply each other, to produce second matrix; The first division module, second matrix that is used for being produced by first multiplier is divided by predetermined array n[QP] element and get immediate integer, to produce the 3rd matrix; With the idct transform module, be used for the 3rd matrix that is produced by the first division module is carried out integer idct transform and convergent-divergent computing, to produce the 4th matrix.

Wherein, N is the integer greater than 8, QP=[0,63+8* (N-8)].

According to a further aspect in the invention, a kind of coding/decoding method that is used to handle with the corresponding incoming bit stream of the former data of N bit is provided, this method comprises: (a) incoming bit stream is decoded, to produce control corresponding data, exercise data and quantized data, described control data comprises the information about the bit-depth N of incoming bit stream; (b) with first matrix in the quantized data and predetermined array r[QP] in element multiply each other, to produce second matrix; (c) with second matrix divided by predetermined array n[QP] in element and get immediate integer, to produce the 3rd matrix; (d) the 3rd matrix is carried out integer idct transform and convergent-divergent computing, to produce the 4th matrix.

Wherein, N is the integer greater than 8, QP=[0,63+8* (N-8)].

Will be in ensuing description part set forth the present invention other aspect and/or advantage, some will be clearly by describing, and perhaps can learn through enforcement of the present invention.

Description of drawings

By the description of carrying out below in conjunction with accompanying drawing, above-mentioned and/or other aspects of the present invention and advantage will become apparent and be easier to understand, wherein:

Fig. 1 is the block diagram that illustrates according to the video encoder of the embodiment of the invention;

Fig. 2 is the block diagram that illustrates according to the detailed structure of the conversion as shown in Figure 1 of first embodiment of the invention and Zoom module 113 and inverse transformation and Zoom module 114;

Fig. 3 be illustrate as shown in Figure 2 conversion and the flow chart of the operation of Zoom module 113 and inverse transformation and Zoom module 114;

Fig. 4 illustrates according to the conversion of second embodiment of the invention and the detailed structure view of Zoom module 413 and inverse transformation and Zoom module 414;

Fig. 5 be illustrate as shown in Figure 4 conversion and the flow chart of the operation of Zoom module 413 and inverse transformation and Zoom module 414;

Fig. 6 is the block diagram that illustrates according to the Video Decoder of the embodiment of the invention;

Fig. 7 is the block diagram that illustrates according to the detailed structure of the inverse transformation of third embodiment of the invention and Zoom module 614;

Fig. 8 be illustrate as shown in Figure 7 inverse transformation and the flow chart of the operation of Zoom module 614;

Fig. 9 is the block diagram that illustrates according to the detailed structure of the inverse transformation of fourth embodiment of the invention and Zoom module 914;

Figure 10 be illustrate as shown in Figure 9 inverse transformation and the flow chart of the operation of Zoom module 914;

Figure 11 shows according to the PSNR of first embodiment of the invention and the curve chart of the relation between the bit rate; With

Figure 12 A and 12B are according to the PSNR of second embodiment of the invention and the curve chart of the relation between the bit rate.

In the whole accompanying drawing, represent identical part, assembly and structure with understanding identical label.

Embodiment

Now, describe embodiments of the invention in detail, its example represents that in the accompanying drawings wherein, identical label is represented identical parts all the time.Below by embodiment being described with reference to the drawings to explain the present invention.

Come motion image data is carried out Code And Decode based on motion estimation technique.With reference to predicting based on the previous frame of time shaft or previous frame and future frame.The frame of reference is called as reference frame when present frame is encoded or decoded.In block-based moving image encoding process, the rest image (frame) that is included in the moving image is divided into macro block, and macro block is divided into sub-piece.Therefore, on block-by-block basis, the motion of rest image is predicted and encoded.

Fig. 1 illustrates the block diagram according to the video encoder of the embodiment of the invention.

With reference to Fig. 1, encoder comprises separator 100, predicting unit 110, adder 112, coding controller 120, conversion and Zoom module 113 and entropy coding module 130.

Coding controller 120 extracts the information of the bit-depth N of indication incoming video signal, and whole operations of controlled encoder.

When the former data of 8 bits are transfused to, separator 100 under the control of coding controller 120, select the frame that will be encoded or.For each frame or field, it is separated into MB (macro block).Each MB is made up of 16 * 16 pixels.That is, frame that will be encoded or field are separated into a plurality of 16 * 16 pixel MB (described 16 * 16 pixel MB are made up of a plurality of 16 * 16 blocks and/or a plurality of 8 * 8 blocks).

In adder 112, deducted in the initial data of self-separation device 100 always from the prediction data of intra-framed prediction module 117 or inter prediction module 118, to provide difference data.Hereinafter, this result who subtracts each other is called as X.

113 pairs of difference datas of conversion and Zoom module carry out integer dct transform and quantification, and quantized data is outputed to predicting unit 110.

Predicting unit 110 comprises inverse transformation and Zoom module 114, adder 111, goes piece module 115, memory 116, intra-framed prediction module 117, inter prediction module 118 and motion estimation module 119.

114 pairs of inverse transformation and Zoom modules come the quantized data of transformation into itself and Zoom module 113 to carry out contrary integer dct transform and zoom operations, and the output residual data.

In adder 111, residual data with from the prediction data addition of intra-framed prediction module 117 or inter prediction module 118, and the result is output to piece module 115.

Go piece module 115 that its input data are carried out loop filtering removing piece, and will go agllutination really to output to memory 116.

The data that are input to memory 116 are saved and are reference data, and this reference data will be used in the prediction afterwards.

Intra-framed prediction module 117 is carried out infra-frame prediction, and inter prediction module 118 execution inter predictions, and inter prediction is also referred to as motion compensation.Extract and the corresponding predicted macroblock of motion vector in the reference frame of inter prediction module 118 from memory 116, and the predicted macroblock of reference frame is carried out motion compensation with prediction of output data.

Motion estimation module 119 is searched for the reference frame of macro block in memory 116, and motion vector is outputed to inter prediction module 118.

Entropy coding module 130 receives control data, exercise data (if exercise data is arranged) and quantized data, and they are combined as output bit flow.

Fig. 2 illustrates according to the conversion as shown in Figure 1 of first embodiment of the invention and the detailed structure view of Zoom module 113 and inverse transformation and Zoom module 114.

With reference to Fig. 2, conversion and Zoom module 113 according to first embodiment of the invention comprise dct transform module 200, the first division module 220, first multiplier 230, the second division module 240, second multiplier 250 and shift module 260, comprise the 3rd multiplier 270, the 3rd division module 280 and IDCT module 290 according to the inverse transformation and the Zoom module 114 of the first embodiment of the present invention.

Fig. 3 be illustrate as shown in Figure 2 conversion and the flow chart of the operation of Zoom module 113 and inverse transformation and Zoom module 114.

With reference to Fig. 2 and Fig. 3, at first, at step S300,8 * 8 data matrix X are imported into dct transform module 200, the information that dct transform module 200 receives about bit-depth N.

At step S310,8 * 8 data matrix X of 200 pairs of inputs of dct transform module carry out the integer dct transform with output matrix B.

At step S320, in the first division module 220, matrix B is divided by ShiftTab 0, and gets immediate integer with output matrix C.

At step S330, in first multiplier 230, Matrix C and predetermined array S[i] carry out array multiplication based on the territory, with output matrix D.

At step S340, in the second division module 240, matrix D is divided by ShiftTab 1, and gets immediate integer with output matrix E.

At step S350, in second multiplier 250, matrix E and predetermined array q[QP] element multiply each other, with output matrix F.

At step S360, at shift module 260, to matrix F and predetermined value k with carry out shifting function with output matrix G.

At step S370,, matrix G and predetermined array r[QP at the 3rd multiplier 270] element multiply each other, with output matrix H.

At step S380, in the 3rd division module 280, matrix H is divided by predetermined array n[QP] element, and get immediate integer, with output matrix I.

At step S390,, matrix I is carried out the integer ID CT and the zoom operations of some row, with output matrix M in IDCT module 290.

Total operation described above is following listed:

A＝T·X

B＝A·T ^T

C＝B//ShiftTab0

D＝s[i].*C

E＝D//ShiftTab1

F＝q[QP].E

G＝(F+k)＞＞15(Intra：k＝(1＜＜15)*10/31；Inter：k＝(1＜＜15)*10/62)

H＝r[QP].G

I＝H//n[QP]

J＝I·T

K＝J//3

L＝T ^T·K

M＝L//7

Wherein, T is 8 * 8DCT transformation matrix, T ^TBe the transposed matrix of T, symbol " // " expression division, and get immediate integer, promptly following defined computing:

A//b=sign (a) * [(abs (a)+2 ^B-1The b of)＞＞], wherein

＞＞dextroposition

abs (x) = \{\begin{matrix} x; & x > = 0 \\ - x; & x < 0 \end{matrix}

sign (x) = \{\begin{matrix} 1; & x > = 0 \\ - 1; & x < 0 \end{matrix},

Being divided by and getting immediate integer of being mentioned in the present invention all is meant computing as defined above.

Symbol " " is the symbol of matrix multiplication, symbol ". " expression multiplication, and symbol " .* " is represented the array multiplication based on the territory, wherein,

For row=0,4}, row=0, the coefficient of 4} multiply by s[0]

For row=1,3,5,7}, row=1,3,5,7} multiply by s[1]

For row=2,6}, row=2,6} multiply by s[2]

For row=0,4}, row=1,3,5, the coefficient of 7}, perhaps the row=1,3,5,7}, row=0, the coefficient of 4} multiply by s[3]

For row=0,4}, row=2, the coefficient of 6}, perhaps the row=2,6}, row=0, the coefficient of 4} multiply by s[4]

For other coefficients, multiply by s[5].

For the N bit expanded of no QP expansion, the element in DCT, IDCT and the scaled matrix defines by following principle:

The QP scope is [0,63]

v[6]＝{512*512，442*442，464*464，512*442，512*464，442*464}

s[i]≈(2^33)/v(i)(i＝0～5)

q[QP]≈2^15/(2^(QP/8))(QP＝0～63)

q[QP]*r[QP]≈2^(16+n[QP])(QP＝0～63)

Wherein, " ^ " expression array power.

Symbol " ≈ " expression approximates greatly.

ShiftTab0 and ShiftTab1 determine according to the quantity of N bit.For example,

For 10 Bit datas, ShiftTab0=7, ShifitTab1=17

For 12 Bit datas, ShiftTab0=9, ShifitTab1=15.

According to the first embodiment of the present invention, N bit (10 bits, 12 bits even 14 bits) the former data of pinpoint accuracy can be processed in video encoder.Simultaneously, code efficiency is held, even improves in high SNR.

In addition, according to the first embodiment of the present invention, in current video encoder, be used for remaining input and output 16 bit memory, be used to quantize and 16 bit multipliers of de-quantization, support the arithmetic logic unit of 32 bit computings to be held constant.Therefore, be minimum to decoder modifications.

Yet, even during have the N bit when video encoder the rises to digital coding performance of (N is the integer except 8), problem still exists: carry out under the situation of digital coding at the bit that uses varying number, can not obtain identical bit rate and visual quality (being represented by PSNR) down at identical QP (quantization parameter).For example, under the situation of 8 Bit datas coding and QP=0, bit rate is 10Mbps, and PSNR is 35dB, and under the situation of 10 Bit datas coding and QP=0, bit rate may be 20Mbps, and PSNR may be 45dB.In order to obtain the bit rate of 10Mbps and the PSNR of 35dB under the situation of 10 Bit datas coding, suitable QP should be calculated, and this has caused inconvenient and more substantial calculating.

Below, with reference to Fig. 4 and Fig. 5 the second embodiment of the present invention is described.

According to a second embodiment of the present invention, the N bit expanded is carried out the QP expansion.The QP scope is expanded.Specifically, the QP scope is expanded as follows: QP '=QP+ (BitDepth-8) * 8, and wherein, " QP " statement is used for the quantization parameter of current conversion, and QP ' is the QP of up-to-date expansion.For the former data of 8 bits, QP '=QP+ (8-8) * 8=[0,63].For the former data of 10 bits, QP '=QP+ (10-8) * 8=[0,79]; For the former data of 12 bits, QP '=QP+ (12-8) * 8=[0,95], wherein, " QP " expression is used for the quantization parameter of current conversion.

Fig. 4 illustrates according to illustrating according to the conversion of second embodiment of the invention and the detailed structure view of Zoom module 413 and inverse transformation and Zoom module 414.

With reference to Fig. 4, conversion and Zoom module 413 according to second embodiment of the invention comprise dct transform module 200, the first division module 220, first multiplier 230, the second division module 240, second multiplier 450 and shift module 260, comprise the 3rd multiplier 470, the 3rd division module 480 and IDCT module 290 according to the inverse transformation and the Zoom module 414 of second embodiment of the invention.

Hereinafter with reference to Fig. 5 describe in detail as shown in Figure 4 conversion and the operation of Zoom module and inverse transformation and Zoom module.

Fig. 5 be illustrate as shown in Figure 4 conversion and the flow chart of the operation of Zoom module 413 and inverse transformation and Zoom module 414.

With reference to Fig. 5, step S500-540, S560 and S590 are identical with those steps among Fig. 3, will omit detailed description.

At step S550,, matrix E and predetermined array q[QP ' at second multiplier 450] element multiply each other, with output matrix F.

At step S570,, matrix G and predetermined array r[QP ' at the 3rd multiplier] element multiply each other, with output matrix H.

In step 580, in the 3rd division module 480, matrix H is divided by predetermined array n[QP '] element, and get immediate integer, with output matrix I.

Total operation described above is following listed:

A＝T·X

B＝A·T ^T

C＝B//ShiftTab0

D＝s[i].*C

E＝D//ShiftTab1

F＝q[QP′].E

H＝r[QP′].G

I＝H//n[QP′]

J＝I·T

K＝J//3

L＝T ^T·K

M＝L//7

Wherein, T is 8 * 8DCT transformation matrix, T ^TBe the transposed matrix of T, symbol " // " expression division, and get immediate integer, its concrete implication as previously mentioned, symbol " " is the symbol of matrix multiplication, symbol ". " expression multiplication, symbol " .* " expression is based on the array multiplication in territory, wherein,

For row=0,4}, row=0, the coefficient of 4} multiply by s[0]

For row=1,3,5,7}, row=1,3,5,7} multiply by s[1]

For row=2,6}, row=2,6} multiply by s[2]

For other coefficients, multiply by s[5].

For the N bit expanded that the QP expansion is arranged, the element in DCT, IDCT and the scaled matrix defines by following principle:

QP ' scope is [0,63+8* (N-8)]

v[6]＝{512*512，442*442，464*464，512*442，512*464，442*464}

s[i]≈(2^33)/v(i)(i＝0～5)

q[QP′]≈2^15/(2^(QP′/8))(QP′＝0～63+8*(N-8))

q[QP′]*r[QP′]≈2^(16+n[QP′])(QP′＝0～63+8*(N-8))

Wherein, " ^ " expression array power.

Symbol " ≈ " expression approximates greatly.

In a second embodiment, with N=10 be example:

X is the 8x8 data matrix of input,

T is the 8x8DCT transformation matrix, and

T＝[8?8?8?8?8?8?8?8

10?9?6?2?-2?-6?-9?-10

10?4?-4?-10?-10?-4?4?10

9?-2?-10?-6?6?10?2?-9

8?-8?-8?8?8?-8?-8?8

6?-10?2?9?-9?-2?10?-6

4?-10?10?-4?-4?10?-10?4

2?-6?9?-10?10?-9?6?-2]

s[6]＝{32768，43969，39898，37958，36158，41884}

q[80]＝{32768，29775，27554，25268，23170，21247，19369，17770，

16302，15024，13777，12634，11626，10624，9742，8958，

8192，7512，6889，6305，5793，5303，4878，4467，

4091，3756，3444，3161，2894，2654，2435，2235，

2048，1878，1722，1579，1449，1329，1218，1117，

1024，939，861，790，724，664，609，558，

512，470，430，395，362，332，304，279，

256，235，215，197，181，166，152，140，

128，117，108，99，91，83，76，70，

64，59，54，49，45，41，38，35}

r[80]＝{32768，36061，38968，42495，46341，50535，55437，60424，

32932，35734，38968，42495，46177，50535，55109，59933，

65535，35734，38968，42577，46341，50617，55027，60097，

32809，35734，38968，42454，46382，50576，55109，60056，

65535，35734，38968，42495，46320，50515，55109，60076，

65535，35744，38968，42495，46341，50535，55099，60087，

65535，35734，38973，42500，46341，50535，55109，60097，

32771，35734，38965，42497，46341，50535，55109，60099，

65535，35852，38832，42380，46086，50535，55193，59933，

65535，35541，38843，42795，46603，51160，55182，59933}

n[80]＝{14，14，14，14，14，14，14，14，

13，13，13，13，13，13，13，13，

13，12，12，12，12，12，12，12，

11，11，11，11，11，11，11，11，

11，10，10，10，10，10，10，10，

10，9，9，9，9，9，9，9，

9，8，8，8，8，8，8，8，

7，7，7，7，7，7，7，7，

7，6，6，6，6，6，6，6，

6，5，5，5，5，5，5，5}

Constant k is defined as:

Piece: k=(1＜＜15) * 10/31 in the frame

Interframe block: k=(1＜＜15) * 10/62

According to second embodiment of the invention, even in the coding of different Bit datas, can obtain identical bit rate and PSNR for identical QP.For example, in 8 Bit datas coding and 10 Bit datas coding, for QP=0, bit rate is 10Mbps, and PSNR is 35dB.Therefore, amount of calculation and complicated system's setting have been reduced.Thereby no matter bit-depth, the QP invariant mass can be obtained.

Under the situation that QP is expanded, also use the brightness QP range mappings of expansion for the QP of chrominance block.The mapping table of stipulating in the current video system remains unchanged.

Fig. 6 is the block diagram that illustrates according to the Video Decoder of the embodiment of the invention.

With reference to Fig. 6, decoder comprises decode controller 620, entropy decoder module 630, inverse transformation and Zoom module 614, adder 611, goes piece module 615, memory 616, intra-framed prediction module 617 and inter prediction module 618.

630 pairs of incoming bit streams of entropy decoder module are decoded to produce control corresponding data, exercise data (if exercise data is arranged) and quantized data, and control data is outputed to decode controller 620, exercise data is outputed to inter prediction module 618, and quantized data is outputed to inverse transformation and Zoom module 614.

Decode controller 620 receives total operation of control data and control decoder.

614 pairs of quantized datas from entropy decoder module 630 of inverse transformation and Zoom module are carried out contrary integer DCT and zoom operations, and the output residual data.

In adder 611, residual data with from the prediction data addition of intra-framed prediction module 617 or inter prediction module 618, the result is output to piece module 615.

Go piece module 615 that the data of its input are carried out loop filtering removing piece, and will go agllutination really to output to memory 616.

The data that are input to memory 616 are saved and are reference data, and reference data is combined into output video.

Intra-framed prediction module 617 is carried out infra-frame prediction, and inter prediction module 618 is carried out inter prediction, and inter prediction is also referred to as motion compensation.Extract and the corresponding predicted macroblock of motion vector in the reference frame of inter prediction module 618 from memory 616, and the predicted macroblock of reference frame is carried out motion compensation with prediction of output data.

Fig. 7 illustrates according to the inverse transformation of third embodiment of the invention and the detailed structure view of Zoom module 614.

With reference to Fig. 7, comprise first multiplier 770, the first division module 780 and IDCT module 790 according to the inverse transformation and the Zoom module 614 of third embodiment of the invention.

Fig. 8 be illustrate as shown in Figure 7 inverse transformation and the flow chart of the operation of Zoom module 614.

With reference to Fig. 7 and Fig. 8, the bit stream of 630 pairs of inputs of entropy decoder module is decoded, to produce control corresponding data, exercise data (if exercise data is arranged) and quantized data.At step S800, be imported into first multiplier 770 from the quantized data of entropy decoder module 630.

At step S810,, matrix G and predetermined array r[QP at first multiplier 770] element multiply each other, with output matrix H.

At step S820, in the first division module 780, matrix H is divided by predetermined array n[QP] element, and get immediate integer, with output matrix I.

At step S830,, matrix I is carried out the integer ID CT and the zoom operations of some row, with output matrix M in IDCT module 790.

Total operation described above is following listed:

H＝r[QP].G

I＝H//n[QP]

J＝I·T

K＝J//3

L＝T ^T·K

M＝L//7

For row=0,4}, row=0, the coefficient of 4} multiply by s[0]

For row=1,3,5,7}, row=1,3,5,7} multiply by s[1]

For row=2,6}, row=2,6} multiply by s[2]

For other coefficients, multiply by s[5].

The QP scope is [0,63]

v[6]＝{512*512，442*442，464*464，512*442，512*464，442*464}

s[i]≈(2^33)/v(i)(i＝0～5)

q[QP]≈2^15/(2^(QP/8))(QP＝0～63)

q[QP]*r[QP]≈2^(16+n[QP])(QP＝0～63)

Wherein, " ^ " expression array power.

Symbol " ≈ " expression approximates greatly.

A third embodiment in accordance with the invention, with the corresponding incoming bit stream of N bit (10 bits, 12 bits even 14 bits) the former data of pinpoint accuracy can be processed in video encoder.In addition, a third embodiment in accordance with the invention in current video encoder, for 16 bit memory of remaining input and output, is used to quantize 16 bit multipliers with de-quantization, supports the arithmetic logic unit of 32 bit computings to be held constant.Therefore, carried out minimal modifications to decoder.

Yet, even during have the N bit when video encoder the rises to digital coding capacity of (N is the integer except 8), problem still exists: carry out under the situation of digital coding at the bit that uses varying number, can not obtain identical bit rate and visual quality (being represented by PSNR) down at identical QP (quantization parameter).For example, under the situation of 8 Bit datas codings and QP=0, bit be 10Mbps, PSNR is 35dB, and 10 Bit datas encode and the situation of QP=0 under, bit rate will be 20Mbps, PSNR can be 45dB.In order to obtain the bit rate of 10Mbps and the PSNR of 35dB under the situation of 10 Bit datas coding, suitable QP should be calculated, and this has caused inconvenient and more substantial calculating.

Below, with reference to Fig. 9 and Figure 10 the fourth embodiment of the present invention is described.

A fourth embodiment in accordance with the invention, the N bit expanded is carried out in expansion to QP.The QP scope is expanded.Specifically, the QP scope is expanded as follows: QP '=QP+ (BitDepth-8) * 8, and wherein, " QP " statement is used for the quantization parameter of current conversion, and QP ' is the QP of up-to-date expansion.Former for 8 bits, data, QP '=QP+ (8-8) * 8=[0,63].For the former data of 10 bits, QP '=QP+ (10-8) * 8=[0,79]; For the former data of 12 bits, QP '=QP+ (12-8) * 8=[0,95], wherein, " QP " expression is used for the quantization parameter of current conversion.

Fig. 9 illustrates according to the inverse transformation of fourth embodiment of the invention and the detailed structure view of Zoom module 914.

With reference to Fig. 9, comprise first multiplier 970, the first division module 980 and IDCT module 990 according to the inverse transformation and the Zoom module 914 of fourth embodiment of the invention

Below, with reference to Figure 10 describe in detail as shown in Figure 9 inverse transformation and the operation of Zoom module 914.

Figure 10 be illustrate as shown in Figure 9 inverse transformation and the flow chart of the operation of Zoom module 914.

With reference to Figure 10,630 pairs of incoming bit streams of entropy decoder module are decoded to produce control corresponding data, exercise data (if having exercise data) and quantized data.At step S1000, be imported into first multiplier 970 from the quantized data of entropy decoder module 630.

At step S1010, at first multiplier 970, matrix G and predetermined array r[QP] multiply each other, with output matrix H.

At step S1020, in the first division module 980, matrix H is divided by n[QP '], and get immediate integer, with output matrix I.

At step S1030,, matrix I is carried out the integer ID CT and the zoom operations of some row, with output matrix M in IDCT module 990.

Total operation described above is following listed:

H＝r[QP′].G

I＝H//n[QP′]

J＝I·T

K＝J//3

L＝T ^T·K

M＝L//7

Wherein, T is 8 * 8DCT transformation matrix, T ^TBe the transposed matrix of T, symbol " // " expression division, and get immediate integer, its concrete implication as previously mentioned, symbol " " is the symbol of matrix multiplication, symbol ". " expression array multiplication, symbol " .* " expression is based on the array multiplication in territory, wherein,

For row=0,4}, row=0, the coefficient of 4} multiply by s[0]

For row=1,3,5,7}, row=1,3,5,7} multiply by s[1]

For row=2,6}, row=2,6} multiply by s[2]

For other coefficients, multiply by s[5].

QP ' scope is [0,63+8* (N-8)]

v[6]＝{512*512，442*442，464*464，512*442，512*464，442*464}

s[i]≈(2^33)/v(i)(i＝0～5)

q[QP′]≈2^15/(2^(QP′/8))(QP′＝0～63+8*(N-8))

q[QP′]*r[QP′]≈2^(16+n[QP′])(QP′＝0～63+8*(N-8))

Wherein, " ^ " expression array power.

Symbol " ≈ " expression approximates greatly.

In a second embodiment, with N=10 be example:

X is the 8x8 data matrix of input,

T is the 8x8DCT transformation matrix, and

T＝[8?8?8?8?8?8?8?8

10?9?6?2?-2?-6?-9?-10

10?4?-4?-10?-10?-4?4?10

9?-2?-10?-6?6?10?2?-9

8?-8?-8?8?8?-8?-8?8

6?-10?2?9?-9?-2?10?-6

4?-10?10?-4?-4?10?-10?4

2?-6?9?-10?10?-9?6?-2]

s[6]＝{32768，43969，39898，37958，36158，41884}

q[80]＝{32768，29775，27554，25268，23170，21247，19369，17770，

16302，15024，13777，12634，11626，10624，9742，8958，

8192，7512，6889，6305，5793，5303，4878，4467，

4091，3756，3444，3161，2894，2654，2435，2235，

2048，1878，1722，1579，1449，1329，1218，1117，

1024，939，861，790，724，664，609，558，

512，470，430，395，362，332，304，279，

256，235，215，197，181，166，152，140，

128，117，108，99，91，83，76，70，

64，59，54，49，45，41，38，35}

r[80]＝{32768，36061，38968，42495，46341，50535，55437，60424，

32932，35734，38968，42495，46177，50535，55109，59933，

65535，35734，38968，42577，46341，50617，55027，60097，

32809，35734，38968，42454，46382，50576，55109，60056，

65535，35734，38968，42495，46320，50515，55109，60076，

65535，35744，38968，42495，46341，50535，55099，60087，

65535，35734，38973，42500，46341，50535，55109，60097，

32771，35734，38965，42497，46341，50535，55109，60099，

65535，35852，38832，42380，46086，50535，55193，59933，

65535，35541，38843，42795，46603，51160，55182，59933}

n[80]＝{14，14，14，14，14，14，14，14，

13，13，13，13，13，13，13，13，

13，12，12，12，12，12，12，12，

11，11，11，11，11，11，11，11，

11，10，10，10，10，10，10，10，

10，9，9，9，9，9，9，9，

9，8，8，8，8，8，8，8，

7，7，7，7，7，7，7，7，

7，6，6，6，6，6，6，6，

6，5，5，5，5，5，5，5}

Constant k is defined as:

Piece: k=(1＜＜15) * 10/31 in the frame

Interframe block: k=(1＜＜15) * 10/62

According to fourth embodiment of the invention, even in the coding of different Bit datas, can obtain identical bit rate and PSNR for identical QP.For example, in decoding of 8 Bit datas and the decoding of 10 Bit datas, for QP=0, bit rate is 10Mbps, and PSNR is 35dB.Therefore, amount of calculation and complication system setting are lowered.Thereby no matter bit-depth, the constant quantity of QP can be obtained.

Under the situation that QP is expanded, for the QP of chrominance block also with the brightness QP range mappings of expansion.The mapping table of stipulating in the current video system remains unchanged.

Figure 11 is the curve chart of the relation between PSNR and bit rate under the situation of the N bit expanded that no QP expands that shows according to first embodiment of the invention; Figure 12 A and Figure 12 B are the curve chart of demonstration according to the relation between PSNR and bit rate under the situation of the N bit expanded that the QP expansion is arranged of second embodiment of the invention.

With reference to Fig. 1 and Figure 12 A and 12B, code efficiency is held even improves in high PSNR as can be seen.

Although specifically shown and described the present invention with reference to its exemplary embodiment, but it should be appreciated by those skilled in the art, under situation about not breaking away from, can carry out various changes on form and the details to it by the spirit and scope of the present invention of claims definition.

Claims

1. an encoder that is used to handle the former data of N bit comprises coding controller, conversion and Zoom module and inverse transformation and Zoom module,

Wherein, coding controller extracts the information about the bit-depth N of input signal, and the whole operation of controlled encoder,

Conversion and Zoom module comprise:

The dct transform module is used for input data matrix is carried out the integer dct transform, to produce first matrix;

The first division module is used for producing second matrix according to first matrix and first predetermined value that are produced by the dct transform module;

First multiplier is used for second matrix and the predetermined array S[i that produce by the first division module] carry out multiplying each other based on the array in territory, to produce the 3rd matrix;

The second division module is used for producing the 4th matrix according to the 3rd matrix and second predetermined value that are produced by first multiplier;

Second multiplier is used for the 4th matrix and the predetermined array q[QP that produce by the second division module] element multiply each other, to produce the 5th matrix; With

Shift module is used for the 5th matrix and predetermined value k sum execution shifting function to being produced by second multiplier, producing the 6th matrix,

Inverse transformation and Zoom module comprise:

The 3rd multiplier is used for the 6th matrix and the predetermined array r[QP that will be produced by shift module] element multiply each other, to produce the 7th matrix;

The 3rd division module, the 7th matrix that is used for being produced by the 3rd multiplier is divided by predetermined array n[QP] element and get immediate integer, to produce the 8th matrix; With

The idct transform module is used for the 8th matrix that is produced by the 3rd division module is carried out integer idct transform and convergent-divergent computing, producing the 9th matrix,

N is the integer greater than 8, QP=[0,63+8* (N-8)],

Described first predetermined value and second predetermined value are determined according to the value of N,

Wherein, s[i] ≈ (2^33)/v (i) (i=0～5), v[6]=512*512,442*442,464*464,512*442,512*464,442*464}, execution second matrix as described below and predetermined array S[i] and between the array based on the territory multiply each other:

For row=0,4}, row=0, the coefficient of 4} multiply by s[0],

For row=1,3,5,7}, row=1,3,5, the coefficient of 7} multiply by s[1],

For row=2,6}, row=2, the coefficient of 6} multiply by s[2],

For row=0,4}, row=1,3,5, the coefficient of 7}, perhaps the row=1,3,5,7}, row=0, the coefficient of 4} multiply by s[3],

For row=0,4}, row=2, the coefficient of 6}, perhaps the row=2,6}, row=0, the coefficient of 4} multiply by s[4],

For other coefficients, multiply by s[5];

Wherein, q[QP] ≈ 2^15/ (2^ (QP/8)), q[QP] * r[QP] ≈ 2^ (16+n[QP]); Wherein, " ^ " expression array power, " ≈ " expression approximates greatly;

Wherein, constant k is defined as: piece in the frame, k=(1＜＜15) * 10/31; Interframe block, k=(1＜＜15) * 10/62.

2. encoder according to claim 1, wherein, first matrix that the first division module will be produced by the dct transform module is divided by first predetermined value and get immediate integer, to produce second matrix, the 3rd matrix that the second division module will be produced by first multiplier is divided by second predetermined value and get immediate integer, to produce the 4th matrix.

3. encoder according to claim 2, wherein, first to the 3rd multiplier is 16 multipliers.

4. encoder according to claim 3, wherein, N is 10 or 12.

5. encoder according to claim 4, wherein, if N is 10, then first predetermined value is 7, and second predetermined value is 17.

6. encoder according to claim 4, wherein, if N is 12, then first predetermined value is 9, and second predetermined value is 15.

7. coding method that is used to handle the former data of N bit comprises:

(a) extraction is about the information of the bit-depth N of input signal;

(b) input data matrix is carried out the integer dct transform, to produce first matrix;

(c) produce second matrix according to first matrix and first predetermined value;

(d) with second matrix and predetermined array S[i] carry out multiplying each other based on the array in territory, to produce the 3rd matrix;

(e) produce the 4th matrix according to the 3rd matrix and second predetermined value;

(f) with the 4th matrix and predetermined array q[QP] in element multiply each other, to produce the 5th matrix;

(g) the 5th matrix and predetermined value k sum are carried out shifting function, to produce the 6th matrix;

(h) with the 6th matrix and predetermined array r[QP] in element multiply each other, to produce the 7th matrix;

(i) with the 7th matrix divided by predetermined array n[QP] in element and get immediate integer, to produce the 8th matrix; With

(j) the 8th matrix is carried out integer idct transform and convergent-divergent computing, producing the 9th matrix,

N is the integer greater than 8, QP=[0,63+8* (N-8)],

For row=0,4}, row=0, the coefficient of 4} multiply by s[0],

For row=1,3,5,7}, row=1,3,5, the coefficient of 7} multiply by s[1],

For row=2,6}, row=2, the coefficient of 6} multiply by s[2],

For other coefficients, multiply by s[5];

Wherein, q[QP] ≈ 2^15/ (2^ (QP/8)), q[QP] * r[QP] ≈ 2^ (16+n[QP]);

Wherein, " ^ " expression array power, " ≈ " expression approximates greatly;

8. coding method according to claim 7, wherein, in step (c), with first matrix divided by first predetermined value and get immediate integer, to produce second matrix, in step (d), with the 3rd matrix divided by second predetermined value and get immediate integer, to produce the 4th matrix.

9. coding method according to claim 8 wherein, is used 16 multipliers in step (d), (f), (h) with (j).

10. coding method according to claim 9, wherein, N is 10 or 12.

11. coding method according to claim 10, wherein, if N is 10, then first predetermined value is 7, and second predetermined value is 17.

12. coding method according to claim 10, wherein, if N is 12, then first predetermined value is 9, and second predetermined value is 15.

13. a decoder that is used to handle with the corresponding incoming bit stream of the former data of N bit comprises decode controller, entropy decoder module and inverse transformation and Zoom module,

Wherein, the entropy decoder module is decoded to incoming bit stream, and to produce control corresponding data, exercise data and quantized data, control data is outputed to decode controller, and quantized data is outputed to inverse transformation and Zoom module,

The decode controller reception comprises the control data about the information of the bit-depth N of incoming bit stream, and the whole operation of control decoder,

Described inverse transformation and Zoom module comprise:

First multiplier is used for first matrix and predetermined array r[QP with quantized data] in element multiply each other, to produce second matrix;

The first division module, second matrix that is used for being produced by first multiplier is divided by predetermined array n[QP] element and get immediate integer, to produce the 3rd matrix; With

The idct transform module is used for the 3rd matrix that is produced by the first division module is carried out integer idct transform and convergent-divergent computing, producing the 4th matrix,

N is the integer greater than 8, QP=[0,63+8* (N-8)],

Wherein, q[QP] ≈ 2^15/ (2^ (QP/8)), q[QP] * r[QP] ≈ 2^ (16+n[QP]);

Wherein, " ^ " expression array power, " ≈ " expression approximates greatly.

14. decoder according to claim 13, wherein, first multiplier is 16 multipliers.

15. decoder according to claim 14, wherein, N is 10 or 12.

16. a coding/decoding method that is used to handle with the corresponding incoming bit stream of the former data of N bit comprises:

(a) incoming bit stream is decoded, to produce control corresponding data, exercise data and quantized data, described control data comprises the information about the bit-depth N of incoming bit stream;

(b) with first matrix in the quantized data and predetermined array r[QP] in element multiply each other, to produce second matrix;

(c) with second matrix divided by predetermined array n[QP] in element and get immediate integer, to produce the 3rd matrix;

(d) the 3rd matrix is carried out integer idct transform and convergent-divergent computing, producing the 4th matrix,

Wherein, N is the integer greater than 8, QP=[0,63+8* (N-8)],

Wherein, q[QP] ≈ 2^15/ (2^ (QP/8)), q[QP] * r[QP] ≈ 2^ (16+n[QP]);

Wherein, " ^ " expression array power, " ≈ " expression approximates greatly.

17. coding/decoding method according to claim 16 wherein, uses 16 multipliers in step (b) with (d).

18. coding/decoding method according to claim 17, wherein, N is 10 or 12.