CN101079010A - Method for implementation of FLASH chip data security - Google Patents
Method for implementation of FLASH chip data security Download PDFInfo
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- CN101079010A CN101079010A CN 200610011998 CN200610011998A CN101079010A CN 101079010 A CN101079010 A CN 101079010A CN 200610011998 CN200610011998 CN 200610011998 CN 200610011998 A CN200610011998 A CN 200610011998A CN 101079010 A CN101079010 A CN 101079010A
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Abstract
The invention discloses a method to realize FLASH chip data safety, which comprises the following steps: 1, dividing the FLASH chip to index zone, standby zone and host using zone; storing effective index structure with the index zone; setting the effective index structure as host using zone effective index field, host using zone address field, data length field and standby zone effective index field; 2, writing the present data of the host using zone, writing data and integral data into the standby zone; rewriting the field arrangement of the effective index structure; 3, writing the present data, writing data and integral data of the standby zone to the host using zone; rewriting the filed arrangement of the effective index structure. This invention is a method, which can keep the safety of the FLASH chip.
Description
Technical field
The present invention relates to a kind of method of the FLASH of realization chip data security, particularly relate to a kind of method that when physical sector and the logic sector FLASH chip that causes not of uniform size are carried out write operation, realizes data security.
Background technology
The FLASH chip is a kind of storage chip that still can preserve data under power-down conditions commonly used, uses very extensively in embedded system.FLASH is the branch sector generally on physical medium, to the write operation of FLASH all is to be unit with the sector and need to wipe whole sector earlier, just can carry out write operation then, promptly, suppose that the user only need write a byte, also need the operation of afterwards writing is carried out wiping earlier in whole sector.Step to the write operation of FLASH is generally: at first obtain destination address place sectors of data, then the data in purpose zone in the sector are substituted with data to be written, so just integrate old data and data to be written, at last the data after integrating have been then written to FLASH.
The least unit that use the FLASH operation on upper strata (referring to application layer) is referred to as logic sector, such as, logic sector is decided to be 1K, even you only need the data of a byte of storage so, also needs to take the space of 1K.Because the memory capacity of FLASH is generally less, and physical sector is generally bigger, and is the same with physical sector big if logic sector is defined as, and just will make that the utilization factor of FLASH is low excessively.Such as, the capacity of FLASH is 512K, physical sector is 8K, if logic sector also is defined as 8K, this FLASH maximum can only be deposited 512K/8K=64 message block so, that is, use and can operate 64 message block at most, this has wasted the space of many FLASH obviously, in order to address this problem, what logic sector can be defined is a little bit smaller, such as 1K, use so and just can operate 512 message block, thus generally in application logic sector all define forr a short time than physical sector.
Because reading and writing data of FLASH is slower, and be to carry out wiping earlier the operation of afterwards writing, if therefore power down etc. takes place unusually in the process of writing, original data may have been destroyed, if message block is bigger, when having crossed over several physical sector, certain sectors of data of possible partial loss.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of method of the FLASH of realization chip data security, is used to solve the problem that can't recover physical sector and the logic sector FLASH chip data that causes not of uniform size when abnormal conditions such as power down occurring in system.
To achieve these goals, the invention provides a kind of method of the FLASH of realization chip data security, it is characterized in that, comprising:
Step 1 is divided into logo area, spare area and the main area that is used to deposit the effective marker structure with the FLASH chip, and this effective marker structure comprises main area effective marker field, main area address field, data length field and spare area effective marker field;
Step 2, the data after data that described main area is current and the data integration to be written write described spare area, and rewrite the field setting of described effective marker structure; And
Step 3, the data after data that described spare area is current and the data integration to be written write described main area, and rewrite the field setting of described effective marker structure.
The method of described realization FLASH chip data security, wherein, in the described step 1, described spare area effective marker field is last field of described effective marker structure.
The method of described realization FLASH chip data security, wherein, in the described step 2, also comprise the step of a backup described main area data place sector data, be specially: backup is from the data in the end region of described main area sector of beginning of described main area sector.
The method of described realization FLASH chip data security, wherein, the field of the described effective marker structure of the rewriting in the described step 2 is provided with step and is specially: it is invalid that described main area effective marker field is filled out, the start address of first sector that the data that described main area address field is filled out main area are shared, the start address that described data length field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and described spare area effective marker field is filled with effect.
The method of described realization FLASH chip data security wherein, comprised also that before described step 3 one judges whether described main area effective marker field is invalid step.
The method of described realization FLASH chip data security wherein, when described main area effective marker field when being invalid, comprises also one judges whether described spare area effective marker field is effective step, if effective, then continues described step 3.
The method of described realization FLASH chip data security wherein, in the described step 3, comprises that also a pair of described main area wipes the step that afterwards writes earlier.
The method of described realization FLASH chip data security, wherein, the step that the data after data that described spare area is current in the described step 3 and the data integration to be written write described main area comprises again:
Obtain and to write the sectors of data of data to the place, address of described main area;
The data of the address area of this main area are replaced by data in the described spare area, generate integral data;
Write described integral data to described main area.
The method of described realization FLASH chip data security, wherein, the field of the described effective marker structure of the rewriting in the described step 3 is provided with step and is specially: described main area effective marker field is filled with effect, the start address of first sector that the data that described main area address field is filled out main area are shared, the start address that described data length field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and it is invalid that described spare area effective marker field is filled out.
The method of described realization FLASH chip data security, wherein, described logo area is one or more physical sectors.
The present invention is a kind of method that can effectively guarantee the FLASH chip data security, and this method has overcome the shortcoming of the data corruption that prior art exists the FLASH write operation, and the data of FLASH still can be recovered by the system that makes when abnormal conditions such as power down occurring.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is a schematic diagram data of writing the preceding main area of FLASH chip;
Fig. 2 is the schematic diagram data of the main area when writing the power down of main area sector;
Fig. 3 is the schematic diagram data of the spare area when writing the power down of main area sector;
Fig. 4 is a schematic diagram data of writing the main area behind the power loss recovery of main area sector;
Fig. 5 operates the schematic diagram data of the spare area after all data of backup main area before the FLASH chip for the present invention;
Fig. 6 realizes the method flow synoptic diagram of FLASH chip data security for the present invention;
Fig. 7 realizes the schematic flow sheet of data security algorithm for the present invention;
Fig. 8 realizes the schematic flow sheet that data are recovered for the present invention when generation is unusual.
Embodiment
See also shown in Figure 6, for the present invention realizes the method flow synoptic diagram of FLASH chip data security, and in conjunction with Fig. 1-Fig. 5.Fig. 1 has described the data of writing the preceding main area of FLASH chip; Fig. 2 has described the data of the main area when writing the power down of main area sector; Fig. 3 has described the data of the spare area when writing the power down of main area sector; Fig. 4 has described the data of writing the main area behind the power loss recovery of main area sector; Fig. 5 has described the data that the present invention operates the spare area after all data of backup main area before the FLASH chip.Method flow of the present invention specifically comprises the steps:
Step 601 is divided into logo area, spare area and main area with FLASH; Particularly, reserve one or more physical sectors and deposit the effective marker structure in FLASH, this physical sector can be described as logo area; Reserve an enough big zone as the spare area; Remaining zone is as main area.
Marking one or more sectors preserves the valid flag structural reason and is: if effective marker and data are placed in the same physical sector, when take place power down etc. unusual the time when just having write the effective marker structure, will cause data can not recover or recover mistake.Because this moment, effective marker was normal, and data are destroyed, and will cause the data of recovering wrong like this when restore data.
The effective marker structure comprises several fields such as main area effective marker, main area address, data length and spare area effective marker.
Wherein " spare area effective marker " field is last field of effective marker structure, is provided with like this to have avoided when the mistake that power down etc. causes the data recovery when unusual takes place when writing the effective marker structure of spare area.If " spare area effective marker " field is not last field of effective marker structure, if last field is " data length " field, when having write " spare area effective marker " field so when power down occurs in just, " spare area effective marker " field is effective at this moment, but " data length " field is an illegal value, and this will cause data to recover mistake.
Wherein, when the data of main area occur when unusual, just need recover the data of main area this moment by the data of spare area, can determine the address of main area by field main area address; Field data length is used for then determining that main area needs the length of data recovered.
Step 602 writes the spare area with data, that is, the data after data that main area is current and the data integration to be written write the spare area; The data of spare area are all data of sector, main area data place, and are not only backup data to be written, thereby data can not be recovered fully when avoiding power down.
The data of spare area are all data of backup sector, main area data place.The current data of supposing the main area sector as shown in Figure 1, if the data that will rewrite are data 1, iff being to have backed up data 1, and not backup of data 2, if power down has just taken place when just having wiped the main area sector, this moment, the data of main area were completely without effect, the data of main area as shown in Figure 2, but because of only having backed up data 1, and do not have Backup Data 2, the data of spare area as shown in Figure 3, just recover can only restore data 1 for data if desired, the data of the main area after the recovery lost data 2, and this are unallowed as shown in Figure 4.Just can avoid the problems referred to above if backed up all data of main area sector in the spare area.
Spare area after all data of backup main area sector can recover all data if power down takes place as shown in Figure 5.The method of all data of backup sector, main area place is: backup begins to all interior data of zone of the end of main area sector from the main area sector.
Step 603, rewrite the effective marker structure, it is invalid that " main area effective marker " field is filled out, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and " spare area effective marker " field is filled with effect.
Each FLASH is operated or system reset in all to judge this effective marker structure, if the spare area is effective, then the data of spare area are returned to main area.
Whether effective, if effectively, just the data of spare area are written back to main area, it is invalid simultaneously the spare area to be changed in system if will detect all spare areas when a) restarting initialization.
Whether effective, if effectively, just the data of spare area are written back to main area if b) when writing FLASH, all will detect the spare area at every turn.
Can guarantee at every turn that through top operation the data of FLASH all are effective before to the FLASH operation.
Step 604 writes main area with data, that is, the data after data that the spare area is current and the data integration to be written write main area; This step is specially:
At first obtain the sectors of data at destination address place, this destination address is the address that will write the main area of data; Then the data in destination address zone to be written in the main area sector are substituted with data to be written, so just integrated old data and data to be written, generate integral data, at last integral data is then written to the main area of FLASH.
Step 605, rewrite the effective marker structure, " main area effective marker " field is filled with effect, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and it is invalid that " spare area effective marker " field is filled out.
If step 605 completes successfully, this write operation of the FLASH chip that so just is through with.
Adopt above step, effectively guaranteed the data security of FLASH chip, make occur power down etc. when unusual the data of FLASH be still effectively or data recoverable; When abnormal conditions such as above-mentioned arbitrary step generation power down, data all are recoverable.If abnormal conditions such as power down occur in step 602, so at this moment the data of spare area are invalid, and " main area effective marker " field of effective marker structure remains effectively, and promptly the data with main area are as the criterion, and the data of main area are effective; If abnormal conditions such as power down occur in step 603, so at this moment the data of spare area are that effectively " main area effective marker " field of effective marker structure remains effectively, and the data of main area are effective; If abnormal conditions such as power down occur in step 604, so at this moment, the data of spare area are effective, " main area effective marker " field of effective marker structure is invalid, " spare area effective marker " field is changed to effectively, promptly the data with the spare area are as the criterion, and the data that data are recovered the back main area are effective.
See also shown in Figure 7ly, realize the schematic flow sheet of data security algorithm for the present invention; In conjunction with Fig. 6, this algorithm flow specifically comprises the steps:
Step 701, beginning;
Step 702 writes the spare area to data, that is, the data after data that main area is current and the data integration to be written write the spare area;
Step 703, rewrite the effective marker structure, it is invalid that " main area effective marker " field is filled out, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and " spare area effective marker " field is filled with effect;
Step 704 writes main area to data, that is, the data after data that the spare area is current and the data integration to be written write main area;
Step 705, rewrite the effective marker structure, " main area effective marker " field is filled with effect, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and it is invalid that " spare area effective marker " field is filled out;
Step 706 finishes.
See also shown in Figure 8ly, be that the present invention is when taking place to realize the schematic flow sheet that data are recovered when unusual.In conjunction with Fig. 6, this flow process specifically comprises the steps:
Step 802 judges whether " main area effective marker " field is invalid, if invalid, continues step 803, if effectively, go to step 806;
Step 803 judges whether " spare area effective marker " field is effectively, if effectively, continues step 804, if invalid, goes to step 806;
Step 804 is written back to main area to data, that is, the data after data that the spare area is current and the data integration to be written write main area;
Step 806 finishes.
With system applies part in the transmission equipment write operation of FLASH chip is come below that the present invention is described in further detail.
From webmaster some of transmission equipment are provided with parameter and generally are kept at the FLASH chip, suppose that preserving these FLASH chips that parameter is set is 512K, physical sector is 4K, and logic sector is 256 bytes.In a physical sector, there are 2 kinds of information that parameter is set, are distributed in respectively in the different logic sectors.Supposing these 2, parameter is set is respectively " the synchronization timing source is set " and " the external clock position is set ".And suppose current carry out be " the synchronization timing source is set " operation.Specific as follows to the process that the write operation of FLASH chip is realized:
(1), earlier data are write spare area (data that are about to after current data of main area and the data integration to be written write the spare area), the data of spare area are all data of sector, main area data place.
When " the synchronization timing source is set " order of webmaster is received by system, need be saved in FLASH to the data that are provided with.At this moment the spare area has backed up the parameter that is provided with of " the synchronization timing source is set " and " the external clock position is set " two orders, if at this moment take place unusually, data are as the criterion with the data of main area behind the abnormal restoring, data exception can not take place.
(2), rewrite the effective marker structure, it is invalid that " main area effective marker " field is filled out, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and " spare area effective marker " field is filled with effect.
At this moment the successful backup in spare area main area " the synchronization timing source is set " and " the external clock position is set " two orders parameter is set; if at this moment take place unusual; data are as the criterion with the data of main area behind the abnormal restoring; because also the main area data are not operated, so data exception can not take place.
(3), write data into main area (data that are about to after current data in spare area and the data integration to be written write main area).
At this moment main area is operated: wipe afterwards earlier and write.If at this moment take place unusual; the parameter that is provided with of " the synchronization timing source is set " of main area and " the external clock position is set " two orders may all be wrong data; " spare area effective marker " field in the effective marker structure has been set to effectively; so data are as the criterion with the data of spare area behind the abnormal restoring; and spare area data returned to main area; because the spare area all backs up all data of main area, data exception can not take place.
(4), rewrite the effective marker structure, " main area effective marker " field is filled with effect, " main area address " field is filled out the start address of first shared sector of the data of main area, the start address that " data length " field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and it is invalid that " spare area effective marker " field is filled out.
If at this moment take place unusually, the parameter that is provided with of " the synchronization timing source is set " of main area and " the external clock position is set " two orders has been normal data, data exception can not take place.
After finishing said process, system takes place unusually in above-mentioned any step, and data all can be recovered, thereby has realized guaranteeing that also data are purpose of safety when the physical sector of FLASH and logic sector are inconsistent.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1, a kind of method that realizes the FLASH chip data security is characterized in that, comprising:
Step 1 is divided into logo area, spare area and the main area that is used to deposit the effective marker structure with the FLASH chip, and this effective marker structure comprises main area effective marker field, main area address field, data length field and spare area effective marker field;
Step 2, the data after data that described main area is current and the data integration to be written write described spare area, and rewrite the field setting of described effective marker structure; And
Step 3, the data after data that described spare area is current and the data integration to be written write described main area, and rewrite the field setting of described effective marker structure.
2, the method for realization FLASH chip data security according to claim 1 is characterized in that in the described step 1, described spare area effective marker field is last field of described effective marker structure.
3, the method for realization FLASH chip data security according to claim 1, it is characterized in that, in the described step 2, also comprise the step of a backup described main area data place sector data, be specially: backup is from the data in the end region of described main area sector of beginning of described main area sector.
4, the method of realization FLASH chip data security according to claim 1, it is characterized in that, the field of the described effective marker structure of the rewriting in the described step 2 is provided with step and is specially: it is invalid that described main area effective marker field is filled out, the start address of first sector that the data that described main area address field is filled out main area are shared, the start address that described data length field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and described spare area effective marker field is filled with effect.
5, according to the method for claim 1,2,3 or 4 described realization FLASH chip data securities, it is characterized in that, comprised also that before described step 3 one judges whether described main area effective marker field is invalid step.
6, the method for realization FLASH chip data security according to claim 5, it is characterized in that,, comprise that also one judges whether described spare area effective marker field is effective step when described main area effective marker field when being invalid, if effectively, then continue described step 3.
7, according to the methods of claim 1,2,3 or 4 described realization FLASH chip data securities, it is characterized in that, in the described step 3, comprise that also a pair of described main area wipes the step that afterwards writes earlier.
8, according to the method for claim 1,2,3 or 4 described realization FLASH chip data securities, it is characterized in that the step that the data after data that described spare area is current in the described step 3 and the data integration to be written write described main area comprises again:
Obtain and to write the sectors of data of data to the place, address of described main area;
The data of the address area of this main area are replaced by data in the described spare area, generate integral data; And
Write described integral data to described main area.
9, according to claim 1,2, the method of 3 or 4 described realization FLASH chip data securities, it is characterized in that, the field of the described effective marker structure of the rewriting in the described step 3 is provided with step and is specially: described main area effective marker field is filled with effect, the start address of first sector that the data that described main area address field is filled out main area are shared, the start address that described data length field is filled out the next sector of last shared sector of the data of main area deducts the start address of first shared sector of the data of main area, and it is invalid that described spare area effective marker field is filled out.
10, according to the method for claim 1,2,3 or 4 described realization FLASH chip data securities, it is characterized in that described logo area is one or more physical sectors.
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| CNB2006100119980A CN100543706C (en) | 2006-05-25 | 2006-05-25 | A kind of method that realizes the FLASH chip data security |
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