CN101076995B - Picture processing based on error dirrusion - Google Patents
Picture processing based on error dirrusion Download PDFInfo
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- CN101076995B CN101076995B CN200580042559XA CN200580042559A CN101076995B CN 101076995 B CN101076995 B CN 101076995B CN 200580042559X A CN200580042559X A CN 200580042559XA CN 200580042559 A CN200580042559 A CN 200580042559A CN 101076995 B CN101076995 B CN 101076995B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
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- H04N1/40—Picture signal circuits
- H04N1/405—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels
- H04N1/4051—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a dispersed dots halftone pattern, the dots having substantially the same size
- H04N1/4052—Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a dispersed dots halftone pattern, the dots having substantially the same size by error diffusion, i.e. transferring the binarising error to neighbouring dot decisions
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Abstract
An embodiment includes a method that includes receiving more than one pixel of an image. The method also includes performing, at overlapping times, error diffusion for the more than one pixel.
Description
Technical field
The application relates generally to data and processes, and relates in particular to image and processes.
Background
Error diffusion is a kind of process for the demonstration of approximate figure image (such as the continuous tone digital picture) on the output device with limited color (tone) scope.Error diffusion is used for simulating multiple colourity (color shade) with the binary point value in printer the most commonly.For example, the printer that only can print stain can utilize error diffusion to simulate multiple gray scale.
The accompanying drawing summary
By with reference to following description and illustrate that the accompanying drawing of these embodiment can understand various embodiments of the present invention best.The the first item code that is used for being included in the numbering plan of accompanying drawing herein and is the given reference number of accompanying drawing is associated with the numbering of this accompanying drawing.For example, pixel 102 can be arranged in Figure 1A.Yet, be identical for the reference number of element identical in different accompanying drawings.In the accompanying drawing:
Figure 1A illustrates the error distribution from a pixel to surrounding pixel according to some embodiment of the present invention.
Figure 1B illustrates the distribution of the error of some embodiment according to the present invention from surrounding pixel to a pixel.
Fig. 2 illustrates the false code that is used for error distribution according to some embodiment of the present invention.
Fig. 3 illustrates the data flow according to the fractional error value of some embodiment of the present invention from surrounding pixel to a plurality of pixels.
Fig. 4 illustrates the more detailed diagram according to the image-signal processor of some embodiment of the present invention.
Fig. 5 illustrates the more detailed diagram according to the image-signal processor that is used for error diffusion operation of some embodiment of the present invention.
Fig. 6 illustrates the flow chart of processing according to the image based on error diffusion of some embodiment of the present invention.
Fig. 7 illustrates the operation table that the image based on error diffusion that a plurality of elements by in the image-signal processor according to some embodiment of the present invention carry out is processed.
Fig. 8 illustrates the simplified block diagram for the system that processes based on the image of error diffusion according to some embodiment of the present invention.
Describe in detail
Some embodiment provides error diffusion operation.Error diffusion can comprise three operations.First operation comprises that the quantification current pixel value is to generate output valve.Particularly, adjust original pixel value to comprise from the error of surrounding pixel diffusion.In certain embodiments, based on the comparison of adjusted value and threshold value, the output valve of this current pixel value through adjusting can be 0 or 1.Second operation of error diffusion comprises poor (that is, the error) of calculating output valve and original pixel value.The 3rd operation of error diffusion comprises fraction error (fractional error) value is assigned to surrounding pixel.Although can be with in the multiple error diffusion filter any with error diffusion to surrounding pixel, adopted in certain embodiments the Floyd-Steinberg filter.Spendable other filter comprises Burkes filter, Stucki filter etc.
Figure 1A illustrates the error distribution from a pixel to surrounding pixel according to some embodiment of the present invention.Figure 1A illustrates the part of the image that comprises pixel 102-118.Pixel 102-118 is respectively pixel P (i-1, j-1), P (i-1, j), P (i-1, j+1), P (i, j-1), P (i, j), P (i, j+1), P (i+1, j-1), P (i+1, j) and P (i+1, j+1).As shown in the figure, pixel 110 is diffused into respectively pixel 112,114,116 and 118 with 7/16,3/16,5/16 and 1/16 of its error amount.
Figure 1B illustrates the error distribution of some embodiment according to the present invention from surrounding pixel to a pixel.Particularly, Figure 1B illustrates the error of calculation and then it is assigned to specific pixel before the threshold operation of error diffusion.Figure 1B illustrates the part of the image that comprises pixel 120-136.Pixel 120-136 is respectively pixel P (i-1, j-1), P (i-1, j), P (i-1, j+1), P (i, j-1), P (i, j), P (i, j+1), P (i+1, j-1), P (i+1, j) and P (i+1 j+1).As shown in the figure, pixel 128 receives 1/16 fractional error value eA from pixel 120.Pixel 128 receives 5/16 fractional error value eB from pixel 122.Pixel 128 receives 3/16 fractional error value eC from pixel 124.Pixel 128 receives 7/16 fractional error value eD from pixel 126.
Fig. 2 illustrates the false code according to the error distribution of some embodiment of the present invention.Particularly, Fig. 2 illustrates the false code 200 that some embodiment according to the present invention can be used for carrying out error distribution shown in Figure 1.Code block 202 comprises that intermediate error values (1/16*eA, 5/16*eB, 3/16*eC and 7/16*eD) is to the assignment of accumulator variable.Code statement 204 is added to accumulator variable with the pixel value that position (i, j) in the image locates.Therefore, the accumulator variable pixel value that equals to locate position (i, j) adds the intermediate error values that receives from surrounding pixel.Below state the example of surrounding pixel.If accumulator is less than a threshold value (for example, 0.5), then code block 206 will be worth 0 and be imparted to the pixel that position (i, j) is located, if accumulator is not less than this threshold value, then will be worth 1 and give this pixel.Code statement 208 upgrades error buffer based on the difference of actual value (being stored in the value in the accumulator) and the value (0 or 1) composed.
Fig. 3 illustrates the data flow according to the intermediate error values of some embodiment of the present invention from surrounding pixel to a plurality of pixels.Fig. 3 illustrates the part of the image that comprises pixel 302-324.Pixel 302-324 is respectively pixel P (i-1, j-1), P (i-1, j), P (i-1, j+1), P (i-1, j+2), P (i, j-1), P (i, j), P (i, j+1), P (i, j+2), P (i+1, j-1), P (i+1, j), P (i+1 j+1) and P (i+1, j+2).Pixel 312 and 314 is defined as about the current pixel that calculates and next pixel.Fractional error value eD (7/16) can be diffused into current pixel 312 from pixel 310.Fractional error value eD can generate and be diffused into current pixel 302 from input picture 316.Fractional error value eD (7/16) can be diffused into next pixel 314 from current pixel 312.Therefore, fractional error value eD can be used as the part that the error of last pixel calculates and calculates.
In addition, error buffer storage can the surrounding pixel from previous row be diffused into a plurality of intermediate error values of current pixel 312 and next pixel 314.Particularly, fractional error value can be diffused into current pixel 312 (for eA-1/16) from pixel 302.Fractional error value can be diffused into current pixel 312 (for eB-5/16) and next pixel 314 (for eC-3/16) from pixel 304.Fractional error value can be diffused into current pixel 312 (for eC 3/16) and next pixel 314 (for eB-5/16) from pixel 306.Fractional error value can be diffused into next pixel 314 (for eC-3/16) from pixel 308.
Therefore, as shown in the figure, the eB of current pixel is the eA of next pixel.In addition, the eC of current pixel is the eB of next pixel.In addition, the eC of next pixel retrieves from error buffer, and the eD of next pixel calculates from the error to current pixel.Below state the more detailed description of this data flow.
Fig. 4 illustrates the more detailed diagram according to the image-signal processor of some embodiment of the present invention.Image-signal processor 400 comprises input processor element 402, output processor element 404, a plurality of processor elements 406A-410B, a plurality of register 408, a plurality of accumulator element 410A-410B, memory 414 and storage control 416.Input processor element 402, output processor element 404, processor elements 406A-406C, accumulator element 510A-410B and memory 414 (by storage control 416) are coupled to register 408.Register 408 allows processor elements 402,404 and 406, accumulator element 410A-410B and memory 414 swap datas, and can be used as for given processor elements 402,404 and 406 and the general register of accumulator element 410A-410B.In addition, processor elements 402,404 and 406 and accumulator element 410A-410B can comprise a plurality of local register (not shown).
In one embodiment, input processor element 402, output processor element 404 and processor elements 406A-406B comprise command memory and for the treatment of the ALU (ALU) of data.Input processor element 402 and output processor element 404 are respectively applied to receive the data that are input to image-signal processor 400 and send the data of exporting from image-signal processor 400 by the port of port loop coupling to image-signal processor 400.The framework with this configuration according to some embodiment is below described in more detail.
Except the input and output of data, input processor element 402 and/or output processor element 404 processing that is provided by processor elements 406A-406C can be provided come deal with data.Different processor elements 406A-406C can be general-purpose processor element or application specific processor element.For example, processor elements 406A-406C comprises for the instruction set of general procedure and the mac processor element that is used for the instruction set of multiplication-cumulative (MAC) function.Processor elements 406A-406C can be the combination of general-purpose processor element and application specific processor element.For example, processor elements 406A and 406C can be the mac processor elements, and processor elements 406B can be general-purpose processor element.Although Fig. 4 illustrates five processor elements in the image-signal processor 400, in other embodiments still less or the sort processor element of greater number can be combined in the image-signal processor 400.
Fig. 5 illustrates the more detailed diagram that is used for the image-signal processor of error diffusion operation according to some embodiment of the present invention.Particularly, Fig. 5 illustrates the more detailed diagram according to the image-signal processor 400 of some embodiment of the present invention.Fig. 5 comprises some elements of Fig. 4, and wherein identical element is distributed in a plurality of different pieces that the data flow among these elements is shown.Therefore, identical reference element relates to pieces different among Fig. 5.In addition, these pieces can comprise the description of the type of the operation of carrying out here.
Unpack (unpack) of input processing element 402 inputs the input pixel 504 that block of pixels is coupled to receive packing (pack).The unpack error block of input processor element 402 is coupled to receive the median error error amount from error buffer 502.Be coupled to the input of error filter (odd number) piece of the input of error filter (even number) piece of accelerator unit 410A and accelerator unit 410B from the output that unpacks the input block of pixels of input processor element 402.
The input of being coupled to the error cache of processor elements 406A from the output of the unpack error block of input processor element 402.The input of error filter (odd number) piece of the input of error filter (even number) piece of accelerator unit 410A and accelerator unit 410B is coupled in the output of the error cache of processor elements 406A.
The comparison block of accelerator unit 410B and the input of subtractor block are coupled in the input of the error filter of accelerator unit 410A (even number) piece.The comparison block of accelerator unit 410A and the input of subtractor block are coupled in the output of the error filter of accelerator unit 410B (odd number) piece.Threshold value input 507 inputs of being coupled to comparison block.507 pairs of two different comparison blocks of threshold value input can be different.The input of packing output pixel piece of input and output processor elements 404 of the subtractor block of accelerator unit 410B is coupled in the output of the comparison block of accelerator unit 410B.The input of packing output pixel piece of input and output processor elements 404 of the subtractor block of accelerator unit 410A is coupled in the output of the comparison block of accelerator unit 410A.Output from packing output pixel piece is the output pixel 506 of packing.
The input of pack new error block of output processor element 404 and the input of error filter (even number) piece are coupled in the output of the subtractor block of accelerator unit 410B.The input of pack new error block of output processor element 404 and the input of error filter (odd number) piece are coupled in the output of the adder block of accelerator unit 410A.The input of error buffer 502 is coupled in the output of pack new error block.The following more detailed description of operation of the block diagram of statement Fig. 5.
Fig. 6 illustrates according to some embodiment of the present invention for the flow chart of processing based on the image of error diffusion.Particularly, Fig. 6 comprises the operation that illustrates according to the image-signal processor shown in Figure 5 400 of some embodiment of the present invention.
In frame 602, receive the pixel of image.With reference to the embodiment of figure 5, the pixel that block of pixels can receive image is inputted in unpacking of input processor element 402.In certain embodiments, can receive pixel from different image-signal processor 400, memory or input/output device (such as transducer).One these assemblies of the operation that for example, can drive from based on data receives pixel (as mentioned above).In certain embodiments, image can be the digital picture of continuous tone.Being controlled at frame 604 places continues.
In frame 604, on the overlapping time, an above pixel is carried out error diffusion.In other words, overlapping with the time of implementation for the error diffusion of one or more other pixels for time of implementation of the error diffusion of a pixel.With reference to the embodiment of figure 5, the different masses of input processor element 402, accelerator unit 410A-410B, processor elements 406A and output processor element 404 can be carried out these operations.Illustrate the more detailed description of these operations below in conjunction with the description of Fig. 7.
Fig. 7 illustrates the operation table of processing according to the image based on error diffusion for being carried out by a plurality of elements of image-signal processor of some embodiment of the present invention.Fig. 7 illustrates table 700, and it has illustrated input processor unit 402, accelerator unit 410A-410B, processor elements 406A and output processor element 404 operation relative to each other.More specifically, table 700 illustrates the execution for the part parallel of the error diffusion of an above pixel.In other words, for the execution of the error diffusion of a pixel with for the operating part of the error diffusion of one or more other pixels walk abreast.Row can represent the timing of these operations.Therefore, the operation in the same row is carried out at least in part simultaneously.
Locate at very first time point (row 702), but input processor element 402 and accelerator unit 410A executable operations.The unpack error of input processor element 402 can be read in from the previous row of error buffer 502 two intermediate error values.Particularly, unpack error block can be read in eC even number (eC of even pixel) and eC odd number (eC of odd pixel) from error buffer 502.Part parallel ground, the error filter of accelerator 410A (even number) piece can receive eA from the error cache of processor elements 406A.Error filter (even number) but piece dual numbers pixel is calculated (1*eA) and notification processor element 406A after this calculating is finished.
At the second time point place (row 704), but input processor element 402, accelerator unit 410A and processor elements 406A executable operations.The unpack error block of input processor element 402 can unpack the error amount eC of even pixel and odd pixel.Part parallel ground, the error filter of accelerator unit 410A (even number) piece can receive eB from the error cache of processor elements 406A.Error filter (even number) but piece dual numbers pixel is calculated (5*eB) and notification processor element 406A after this calculating is finished.Part parallel ground, processor elements 406A can be loaded into eA with the value of eB.In addition, processor elements 406A can notify error filter (odd number) piece of accelerator unit 410B after this load operation is finished.As mentioned above, the eB of current pixel is the eA of next pixel.Because accelerator unit 410A has finished the use of the eA of dual numbers pixel, so the eA of the available odd pixel of this value (eB of even pixel) comes overwrite.
Locate at the 3rd time point (row 706), but input processor element 402, accelerator unit 410A, processor elements 406A and accelerator unit 410B executable operations.The packing input block of pixels of input processor element 402 can be read in two input pixel (p
Even numberAnd p
Odd number).Part parallel ground, the error filter of accelerator unit 410A (even number) piece can receive eC from the error cache of processor elements 406A.Error filter (even number) but piece dual numbers pixel is calculated (5*eC).Part parallel ground, treatment element 406A can be loaded into eB with the value of eC.In addition, processor elements 406A can notify error filter (even number) piece of accelerator unit 410B after this load operation is finished.In addition, part parallel ground, the error filter piece of accelerator unit 410B can receive eA from the error cache of processor elements 406A.Error filter (even number) piece can calculate (1*eC) and notification processor element 406A after this calculating is finished to odd pixel.
Locate at the 4th time point (row 708), but input processor element 402, accelerator unit 410A, processor elements 406A and accelerator unit 410B executable operations.The unpacking the input block of pixels and can unpack two input pixel (p of input processor element 402
Even numberAnd p
Odd number).Input processor element 402 can be with input pixel (p
Even numberAnd p
Odd number) be forwarded to respectively error filter (even number) piece of accelerator unit 410A and error filter (odd number) piece of accelerator unit 410B.Part parallel ground, the error filter of accelerator unit 410A (even number) piece can receive eD from the error cache of processor elements 406A.Error filter (even number) but piece dual numbers pixel is calculated (7*eC).Part parallel ground, processor elements 406A can be loaded into eA with the value of eB.In addition, part parallel ground, the error filter of accelerator unit 410B (odd number) piece can receive eB from the error cache of processor elements 406A.Error filter (even number) piece can calculate (5*eC) and notification processor element 406A after this calculating is finished to odd pixel.
Locate at the 5th time point (row 710), but accelerator unit 410A, processor elements 406A and accelerator unit 410B executable operations.The error filter of accelerator unit 410A (even number) piece can calculate the error amount of even pixel.Particularly, error filter (even number) piece the fractional error value of calculating (1*eA, 5*eB, 3*eC and 7*eD) from surrounding pixel can be added together and with the result divided by 16.Part parallel ground, processor elements 406A can be loaded into eB with the value of eC.Part parallel ground, the error filter of accelerator unit 410B (even number) piece can receive eC from the error cache of processor elements 406A.Error filter (odd number) piece can calculate to odd pixel (3*eC).In addition, certain the some place after reading in current two input pixels, the unpacking the input block of pixels and can read in lower two input pixels of input processor element 402.
Locate at the 6th time point (row 712), but accelerator unit 410A and accelerator unit 410B executable operations.The error filter of accelerator unit 410A (even number) piece can begin to calculate the error diffusion to next unprocessed pixel (next even pixel).Error filter (even number) piece can receive eA from the error cache of processor elements 406A.Error filter (even number) but piece dual numbers pixel is calculated (1*eA) and notification processor element 406A after this calculating is finished.Part parallel ground, error filter (odd number) piece can calculate the threshold value for even pixel.With reference to figure 5, the threshold operation shown in error filter (odd number) the piece executable code piece 1606.With reference to figure 5, the comparison block that is used for accelerator unit 410B can determine that whether the accumulated value of even pixel is greater than the threshold value from threshold value output 507.Output from comparison block can be binary value (0 or 1), depends on whether the accumulated value of even pixel surpasses threshold value (shown in the code block 406 of Fig. 4).
Locate at the 7th time point (row 714), but accelerator unit 410A, processor elements 406A, accelerator unit 410B and output processor element 404 executable operations.Error filter (even number) piece can receive eB from the error cache of processor elements 406A.Error filter (even number) piece can calculate (5*eA) and notification processor element 406A after this calculating is finished to next even pixel.Part parallel ground, processor elements 406A can be with the value value of being loaded into eA of eB.In addition, processor elements 406A can notify error filter (odd number) piece of accelerator unit 410B after this load operation is finished.Part parallel ground, the error filter of accelerator unit 410B (odd number) piece can be carried out for the error of even pixel and calculate.With reference to figure 2, the error calculating operation shown in error filter (odd number) the piece code statement 208.The subtractor block of accelerator unit 410B can be determined the poor of actual value (accumulated value) and output valve (0 or 1).This error amount (even number) 508 is imported into error filter (odd number) piece of accelerator unit 410B.
Locate at the 8th time point (row 716), but accelerator unit 410A, processor elements 406A, accelerator unit 410B and output processor element 404 executable operations.The error filter of accelerator unit 410A (even number) piece can receive eC from the error cache of processor elements 406A.Error filter (even number) piece can calculate (3*eC) to next even pixel.Part parallel ground, processor elements 406A can be loaded into eB with the value of eC.In addition, processor elements 406A can notify error filter (odd number) piece of accelerator unit 410B after this load operation is finished.Part parallel ground, the error filter of accelerator unit 410B (odd number) piece can calculate to odd pixel (7*eD).Can the pack value (receiving from the comparison block of accelerator unit 410B) of even pixel of part parallel ground, the packing output pixel piece of output processor element 404.The exportable output pixel 506 that should be worth as packing of the output pixel piece of packing.
Locate at the 9th time point (row 718), but accelerator unit 410B and output processor element 404 executable operations.The error filter of accelerator unit 410B (odd number) piece can calculate the error amount of odd pixel.Particularly, error filter (odd number) piece the fractional error value of calculating (1*eA, 5*eB, 3*eC and 7*eD) from surrounding pixel can be added together and with the result divided by 16.Part parallel ground, the pack new error block of output processor element 404 can be upgraded error buffer 502 with this new error amount of even pixel.
Locate at the tenth time point (row 720), but accelerator unit 410A and accelerator unit 410B executable operations.The error filter of accelerator unit 410A (even number) piece can calculate the threshold value for odd pixel.With reference to figure 5, the threshold operation shown in error filter (odd number) the piece executable code piece 1606.The comparison block that is used for accelerator unit 410B can determine that whether the accumulated value of odd pixel is greater than the threshold value from threshold value input 507.Output can be binary value (0 or 1) from comparison block, depends on whether the accumulated value of odd pixel surpasses threshold value (shown in the code block 206 of Fig. 2).In addition, part parallel ground, the error filter of accelerator unit 410B (odd number) piece can receive eA from the error cache of processor elements 406A.Error filter (even number) piece can calculate (1*eA) and notification processor element 406A after this calculating is finished to next even pixel.
Locate at the 11 time point (row 722), but accelerator unit 410A, processor elements 406A, accelerator unit 410B and output processor element 404 executable operations.The error filter of accelerator unit 410A (even number) piece can be carried out for the error of even pixel and calculate.With reference to figure 2, the error calculating operation shown in error filter (odd number) the piece code statement 208.The subtractor block of accelerator unit 410B can be determined the poor of actual value (accumulated value) and output valve (0 or 1).This error amount (odd number) 510 is imported into error filter (even number) piece of accelerator unit 410B.Part parallel ground, processor elements 406A can be loaded into the value of eB eA and notification processor element 406A after this calculating is finished.Part parallel ground, the error filter of accelerator unit 410B (odd number) piece can receive eB from the error cache of processor elements 406A.Error filter (even number) piece can calculate (5*eB) and notification processor element 406A after this calculating is finished to next odd pixel.Can the pack value (receiving from the comparison block of accelerator unit 410A) of odd pixel of part parallel ground, the packing output pixel piece of output processor element 404.The exportable output pixel 506 that should be worth as packing of packing output pixel piece.
Locate at the 12 time point (row 724), but accelerator unit 410A, processor elements 406A and output processor element 404 executable operations.The error filter of accelerator unit 410A (even number) piece can receive eD from the error cache of processor elements 406A.Error filter (even number) piece can calculate (7*eD) to next even pixel.Processor elements 406A can be loaded into the value of eC eB and notify error filter (odd number) piece of accelerator unit 410B after this load operation is finished.Part parallel ground, the pack new error block of output processor element 404 can be upgraded error buffer 502 with the new error amount of odd pixel.
Some embodiment can comprise error diffusion operation with the digital picture in output device (such as printer, screen etc.) the output continuous tone with limited color (tone) scope.Some embodiment can be used for part parallel ground an above pixel is carried out error diffusion.As described, some embodiment allows processor to keep by at least part of non-order or processes simultaneously a plurality of execution engines that a plurality of pixels take.In addition, during this processing of a plurality of pixels, some embodiment shares the intermediate error values from surrounding pixel.Therefore, as described, the parallel processing of this image pixel can continue until processed all pixels in the image.
Error diffusion operation as herein described can operate in a plurality of different environment, describes now the processor architecture that is used for carrying out these operations according to some embodiment.Particularly, Fig. 8 illustrates the processor architecture that is used for carrying out error diffusion operation according to some embodiment of the present invention.Fig. 8 illustrates the system for the processor-processor communication of the framework of data-driven according to some embodiment of the present invention.Fig. 8 illustrates and comprises and be coupled to receive the system 800 of the image processor 802 of input traffics 818 from transducer 816.Although transducer 816 can be different type, in one embodiment, transducer 816 is charge coupled device (CCD) transducers.In one embodiment, transducer 8 16 is complementary metal oxide semiconductors (CMOS) (CMOS) transducers.Transducer 816 scanning and digitized images, thus input traffic 818 produced.For example, in one embodiment, system 800 is embedded in scanning and processes in the scanner of image (such as document, photo etc.).
In one embodiment, image processor 802 has the framework of data-driven, the wherein execution of the sending and receiving of data driving operation wherein between the different elements in the image processor 802.In other words, when the data of necessity can be used for carrying out, the given operation in the element of image processor 802 began.
For an embodiment, I/O interface 810 is provided to the interface of one or more suitable integrated drive electronics (IDE) drivers such as hard disk drive (HDD) or compact disc read-only memory (CD ROM) driver, by one or more USB port, audio encoder/decoder (codec) and modulator-demodulator codec data and/or instruction for example are stored on one or more suitable USBs (USB) device.The I/O interface 810 that is used for an embodiment also is provided to keyboard, mouse, the interface of one or more appropriate device such as printer by one or more ports.Network interface 812 provides by the interface of one of multiple communication network (internet, Intranet, based on the network of Ethernet etc.) to one or more remote-control devices.
Host-processor 808, I/O interface 810 and network interface 812 are coupled by bus 814 and image processor 802.As described further below, the instruction of carrying out in the host-processor 808 is disposed for dissimilar image with image processor 802 and processes.For example, setting up a plurality of different logics among the different processor element of host-processor 808 in image processor 802 connects.In addition, host-processor 808 can download to microcode the state of image processor and inspection different assemblies wherein.For the purpose of illustrating, now with the more detailed description of an embodiment of Description Image processor 802.
In this manual, numerous details have been stated.Yet should understand embodiments of the invention can be in the situation that there be these details to implement.In other example, be not shown specifically known circuit, structure and technology in order to avoid fuzzy understanding of this description.Mode, resource division/share/copy type and correlation and logical partitioning/numerous details such as integrated selection of realization, system component, so that more thoroughly understanding subject matter to be provided such as logic realization, command code, description operand have been stated.Yet those skilled in the art will recognize embodiments of the invention can be in the situation that there be these details to implement.In other example, be not shown specifically control structure, gate level circuit and complete software instruction sequences in order to avoid make embodiments of the invention obscure.Those of ordinary skill in the art utilizes the included description can be in the situation that there is not unsuitable experiment to realize suitable function.
Indicate described embodiment can comprise specific feature, structure or characteristic to quoting of " embodiment ", " embodiment ", " example embodiment " etc. in the specification, but each embodiment can not necessarily to comprise this special characteristic, structure or characteristic.In addition, these phrases differ to establish a capital and refer to same embodiment.In addition, when describing special characteristic, structure or characteristic in conjunction with an embodiment, think no matter whether clearly describe, realize that in conjunction with other embodiment these features, structure or characteristic are in those skilled in the art's knowledge.
Feature, method or the process that can be comprised in the machine-executable instruction that is provided by machine readable media is provided embodiments of the invention.Machine readable media comprises to be provided (namely, storage and/or send) can be by any mechanism of the information of the form of machine (for example, computer, network equipment, personal digital assistant, fabrication tool, device etc. with group of one or more processors) access.In one exemplary embodiment, machine readable media (for example comprises volatibility and/or non-volatile media, read-only memory (ROM), random access memory (RAM), magnetic disk storage medium, optical storage media, flash memory device etc.) and the transmitting signal (for example, carrier wave, infrared signal, digital signal etc.) of electricity, light, sound or other form.
These instructions are used for so that carry out the Method and Process of embodiments of the invention with the universal or special processor of instruction programming.Perhaps, the feature of embodiments of the invention and the operation by the specific hardware components that comprises for the firmware hardwired logic of executable operations, or by the programming data handling component and any combination of specific hardware components carry out.Various embodiments of the present invention comprise method and the various processing operation that the software that further describes, data processing hardware, data handling system realize herein.
A plurality of accompanying drawings illustrate and are used for the system that processes based on the image of error diffusion and the block diagram of device according to some embodiment of the present invention.A plurality of accompanying drawings show the flow chart that explanation is processed according to the image based on error diffusion of some embodiment of the present invention.The operation of flow chart has been described with reference to the systems/devices shown in the block diagram.The operation that However, it should be understood that flow chart can be by carrying out except the embodiment with reference to the system the block diagram discussion and device, and the embodiment that frame of reference/device is discussed can carry out the different operation of operation of discussing from reference flow sheet.
In view of the various conversion to embodiment as herein described, this detailed description only is illustrative, and should not be construed as the scope of restriction subject matter.Therefore, claimed is the interior all such modifications of scope and spirit that fall into appended claims and equivalent technique scheme thereof.Therefore, specification and accompanying drawing are regarded as the meaning of illustrative rather than restriction.
Claims (29)
1. one kind is used for the method carry out processing based on the image of error diffusion, comprising:
Receive an above pixel of image;
Based on the fractional error value from surrounding pixel, the current pixel of image is carried out at least a portion of error diffusion operation; And
With the described error diffusion operation part parallel ground to current pixel next pixel of described image is carried out error diffusion operation, wherein to one or more based on from the first number of components error amount of current pixel of the error diffusion operation of next pixel, based on counting one or more in the error amount from the second component of one or more described surrounding pixels, and based on around described next pixel and one or more in the 3rd number of components error amount of one or more pixels of current pixel not.
2. the method for claim 1 is characterized in that, carries out error diffusion and comprises: fractional error value is assigned to described pixel.
3. method as claimed in claim 2 is characterized in that, described fractional error value is based on the Floyd-Steinberg error filter and calculates.
4. the method for claim 1 is characterized in that, also comprises outputing to the device that has less than the Color Range of the Color Range of described image.
5. one kind is used for the method carry out processing based on the image of error diffusion, comprising:
Receive the current pixel of image and the value of next pixel;
Will be from non-described current pixel and described next pixel sequentially distributed to of fractional part of a plurality of values of surrounding pixel, wherein will be from one or more next pixel that offer in the first number of components part of current pixel, will be from one or more described current pixel and described next pixel of offering in the second component fractional part of a plurality of values of one or more pixels of current pixel, and will be around described next pixel and not around the 3rd number of components of one or more pixels of current pixel one or more next pixel that offer in partly;
Give described current pixel and described next pixel based on the value of described current pixel and described next pixel and from the fractional part of a plurality of values of described surrounding pixel with output valve; And
Described output valve is outputed to the output device that has less than the Color Range of the Color Range of described image.
6. method as claimed in claim 5 is characterized in that, also comprises the error of calculating described current pixel and described next pixel based on the difference of the output valve of the value of described current pixel and described next pixel and described current pixel and described next pixel.
7. method as claimed in claim 6 is characterized in that, receives the described current pixel of described image and the value of described next pixel and comprises the described current pixel of reception approximate continuous tone digital picture and the value of described next pixel.
8. method as claimed in claim 5 is characterized in that, distributes described fractional part to comprise the non-fractional part of sequentially calculating described current pixel and described next pixel.
9. method as claimed in claim 5 is characterized in that, distributes described fractional part to be included in and the value of one of described fractional part is given different in the described fractional part overlapping upper fractional parts of calculating described current pixel of time.
10. one kind is used for the device carry out processing based on the image of error diffusion, comprising: image-signal processor, and described image-signal processor comprises:
Based on from the fractional error value of the surrounding pixel current pixel to image, carry out first accelerator unit of at least a portion of error diffusion operation; And
Next pixel of described image is carried out second accelerator unit of at least a portion of error diffusion operation with the described error diffusion operation part parallel ground of described the first accelerator unit, wherein to one or more based on from the first number of components error amount of current pixel of the error diffusion operation of next pixel, based on counting one or more in the error amount from the second component of one or more described surrounding pixels, and based on around described next pixel and one or more in the 3rd number of components error amount of one or more pixels of current pixel not.
11. device as claimed in claim 10 is characterized in that, described image is the digital picture of approximate continuous tone.
12. device as claimed in claim 10 is characterized in that, as the part for the error diffusion operation of described current pixel, described the first accelerator unit upgrades the value of described current pixel based on the fractional value from described surrounding pixel.
13. device as claimed in claim 12 is characterized in that, as the part for the error diffusion operation of described next pixel, described the second accelerator unit is based on the value of upgrading described next pixel from the fractional value of described surrounding pixel.
14. device as claimed in claim 13, it is characterized in that, as the part for the error diffusion operation of described current pixel, described the second accelerator unit is based on the updating value of described current pixel and the output valve that relatively generates described current pixel between the threshold value.
15. device as claimed in claim 14 is characterized in that, as the part for the error diffusion operation of described current pixel, described the second accelerator unit calculates the poor of the output valve of described current pixel and original value.
16. device as claimed in claim 13, it is characterized in that, as the part for the error diffusion operation of described next pixel, described the first accelerator unit is based on the updating value of described next pixel and the output valve that relatively generates described next pixel between the threshold value.
17. device as claimed in claim 16 is characterized in that, as the part for the error diffusion operation of described next pixel, described the first accelerator unit calculates the poor of the output valve of described next pixel and original value.
18. one kind is used for the system carry out processing based on the image of error diffusion, comprises:
Catch the charge coupling device sensor of approximate continuous tone images; And
Image-signal processor, it comprises:
Receive the current pixel of described approximate continuous tone images and the input processor element of next pixel;
Based on the fractional error value of surrounding pixel of the first accelerator unit carry out from to(for) the operation of the error diffusion of described current pixel and described next pixel;
Carrying out the second accelerator unit for the operation of the error diffusion of described current pixel and described next pixel with the time of the operation overlap of described the first accelerator unit, wherein to one or more based on from the first number of components error amount of current pixel of the error diffusion operation of next pixel, based on counting one or more in the error amount from the second component of one or more described surrounding pixels, and based on around described next pixel and one or more in the 3rd number of components error amount of one or more pixels of current pixel not; And
After described error diffusion, the output valve of described current pixel and described next pixel outputed to the output processor element that has less than the output device of the Color Range of the Color Range of described approximate continuous tone images.
19. system as claimed in claim 18 is characterized in that, for the error diffusion operation of described current pixel, described the first accelerator unit is based on the value of upgrading described current pixel from the fractional error value of described surrounding pixel.
20. system as claimed in claim 19 is characterized in that, as the part for the error diffusion operation of described next pixel, described the second accelerator unit is based on the value of upgrading described next pixel from the fractional error value of described surrounding pixel.
21. system as claimed in claim 20, it is characterized in that, as the part for the error diffusion operation of described current pixel, described the second accelerator unit is based on the updating value of described current pixel and the output valve that relatively generates described current pixel between the threshold value, and described the second accelerator unit calculates the poor of the output valve of described current pixel and original value.
22. system as claimed in claim 21, it is characterized in that, as the part for the error diffusion operation of described next pixel, described the first accelerator unit is based on the updating value of described next pixel and the output valve that relatively generates described next pixel between the threshold value, and the output valve of described next pixel of described the first accelerator unit calculating and original value is poor.
23. one kind is used for the equipment carry out processing based on the image of error diffusion, comprises:
The device that is used for an above pixel of reception image;
Be used for based on the device of the current pixel of image being carried out at least a portion of error diffusion operation from the fractional error value of surrounding pixel; And
Be used for and the device of the described error diffusion operation part parallel ground of current pixel being carried out error diffusion operation to next pixel of described image, wherein to one or more based on from the first number of components error amount of current pixel of the error diffusion operation of next pixel, based on counting one or more in the error amount from the second component of one or more described surrounding pixels, and based on around described next pixel and one or more in the 3rd number of components error amount of one or more pixels of current pixel not.
24. equipment as claimed in claim 23 is characterized in that, is used for all comprising to the device of current pixel execution error diffusion with for the device of next pixel being carried out error diffusion:
Be used for the fractional error value part parallel distribute to the device of a described above pixel.
25. equipment as claimed in claim 24 is characterized in that, described fractional error value is based on the Floyd-Steinberg error filter and calculates.
26. equipment as claimed in claim 23 is characterized in that, also comprises outputing to the device that has less than the Color Range of the Color Range of described image.
27. one kind is used for the equipment carry out processing based on the image of error diffusion, comprises:
Be used for to receive the device of the value of the current pixel of image and next pixel;
Be used in the overlapping time, to distribute to from the fractional part of a plurality of values of surrounding pixel the device of described current pixel and described next pixel, wherein from one or more next pixel that offer in the first number of components part of current pixel, one or more described current pixel and described next pixel of offering in the second fractional part of a plurality of values of one or more pixels of current pixel just, and will be around described next pixel and not around the 3rd number of components of one or more pixels of current pixel one or more next pixel that offer in partly;
Be used for output valve being given the device of described current pixel and described next pixel based on the value of described current pixel and described next pixel and from the fractional part of a plurality of values of described surrounding pixel; And
Be used for described output valve is outputed to the device that has less than the output device of the Color Range of the Color Range of described image.
28. equipment as claimed in claim 27 is characterized in that, also comprises:
Be used for calculating based on the value of described current pixel and next pixel and the difference of the output valve of described current pixel and next pixel the device of the error of described current pixel and described next pixel.
29. equipment as claimed in claim 27 is characterized in that, the device that is used for receiving the value of the described current pixel of described image and described next pixel comprises:
Be used for to receive the device of the value of the current pixel of approximate continuous tone digital picture and next pixel.
Priority Applications (1)
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| CN201310052014.3A CN103179321B (en) | 2004-12-14 | 2005-12-13 | A kind of for performing equipment based on the image procossing of error diffusion and method |
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| US11/011,737 US7639887B2 (en) | 2004-12-14 | 2004-12-14 | Error diffusion-based image processing |
| US11/011,737 | 2004-12-14 | ||
| PCT/US2005/045884 WO2006066185A1 (en) | 2004-12-14 | 2005-12-13 | Error diffusion-based image processing |
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| CN201310052014.3A Division CN103179321B (en) | 2004-12-14 | 2005-12-13 | A kind of for performing equipment based on the image procossing of error diffusion and method |
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| CN101076995A CN101076995A (en) | 2007-11-21 |
| CN101076995B true CN101076995B (en) | 2013-03-27 |
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| CN201310052014.3A Expired - Fee Related CN103179321B (en) | 2004-12-14 | 2005-12-13 | A kind of for performing equipment based on the image procossing of error diffusion and method |
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| CN201310052014.3A Expired - Fee Related CN103179321B (en) | 2004-12-14 | 2005-12-13 | A kind of for performing equipment based on the image procossing of error diffusion and method |
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| EP (1) | EP1829358B1 (en) |
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| CN (2) | CN101076995B (en) |
| TW (1) | TWI319283B (en) |
| WO (1) | WO2006066185A1 (en) |
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| CN100417177C (en) * | 2002-03-15 | 2008-09-03 | 佳能株式会社 | Image processing device, method and program |
| US7639887B2 (en) * | 2004-12-14 | 2009-12-29 | Intel Corporation | Error diffusion-based image processing |
| CN100435548C (en) | 2006-09-15 | 2008-11-19 | 北京大学 | Method and device for generating multi-site modulating web site simultaneouslly |
| US8184917B2 (en) * | 2009-08-05 | 2012-05-22 | Brother Kogyo Kabushiki Kaisha | Image processor |
| KR101328793B1 (en) * | 2009-11-23 | 2013-11-13 | 엘지디스플레이 주식회사 | Error diffusion method and liquid crystal display using the same |
| US20130258709A1 (en) | 2010-12-04 | 2013-10-03 | 3M Innovation Properties Company | Illumination assembly and method of forming same |
| WO2012075352A1 (en) | 2010-12-04 | 2012-06-07 | 3M Innovative Properties Company | Illumination assembly and method of forming same |
| JP5955109B2 (en) * | 2012-06-05 | 2016-07-20 | キヤノン株式会社 | Image processing method and image processing apparatus |
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- 2005-12-13 KR KR1020077013313A patent/KR100889410B1/en active IP Right Grant
- 2005-12-13 WO PCT/US2005/045884 patent/WO2006066185A1/en active Application Filing
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| US20120057054A1 (en) | 2012-03-08 |
| US20060126957A1 (en) | 2006-06-15 |
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| US7639887B2 (en) | 2009-12-29 |
| KR100889410B1 (en) | 2009-03-20 |
| EP1829358B1 (en) | 2018-09-05 |
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