CN101073194A - Boosting circuit and portable apparatus using this - Google Patents
Boosting circuit and portable apparatus using this Download PDFInfo
- Publication number
- CN101073194A CN101073194A CN 200580041934 CN200580041934A CN101073194A CN 101073194 A CN101073194 A CN 101073194A CN 200580041934 CN200580041934 CN 200580041934 CN 200580041934 A CN200580041934 A CN 200580041934A CN 101073194 A CN101073194 A CN 101073194A
- Authority
- CN
- China
- Prior art keywords
- voltage
- constant current
- input
- boosting unit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
Abstract
As an input voltage to a boosting unit in an arbitrary stage out of multi-stage boosting units, the boosted output of a boosting unit in an earlier stage is input. Therefore, a boosted voltage level per boosting unit can be increased with the number of units reduced. A reference constant current is generated for a boosting unit performing a boosting operation according to a reference constant current when its output voltage does not reach a reference voltage, and the reference constant current is stopped when its output voltage exceeds the reference voltage. Accordingly, an output voltage at a specified level can be output constantly, and a rush current at starting can be limited to a specified current level.
Description
Technical field
The present invention relates to a kind of lifting supply voltage and export given high-tension booster circuit, and relate to a kind of portable set that uses this booster circuit.
Background technology
Traditionally, charge pump booster circuit is usually as the power circuit that is higher than the output voltage of supply voltage from the supply voltage acquisition.Typically, this charge pump booster circuit configuration is as follows.Multistage charge pump unit connects successively, so that by input voltage is risen to predetermined level, obtain output voltage, wherein each grade charge pump unit all comprises flying capacitor and switch (referring to patent documentation 1).
In above-mentioned charge pump booster circuit,, must control performed boost operations according to its output voltage in order to obtain the output voltage of predetermined level.Example as the conventional art relevant with foregoing, patent documentation 2 discloses a kind of boost operations control method, by this method, detects the output voltage of booster circuit, and according to the output voltage that is detected, the conducting degree of the MOS transistor that is provided with in the control booster circuit.
Patent documentation 1:JP-A-2003-234408
Patent documentation 2:JP-A-H06-351229
Summary of the invention
The problem to be solved in the present invention
For above-mentioned charge pump booster circuit, there are a kind of charge pump booster circuit of series parallel switch type and a kind of charge pump booster circuit of the Dickson type described in patent documentation 1.In any charge pump booster circuit, determine the level of output voltage according to the input supply voltage wherein and the progression that boosts.
Therefore, for by making input voltage promote the output voltage that predetermined factor obtains to stipulate, need with the charge pump unit of predetermined factor similar number progression.That is, also need flying capacitor with the predetermined factor similar number.
Under above-mentioned charge pump circuit was incorporated situation among the IC into, the flying capacitor that is arranged on wherein occupied than large space.This causes the increase of undesirable IC size, and therefore correspondingly causes more expensive.In addition, be installed in flying capacitor under the situation of IC outside, a large amount of chip capacitors must externally be installed.As a result, pin (footprint) such as circuit board having occurred increases and the problem that required time and labor increases is installed.
On the other hand, for output voltage control method, disclosed charge pump booster circuit comes regulated output voltage by change the conducting resistance of detector MOS transistor according to output voltage in the patent documentation 2.Yet problem is that near threshold voltage, conducting resistance changes sharp.This makes and is difficult to regulate to obtain stable output voltage.
In addition, in patent documentation 2, in the disclosed charge pump booster circuit, regulate the gate voltage of the switch mos transistor of charge pump unit.Yet, be used to produce the resistance of voltage grading resistor of gate voltage and the electric capacity of floating of switch mos transistor and make that the rising edge of gate voltage is not too precipitous, postpone thereby in the switching manipulation of switch mos transistor, produce.In order to make this delay minimization, for example can reduce the resistance of voltage grading resistor.Yet this has reduced the efficient of booster circuit unfriendly.
In addition, in patent documentation 2 in the disclosed charge pump booster circuit, between the starting period, the capacitor of charge pump unit is charged.This has caused flowing of bigger inrush current unfriendly.
Therefore, first purpose of the present invention provides a kind of booster circuit and a kind of portable set that uses this booster circuit, this booster circuit can be by using the boosting unit of less progression, the output voltage of output predetermined level, this predetermined level make input voltage promote predetermined factor and obtain.
Second purpose of the present invention provides a kind of booster circuit and a kind of portable set that uses this booster circuit, this booster circuit can provide the stable output of the output voltage of predetermined level, and can reduce in the inrush current that reaches between the starting period of predetermined current level.
In order to realize first purpose, according to a first aspect of the invention, booster circuit comprises the first order that connects successively to the afterbody boosting unit, to first order boosting unit input input voltage, exports the output voltage that boosts from the afterbody boosting unit.Here, each boosting unit comprises: the first and second input nodes; Capacitor; Be connected an end of capacitor and first switch between the first input node; The output node that links to each other with the first input node of end of capacitor and next stage boosting unit; Be connected the other end of capacitor and the second switch between the second input node; And be connected the other end of capacitor and the 3rd switch between the reference potential point.In comprising the odd level boosting unit of first order boosting unit, come on/off first switch and the 3rd switch according to first clock, and according to almost coming the on/off second switch with the anti-phase second clock of first clock.In the even level boosting unit, come on/off first switch and the 3rd switch according to second clock, and come the on/off second switch according to first clock.The second input node of specific boosting unit links to each other with the first input node of the boosting unit of this specific boosting unit previous stage, thereby can carry out boost operations, and the second input node that is different from the boosting unit of this specific boosting unit link to each other with predetermined potential point (first dispose).
Preferably, in booster circuit with above-mentioned first configuration, the second input node of the first input node of first order boosting unit and second input node and the second level boosting unit links to each other with input voltage point, be different from first order boosting unit specific odd level boosting unit second import node link to each other with the output node of the odd level boosting unit of this specific odd level boosting unit previous stage (second disposes).
Preferably, in booster circuit with above-mentioned second configuration, the second input node that is different from the specific even level boosting unit of second level boosting unit link to each other with the output node of the even level boosting unit of this specific even level boosting unit previous stage (the 3rd dispose).
Preferably, in booster circuit with above-mentioned first configuration, the reference potential point is the potential point of input voltage, the predetermined potential point is a ground potential points, from afterbody boosting unit output output voltage as negative voltage, described negative voltage by input voltage is boosted so that on absolute value, obtain (the 4th configuration) greater than input voltage.
Preferably, in booster circuit with above-mentioned first configuration, first order boosting unit is the boosting unit with constant current work, imports constant current from the input potential point to its first and second inputs node input, so that carry out boost operations (the 5th configuration) by the input constant current.
Preferably, in booster circuit with above-mentioned the 5th configuration, the second input node that is different from the specific odd level boosting unit of first order boosting unit link to each other with the output node of the odd level boosting unit of this specific odd level boosting unit previous stage (the 6th dispose).
Preferably, in booster circuit with above-mentioned the 6th configuration, the second input node that is different from the specific even level boosting unit of second level boosting unit link to each other with the output node of the even level boosting unit of this specific even level boosting unit previous stage (the 7th dispose).
Preferably, in booster circuit with above-mentioned the 5th configuration, a kind of current mirroring circuit also is provided, is used for the benchmark constant current is amplified predetermined factor N (N＞1), and will import constant current and be delivered to first order boosting unit (the 8th disposes) from the constant current output node.
In order to realize second purpose, according to a second aspect of the invention, the booster circuit that promotes input voltage and export output voltage has: constant current control circuit, be used for when the first detection voltage according to output voltage is lower than reference voltage, produce first reference current, as the benchmark constant current, and when first detects voltage above reference voltage, stop the benchmark constant current; And at least one is with the boosting unit of constant current work, wherein, according to the benchmark constant current, carries out boost operations (the 9th configuration) by the input constant current.
Preferably, in booster circuit with the 9th configuration, constant current control circuit comprises first differential amplifier circuit, detect voltage and reference voltage to this first differential amplifier circuit input first, first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified.According to the operation of first differential amplifier circuit, constant current control circuit determines that generation still stops benchmark constant current (the tenth configuration).
Preferably, in booster circuit with above-mentioned the tenth configuration, constant current control circuit is also according to output voltage and be higher than first when detecting second of voltage and detecting voltage and be lower than reference voltage, generation is less than second reference current of first reference current, as the benchmark constant current, and when second detects voltage above reference voltage, produce first reference current (the 11 configuration).
Preferably, in booster circuit with above-mentioned the 11 configuration, constant current control circuit comprises: first differential amplifier circuit, detect voltage and reference voltage to this first differential amplifier circuit input first, first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified; And second differential amplifier circuit, detecting voltage and reference voltage to this second differential amplifier circuit input second, this second differential amplifier circuit detects voltage and reference voltage to second of input and carries out difference and amplify.According to the operation of first and second differential amplifier circuits, constant current control circuit is determined to produce one of first and second reference currents and is still stopped benchmark constant current (the 12 configuration) as the benchmark constant current.
Alternatively, in booster circuit with above-mentioned the 9th configuration, constant current control circuit can begin operation in response to the operation signal of input, and generation is less than second reference current of first reference current, as the benchmark constant current, after input operation signal, passed through till the predetermined amount of time, and when having passed through predetermined amount of time, produced first reference current (the 13 configuration).
Preferably, in booster circuit with above-mentioned the 13 configuration, constant current control circuit comprises: first differential amplifier circuit, detect voltage and reference voltage to this first differential amplifier circuit input first, first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified; Timer circuit is used for the operation signal in response to input, and predetermined amount of time is counted; And second differential amplifier circuit, to the output and the reference voltage of this second differential amplifier circuit incoming timing device circuit, this second differential amplifier circuit is carried out difference to the output of the timer circuit of input and reference voltage and is amplified.According to the operation of first and second differential amplifier circuits, constant current control circuit is determined to produce one of first and second reference currents and is still stopped benchmark constant current (the 14 configuration) as the benchmark constant current.
Preferably, in booster circuit with above-mentioned the 9th configuration, a kind of current mirroring circuit also is provided, is used for the benchmark constant current is amplified predetermined factor N (N＞1), and will import constant current and be delivered to boosting unit (the 15 disposes) with constant current work from the constant current output node.
Preferably, in booster circuit, comprise with the boosting unit of constant current work: capacitor with above-mentioned the 15 configuration; Be connected first switch between constant current output node and capacitor one end, come on/off first switch according to first clock; Be connected the other end of capacitor and the 3rd switch between the reference potential point, come on/off the 3rd switch according to first clock; And be connected second switch between the other end of constant year output node and capacitor, according to almost coming on/off second switch (the 16 disposes) with the anti-phase second clock of first clock.
Alternatively, in booster circuit, can comprise with the boosting unit of constant current work: capacitor with above-mentioned the 15 configuration; Be connected first switch between the end of the output node of boosting unit of input voltage point or previous stage and capacitor, come on/off first switch according to first clock; Be connected the other end of capacitor and the 3rd switching device between the reference potential point, come on/off the 3rd switching device according to first clock; And be connected second switch between the other end of constant current output node and capacitor, according to almost coming on/off second switch (the 17 configuration) with the anti-phase second clock of first clock.
According to a third aspect of the invention we, portable set has: the battery supply of output-input voltage; Booster circuit with one of the first to the 17 configuration is to booster circuit input input voltage; And load, provide output voltage (the 18 configuration) from booster circuit to this load.
Effect of the present invention
According to the present invention, in booster circuit, to first order boosting unit input input voltage Vcc, and from afterbody boosting unit output output voltage V out, by to the input of specific boosting unit by the boosting unit boosted voltage of this specific boosting unit previous stage but not input voltage, can increase the level of each boosting unit institute booster tension.Compare with traditional configuration, this has reduced the number that obtains the required boosting unit of the output voltage V out that needs, can reduce the number of flying capacitor.Therefore, under situation about above-mentioned booster circuit being incorporated among the IC, can realize the miniaturization of IC.In addition, under situation about flying capacitor being installed in outside the IC,,, required time and labor is installed thereby reduce so can reduce the pin on the circuit board owing to reduced the number that is installed in outside chip capacitor.
By use with the input constant current carry out boost operations with the boosting unit of constant current job category as first order boosting unit, provide input constant current Is1 to boosting unit.This helps to limit the inrush current between the starting period.This has reduced for example burden of the power supply of battery, and helps to reduce the variation of supply voltage.
According to the present invention, when the output voltage V out of the booster circuit of for example charge pump booster circuit is lower than given voltage Vo1, carry out boost operations by given input constant current Is1; When output voltage V out surpasses given voltage Vo1, stop to import constant current Is1.As a result, carry out boost operations, the stable output of the output voltage of predetermined level can be provided by given input constant current.
Because the boosting unit to for example charge pump unit provides input constant current Is1, so do not produce inrush current between the starting period.This has reduced for example burden of the power supply of battery, and helps to reduce the variation of supply voltage.
Carry out the configuration of automaticallying switch as follows by adopting, make electric current increase gradually, promptly when output voltage V out is low, provide less input constant current Is2; When output voltage V out reaches predetermined level, provide bigger input constant current Is1.This further helps to reduce for example burden of the power supply of battery.
By adopting following configuration, promptly between the starting period of the booster circuit of for example charge pump booster circuit, provide less constant current in the section at the fixed time, predetermined bigger constant current is provided then, output voltage V out reaches the time of predetermined level Vo1 although extended, and can further reduce the burden of battery supply.In addition, because the higher power supply capacity during the normal running can strengthen the response to the variation of output voltage.
Comprise at booster circuit under the situation of multistage boosting unit,, can carry out constant voltage control by using with the boosting unit of constant current job category as in the multistage boosting unit at least one.
Description of drawings
Fig. 1 shows the figure of use according to the illustrative configurations of the portable set of charge pump booster circuit of the present invention.
Fig. 2 shows the figure of the booster circuit 100A of first embodiment.
Fig. 3 shows the figure of the sequential of the used clock of first embodiment.
Fig. 4 shows the figure of the booster circuit 100B of second embodiment.
Fig. 5 shows the figure of the booster circuit 100C of the 3rd embodiment.
Fig. 6 shows output voltage-characteristic figure of input constant current of the booster circuit 100C of the 3rd embodiment.
Fig. 7 shows the figure of example of specific configuration of constant current control circuit 20 of the booster circuit 100C of the 3rd embodiment.
Fig. 8 shows the figure of the booster circuit 100D of the 4th embodiment.
Fig. 9 shows the figure of the booster circuit 100E of the 5th embodiment.
Figure 10 shows output voltage-characteristic figure of input constant current of the booster circuit 100F of the 6th embodiment.
Figure 11 shows the figure of example of specific configuration of constant current control circuit 20 of the booster circuit 100F of the 6th embodiment.
Figure 12 shows the figure of example of specific configuration of constant current control circuit 20 of the booster circuit 100G of the 7th embodiment.
Figure 13 shows the figure of the booster circuit 100H of the 8th embodiment.
Figure 14 shows the figure of the booster circuit 100I of the 9th embodiment.
Figure 15 shows the figure of the booster circuit 100J of the tenth embodiment.
Reference numerals list
100,100A to 100J charge pump booster circuit
The BAT battery supply
10 current mirroring circuits
11，12 PMOS
20 constant current control circuit
21,22,23 voltage grading resistors
24 differential amplifier circuits
26 variable constant current source circuits
30,40,50,60 charge pump unit
SA11 to SA42, SB11 to SB42 switch
C1, C2, C3, C4 flying capacitor
The Co output capacitor
The Vcc input voltage
The Vout output voltage
Vreg adjusts voltage
The Vref reference voltage
Vdet1 first detects voltage
Vdet2 second detects voltage
The Io output current
Iref benchmark constant current
Ir1 first reference current
Ir2 second reference current
Isink imports constant current
The Is1 first input constant current
The Is2 second input constant current
CLK1, the CLK2 clock
The ST operation signal
Embodiment
Below, the portable set that embodies booster circuit of the present invention and use this booster circuit describing with reference to the accompanying drawings.
Fig. 1 shows the figure of use according to the illustrative configurations of the portable set of charge pump booster circuit of the present invention.
In Fig. 1, charge pump booster circuit 100 receives input voltage Vcc from battery supply BAT, and promotes input voltage Vcc, so that obtain the output voltage V out of predetermined level.
Output voltage V out is used as operating voltage and offers such as imaging circuit 300 that uses CCD (charge coupled device) etc. and the load equipment the digital signal processor 400.In this example, output voltage V out is provided for the interface circuit 310 of imaging circuit 300 and the interface circuit 410 of digital signal processor 400.Yet this only is how to realize example of the present invention, and never means and will limit application of the present invention.
The load equipment that for example is arranged on the analog/digital converter 420 in the digital signal processor 400 that is different from the voltage of output voltage V out to needs provides adjustment voltage Vreg, perhaps the output voltage V out that is adjusted by pressurizer 200.
Fig. 2 shows the figure of first embodiment (below be called booster circuit 100A) of booster circuit 100.In Fig. 2,, described producing by making the configuration of the output voltage V out that input voltage Vcc lifting factor 5 obtains as the example of implementation.
Fig. 3 shows the figure of the sequential of the used clock of booster circuit 100A.The sequential that is noted that clock CLK1 shown in this figure and CLK2 is equally applicable to described other embodiment in back.
As shown in Figure 2, the booster circuit 100A of present embodiment comprises that the first order that connects successively is to third level charge pump unit 30 to 50, as its boosting unit.
In second level charge pump unit 40 and afterbody charge pump unit 50, the Reference numeral of capacitor is respectively C2 and C3, and the Reference numeral of first to the 3rd switch is respectively SB21, SA21, SB22 and SA31, SB31, SA32.
Afterbody charge pump unit 50 also comprises between the end that is connected capacitor C3 and the output voltage point and comes the 4th switch S B32 of on/off according to second clock CLK2.The 4th switch S B32 avoids refluxing from output capacitor Co.Therefore, only in the end in the one-level charge pump unit the 4th switch is set.In other words, the 4th switch only must be arranged on the input side of the output capacitor Co outside the afterbody charge pump unit.
In comprising the odd level charge pump unit 30 and 50 of first order charge pump unit, come the on/off first switch S A11 and SA31 and the 3rd switch S A12 and SA32 according to the first clock CLK1, and according to almost coming on/off second switch SB11 and SB31 with the anti-phase second clock CLK2 of first clock.On the other hand, in even level charge pump unit 40, come on/off first switch S B21 and the 3rd switch S B22, and come on/off second switch SA21 according to the first clock CLK1 according to second clock CLK2.
As shown in Figure 3, the first clock CLK1 and second clock CLK2 are two phase clocks, and almost anti-phase.Alternatively, these two clocks can be not have both to be all the clock of the time period of conducting.
First input node of first order charge pump unit 30 and the second input node of the second input node and second level charge pump unit 40 link to each other with input voltage point, wherein by this input voltage point input input voltage Vcc.The second input node that is different from the specific odd level charge pump unit (being afterbody charge pump unit 50 in the figure) of first order charge pump unit 30 links to each other with the output node of the odd number charge pump unit (being first order charge pump unit 30 in the figure) of the previous stage of this specific odd level charge pump unit.Therefore, the output node of charge pump unit 30 links to each other with the first input node of back one-level charge pump unit 40, and links to each other with the second input node of afterbody charge pump unit 50.
Connecting successively under the situation of four or more a plurality of charge pump unit, the second input node that is different from the specific even level charge pump unit (not having this charge pump unit among Fig. 2, because have only three charge pump unit) of second level charge pump unit 40 links to each other with the output node of the even level charge pump unit of the previous stage of this specific even level charge pump unit.Therefore, the output node of charge pump unit 40 links to each other with the first input node of back one-level charge pump unit 50, and links to each other with the second input node of fourth stage charge pump unit (if any).
Because the second input node of charge pump unit 50 links to each other with the output node of charge pump unit 30, so the voltage at this output node place, i.e. " 2 * Vcc " is used for boost operations by charge pump unit 50.By this way, by using four capacitors, promptly flying capacitor C1 to C3 and output capacitor Co can obtain booster voltage " Vcc * 5 ", as output voltage V out.Therefore, utilize the configuration of first embodiment of the invention, the conventional charge pump booster circuit that produces required voltage with five capacitors of needs is compared, and can produce required voltage with the capacitor of lesser number.
The output capacitor Co that links to each other with the output voltage point of booster circuit 100A is charged to output voltage V out.The output voltage V out that is produced is used as operating voltage and outputs to load, and the output current Io of loading demand is satisfied in output.
In above-mentioned first embodiment, the electric charge that is stored among the capacitor C1 of charge pump unit 30 is fed to charge pump unit 40 and charge pump unit 50.Therefore, preferably, make the electric capacity of the electric capacity of capacitor C1 greater than capacitor C2 and C3.That is, preferably, the capacitor of charge stored (for example C1) is the capacitor of electric capacity greater than the electric capacity of other capacitors (for example C2 and C3) as presenting wherein to a plurality of charge pump unit.For described other embodiment in back, this sets up equally.
Fig. 4 shows the figure of second embodiment (below be called booster circuit 100B) of booster circuit 100.In Fig. 4,, describe to produce by making the configuration of the output voltage V out that input voltage Vcc lifting factor 8 obtains as the example of implementation.
As shown in Figure 4, the booster circuit 100B of present embodiment comprises four charge pump unit 30 to 60 that connect successively, as its boosting unit.Although increased the number of the charge pump unit that connects successively, the basic configuration of the basic configuration of second embodiment shown in Figure 4 and above-mentioned first embodiment is similar.
In Fig. 4, charge pump unit 60 is afterbody unit.Therefore, be connected between the end of capacitor C4 and the output voltage point and according to the first clock CLK1 and the 4th switch S A42 of on/off is arranged in the charge pump unit 60.In the end in the one-level charge pump unit 60, the Reference numeral of capacitor is C4, and the Reference numeral of first to the 3rd switch is SB41, SA41 and SB42.
In this example, owing to connected four charge pump unit successively, so as the even level charge pump unit that is different from second level charge pump unit 40, the second input node of fourth stage charge pump unit 60 links to each other with output node as the charge pump unit 40 of the even level charge pump unit of the previous stage of charge pump unit 60.
In Fig. 4, because the second input node of charge pump unit 50 links to each other with the output node of charge pump unit 30, so the voltage at this output node place, i.e. " 2 * Vcc " is used for boost operations by charge pump unit 50.Therefore, from the booster voltage " 5 * Vcc " of the output node of charge pump unit 50 output by input voltage Vcc lifting factor 5 is obtained.
In addition, because the second input node of charge pump unit 60 links to each other with the output node of charge pump unit 40, so the voltage at this output node place, i.e. " 3 * Vcc " is used for boost operations by charge pump unit 60.Therefore, from the booster voltage " 8 * Vcc " of the output node of charge pump unit 60 output by input voltage Vcc lifting factor 8 is obtained.
By this way, by using five capacitors, promptly flying capacitor C1 to C4 and output capacitor Co can obtain booster voltage " Vcc * 8 ", as output voltage.Therefore, utilize the configuration of second embodiment of the invention, the conventional charge pump booster circuit that produces required voltage with eight capacitors of needs is compared, and can produce the required high voltage of the factor 8 of having boosted with the capacitor of lesser number.
As mentioned above, in first and second embodiment of the present invention, particular charge pump unit 50 or 60 second the input node link to each other with the charge pump unit 30 of the previous stage of this particular charge pump unit or 40 output node, therefore boost operations be can carry out, and the charge pump unit 30 of this particular charge pump unit or 40 the second input node link to each other with predetermined potential point (for example importing potential point) are different from.
Also promptly, replace input voltage Vcc, import from the charge pump unit 30 or 40 booster voltages of exporting of the previous stage of this particular charge pump unit, therefore increased the level of the voltage that promotes by each charge pump unit to particular charge pump unit 50 or 60.Compare with traditional configuration, this configuration has reduced the number that obtains the required charge pump unit of required output voltage V out.Therefore, can reduce the number of flying capacitor.
Therefore, in that above-mentioned booster circuit 100B is incorporated under the situation of IC, can realize the miniaturization of IC.In addition, flying capacitor C1 to C4 is being installed under the situation of IC outside,,, required time and labor is being installed thereby reduce so can reduce the pin on the circuit board owing to reduced the number that is installed in outside chip capacitor.
Fig. 5 shows the figure of the 3rd embodiment (below be called booster circuit 100C) of booster circuit 100.As shown in the figure, the difference of booster circuit 100C and first embodiment shown in Figure 2 is to replace first order charge pump unit 30 in order to the charge pump unit 30 of current work.In addition, booster circuit 100C has following configuration: control output voltage Vout, makes it to become predetermined constant voltage.Note, charge pump unit 40 and 50 and charge pump unit 40 and 50 shown in Figure 2 similar.
In Fig. 5, current mirroring circuit 10 comprises: P type MOS transistor 11 (below be called PMOS), and its grid and drain electrode link together; And PMOS 12, its grid links to each other with the grid of PMOS11.PMOS 11 is 1 with the current mirror ratio of PMOS 12: N.This current mirror ratio can be any specified value, and for example, it can be tens to hundreds of.
When benchmark constant current Iref flows through PMOS 11, be the benchmark constant current Iref N input constant current Isink doubly PMOS 12 that can flow through.
This input constant current Isink is provided for the charge pump unit 30 with current work as first order charge pump unit.In charge pump unit 30 with current work, by using input constant current Isink, carry out boost operations, and export the booster voltage that is produced to first input node of charge pump unit 40 and the second input node of charge pump unit 50 from its output node.
The output capacitor Co that links to each other with the output voltage point of booster circuit 100C is charged to output voltage V out.The output voltage V out that is produced is used as operating voltage and outputs to load, and the output current Io of loading demand is satisfied in output.
From the constant current output node of current mirroring circuit 10 to the first and second input nodes input input constant current Isink with the charge pump unit 30 of current work.
In constant current control circuit 20, output voltage V out is by resistor 21 (having resistance R 1) and resistor 22 (having resistance R 2) dividing potential drop, thereby acquisition detects voltage Vdet1 according to first of output voltage V out.Differential amplifier circuit 24 receives first and detects voltage Vdet1 and reference voltage V ref, as two inputs, and operates when input operation signal ST.The difference amplification is carried out in two inputs that 24 pairs of differential amplifier circuits receive like this, and produces difference output.Differential amplifier circuit 24 can be configured to comparator circuit.Although above-mentioned explanation relates to the situation to differential amplifier circuit 24 input operation signal ST, only must be with operation signal ST input constant current control circuit 20, so that control the operation of constant current control circuit 20 according to operation signal ST.
According to the output of differential amplifier circuit 24, regulate the current value of variable constant current source circuit 26, i.e. benchmark constant current Iref.When the first detection voltage Vdet1 was lower than reference voltage V ref, variable constant current source circuit 26 produced the first reference current Ir1, as benchmark constant current Iref.Detect voltage Vdet1 near reference voltage V ref along with first, benchmark constant current Iref reduces.When first detects voltage Vdet1 above reference voltage V ref, stop benchmark constant current Iref.By this way, constant current control circuit 20 is according to the level of the first detection voltage Vdet1, and promptly output voltage V out regulates benchmark constant current Iref.
Describe the operation of the charge pump circuit 100C of the 3rd embodiment below with reference to Fig. 6, wherein Fig. 6 shows the characteristic curve of output voltage V out-input constant current Isink.
Consider that booster circuit 100C is that zero state begins operation from output voltage V out.When producing operation signal ST, constant current control circuit 20 begins operation.Simultaneously, unshowned clock generator begins operation, and produces first and second clock CLK1 and the CLK2.
When constant current control circuit 20 began to operate, 24 pairs first of differential amplifier circuits detect voltage Vdet1 and reference voltage V ref carries out the difference amplification.Because the first detection voltage Vdet1 is lower than reference voltage V ref when the operation beginning, differential amplifier circuit 24 produces bigger difference output.In response to this, variable constant current source circuit 26 produces the first given reference current Ir1, as benchmark constant current Iref.
In current mirroring circuit 10, produce by making the first reference current Ir1 amplify the first input constant current Is1 that obtains than corresponding factor N with current mirror.The first input constant current Is1 that obtains like this outputs to charge pump unit 30 from current mirroring circuit 10.
In charge pump unit 30, come on/off first and the 3rd switch S A11 and SA12 according to the first clock CLK1, and come on/off second switch SB11 according to second clock CLK2.The on/off first and second switch S A11 and SA12 and second switch SB11 make that the former connects when the latter disconnects, and vice versa.
When the first and the 3rd switch S A11 and SA12 connection, only during turn-on time section T, by constant current, promptly along from the first input constant current Is1 of the first switch S A11 via first path flow of capacitor C1 to the three switch S A12, C1 charges to capacitor, so capacitor C1 has polarity as shown in the figure.At this moment, the charging voltage of capacitor C1 equals " electric capacity of the first input constant current Is1 * turn-on time section T/ capacitor C1 ".
On the other hand, when connecting second switch SB11, by constant current, promptly along from the first switch S B11 via the first input constant current Is1 of capacitor C1 to second path of output node, carry out boost operations, thereby capacitor C1 is charged, make it to have polarity as shown in the figure.
In this case, different with conventional arrangement, owing to provide the first input constant current Is1 to charge pump unit 30, so even between the starting period, can not produce inrush current yet.This has reduced for example burden of the power supply of battery supply BAT, and helps to reduce the variation of power source voltage Vcc.
According to first and second clock CLK1 and the CLK2, repeat the boosting of constant current in the charging of constant current in first path of flowing through and second path of flowing through.Output voltage V but is increasing when further carrying out the charge pump unit 40 and 50 of boosting gradually.
By the first input constant current Is1, carry out the charging of the constant current of carrying out in the charge pump unit 30 and boost.Therefore, different with conventional arrangement, even when output voltage V out becomes quite big, the charging rate and the rate of pressure rise can not descend yet.
Along with output voltage V out near target voltage, i.e. the first output voltage V o1, the difference output of differential amplifier circuit 24 diminishes, correspondingly, benchmark constant current Iref reduces to zero from the first reference current Ir1.When output voltage V out meets or exceeds the first output voltage V o1, output vanishing of the difference of differential amplifier circuit 24 or negative value, correspondingly, benchmark constant current Iref vanishing.As a result, input constant current Isink vanishing correspondingly, suspends the boost operations of booster circuit 100C.
Even owing under this halted state, also produce operation signal ST constantly, so constant current control circuit 20 is still worked.In addition, owing to also produce first and second clock CLK1 and the CLK2 constantly, so on/off switch repeatedly.
Therefore, as the result who offers load as output current Io, when output voltage V out is reduced to less than the first output voltage V o1, restart the boost operations of booster circuit 100C immediately.
As mentioned above, in booster circuit 100C,, carry out boost operations as follows: repeatedly suspend and restart, so that make output voltage V out remain on level place near the first output voltage V o1 by given input constant current.
Be noted that and lag behind by making differential amplifier circuit 24, reduce to suspend and restart the frequency of boost operations.
Although Fig. 5 shows the configuration that control output voltage Vout makes it to become constant voltage, also can adopt the configuration of not carrying out this constant voltage control.In this case, only must circulate benchmark constant current Iref or this electric current that stops to circulate.Particularly, for example, only must be switched on or switched off the operation of variable constant current source circuit 26 by using operation signal ST.
Fig. 7 shows the figure of the example of specific configuration of constant current control circuit shown in Figure 5 20 and current mirroring circuit 10.
In Fig. 7, between input voltage point (supply voltage point) and ground, be in series with PMOS241 and constant-current source circuit 240, grid and the drain electrode of PMOS 241 link together, constant-current source circuit 240 so that be switched on or switched off, and flows through constant current 100 by operation signal ST control when connecting.PMOS 242 also is provided, and its source electrode links to each other with grid with the source electrode of PMOS 241 with grid, and its current mirror ratio is 1: M1 (for example M1 is 10).
Between the drain electrode and ground of PMOS 242, be in series with PMOS 243 and N type MOS transistor (below be called NMOS) 244, and be in series with PMOS 245 and NMOS 246, wherein the drain and gate of NMOS 244 links together.Grid to PMOS 243 applies the first detection voltage Vdet1, and applies reference voltage V ref to the grid of PMOS 245.PMOS243, NMOS 244, PMOS 245 and NMOS 246 have constituted first differential amplifier circuit jointly.
Between supply voltage point and ground, be in series with PMOS 262 and NMOS 261, and be in series with PMOS 264 and NMOS 263, wherein the grid of PMOS 262 and drain electrode link together, the grid of NMOS 261 links to each other with the grid of NMOS 246, the grid of PMOS 264 links to each other with the grid of PMOS 262, and the grid of NMOS 263 links to each other with the grid of NMOS 244.Current mirror ratio between PMOS 262 and the PMOS 264 is set to 1: 1.Current mirror between NMOS246 and the NMOS 261 than and NMOS 244 and NMOS 263 between current mirror than all being set to 1: 1.
Between PMOS 264 and node and supply voltage point that NMOS 263 connects, be provided with PMOS 265, grid and the drain electrode of PMOS 265 link together.Between supply voltage point and ground, be in series with PMOS 266 and NMOS 267, wherein the grid of PMOS 266 links to each other with the grid of PMOS 265, and drain electrode and the grid of NMOS 267 link together.Current mirror ratio between PMOS265 and the PMOS 266 is set to 1: M3 (for example M3 is 50).
Between the drain electrode and ground of the PMOS 11 of current mirroring circuit 10, be provided with NMOS268, the grid of NMOS 268 links to each other with the grid of NMOS 267.Current mirror ratio between NMOS 267 and the NMOS268 is set to 1: 1.
In constant current control circuit shown in Figure 7 20, execution and Fig. 5 and 6 described similar control operations.That is, when producing operation signal ST (when becoming high level), constant current control circuit 20 begins operation.In first differential amplifier circuit, detect voltage Vdet1 and the amplification of reference voltage V ref execution difference to first.According to the difference result amplified, regulate benchmark constant current Iref.
Fig. 8 shows the figure of the 4th embodiment (below be called booster circuit 100D) of booster circuit 100.The booster circuit 100D of present embodiment output by promoting input voltage Vcc so that on absolute value, be the output voltage V out of negative voltage greater than what input voltage Vcc obtained.
The difference of the embodiment shown in Figure 8 and second embodiment shown in Figure 4 is following aspect.In charge pump unit 30 to 60, the node that links to each other with ground among Fig. 4 links to each other with the input potential point in Fig. 8, and the node that links to each other with the input potential point among Fig. 4 links to each other with ground in Fig. 8.
As mentioned above, in the booster circuit 100D of present embodiment, the reference potential point among first and second embodiment is changed into the potential point of input voltage, and the predetermined potential point is changed into ground potential points.By this way, by changing the node potential of the input voltage and the potential point on ground simply, can produce the negative voltage that promotes from input voltage Vcc, and not produce the voltage Vout that is just promoting.
Fig. 9 shows the figure of the 5th embodiment (below be called booster circuit 100E) of booster circuit 100.As shown in the figure, the booster circuit 100E of present embodiment and the booster circuit of the 3rd embodiment are similar, promptly have charge pump unit 30 with current work as boosting unit, but be that with the difference of first to fourth embodiment it does not have the configuration that multistage boosting unit is connected successively.
In addition, be provided with the 4th switch S B12, be connected between the end and output voltage point of capacitor C1, and according to second clock CLK2 and on/off.The 4th switch S B12 avoids refluxing from output capacitor Co.Therefore, under the situation that multistage charge pump unit connects successively, only in the end in the one-level charge pump unit the 4th switch is set.In other words, only in the end the input side of the output capacitor Co outside the one-level charge pump unit the 4th switch is set.
The characteristic curve that is noted that the circuit arrangement of current mirroring circuit 10 and constant current control circuit 20 and operation and output voltage V out-input constant current Isink is with similar with reference to figure 5 to 7 specifically described the 3rd embodiment.Therefore, in the charge pump unit 30 of present embodiment, carry out boost operations by input constant current Isink equally, and export the booster voltage that is produced.By this booster voltage, the output capacitor Co that will link to each other with output voltage point charges to output voltage V out.The output voltage V out that is produced is used as operating voltage and outputs to load, and the output current Io of loading demand is satisfied in output.
As mentioned above, the booster circuit 100E of present embodiment comprises: constant current control circuit 20, be used for when the first detection voltage Vdet1 according to output voltage V out is lower than reference voltage V ref, produce the first reference current Ir1, as benchmark constant current Iref, and when first detects voltage Vdet1 above reference voltage V ref, stop benchmark constant current Iref; And at least one is with the boosting unit 30 of constant current work, and wherein, according to benchmark constant current Iref, Isink carries out boost operations by the input constant current.Utilize this configuration, carry out boost operations by given input constant current Isink.This can provide the stable output of the output voltage V out of predetermined level.
In addition, owing to provide given input constant current Isink (the first input constant current Is1) to charge pump unit 30, so between the starting period, do not produce inrush current.This has reduced the burden such as the power supply of battery supply BAT, and helps to reduce the variation of power source voltage Vcc.
Next, the 6th embodiment (below be called booster circuit 100F) of booster circuit 100 is described.The booster circuit 100F of present embodiment has the essentially identical configuration with above-mentioned the 5th embodiment, and distinguishing characteristics is by reducing to import the increasing degree of constant current Isink, revise the configuration of constant current control circuit 20, made it to have the characteristic curve of output voltage V out-input constant current Isink shown in Figure 10.
In order to realize characteristic curve shown in Figure 10, in constant current control circuit 20, except the above-mentioned first detection voltage Vdet1, also use the second detection voltage Vdet2 that changes and be higher than the first detection voltage Vdet1 according to output voltage V out.Second detects voltage Vdet2 is set to when output voltage V out reaches the given second output voltage V o2 that is lower than the first output voltage V o1, and ref equates with reference voltage V.
When the second detection voltage Vdet2 is lower than reference voltage V ref, produce the second reference current Ir2, as benchmark constant current Iref less than the first reference current Ir1.Therefore, under this state, input constant current Isink is the second input constant current Is2 less than the first input constant current Is1.
When output voltage V out reached the second output voltage V o2, second detects voltage Vdet2 surpassed reference voltage V ref.Therefore, constant current control circuit 20 produces the first reference current Ir1.As a result, input constant current Isink increases to the first input constant current Is1.
As mentioned above, carry out automatic switchover in the following manner.When output voltage V out when low, the second less input constant current Is2 is provided; When output voltage V out reaches predetermined level, provide the first bigger input constant current Is1.This makes electric current be increased to second gradually from zero and imports constant current Is2, is increased to the first input constant current Is1 gradually from the second input constant current Is2 then.Therefore, can further reduce for example burden of the power supply of battery supply BAT.
Figure 11 shows and realizes the characteristic constant current control circuit 20 shown in Figure 10 and the example of specific configuration of current mirroring circuit 10.
In the following description, only explain difference between configuration shown in Figure 11 and the configuration shown in Figure 7.In Figure 11, be provided with PMOS 251, its grid links to each other with source electrode with the grid of PMOS 242 with source electrode, and constitutes the current mirror configuration with PMOS 241 and PMOS 242.Current mirror ratio between PMOS 241, PMOS 242 and the PMOS 251 is set to 1: M1: M2 (for example 1: 10: 7).Be M1＜M2.
21,22 and 23 pairs of output voltage V out dividing potential drops of voltage grading resistor detect voltage Vdet1 and the second detection voltage Vdet2 that is higher than the first detection voltage Vdet1 to produce first.First detects voltage Vdet1 can be in identical voltage level with the first detection voltage Vdet1 of above-mentioned the 5th embodiment.Second detects voltage Vdet2 always detects voltage Vdet1 to be higher than first to fixed-ratio, and irrelevant with the variation of output voltage V out.
Between the drain electrode and ground of PMOS 251, be in series with PMOS 252 and NMOS 253, drain electrode and the grid of NMOS 253 link together.Between the drain electrode of PMOS 251 and PMOS245 and node that NMOS 246 connects, be connected with PMOS 254.Grid to PMOS 254 applies the second detection voltage Vdet2, and applies reference voltage V ref to the grid of PMOS 252.PMOs 252, NMOS 253 and PMOS 254 common formation second differential amplifier circuits.
In constant current control circuit shown in Figure 11 20, in second differential amplifier circuit, reference voltage V ref and second is detected voltage Vdet2 carry out the difference amplification.As this difference result amplified, be lower than interim of the second output voltage V o2 at output voltage V out, by the electric current of PMOS 251 flow through PMOS 254 and NMOS 246.
In this state, the electric current of the PMOS 265 that the flows through difference between the electric current of the electric current of NMOS 244 and the NMOS 246 that flows through that equals to flow through, i.e. I00 * (M1-M2).
Therefore, because benchmark constant current Iref is the second reference current Ir2 less than the first reference current Ir1, so input constant current Isink is the second input current Is2 less than the first input constant current Is1.By the image ratio between PMOS 242 and the PMOS 251, promptly M1: M2 determines the degree of the second input current Is2 less than the first input constant current Is1.
When output voltage V out increase and second detects voltage Vdet2 above reference voltage V ref, disconnect PMOS 254 and also connect PMOS 252.In this state, owing to carry out and the 5th embodiment identical operations, input constant current Isink is the first input constant current Is1.
Next, the 7th embodiment (below be called booster circuit 100G) of booster circuit 100 is described.The booster circuit 100G of present embodiment has the essentially identical configuration with above-mentioned the 6th embodiment, and distinguishing characteristics has been to revise the configuration of constant current control circuit 20, make output voltage V out increase to the first output voltage V o1 by less input constant current Isink (the second input constant current Is2), and come the variation of the load of processing subsequent generation by bigger input constant current Isink (the first input constant current Is1).
Figure 12 shows the constant current control circuit 20 of realization aforesaid operations and the example of specific configuration of current mirroring circuit 10.
As shown in the figure, constant current control circuit 20 comprises: first differential amplifier circuit, detect voltage Vdet1 and reference voltage V ref to this first differential amplifier circuit input first, and this first differential amplifier circuit is carried out difference to these inputs and is amplified; Timer circuit 260 is used to receive operation signal ST and predetermined amount of time τ is counted; And second differential amplifier circuit, to the output and the reference voltage V ref of this second differential amplifier circuit incoming timing device circuit 260, this second differential amplifier circuit is carried out difference to these inputs and is amplified.
According to the operation of first and second differential amplifier circuits, determine to produce one of the first and second reference current Ir1 and Ir2 and still stop benchmark constant current Iref as benchmark constant current Iref.
In Figure 12, timer circuit 260 is set, be used for only producing L level output signal in the predetermined amount of time τ after producing operation signal ST.The output signal of timer circuit 260 is fed to the grid of the PMOS254 of second differential amplifier circuit.Therefore, different with above-mentioned the 6th embodiment, the 7th embodiment does not need second to detect voltage Vdet2.
Predetermined amount of time τ is set to the time period that enough output voltage V out reach the first output voltage V o1.Alternatively, as required, predetermined amount of time τ can be set to the time period that output voltage V out is lower than the first output voltage V o1, so that realize characteristic curve shown in Figure 10.
According to the 7th embodiment,, can further reduce the burden of battery supply BAT although the output voltage V out that extended reaches the time of the first output voltage V o1.In addition, because the high power supply capacity during the normal running can strengthen the response to the variation of output voltage V out.
Figure 13 shows the figure of the 8th embodiment (below be called booster circuit 100H) of booster circuit 100.As shown in the figure, the booster circuit 100H of present embodiment has and the 5th embodiment configuration much at one shown in Figure 9, but difference is that the first switch S A11 links to each other with supply voltage point rather than links to each other with the output node of current mirroring circuit 10.
In the booster circuit 100H of present embodiment, when the first and the 3rd switch S A11 and SA12 connection, only during turn-on time section T, by by via the power source voltage Vcc that first path of capacitor C1 to the three switch S A12 applies capacitor C1 being charged, make it to have polarity as shown in the figure from the first switch S A11.
On the other hand, when the second and the 4th switch S B11 and SB12 connection, by constant current, promptly flow through from second switch SB11 via capacitor C1 and the 4th switch S B12 the first input constant current Is1 to second path of output capacitor Co, carry out boost operations, so that Co charges to output capacitor, make it to have polarity as shown in the figure.
According to first and second clock CLK1 and the CLK2, repeat the boosting of constant current in the charging of constant current in first path of flowing through and second path of flowing through.As a result, output voltage V out increases gradually.
Along with output voltage V out near target voltage, i.e. the first output voltage V o1, the difference output of differential amplifier circuit 24 diminishes, correspondingly, benchmark constant current Iref reduces to zero from the first reference current Ir1.When output voltage V out meets or exceeds the first output voltage V o1, output vanishing of the difference of differential amplifier circuit 24 or negative value, correspondingly, benchmark constant current Iref vanishing.At this moment, only carry out the charging of the constant current in first path of flowing through.Therefore, also vanishing of input constant current Isink correspondingly, suspends the boost operations of booster circuit 100H.
Figure 14 shows the figure of the 9th embodiment (below be called booster circuit 100I) of booster circuit 100.As shown in the figure, the booster circuit 100I of present embodiment comprises multistage charge pump unit.
In the booster circuit 100I of present embodiment, use in the charge pump unit 30 described in the 5th embodiment of Fig. 9, as its first order charge pump unit with constant current work.In addition, use charge pump unit 40, as charge pump unit with the back one-level of the charge pump unit 30 of constant current work with voltage power supply.
Can revise configuration shown in Figure 14, will be used as charge pump unit 40 with the charge pump unit of current work.In this case, shown in the dotted line among Figure 14, the switch S A21 that links to each other with input voltage Vcc in Figure 14 links to each other with the output node of current mirroring circuit 10.Particularly, in this modified example, charge pump unit 30 and 40 all is the type with current work.
Figure 15 shows the figure of the tenth embodiment (below be called booster circuit 100J) of booster circuit 100.As shown in the figure, described identical with the 9th embodiment, the booster circuit 100J of present embodiment comprises multistage charge pump unit.
In the booster circuit 100J of present embodiment, use charge pump unit 40, as its first order charge pump unit with voltage power supply.In addition, use, as charge pump unit with the back one-level of the charge pump unit 40 of voltage power supply in the charge pump unit 30 described in the 8th embodiment shown in Figure 13 with constant current work.
Even in comprising the booster circuit of multistage charge pump unit, identical with the described electricity that boosts of the 9th and the tenth embodiment shown in Figure 14 and 15 respectively, by using with the charge pump unit of the type of current work as in the multistage charge pump unit at least one, identical with the 5th to the 8th embodiment, can carry out by the boost operations of constant current and the constant voltage control of output voltage V out.
Claims (18)
1. booster circuit, wherein the first order to afterbody boosting unit connects successively, to first order boosting unit input input voltage, and the output voltage that boosts from the output of afterbody boosting unit, wherein
Each boosting unit comprises:
The first and second input nodes;
Capacitor;
Be connected an end of capacitor and first switch between the first input node;
The output node that links to each other with the first input node of end of capacitor and next stage boosting unit;
Be connected the other end of capacitor and the second switch between the second input node; And
Be connected the other end of capacitor and the 3rd switch between the reference potential point,
In comprising the odd level boosting unit of first order boosting unit, come on/off first switch and the 3rd switch according to first clock, and according to almost coming the on/off second switch with the anti-phase second clock of first clock,
In the even level boosting unit, come on/off first switch and the 3rd switch according to second clock, and come the on/off second switch according to first clock,
The second input node of specific boosting unit links to each other with the first input node of the boosting unit of this specific boosting unit previous stage, thereby can carry out boost operations, and be different from this specific boosting unit boosting unit second the input node link to each other with predetermined potential point.
2. booster circuit according to claim 1, wherein
First input node of first order boosting unit and the second input node of the second input node and second level boosting unit link to each other with input voltage point,
The second input node that is different from the specific odd level boosting unit of first order boosting unit links to each other with the output node of the odd level boosting unit of this specific odd level boosting unit previous stage.
3. booster circuit according to claim 2, wherein
The second input node that is different from the specific even level boosting unit of second level boosting unit links to each other with the output node of the even level boosting unit of this specific even level boosting unit previous stage.
4. booster circuit according to claim 1, wherein
Described reference potential point is the potential point of input voltage,
Described predetermined potential point is a ground potential points,
From afterbody boosting unit output output voltage, described output voltage is by input voltage being boosted so that the negative voltage that obtains greater than input voltage on absolute value.
5. booster circuit according to claim 1, wherein
First order boosting unit is the boosting unit with constant current work, imports constant current from the input potential point to its first and second inputs node input, so that carry out boost operations by the input constant current.
6. booster circuit according to claim 5, wherein
The second input node that is different from the specific odd level boosting unit of first order boosting unit links to each other with the output node of the odd level boosting unit of this specific odd level boosting unit previous stage.
7. booster circuit according to claim 6, wherein
The second input node that is different from the specific even level boosting unit of second level boosting unit links to each other with the output node of the even level boosting unit of this specific even level boosting unit previous stage.
8. booster circuit according to claim 5 also comprises:
Current mirroring circuit is used for the benchmark constant current is amplified predetermined factor N, N＞1, and will import constant current and be delivered to first order boosting unit from the constant current output node.
9. the booster circuit of the output voltage that input voltage boosted and export, described booster circuit comprises:
Constant current control circuit is used for producing first reference current when the first detection voltage according to output voltage is lower than reference voltage, as the benchmark constant current, and when first detects voltage above reference voltage, stops the benchmark constant current; And
At least one wherein, carries out boost operations by the input constant current according to the benchmark constant current with the boosting unit of constant current work.
10. booster circuit according to claim 9, wherein
Constant current control circuit comprises:
First differential amplifier circuit detects voltage and reference voltage to this first differential amplifier circuit input first, and first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified,
According to the operation of first differential amplifier circuit, constant current control circuit determines that generation still stops the benchmark constant current.
11. booster circuit according to claim 9, wherein
Constant current control circuit is also according to output voltage and be higher than first when detecting second of voltage and detecting voltage and be lower than reference voltage, generation is less than second reference current of first reference current, as the benchmark constant current, and when second detects voltage above reference voltage, produce first reference current.
12. booster circuit according to claim 11, wherein
Constant current control circuit comprises:
First differential amplifier circuit detects voltage and reference voltage to this first differential amplifier circuit input first, and first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified; And
Second differential amplifier circuit detects voltage and reference voltage to this second differential amplifier circuit input second, and second of input is detected voltage to this second differential amplifier circuit and reference voltage execution difference is amplified,
According to the operation of first and second differential amplifier circuits, constant current control circuit is determined to produce one of first and second reference currents and is still stopped the benchmark constant current as the benchmark constant current.
13. booster circuit according to claim 9, wherein
Constant current control circuit
Operation signal in response to input begins operation, and
Generation, has been passed through till the predetermined amount of time after input operation signal as the benchmark constant current less than second reference current of first reference current, and produces first reference current when having passed through predetermined amount of time.
14. booster circuit according to claim 13, wherein
Constant current control circuit comprises:
First differential amplifier circuit detects voltage and reference voltage to this first differential amplifier circuit input first, and first of input is detected voltage to this first differential amplifier circuit and reference voltage execution difference is amplified;
Timer circuit is used for the operation signal in response to input, and predetermined amount of time is counted; And
Second differential amplifier circuit, to the output and the reference voltage of this second differential amplifier circuit incoming timing device circuit, this second differential amplifier circuit is to the timer circuit of input
Output and reference voltage are carried out difference and are amplified,
According to the operation of first and second differential amplifier circuits, constant current control circuit is determined to produce one of first and second reference currents and is still stopped the benchmark constant current as the benchmark constant current.
15. booster circuit according to claim 9 also comprises:
Current mirroring circuit is used for the benchmark constant current is amplified predetermined factor N, N＞1, and will import constant current and be delivered to boosting unit with constant current work from the constant current output node.
16. booster circuit according to claim 15, wherein
Boosting unit with constant current work comprises:
Capacitor;
Be connected first switch between constant current output node and capacitor one end, come on/off first switch according to first clock;
Be connected the other end of capacitor and the 3rd switch between the reference potential point, come on/off the 3rd switch according to first clock; And
Be connected the second switch between the other end of constant current output node and capacitor, according to almost coming the on/off second switch with the anti-phase second clock of first clock.
17. booster circuit according to claim 15, wherein
Boosting unit with constant current work comprises:
Capacitor;
Be connected first switch between the end of the output node of boosting unit of input voltage point or previous stage and capacitor, come on/off first switch according to first clock;
Be connected the other end of capacitor and the 3rd switching device between the reference potential point, come on/off the 3rd switching device according to first clock; And
Be connected the second switch between the other end of constant current output node and capacitor, according to almost coming the on/off second switch with the anti-phase second clock of first clock.
18. a portable set comprises:
The battery supply of output-input voltage;
According to the booster circuit of one of claim 1 to 17, import described input voltage to this booster circuit; And
Load provides output voltage from booster circuit to this load.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP352752/2004 | 2004-12-06 | ||
| JP2004352752 | 2004-12-06 | ||
| JP362315/2004 | 2004-12-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101073194A true CN101073194A (en) | 2007-11-14 |
| CN100566099C CN100566099C (en) | 2009-12-02 |
Family
ID=38899508
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005800419349A Expired - Fee Related CN100566099C (en) | 2004-12-06 | 2005-10-19 | The portable set of booster circuit and this circuit of use |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100566099C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102882362A (en) * | 2012-10-12 | 2013-01-16 | 西安三馀半导体有限公司 | Multi-operating-mode charge pump overshoot current limiting device |
| CN103188847A (en) * | 2011-12-30 | 2013-07-03 | 王钦恒 | Constant current charge pump light-emitting diode (LED) drive circuit |
| CN104300783A (en) * | 2014-09-22 | 2015-01-21 | 京东方科技集团股份有限公司 | Voltage regulator circuit and array substrate |
| CN104781745A (en) * | 2012-10-16 | 2015-07-15 | 北极砂技术有限公司 | Pre-charge of switched capacitor circuits with cascoded drivers |
| CN112003468A (en) * | 2020-07-15 | 2020-11-27 | 成都飞机工业（集团）有限责任公司 | Low-EMI GaN-based switched capacitor type converter circuit |
-
2005
- 2005-10-19 CN CNB2005800419349A patent/CN100566099C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103188847A (en) * | 2011-12-30 | 2013-07-03 | 王钦恒 | Constant current charge pump light-emitting diode (LED) drive circuit |
| CN103188847B (en) * | 2011-12-30 | 2015-07-22 | 王钦恒 | Constant current charge pump light-emitting diode (LED) drive circuit |
| CN102882362A (en) * | 2012-10-12 | 2013-01-16 | 西安三馀半导体有限公司 | Multi-operating-mode charge pump overshoot current limiting device |
| CN102882362B (en) * | 2012-10-12 | 2014-09-17 | 西安三馀半导体有限公司 | Multi-operating-mode charge pump overshoot current limiting device |
| CN104781745A (en) * | 2012-10-16 | 2015-07-15 | 北极砂技术有限公司 | Pre-charge of switched capacitor circuits with cascoded drivers |
| CN104781745B (en) * | 2012-10-16 | 2017-05-03 | 北极砂技术有限公司 | Pre-charge of switched capacitor circuits with cascoded drivers |
| CN104300783A (en) * | 2014-09-22 | 2015-01-21 | 京东方科技集团股份有限公司 | Voltage regulator circuit and array substrate |
| CN112003468A (en) * | 2020-07-15 | 2020-11-27 | 成都飞机工业（集团）有限责任公司 | Low-EMI GaN-based switched capacitor type converter circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100566099C (en) | 2009-12-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4615524B2 (en) | Boost circuit and portable device using the same | |
| CN101247083B (en) | Switching regulator | |
| US7893662B2 (en) | Method and related device for charging at the same voltage two or more capacitors connected in series | |
| US20070126494A1 (en) | Charge pump having shunt diode for improved operating efficiency | |
| CN101110549B (en) | Boosting circuit | |
| KR101928498B1 (en) | Clock based Soft-Start Circuit and Power Management Integrated Circuit Device | |
| US8896367B1 (en) | Charge pump system | |
| JP2007244051A (en) | Boosting circuit and electric appliance equipped with the same | |
| CN100566099C (en) | The portable set of booster circuit and this circuit of use | |
| JP2008295009A (en) | Constant current driving circuit | |
| US10305308B2 (en) | Power supply module and power supply method using the same | |
| CN102263504A (en) | Power supply circuit, integrated circuit device, solid-state imaging apparatus, and electronic apparatus | |
| CN113708607B (en) | NMOS (N-channel metal oxide semiconductor) access switch control circuit | |
| CN101911456B (en) | Power supply circuit and method for controlling the same | |
| TW201937331A (en) | Voltage regulation system, voltage regulation chip and voltage regulation control method thereof | |
| CN101674069A (en) | Slope generating circuit | |
| CN109565242A (en) | Series circuit, circuit board and calculating equipment | |
| JP6526507B2 (en) | Step-down circuit and step-down charging circuit using the same | |
| CN102545590B (en) | Charge pump device and voltage stabilizing method thereof | |
| EP3480944B1 (en) | Transmission device for current signal of solar string | |
| CN102231597B (en) | Charge pump and working method thereof | |
| EP1635444B1 (en) | Shutdown circuit for a charge pump | |
| CN103135644A (en) | Starting voltage generating circuit and starting voltage generating method | |
| CN105896961B (en) | The control method and device of charge pump | |
| CN106612069B (en) | Charge pump and dynamic charge pump arrangement comprising it |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091202 Termination date: 20131019 |