CN101072143A - Ethernet two-line/four-line converting device and a line distributor - Google Patents

Abstract

Through single pair of difference wire, send receive module (SRM) with two lines receives / sends Ethernet signal in physical layer. Through two pairs of difference wire, SRM with four lines receives / sends Ethernet signal in physical layer. Through digital interface, SRM with two lines is coupled to SRM with four lines. Through the disclosed switching device, the invention realizes conversion between two lines and four lines. In practical application, Ethernet access can be realized through telephone line to solve issue of too high cost for Ethernet access for wiring in large area.

Description

Ethernet two-wire/four-wire conversion device and distribution frame

Technical Field

The invention relates to the field of network communication, in particular to an Ethernet two-wire/four-wire conversion device and a distribution frame.

Background

With the rapid development of the internet, especially with the rise of new services such as IPTV, the last kilometer of the end user becomes the bottleneck for the development of new services, and the current mainstream ADSL access method based on the modem technology obviously cannot provide enough bandwidth support, so the industry is currently studying technologies such as VDSL and ADSL2+ to solve the above problems, but at present, the research and development of these new technologies are not mature enough, the cost of the business application is still high on average to each user, and the service provider is not willing to adopt the technology fraudulently.

In the face of the above problems, many technicians are beginning to consider whether it is possible to start with existing technologies, such as mature ethernet technologies that provide a fairly high access bandwidth. The existing ethernet (LAN) access method mainly adopts the steps of erecting an exchanger at a cell or a corridor, laying network cables from a local side to the exchanger of the cell, then pulling a new network cable from the exchanger of the cell to the home of an unavailable user, and directly connecting the network cable with an ethernet port of a network card or a gateway through standard ethernet. It can be seen that although the ethernet access method can support a sufficient bandwidth compared to the ADSL access method, it requires a large area to re-route the network cable, and thus the cost is relatively high.

Disclosure of Invention

The invention aims to provide a two-wire/four-wire conversion device and a distribution frame, which are used for solving the technical problem of higher cost caused by the fact that a large area of network wires needs to be rearranged in the existing Ethernet access scheme and are fully compatible with the prior art.

In order to solve the technical problems, the invention aims to realize the following technical scheme: a two-wire/four-wire conversion device of Ethernet comprises a two-wire transceiver module for receiving/transmitting physical layer Ethernet signals through a single pair of differential wires and a four-wire transceiver module for receiving/transmitting physical layer Ethernet signals through a double pair of differential wires, wherein the two-wire transceiver module and the four-wire transceiver module are coupled through a digital interface.

Preferably, the wireless communication device further comprises a switch control unit, configured to control the digital signal restored by the transceiver module to enter another transceiver module or send the digital signal to the MAC side.

When the two-wire transceiver module works in a full-duplex working mode, the two-wire transceiver module comprises an echo cancellation unit which is used for recovering an original receiving signal according to a superposed receiving signal and an original sending signal from the single pair of differential wires.

When the two-wire transceiver module works in a half-duplex working mode, the two-wire transceiver module comprises a collision detection unit and a collision avoidance control unit; the collision detection unit is used for detecting whether a signal sent by an opposite terminal exists on the single pair of differential lines; and the collision avoidance control unit controls whether to transmit a signal which needs to be sent out to the single pair of differential lines or not according to the detection result of the collision detection unit.

Preferably, the two-wire transceiver module and the four-wire transceiver module use different transmission coding and decoding processing sub-units.

The two-wire transceiver module and the four-wire transceiver module operate at a rate of no greater than 100M.

Preferably, the two-wire transceiver module further includes a clock adjusting unit for eliminating clock difference between the two-wire transceiver module and the four-wire transceiver module.

The clock adjusting unit comprises a clock processing unit which is used for recovering a receiving clock from an input signal of one transceiver module and providing the receiving clock to another transceiver module as a transmitting clock of the other transceiver module.

When the sending clock adopted by one transceiver module is different from the receiving clock adopted by the other transceiver module, the clock adjusting unit further comprises a first-in first-out buffer connected between the transceiver modules, the first-in first-out buffer writes a digital signal provided by the transceiver module on one side according to the receiving clock, and then reads the digital signal according to the sending clock and sends the digital signal to the transceiver module on the other side.

The single pair of differential lines is a telephone line. Preferably, the telephone set also comprises an RJ-11 socket used for connecting with the telephone line plug and an RJ-45 socket used for connecting with the network cable plug. Preferably, the telephone set also comprises an RJ-45 socket used for connecting with the telephone line plug and an RJ-45 socket used for connecting with the network line plug.

Preferably, the Power Over Ethernet (POE) power receiving unit is further included to obtain the working power.

A distribution frame comprises a support frame body and at least one two-wire/four-wire conversion device arranged on the support frame body.

As can be seen from the above technical solutions, in the two-wire/four-wire conversion apparatus disclosed in the present invention, the two-wire transceiver module receives/transmits the physical layer ethernet signals from the single pair of differential wires, and the four-wire transceiver module receives/transmits the physical layer ethernet signals from the dual pair of differential wires, and the two-wire transceiver module and the four-wire transceiver module are coupled through the digital interface, so that the conversion between two-wire and four-wire transmission can be realized. Furthermore, the first-in first-out buffer connected between the two-wire transceiver module and the four-wire transceiver module absorbs clock difference on two sides, so that conversion between two-wire transmission and four-wire transmission is more reliable. In practical application, one side of the device of the invention can be used for carrying out two-wire transmission through a telephone line, and the other side can be used for carrying out 4-wire transmission through a standard network wire, so that the telephone line arranged in a cell development process on an operator can be utilized, large-area wiring is not needed again, and only the network wire is arranged in a small range on a local side or a user side, thereby reducing the cost of Ethernet access.

Drawings

FIG. 1 is a schematic structural diagram of a first embodiment of a conversion apparatus disclosed in the present invention;

FIG. 2 is a schematic structural diagram of a second embodiment of the conversion apparatus disclosed in the present invention;

fig. 3 is a schematic structural diagram of a conversion apparatus according to a third embodiment of the disclosure.

Detailed Description

In the foregoing, it is explained that the cost of the scheme for implementing ethernet access to a user by rewiring a network cable in a large area is too high in the background art, and the scheme for implementing low-cost ethernet access by using the technology of the present invention is described below in conjunction with the ethernet two-wire/four-wire conversion apparatus disclosed in the present invention.

Generally, a large broadband access service operator is also a basic telecommunication service operator, and for traditional telephone wiring in a city, the operator usually considers that two telephones are possibly needed in one family, so when telephone wiring is carried out in cell development, two telephone lines (each telephone line comprises a single pair of differential lines) are arranged at one time, and in fact, most families only use the last telephone line, and the other telephone line is in an idle state. Under the condition, the Ethernet two-wire/four-wire conversion device disclosed by the invention can be respectively used at the local side and the user side, so that the local side outputs four wires, the user side inputs four wires, and the local side conversion device and the user side conversion device can transmit Ethernet signals through idle telephone wires comprising a single pair of differential wires, thereby achieving the purpose of realizing low-cost Ethernet access by utilizing the existing resources.

Please refer to fig. 1, which is a schematic structural diagram of a conversion device according to a first embodiment of the disclosure.

The two-wire/four-wire conversion device 21 includes a two-wire transceiver module 21 for receiving/transmitting physical layer ethernet signals through a single pair of differential wires 20, a four-wire transceiver module 22 for receiving/transmitting physical layer ethernet signals through a double pair of differential wires 20, and two fifo buffers 231 and 232 disposed between the two-wire transceiver module 21 and the four-wire transceiver module 22, wherein digital interfaces of the two-wire transceiver module 21 and the four-wire transceiver module 22 are coupled through the two fifo buffers 231 and 232.

The four-wire transceiver module 22 includes a first physical layer processing unit, which specifically includes a first analog-to-digital conversion sub-unit 223, a first transmission coding and decoding sub-unit 222, a first scrambling coding and decoding sub-unit 221, and a first physical layer coding and decoding sub-unit 220. The two-wire transceiver module 21 includes a second physical layer processing unit and an echo cancellation unit 214. The second physical layer processing unit specifically includes a second analog-to-digital conversion subunit 213, a second transmission coding and decoding subunit 212, a second scrambling code coding and decoding subunit 211, and a second physical layer coding and decoding subunit 210.

It should be noted that: the description of each physical layer processing unit is a logical division on the design scheme of the existing physical layer processing technology, such division is only used for assisting the essence of the present invention, the design scheme of the PHY chip in the prior art can be referred to for the module without describing the logical function, the example of the physical layer processing unit in this place is only exemplary, for the difference of the physical layer of 10/100Mbps ethernet, for example, Manchester (Manchester) coding and decoding can be adopted for 10M instead of 4b/5b, scrambling code can not be introduced for 10M, and 5V differential processing instead of three-level transmission coding and decoding (MLT-3) and the like can be adopted for the transmission processing; the embodiments are not described in close proximity, and it is believed that those skilled in the art can clearly recognize the embodiments through the existing ethernet physical layer technology, and thus the detailed description is omitted here. The two-wire transceiver module and the four-wire transceiver module of the present invention can operate in modes of no more than 100M, but do not focus on a specific physical layer rate.

The internal structure will be described in detail below in conjunction with the transmission process of signals. The two-wire transceiver module 21 in this embodiment adopts a full-duplex operating mode, that is, the transceiver and the transmitter are performed simultaneously. The upper differential line pair of the dual differential line pair 24 corresponding to the four-wire transceiver module 22 is used only for receiving signals, and the lower differential line pair is used only for transmitting signals.

First, please see that the physical layer ethernet signal is transmitted from the four-wire transceiver module 22 to the two-wire transceiver module 21.

The physical layer ethernet signal is transmitted to the first analog-to-digital conversion subunit 223 of the four-wire transceiver module 22 through the lower differential line pair of the dual-pair differential line 24 for analog-to-digital conversion, and then enters the first transmission codec subunit 222 for transmission and decoding, and then is subjected to scrambling code decoding processing by the first scrambling code codec subunit 221, and finally is subjected to physical layer decoding processing by the first physical layer codec subunit 220 and then is output to the four-wire transceiver module 22.

Then, the four-wire transceiver module 22 writes the decoded digital signal into the second FIFO232, and then the two-wire transceiver module 21 reads the digital signal from the second FIFO232 to the second phy codec subunit 210 in the two-wire transceiver module 21 for phy coding, and then performs scrambling coding through the second scrambling codec subunit 211, and then enters the second tx codec subunit 212 for tx coding, and finally sends the digital signal to the single pair differential line 20 for two-wire transmission after the second adc subunit 213 performs digital-to-analog conversion.

Since the single pair of differential lines 20 operates in the full-duplex operation mode and the differential line 12 also carries the received signal, the signal to be transmitted is transmitted through the single pair of differential lines 20, and the transmitted signal is actually superimposed on the differential line 12 which is also the received line for transmission, and a superimposed signal in which the original transmitted signal and the original received signal are superimposed is obtained on either side of the differential line 12. Of course, the superimposed signal is not fed back to the transmitting part, and the simplest method is to provide a one-way device between the transmitting side and the single pair of differential lines 20, which is well known to those skilled in the art and thus will not be described in detail.

Second, please see the direction of the physical layer ethernet signal transmitted from the two-wire transceiver module 21 to the four-wire transceiver module 22.

First, the signals received from the single pair of differential lines 20 enter the second analog-to-digital converting subunit 213 for analog-to-digital conversion, and in order to distinguish the two signals, the signals are called superimposed received signals, as mentioned above, the signals include original transmitted signal information and original received signal information from the opposite end. The digital superposed received signal processed by the second analog-to-digital conversion subunit 213 is sent to the echo cancellation unit 214, and at the same time, the digital original transmitted signal at the transmitting side before entering the second analog-to-digital conversion subunit 213 is also sent to the echo cancellation unit 215.

Since the superimposed received signal is formed by superimposing the original transmitted signal and the original received signal, the echo cancellation unit 214 can recover the original received signal by the digital signal processing DSP technique when both the superimposed received signal and the original transmitted signal are known. The original received signal enters the second transmission coding and decoding subunit 212 for transmission and decoding processing, and then the second scrambling coding and decoding subunit 211 for scrambling and decoding processing, and finally the physical layer coding and decoding subunit 210 performs physical layer decoding processing.

The restored digital signal is written into the first FIFO 231, then the four-wire transceiver module reads the digital signal from the first FIFO 231 to the first phy codec subunit 220 in the four-wire transceiver module 22 for phy coding, then the first scrambling codec subunit 221 performs scrambling coding, and then the digital signal enters the second transmission codec subunit 222 for transmission coding, and finally the digital signal is sent to the upper differential pair in the dual-pair differential line 24 for unidirectional transmission after the digital-to-analog conversion is completed by the second a/d conversion subunit 223.

Please refer to fig. 2, which is a schematic structural diagram of a conversion device according to a second embodiment of the disclosure. The single pair of differential lines 20 in this embodiment still use the full duplex mode of operation, i.e., transmit and receive are performed simultaneously.

The difference between the present embodiment and the first embodiment is mainly that the position of the echo cancellation unit 214 in the two-wire transceiver module 21 is different, the echo cancellation unit 214 in the first embodiment is disposed after the second analog-to-digital conversion sub-unit 213, and the echo cancellation unit 214 in the present embodiment is disposed before the second analog-to-digital conversion sub-unit 213. The same parts as those of the first embodiment will not be described again, and only differences will be emphasized.

The analog superimposed received signal received from the single pair of differential lines 20 directly enters the echo cancellation unit 214, and the analog original transmitted signal in the internal transmitting direction of the two-wire transceiver module, which is processed by the second analog-to-digital conversion sub-unit 213, is also sent to the echo cancellation unit 214. Furthermore, the echo cancellation unit 214 performs a subtraction-like process to restore the original analog received signal, and then enters the second analog-to-digital conversion subunit 213 to perform the conversion from analog to digital signals.

Please refer to fig. 3, which is a schematic structural diagram of a two-wire/four-wire conversion device according to a third embodiment of the present invention. The difference between this embodiment and the first two embodiments is that the two-wire transceiver module 21 operates in a half-duplex communication mode, i.e., the single pair of differential wires 20 only receives or only transmits, resulting in a certain change in the internal structure of the two-wire transceiver module 21. The implementation of the half-duplex mode of operation typically employs a carrier sense multiple access/collision detection (CSMA/CD) mechanism for ethernet. The collision detection mechanism is that when a physical port sends a signal, whether a signal sent by the other side exists on a receiving line needs to be detected first, if so, the sending is stopped, and delayed random processing is carried out; if not, the signal is sent to the other party. Since the internal structures of the four-wire transceiver module 22 and the fifo buffer are not changed from those of the first two embodiments, the details will not be described, and only the collision detection unit 25 and the collision avoidance control unit 26 newly added to the two-wire transceiver module 21 will be described in detail.

First, please see that ethernet signals are transmitted from the four-wire transceiver module 22 to the two-wire transceiver module 21.

The collision detection unit 250 detects whether a signal sent from the opposite end exists on the single pair of differential lines 20 at any time, and reports the detection result to the collision avoidance control unit 260; if the detection result is yes, the collision avoidance control unit 260 controls the FIFO232 not to read the digital signal to the second PHY unit in the two-wire transceiver module 21. Since the second physical layer processing unit cannot obtain the digital signal from the second FIFO232, and cannot send the signal to the opposite end through the single pair of differential lines 20, the requirement of the half-duplex communication mode of the single pair of differential lines 20 is satisfied.

Next, please see that the ethernet signal is transmitted from the two-wire transceiver module 21 to the four-wire transceiver module 22.

Since the single pair of differential lines 20 is in the half-duplex operating mode, there exists a signal sent from the opposite terminal and there exists no signal sent to the opposite terminal, the signal received by the two-wire transceiver module 21 from the single pair of differential lines 20 is the original received signal, rather than the superimposed received signal obtained by superimposing the original transmitted signal and the original received signal in the full-duplex mode. Furthermore, it is not necessary for echo cancellation section 214 to perform a process of restoring the original received signal, and it is naturally not necessary to send the original transmission signal to echo cancellation section 214. In other words, the signals received from the single pair of differential lines 20 directly enter the second analog-to-digital conversion sub-unit 213, and then enter the second transmission codec sub-unit 212, and the subsequent processing is the same as the two previous embodiments and is not described again. The echo cancellation unit 214 may not be provided in the two-wire transceiver module 21. Of course, two modes can be configured and selected, and the internal units required in each mode are set, but different processing units are used in different modes.

There are several points that need to be addressed in common for the three embodiments described above.

First, there are clock problems with the two-wire transceiver module 21 and the four-wire transceiver module 22, and clock problems when the FIFO performs read and write operations.

Since each transceiver module needs clock support when performing various internal (e.g., physical layer processing unit) processes, it can be implemented by a clock processing unit, which is used to recover a receiving clock from an input signal and provide the clock to one transceiver module, and provide a transmitting clock to another transceiver module. When the clock processing unit recovers the receiving clock, the clock processing unit needs to support the local reference clock, so a local clock crystal oscillator needs to be arranged in the clock processing unit, and the specific implementation is a known technology for those skilled in the art and is not described again.

When the transmit clock used by one transceiver module is different from the receive clock used by another transceiver module, the FIFO disposed between the two transceiver modules (specifically between the two physical layer processing units) needs to accommodate the clock difference between the two sides. For example, when the two-wire/four-wire conversion device corresponds to a standard 10M or 100M ethernet physical layer process, a reception clock recovered on the input side is used when writing a digital signal into the FIFO, and a local reference clock on the output side is used when reading the digital signal from the FIFO. The FIFO writes the digital signals provided by the transceiver module on one side according to the receiving clock, and then reads the digital signals according to the sending clock and sends the digital signals to the transceiver module on the other side. Of course, if the two transceiver modules use the same clock, for example, in the case where the clock processing unit recovers the receive clock from the input signal of one transceiver module and supplies the receive clock to the other transceiver module as its transmit clock, there is no need to provide a FIFO, and the digital interfaces of the two-wire and four-wire transceiver modules can be directly coupled without being coupled through a FIFO.

It can be seen that both the clock processing unit and the FIFO are provided for adjusting the clock difference between the two transceiver modules, without excluding other possible embodiments, and therefore the present invention is referred to as implementing the clock adjusting unit. In addition, the present invention does not exclude the case that when the chips or devices used on both sides are a company and the models are the same, the difference of the clocks may be small, so that it is not necessary to introduce a clock adjusting unit, and it is also feasible to adopt the existing clock mechanism of ethernet receiving and transmitting. For wider application, however, the invention proposes that the use of a clock adjustment unit, such as a FIFO, be a good design.

Second, the first phy layer processing unit and the second phy layer processing unit may be inconsistent, for example, the first phy layer processing unit adopts a PAM4(four level pulse coding) transmission coding scheme to obtain a longer transmission distance, and the second phy layer processing unit adopts a scheme conforming to the IEEE standard, in other words, the two-wire transceiver module and the four-wire transceiver module may adopt different transmission coding and decoding processing sub-units. Since the object of the fifo 17 processing in this embodiment is the physical layer payload, the disparity on both sides does not exist for the fifo 17.

In addition, since the most important factor affecting the transmission distance is the transmission coding, and other parts may be the same, for the present invention, the physical layer processing units on both sides of the fifo buffer may be simplified correspondingly, for example, the physical layer codec subunit and the scrambling code codec subunit may not be provided. Of course, any one of the scrambling code coding and decoding subunit or the physical layer coding and decoding subunit can be reserved, and the first-in first-out buffer is arranged after the reserved coding and decoding unit. It is emphasized that such simplification is not left out as long as both sides are identical, provided that signal regeneration is not affected and that it can be coupled to a first-in-first-out buffer (in the case of a FIFO).

As can be seen from the above description, to realize the physical layer signal regeneration, it is not necessary to solve the physical layer dead load, as long as the digital signals corresponding to the two sides can be solved, that is, the two-wire transceiver module and the four-wire transceiver module can be coupled via the digital interface, which can further simplify the implementation scheme of the present invention. The digital interface can be a physical interface or a logical interface, and as long as the digital signal is output by the physical layer processing unit, the digital interface can be considered to have a logical digital interface, and whether the logical interface is actually implemented on the physical interface or not can be determined. Therefore, the phy layer processing unit may be considered to include a digital interface and an analog interface transceiving via a differential line, so as to perform conversion between an ethernet analog signal and an ethernet phy layer digital signal between the analog interface and the digital interface.

Third, a switch control unit (e.g., a programmable logic switch) may be disposed between the two-wire transceiver module and the four-wire transceiver module for controlling the digital signal recovered from one transceiver module to enter the other transceiver module or to be transmitted to the MAC side. In particular, without a FIFO, the switch control unit may be arranged directly between two physical layer processing units; the switch control unit may be arranged between the physical layer processing unit and the FIFO, if present. For example, when the switch control unit is in an on state, an input signal is processed by the physical layer processing unit on the input side and then enters the first-in first-out buffer, so that the conversion from two lines to four lines is completed; when the switch control unit is in a closed state, the input signal enters the upper layer MAC for processing after being processed by the physical layer processing unit at the input side, and the function same as that of one two-port PHY chip can be realized.

Finally, the two-wire/four-wire conversion device may further include connector portions between the two-wire transceiver module 21 and the single pair of differential wires 20, and between the four-wire transceiver module and the double pair of differential wires 24, which may be in a connection relationship between a plug and a socket, or may be in a direct connection manner with other cables. For example, when the single pair of differential lines is a telephone line and the double pair of differential lines is a network line, the two-wire/four-wire transceiver device includes an RJ-11 jack for connecting with the telephone line plug and an RJ-45 jack for connecting with the network line plug, or RJ-45 jacks may be used on both sides. Of course, the specific connector type is not limited to RJ-11 or RJ-45, as long as the connectors are capable of ensuring proper communication between the differential wires and the transceiver module. In addition, two line/four-wire conversion equipment both can be through external power supply's mode power supply, also can cooperate ethernet remote power supply technique (POE), for example say that a POE receives the electric unit, like for current ADSL modem device, do not need user's local power supply, thereby it obtains working power supply directly to follow the long-range power supply of local side switch, the user can be more simple and convenient to use, can refer to current POE technique about the specific design of POE receives the electric unit, therefore no longer detail.

The invention also discloses a distribution frame, which comprises a support frame body and at least one two-wire/four-wire conversion device arranged on the support frame body, wherein the conversion device comprises a two-wire transceiver module for receiving/transmitting the physical layer Ethernet signals through a single pair of differential wires and a four-wire transceiver module for receiving/transmitting the physical layer Ethernet signals through a double pair of differential wires, and the two-wire transceiver module and the four-wire transceiver module are coupled through a digital interface. The distribution frame can be compatible with the existing equipment well. The two-wire/four-wire converting apparatus has been described in detail above, and please refer to the foregoing description, which is not repeated herein.

When the distribution frame is arranged at the local side, the four-wire transceiver module of the conversion device can be butted with the existing switch at the local side, namely, the local side switch transmits the Ethernet signals to the conversion device arranged on the support frame body through a double-pair differential line (such as a network line), then the conversion device converts the input signals into a two-wire transmission mode, and the two-wire transmission mode is transmitted to the distribution frame (such as a corridor distribution frame) at the user side through a single-pair differential line (such as a telephone line) connected with the two-wire transceiver module. The distribution frame of user side can also adopt the distribution frame disclosed by the invention, the four-line transceiver module on the distribution frame of the user side faces the network card of the user side, namely the distribution frame of the user side converts the Ethernet signals received by a single pair of differential lines (telephone lines) into the network card accessed to the user side by a double pair of differential lines (such as network lines). The local side distributing frame has several double-pair differential line interfaces facing the local side exchanger, for example RJ-45, several single-pair differential line interfaces facing the user side distributing frame, for example RJ-11, several single-pair differential line interfaces facing the local side distributing frame, for example RJ-11/RJ-45, and several double-pair differential line interfaces facing the user network card, for example RJ-45. Moreover, since the distribution frame usually integrates many channels, the whole switching device can be highly integrated, and the cost of the chip can be greatly reduced, which is desirable for operators.

It is obvious that although the network lines need to be laid from the local side distribution frame to the local side switch and from the user side distribution frame to each user, the network lines are laid within a small distance, and the telephone lines from the existing user cell to the local side can be used in the long-distance transmission part. The user side is also very convenient, and the user can surf the internet by directly plugging in the network cable without additionally arranging one more conversion device. This is particularly useful for some emerging cells, since many cells are currently being constructed with one network line in the corridor, two of the differential pairs being used to form two telephone lines and the remaining two differential pairs being used to form one network line, and since the network lines are already in the corridor, it is the best option to have two-wire/four-wire conversion devices on the distribution frame of the corridor, making the best use of the existing resources. Of course, if the local exchange or the user network card has one side supporting two-wire transmission, only one side needs to use the distribution frame disclosed by the invention. Under the mode of distribution frame, the power supply will be more convenient, for example concentrate the conversion equipment power supply for in a plurality of distribution frames through external power supply, and need not every user and supply power to a conversion equipment alone, also can cooperate the long-range power supply technique of ethernet (POE) certainly, so can be more simple and convenient.

The two-wire/four-wire conversion device and the distribution frame provided by the invention are described in detail above, and the principle and the implementation mode of the invention are explained in the present document by applying specific examples, and the description of the above examples is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (14)

1. An Ethernet two-wire/four-wire conversion device is characterized by comprising,

the physical layer Ethernet signal transmitting and receiving device comprises a two-wire transceiving module for transmitting and receiving the physical layer Ethernet signal through a single pair of differential wires and a four-wire transceiving module for transmitting and receiving the physical layer Ethernet signal through a double pair of differential wires, wherein the two-wire transceiving module and the four-wire transceiving module are coupled through a digital interface.

2. An ethernet two-wire/four-wire conversion device according to claim 1, further comprising a switch control unit for controlling the digital signal restored by said one transceiver module to enter the other transceiver module or to be transmitted to the MAC side.

3. An ethernet two-wire/four-wire conversion device according to claim 1, wherein said two-wire transceiver module includes an echo cancellation unit for recovering an original reception signal from the superimposed reception signal and an original transmission signal on said single pair of differential wires when said two-wire transceiver module operates in a full-duplex operating mode.

4. An ethernet two-wire/four-wire conversion device according to claim 1, wherein said two-wire transceiver module includes a collision detection unit and a collision avoidance control unit when said two-wire transceiver module operates in a half-duplex operating mode; wherein,

the collision detection unit is used for detecting whether a signal sent by an opposite terminal exists on the single pair of differential lines; and the collision avoidance control unit controls whether to transmit a signal which needs to be sent out to the single pair of differential lines or not according to the detection result of the collision detection unit.

5. An ethernet two-wire/four-wire conversion device according to claim 1, wherein said two-wire transceiver module and said four-wire transceiver module employ different transmit codec processing subunits.

6. An ethernet two-wire/four-wire conversion device according to claim 5, wherein the two-wire transceiver module and the four-wire transceiver module operate at a rate of no more than 100M.

7. An ethernet two-wire/four-wire conversion device according to claim 5, further comprising a clock adjustment unit for eliminating clock differences for said two-wire transceiver module and said four-wire transceiver module.

8. An ethernet two-wire/four-wire conversion device according to claim 7, characterized in that said clock adjustment unit comprises a clock processing unit for recovering a receive clock from an input signal of one transceiver module and supplying said receive clock to the other transceiver module as its transmit clock.

9. An ethernet two-wire/four-wire conversion device according to claim 7, wherein when the transmission clock used by said one transceiver module is different from the reception clock used by the other transceiver module, said clock adjusting unit further comprises a first-in first-out buffer connected between said transceiver modules, said first-in first-out buffer writing the digital signal provided by the transceiver module on one side according to the reception clock and then reading the digital signal according to the transmission clock and transmitting it to the transceiver module on the other side.

10. An ethernet two-wire/four-wire conversion device according to claim 1, wherein said single pair of differential wires are telephone wires.

11. An ethernet two-wire/four-wire conversion device according to claim 10, further comprising an RJ-11 jack for connecting with said telephone line plug and an RJ-45 jack for connecting with a network line plug.

12. An ethernet two-wire/four-wire conversion device according to claim 10, further comprising an RJ-45 jack for connecting with said telephone line plug and an RJ-45 jack for connecting with a network line plug.

13. An ethernet two-wire/four-wire conversion device according to claim 1, further comprising a POE powered unit for obtaining operating power.

14. A distribution frame comprising a support frame and further comprising, disposed on said support frame, at least one two-wire/four-wire conversion device according to claims 1-13.

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