CN101072026A

CN101072026A - Flip-flop with improved setting time and method thereof

Info

Publication number: CN101072026A
Application number: CN 200610078333
Authority: CN
Inventors: 王心石
Original assignee: Faraday Technology Corp
Current assignee: Faraday Technology Corp
Priority date: 2006-05-11
Filing date: 2006-05-11
Publication date: 2007-11-14

Abstract

The flip-flop includes first main latch, first selector, second main latch, second selector, and slave latch. Receiving key data, first main latch is in use for latching the key data. First selector receives multiple not key data, and outputs first selection data to second main latch. Second main latch is in use for latching the first selection data. Being coupled to first main latch and second main latch, second selector outputs the second selection data to the slave latch. The slave latch latches the second selection data, and sends them out.

Description

Have the flip-flop of the setting-up time of improvement and be used in its method

Technical field

The present invention relates to a kind of flip-flop and be used in its method, and be particularly related to a kind of method that has the flip-flop of the setting-up time of improvement and be used in it.

Background technology

Because the evolution of integrated circuit (IC) design and technology, driven the quick growth of circuit performance, can in field of microprocessors, see in this preferred example, only before the several years, the personal computer microprocessor still rests on the frequency of 300MHZ (megahertz), now, the personal computer microprocessor has reached 3000MHZ or higher, so the delay of the speed of frequency and frequency has considerable influence power for circuit performance.

Fig. 1 is the circuit block diagram in typical delay path one of in digital circuit.This delay path is widely used in microprocessor and other digital circuit, and legacy paths comprises flip-flop 101,103, reaches combinatorial logic unit 102, as shown in the figure, in flip-flop 101,103, D is a data input pin, and Q is a data output end, and CK is the receive clock signal end.Flip-flop 101,103 is controlled by clock signal.Fig. 2 is the operating delay sequential chart of key diagram 1.Please also refer to Fig. 1 and Fig. 2, when flip-flop 101 triggers at first forward of clock signal, discharge data to combinatorial logic unit 102, this moment before data are really manifested by flip-flop 101, distance 204 when delays of CK-Q (clock is to output valve) occurring.In case and data manifest from flip-flop 101, just can input to flip-flop 103 by combinatorial logic unit 102, and data in combinatorial logic unit 102, propagate in apart from when propagating apart from 205, in addition, during setting-up time apart from 206 setting states relevant for flip-flop 101.So postpone can be considered when postponing apart from 204, when propagating apart from 205, and during setting-up time apart from 206 summation.

Fig. 3 is the circuit block diagram of known master-slave type flip-flop.Data and time data are by inputing to NOR gate 313 with door 311,312, and select signal to control output valve with door 311,322 by inverter 301, and NOR gate 313 is coupled to main door bolt MFF.Clock signal is by inverter 308,309 clock signal CK30 and clock signal CK31, clock signal C K30 and CK31 control the switch 321,322 of main flip-flop MFF and from breech lock and the output mutually action of conversion of switch 323,324 to carry out signal of flip-flop SFF, and inverter 302,303 and inverter 304,305 are carried out the breech lock of signal, and 306,307 of inverters will be reverse from the output signal of door bolt SFF.

Because the generation time difference of each signal, the generation time of for example nonessential data scan in (scanning enters) signal, recurrence (feedback) signal is shorter than the generation time of key data, the known circuits of Fig. 3 is imported same main door bolt MFF together to all data, more extremely from door bolt SFF.Can make to obtain key data and necessary shared same circuit of nonessential data and same frequency, can't reach the optimization of frequency.

Summary of the invention

Purpose of the present invention just provides a kind of flip-flop with the setting-up time of improvement, utilizes different main door bolts to come breech lock critical data and non-critical data, improves preface in the setting-up time of flip-flop and the critical path.

A further object of the present invention provides and a kind ofly is used in the method with the flip-flop that improves setting-up time, but critical data and non-critical data separate processes preface in the setting-up time that improves flip-flop and critical path.

The present invention proposes a kind of flip-flop with the setting-up time of improvement, comprises: the first main door bolt, first selector, the second main door bolt, second selector, and from door bolt.The first main door bolt (master latch) receives crucial (critical) data and in order to this critical data of breech lock; First selector receives a plurality of non-key (non critical) data and selects output first to select data; Second master's door bolt is coupled to first selector and receives first selects data, and this second main door bolt is in order to these first selection data of breech lock; The first input end of second selector is coupled to the first main door bolt, and second output of second selector is coupled to the second main door bolt; And be coupled to this second selector from door bolt (slave latch), wherein second selector receives critical data or first and selects data output second to select data to from door bolt, from door bolt in order to breech lock and export second and select data.

The present invention proposes a kind of method with the flip-flop that improves setting-up time that is used in again, comprise the following step: at first, receive a plurality of non-critical data, and to select one of a plurality of non-critical data be first to select data, and the breech lock first selection data, receive simultaneously and the breech lock critical data; Then, selecting critical data or first to select data is the second selection data; Next, breech lock and export second and select data.

It seems that by preferred embodiment each generation time of a non-critical data all is shorter than the generation time of critical data more than the flip-flop.

The present invention is because of adopting separately and breech lock critical data and non-critical data, and utilize selector to select the critical data behind the breech lock and the structure of non-critical data, but make critical data and non-critical data separate processes and do not interact, therefore can improve preface in the setting-up time of flip-flop and the critical path.

State with other purpose, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.

Description of drawings

Fig. 1 is the circuit block diagram in typical delay path one of in digital circuit.

Fig. 2 is the operating delay sequential chart of the circuit box of key diagram 1.

Fig. 3 is the circuit block diagram of known master-slave type flip-flop.

Fig. 4 is the circuit block diagram with the flip-flop that improves setting-up time of the embodiment of the invention.

Fig. 5 is the circuit block diagram with the flip-flop that improves setting-up time of another embodiment of the present invention.

Fig. 6 has the method for the flip-flop that improves setting-up time for the embodiment of the invention is used in.

The main element description of symbols

101,103,400,500: flip-flop

102: combinatorial logic unit

204～206: the time distance

311,312: with door

313: NOR gate

41,44,51,54: selector

MFF, 42,43,52,53: main door bolt

SFF, 45,55: from door bolt

321～324,521,522,531,532,551,552: switch

301～309,501～505,511,523,524,533,534,553,554: inverter

CK30, CK31, CK, CKB, CK1: clock signal

SEL1, SEL2, SEL41, SEL44: select signal

Q1: output signal

QB1: reversed-phase output signal

D: data input pin,

Q: data output end,

CK: receive clock signal end

Embodiment

Fig. 4 is the circuit block diagram with the flip-flop that improves setting-up time of the embodiment of the invention.Flip-flop 400 with the setting-up time of improvement comprises selector 41 and 44, main door bolt 42 and 43, from fastening 45 with a bolt or latch.Control signal SEL41 controls selector 41, make for example nonessential data scan_in of a plurality of nonessential data (scanning enters) signal, recurrence (feedback) signal by after the selection of selector 41, the extremely main door bolt 42 of data is selected in one of a plurality of non-selective data output first, and main door bolt 42 carries out breech lock with these first selection data.Key data then input to main door bolt 43 and store to carry out breech lock.And each generation time of non-critical data all is shorter than the generation time of this critical data.Selector 44 receives the critical data that first of main door bolt 42 is selected data and 43, selects data by 44 outputs second of control signal SEL44 control selector, and data are inputed to from fastening 45 with a bolt or latch, again data latching is exported dateout from fastening 45 with a bolt or latch.

The present invention utilizes two different main door bolts to come separate processes critical data and non-critical data, it is unified to make flip-flop need not reach frequency for the processing procedure of critical data and non-critical data, also make generation time can pass through fast extremely from fastening with a bolt or latch by selector than the non-critical data of weak point, and owing to but function of this classification processing causes from the nonessential data of door bolt priority treatment, the setting-up time of useful minimizing flip-flop.

Fig. 5 is the circuit block diagram with the flip-flop that improves setting-up time of another embodiment of the present invention.Flip-flop 500 comprises selector 51, just fasten 52 with a bolt or latch, just fastening 53 with a bolt or latch, selector 54, from fasten 55 with a bolt or latch, and inverter 501～505,511.A plurality of non-critical data are imported first by inverter 511 and are selected signal to main door bolt 52 through the selector by selecting signal SEL1 to be controlled.Main door bolt 52 comprises switch 521,522 and inverter 523,524.Switch 521 is controlled main door bolt 52 and is received the first selection data, comes these first selection data of breech lock by inverter 523,524 and switch 522 with twice inversion scheme again, again this non-critical data is inputed to selector 54.Wherein clock signal C K comes clocking CKB through inverter 502, come clocking CK1 through inverter 503 again, clock signal C KB and clock signal CK1 are in order to the open and close of control switch 521 and switch 522, main door bolt 52 structure thus can be carried out the effect of breech lock, and critical data inputs to main door bolt 53 by inverter 501 after anti-phase.Main door bolt 53 has the same structures as main door bolt 52, and main door bolt 522 comprises switch 531,532 and inverter 533,534, in order to breech lock and the critical data of exporting anti-phase back to selector 54.

Selector 54 receives the critical data of being selected data and main door bolt 53 by first of main door bolt 52, selector 54 is exported second by the control of selecting signal SEL2 and is selected data extremely from fastening 55 with a bolt or latch, from fastening 55 same structures that have as main door bolt 52 with a bolt or latch, comprise

switch

551 and 552,

inverter

553 and 554 from fastening 55 with a bolt or latch, select data from fastening 55 breech locks second with a bolt or latch, receive second by inverter 504 and inverter 505 again and select data to produce output signal Q and reversed-phase output signal QB.

The present invention utilizes the selection signal to control selector a plurality of non-critical data is screened, utilize another to select another selector of signal controlling that critical data and non-critical data are screened again, but make non-critical data and critical data separate processes and need not unified frequency, and then increase processing speed

Figure 6 shows that the embodiment of the invention is used in the method with the flip-flop that improves setting-up time.At first, in step S601, receive and the breech lock critical data, simultaneously, in step 603, receive a plurality of non-critical data, and export first and select data, select data by step S605 breech lock first again, next, in step S607, selecting critical data or first to select data is second to select data, is among the step S609 breech lock and exports second and select data.

In sum, at the present invention's flip-flop and be used in its method with the setting-up time of improvement, adopt two different main door bolts to cooperate selector to come the structure of separate processes critical data and non-critical data owing to have, make critical data and non-critical data come breech lock by different main door bolts and do not interact, therefore can improve preface in the setting-up time of flip-flop and the critical path.

Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any person of ordinary skill in the field; without departing from the spirit and scope of the invention; when can doing a little change and improvement, so the present invention's protection range is as the criterion when looking the claim person of defining.

Claims

1. flip-flop with the setting-up time of improvement is characterized in that comprising:

The first main door bolt receives critical data, and this first main door bolt is in order to this critical data of breech lock;

First selector receives a plurality of non-critical data, and it is the first selection data that this first selector is exported one of a plurality of non-critical data individual;

The second main door bolt is coupled to first selector, and this second main door bolt is in order to these first selection data of breech lock;

Second selector, this second selector are coupled to this first main door bolt and this second main door bolt; And

From door bolt, be coupled to this second selector, wherein this second selector extremely should be somebody's turn to do from fastening with a bolt or latch in order to breech lock and exporting this second selection data from door bolt in order to select this critical data and this first selection data to export the second selection data.

2. the flip-flop with improve setting-up time according to claim 1, it is characterized in that this first main door bolt comprises first switch, second switch, first inverter, second inverter, this first switch is in order to control the input of this critical data, this first inverter is coupled to this second inverter by this second switch, in order to breech lock and export this critical data.

3. the flip-flop with improve setting-up time according to claim 1 is characterized in that this second main door bolt has the same configuration as this first main door bolt.

4. the flip-flop with improve setting-up time according to claim 1 is characterized in that this has same configuration as this first main door bolt from door bolt.

5. the flip-flop with improve setting-up time according to claim 1 is characterized in that each the generation time of above-mentioned these non-critical data all is shorter than the generation time of this critical data.

6. one kind is used in the method with the flip-flop that improves setting-up time, it is characterized in that comprising the following step:

Receive a plurality of non-critical data, and to select one of above-mentioned these non-critical data be first to select data, and breech lock this first select data, receive simultaneously and breech lock critical data;

Selecting this critical data or this first selection data is the second selection data; And

Breech lock and export this and second select data.

7. described being used in has the method for the flip-flop that improves setting-up time according to claim 6, it is characterized in that each the generation time of above-mentioned these non-critical data all is shorter than the generation time of this critical data.