CN101057329A - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- CN101057329A CN101057329A CN200580038582.1A CN200580038582A CN101057329A CN 101057329 A CN101057329 A CN 101057329A CN 200580038582 A CN200580038582 A CN 200580038582A CN 101057329 A CN101057329 A CN 101057329A
- Authority
- CN
- China
- Prior art keywords
- layer
- conductive layer
- semiconductor device
- conductive
- memory element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 335
- 150000002894 organic compounds Chemical class 0.000 claims abstract description 132
- 230000008859 change Effects 0.000 claims abstract description 122
- 239000010410 layer Substances 0.000 claims description 1293
- 239000000758 substrate Substances 0.000 claims description 198
- 230000004888 barrier function Effects 0.000 claims description 145
- 239000012790 adhesive layer Substances 0.000 claims description 81
- 239000002245 particle Substances 0.000 claims description 78
- 239000000463 material Substances 0.000 claims description 65
- 239000010408 film Substances 0.000 claims description 57
- 238000003475 lamination Methods 0.000 claims description 41
- 230000003287 optical effect Effects 0.000 claims description 29
- 230000002520 cambial effect Effects 0.000 claims description 28
- 239000011229 interlayer Substances 0.000 claims description 28
- 239000004411 aluminium Substances 0.000 claims description 25
- 229910052782 aluminium Inorganic materials 0.000 claims description 25
- 230000000694 effects Effects 0.000 claims description 23
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 17
- 239000003795 chemical substances by application Substances 0.000 claims description 13
- 239000011669 selenium Substances 0.000 claims description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 12
- 229910052714 tellurium Inorganic materials 0.000 claims description 10
- 229910052711 selenium Inorganic materials 0.000 claims description 9
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 8
- 229910052787 antimony Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 239000002861 polymer material Substances 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 239000011135 tin Substances 0.000 claims description 4
- 239000011701 zinc Substances 0.000 claims description 4
- 229910017052 cobalt Inorganic materials 0.000 claims description 3
- 239000010941 cobalt Substances 0.000 claims description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 3
- 229910052718 tin Inorganic materials 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims description 2
- 239000005864 Sulphur Substances 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910052797 bismuth Inorganic materials 0.000 claims description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- 229910052716 thallium Inorganic materials 0.000 claims description 2
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 claims description 2
- 229910052725 zinc Inorganic materials 0.000 claims description 2
- 230000006870 function Effects 0.000 abstract description 13
- 238000000034 method Methods 0.000 description 85
- 238000004519 manufacturing process Methods 0.000 description 43
- 230000015572 biosynthetic process Effects 0.000 description 35
- 238000005530 etching Methods 0.000 description 29
- 239000012535 impurity Substances 0.000 description 28
- 230000005855 radiation Effects 0.000 description 28
- 238000002425 crystallisation Methods 0.000 description 23
- 239000011159 matrix material Substances 0.000 description 21
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 21
- 229910052721 tungsten Inorganic materials 0.000 description 21
- 239000010937 tungsten Substances 0.000 description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 18
- 229910052710 silicon Inorganic materials 0.000 description 18
- 239000010703 silicon Substances 0.000 description 18
- 230000008025 crystallization Effects 0.000 description 17
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 15
- 239000000203 mixture Substances 0.000 description 15
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 14
- 239000011733 molybdenum Substances 0.000 description 14
- 229920005989 resin Polymers 0.000 description 14
- 239000011347 resin Substances 0.000 description 14
- 229910052750 molybdenum Inorganic materials 0.000 description 13
- 239000007789 gas Substances 0.000 description 12
- 230000008569 process Effects 0.000 description 12
- 239000010936 titanium Substances 0.000 description 11
- IXHWGNYCZPISET-UHFFFAOYSA-N 2-[4-(dicyanomethylidene)-2,3,5,6-tetrafluorocyclohexa-2,5-dien-1-ylidene]propanedinitrile Chemical compound FC1=C(F)C(=C(C#N)C#N)C(F)=C(F)C1=C(C#N)C#N IXHWGNYCZPISET-UHFFFAOYSA-N 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 10
- 230000001070 adhesive effect Effects 0.000 description 10
- 239000004305 biphenyl Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- -1 γ-butyl lactone Chemical class 0.000 description 10
- 239000004020 conductor Substances 0.000 description 9
- 230000007547 defect Effects 0.000 description 9
- 238000009413 insulation Methods 0.000 description 9
- 238000004544 sputter deposition Methods 0.000 description 9
- 238000003860 storage Methods 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- 238000001259 photo etching Methods 0.000 description 8
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 7
- 229910044991 metal oxide Inorganic materials 0.000 description 7
- 150000004706 metal oxides Chemical class 0.000 description 7
- 238000007639 printing Methods 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 229910052719 titanium Inorganic materials 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 6
- ZMXDDKWLCZADIW-UHFFFAOYSA-N N,N-Dimethylformamide Chemical compound CN(C)C=O ZMXDDKWLCZADIW-UHFFFAOYSA-N 0.000 description 6
- 229910052799 carbon Inorganic materials 0.000 description 6
- ZUOUZKKEUPVFJK-UHFFFAOYSA-N diphenyl Chemical compound C1=CC=CC=C1C1=CC=CC=C1 ZUOUZKKEUPVFJK-UHFFFAOYSA-N 0.000 description 6
- 238000009434 installation Methods 0.000 description 6
- 230000010354 integration Effects 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- KMWBBMXGHHLDKL-UHFFFAOYSA-N [AlH3].[Si] Chemical compound [AlH3].[Si] KMWBBMXGHHLDKL-UHFFFAOYSA-N 0.000 description 5
- 239000000956 alloy Substances 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000014509 gene expression Effects 0.000 description 5
- 229910052736 halogen Inorganic materials 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229920003023 plastic Polymers 0.000 description 5
- 239000004033 plastic Substances 0.000 description 5
- MCJGNVYPOGVAJF-UHFFFAOYSA-N quinolin-8-ol Chemical compound C1=CN=C2C(O)=CC=CC2=C1 MCJGNVYPOGVAJF-UHFFFAOYSA-N 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 4
- 229910018110 Se—Te Inorganic materials 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 4
- MWPLVEDNUUSJAV-UHFFFAOYSA-N anthracene Chemical compound C1=CC=CC2=CC3=CC=CC=C3C=C21 MWPLVEDNUUSJAV-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 239000011651 chromium Substances 0.000 description 4
- 150000004696 coordination complex Chemical class 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 150000002367 halogens Chemical class 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 238000012856 packing Methods 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229920002554 vinyl polymer Polymers 0.000 description 4
- KMQPLEYEXDZOJF-UHFFFAOYSA-N 1-naphthalen-2-ylanthracene Chemical compound C1=CC=C2C=C3C(C4=CC5=CC=CC=C5C=C4)=CC=CC3=CC2=C1 KMQPLEYEXDZOJF-UHFFFAOYSA-N 0.000 description 3
- UJPHWVYNGODIMX-UHFFFAOYSA-N 2-(1,3-benzothiazol-2-yl)phenol zinc Chemical compound [Zn].Oc1ccccc1-c1nc2ccccc2s1 UJPHWVYNGODIMX-UHFFFAOYSA-N 0.000 description 3
- WKAIAWIOQLVYOO-UHFFFAOYSA-N 3-(aminomethyl)-N-phenylaniline Chemical compound NCC1=CC=CC(NC=2C=CC=CC=2)=C1 WKAIAWIOQLVYOO-UHFFFAOYSA-N 0.000 description 3
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- UHOVQNZJYSORNB-UHFFFAOYSA-N Benzene Chemical compound C1=CC=CC=C1 UHOVQNZJYSORNB-UHFFFAOYSA-N 0.000 description 3
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 3
- 229910052779 Neodymium Inorganic materials 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 239000004743 Polypropylene Substances 0.000 description 3
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 150000007513 acids Chemical class 0.000 description 3
- 239000000654 additive Substances 0.000 description 3
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 3
- RDOXTESZEPMUJZ-UHFFFAOYSA-N anisole Chemical class COC1=CC=CC=C1 RDOXTESZEPMUJZ-UHFFFAOYSA-N 0.000 description 3
- 238000013459 approach Methods 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 3
- 235000010290 biphenyl Nutrition 0.000 description 3
- UFVXQDWNSAGPHN-UHFFFAOYSA-K bis[(2-methylquinolin-8-yl)oxy]-(4-phenylphenoxy)alumane Chemical compound [Al+3].C1=CC=C([O-])C2=NC(C)=CC=C21.C1=CC=C([O-])C2=NC(C)=CC=C21.C1=CC([O-])=CC=C1C1=CC=CC=C1 UFVXQDWNSAGPHN-UHFFFAOYSA-K 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 239000013039 cover film Substances 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 230000002427 irreversible effect Effects 0.000 description 3
- 238000005499 laser crystallization Methods 0.000 description 3
- 239000010955 niobium Substances 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 239000001007 phthalocyanine dye Substances 0.000 description 3
- 229920001197 polyacetylene Polymers 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229920001155 polypropylene Polymers 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 229920003002 synthetic resin Polymers 0.000 description 3
- 239000000057 synthetic resin Substances 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- STTGYIUESPWXOW-UHFFFAOYSA-N 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline Chemical compound C=12C=CC3=C(C=4C=CC=CC=4)C=C(C)N=C3C2=NC(C)=CC=1C1=CC=CC=C1 STTGYIUESPWXOW-UHFFFAOYSA-N 0.000 description 2
- DHDHJYNTEFLIHY-UHFFFAOYSA-N 4,7-diphenyl-1,10-phenanthroline Chemical compound C1=CC=CC=C1C1=CC=NC2=C1C=CC1=C(C=3C=CC=CC=3)C=CN=C21 DHDHJYNTEFLIHY-UHFFFAOYSA-N 0.000 description 2
- UJOBWOGCFQCDNV-UHFFFAOYSA-N 9H-carbazole Chemical compound C1=CC=C2C3=CC=CC=C3NC2=C1 UJOBWOGCFQCDNV-UHFFFAOYSA-N 0.000 description 2
- 229910052684 Cerium Inorganic materials 0.000 description 2
- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 description 2
- 241001269238 Data Species 0.000 description 2
- 229910052691 Erbium Inorganic materials 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 2
- 229910052689 Holmium Inorganic materials 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- CTQNGGLPUBDAKN-UHFFFAOYSA-N O-Xylene Chemical compound CC1=CC=CC=C1C CTQNGGLPUBDAKN-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 2
- 239000004695 Polyether sulfone Substances 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052775 Thulium Inorganic materials 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 125000003118 aryl group Chemical group 0.000 description 2
- GPBUGPUPKAGMDK-UHFFFAOYSA-N azanylidynemolybdenum Chemical compound [Mo]#N GPBUGPUPKAGMDK-UHFFFAOYSA-N 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 2
- MVPPADPHJFYWMZ-UHFFFAOYSA-N chlorobenzene Chemical compound ClC1=CC=CC=C1 MVPPADPHJFYWMZ-UHFFFAOYSA-N 0.000 description 2
- 230000006854 communication Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 239000000975 dye Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 238000005247 gettering Methods 0.000 description 2
- JMANVNJQNLATNU-UHFFFAOYSA-N glycolonitrile Natural products N#CC#N JMANVNJQNLATNU-UHFFFAOYSA-N 0.000 description 2
- 239000008187 granular material Substances 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910000476 molybdenum oxide Inorganic materials 0.000 description 2
- IBHBKWKFFTZAHE-UHFFFAOYSA-N n-[4-[4-(n-naphthalen-1-ylanilino)phenyl]phenyl]-n-phenylnaphthalen-1-amine Chemical compound C1=CC=CC=C1N(C=1C2=CC=CC=C2C=CC=1)C1=CC=C(C=2C=CC(=CC=2)N(C=2C=CC=CC=2)C=2C3=CC=CC=C3C=CC=2)C=C1 IBHBKWKFFTZAHE-UHFFFAOYSA-N 0.000 description 2
- 229910052758 niobium Inorganic materials 0.000 description 2
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229960003540 oxyquinoline Drugs 0.000 description 2
- YRZZLAGRKZIJJI-UHFFFAOYSA-N oxyvanadium phthalocyanine Chemical compound [V+2]=O.C12=CC=CC=C2C(N=C2[N-]C(C3=CC=CC=C32)=N2)=NC1=NC([C]1C=CC=CC1=1)=NC=1N=C1[C]3C=CC=CC3=C2[N-]1 YRZZLAGRKZIJJI-UHFFFAOYSA-N 0.000 description 2
- 125000001997 phenyl group Chemical group [H]C1=C([H])C([H])=C(*)C([H])=C1[H] 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 229920006393 polyether sulfone Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 229920000123 polythiophene Polymers 0.000 description 2
- 239000010948 rhodium Substances 0.000 description 2
- 125000001424 substituent group Chemical group 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical group [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 2
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 2
- 125000000999 tert-butyl group Chemical group [H]C([H])([H])C(*)(C([H])([H])[H])C([H])([H])[H] 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- DTZWGKCFKSJGPK-VOTSOKGWSA-N (e)-2-(2-methyl-6-(2-(1,1,7,7-tetramethyl-1,2,3,5,6,7-hexahydropyrido[3,2,1-ij]quinolin-9-yl)vinyl)-4h-pyran-4-ylidene)malononitrile Chemical compound O1C(C)=CC(=C(C#N)C#N)C=C1\C=C\C1=CC(C(CCN2CCC3(C)C)(C)C)=C2C3=C1 DTZWGKCFKSJGPK-VOTSOKGWSA-N 0.000 description 1
- RYHBNJHYFVUHQT-UHFFFAOYSA-N 1,4-Dioxane Chemical compound C1COCCO1 RYHBNJHYFVUHQT-UHFFFAOYSA-N 0.000 description 1
- SPDPTFAJSFKAMT-UHFFFAOYSA-N 1-n-[4-[4-(n-[4-(3-methyl-n-(3-methylphenyl)anilino)phenyl]anilino)phenyl]phenyl]-4-n,4-n-bis(3-methylphenyl)-1-n-phenylbenzene-1,4-diamine Chemical compound CC1=CC=CC(N(C=2C=CC(=CC=2)N(C=2C=CC=CC=2)C=2C=CC(=CC=2)C=2C=CC(=CC=2)N(C=2C=CC=CC=2)C=2C=CC(=CC=2)N(C=2C=C(C)C=CC=2)C=2C=C(C)C=CC=2)C=2C=C(C)C=CC=2)=C1 SPDPTFAJSFKAMT-UHFFFAOYSA-N 0.000 description 1
- 125000001637 1-naphthyl group Chemical group [H]C1=C([H])C([H])=C2C(*)=C([H])C([H])=C([H])C2=C1[H] 0.000 description 1
- FNDFKMXAOATGJU-UHFFFAOYSA-N 1-phenyl-2-sulfonylethanone Chemical compound O=S(=O)=CC(=O)C1=CC=CC=C1 FNDFKMXAOATGJU-UHFFFAOYSA-N 0.000 description 1
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- FQJQNLKWTRGIEB-UHFFFAOYSA-N 2-(4-tert-butylphenyl)-5-[3-[5-(4-tert-butylphenyl)-1,3,4-oxadiazol-2-yl]phenyl]-1,3,4-oxadiazole Chemical compound C1=CC(C(C)(C)C)=CC=C1C1=NN=C(C=2C=C(C=CC=2)C=2OC(=NN=2)C=2C=CC(=CC=2)C(C)(C)C)O1 FQJQNLKWTRGIEB-UHFFFAOYSA-N 0.000 description 1
- PBWKHJKVLUGQON-UHFFFAOYSA-N 2-(4-tert-butylphenyl)-5-phenyl-1,3,4-oxadiazole Chemical compound C1=CC(C(C)(C)C)=CC=C1C1=NN=C(C=2C=CC=CC=2)O1 PBWKHJKVLUGQON-UHFFFAOYSA-N 0.000 description 1
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 150000000531 4H-pyrans Chemical class 0.000 description 1
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- YMHFIWZRDQFZLW-UHFFFAOYSA-N CC1=C(C(C=CC1=O)=O)C.N#CC#N Chemical compound CC1=C(C(C=CC1=O)=O)C.N#CC#N YMHFIWZRDQFZLW-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910017535 Cu-Al-Ni Inorganic materials 0.000 description 1
- PQMOXTJVIYEOQL-UHFFFAOYSA-N Cumarin Natural products CC(C)=CCC1=C(O)C(C(=O)C(C)CC)=C(O)C2=C1OC(=O)C=C2CCC PQMOXTJVIYEOQL-UHFFFAOYSA-N 0.000 description 1
- XDTMQSROBMDMFD-UHFFFAOYSA-N Cyclohexane Chemical compound C1CCCCC1 XDTMQSROBMDMFD-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910005939 Ge—Sn Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FSOGIJPGPZWNGO-UHFFFAOYSA-N Meomammein Natural products CCC(C)C(=O)C1=C(O)C(CC=C(C)C)=C(O)C2=C1OC(=O)C=C2CCC FSOGIJPGPZWNGO-UHFFFAOYSA-N 0.000 description 1
- XQVWYOYUZDUNRW-UHFFFAOYSA-N N-Phenyl-1-naphthylamine Chemical compound C=1C=CC2=CC=CC=C2C=1NC1=CC=CC=C1 XQVWYOYUZDUNRW-UHFFFAOYSA-N 0.000 description 1
- 241001597008 Nomeidae Species 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 239000004697 Polyetherimide Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- YZCKVEUIGOORGS-IGMARMGPSA-N Protium Chemical compound [1H] YZCKVEUIGOORGS-IGMARMGPSA-N 0.000 description 1
- 241000720974 Protium Species 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910018731 Sn—Au Inorganic materials 0.000 description 1
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 1
- WYURNTSHIVDZCO-UHFFFAOYSA-N Tetrahydrofuran Chemical compound C1CCOC1 WYURNTSHIVDZCO-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 1
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000001994 activation Methods 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 125000000217 alkyl group Chemical group 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- SMWDFEZZVXVKRB-UHFFFAOYSA-N anhydrous quinoline Natural products N1=CC=CC2=CC=CC=C21 SMWDFEZZVXVKRB-UHFFFAOYSA-N 0.000 description 1
- 125000005428 anthryl group Chemical group [H]C1=C([H])C([H])=C2C([H])=C3C(*)=C([H])C([H])=C([H])C3=C([H])C2=C1[H] 0.000 description 1
- 150000004945 aromatic hydrocarbons Chemical class 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 125000005410 aryl sulfonium group Chemical group 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 description 1
- 150000003851 azoles Chemical class 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- WZJYKHNJTSNBHV-UHFFFAOYSA-N benzo[h]quinoline Chemical group C1=CN=C2C3=CC=CC=C3C=CC2=C1 WZJYKHNJTSNBHV-UHFFFAOYSA-N 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 125000000484 butyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 239000001913 cellulose Substances 0.000 description 1
- 229920002678 cellulose Polymers 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910000428 cobalt oxide Inorganic materials 0.000 description 1
- IVMYJDGYRUAWML-UHFFFAOYSA-N cobalt(ii) oxide Chemical compound [Co]=O IVMYJDGYRUAWML-UHFFFAOYSA-N 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229920000547 conjugated polymer Polymers 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- XCJYREBRNVKWGJ-UHFFFAOYSA-N copper(II) phthalocyanine Chemical compound [Cu+2].C12=CC=CC=C2C(N=C2[N-]C(C3=CC=CC=C32)=N2)=NC1=NC([C]1C=CC=CC1=1)=NC=1N=C1[C]3C=CC=CC3=C2[N-]1 XCJYREBRNVKWGJ-UHFFFAOYSA-N 0.000 description 1
- ZYGHJZDHTFUPRJ-UHFFFAOYSA-N coumarin Chemical compound C1=CC=C2OC(=O)C=CC2=C1 ZYGHJZDHTFUPRJ-UHFFFAOYSA-N 0.000 description 1
- VBVAVBCYMYWNOU-UHFFFAOYSA-N coumarin 6 Chemical compound C1=CC=C2SC(C3=CC4=CC=C(C=C4OC3=O)N(CC)CC)=NC2=C1 VBVAVBCYMYWNOU-UHFFFAOYSA-N 0.000 description 1
- 229960004643 cupric oxide Drugs 0.000 description 1
- IOJUPLGTWVMSFF-UHFFFAOYSA-N cyclobenzothiazole Natural products C1=CC=C2SC=NC2=C1 IOJUPLGTWVMSFF-UHFFFAOYSA-N 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000006356 dehydrogenation reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 150000004816 dichlorobenzenes Chemical class 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- BKMIWBZIQAAZBD-UHFFFAOYSA-N diindenoperylene Chemical compound C12=C3C4=CC=C2C2=CC=CC=C2C1=CC=C3C1=CC=C2C3=CC=CC=C3C3=CC=C4C1=C32 BKMIWBZIQAAZBD-UHFFFAOYSA-N 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 125000001495 ethyl group Chemical group [H]C([H])([H])C([H])([H])* 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 239000002657 fibrous material Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- 238000005984 hydrogenation reaction Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 150000002576 ketones Chemical class 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000003446 ligand Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000013528 metallic particle Substances 0.000 description 1
- UZKWTJUDCOPSNM-UHFFFAOYSA-N methoxybenzene Substances CCCCOC=C UZKWTJUDCOPSNM-UHFFFAOYSA-N 0.000 description 1
- QPUPULUCWFKZSZ-UHFFFAOYSA-N n,n-diphenylaniline;n-phenylaniline Chemical compound C=1C=CC=CC=1NC1=CC=CC=C1.C1=CC=CC=C1N(C=1C=CC=CC=1)C1=CC=CC=C1 QPUPULUCWFKZSZ-UHFFFAOYSA-N 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 229910000480 nickel oxide Inorganic materials 0.000 description 1
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 1
- 239000012044 organic layer Substances 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- PQQKPALAQIIWST-UHFFFAOYSA-N oxomolybdenum Chemical compound [Mo]=O PQQKPALAQIIWST-UHFFFAOYSA-N 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
- SLIUAWYAILUBJU-UHFFFAOYSA-N pentacene Chemical compound C1=CC=CC2=CC3=CC4=CC5=CC=CC=C5C=C4C=C3C=C21 SLIUAWYAILUBJU-UHFFFAOYSA-N 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 125000002080 perylenyl group Chemical group C1(=CC=C2C=CC=C3C4=CC=CC5=CC=CC(C1=C23)=C45)* 0.000 description 1
- CSHWQDPOILHKBI-UHFFFAOYSA-N peryrene Natural products C1=CC(C2=CC=CC=3C2=C2C=CC=3)=C3C2=CC=CC3=C1 CSHWQDPOILHKBI-UHFFFAOYSA-N 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920000767 polyaniline Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001601 polyetherimide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920006380 polyphenylene oxide Polymers 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229920000915 polyvinyl chloride Polymers 0.000 description 1
- 239000004800 polyvinyl chloride Substances 0.000 description 1
- 229920002620 polyvinyl fluoride Polymers 0.000 description 1
- QQONPFPTGQHPMA-UHFFFAOYSA-N propylene Natural products CC=C QQONPFPTGQHPMA-UHFFFAOYSA-N 0.000 description 1
- 125000004805 propylene group Chemical group [H]C([H])([H])C([H])([*:1])C([H])([H])[*:2] 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 125000002943 quinolinyl group Chemical group N1=C(C=CC2=CC=CC=C12)* 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
- 229910001750 ruby Inorganic materials 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 125000004469 siloxy group Chemical group [SiH3]O* 0.000 description 1
- BSWGGJHLVUUXTL-UHFFFAOYSA-N silver zinc Chemical compound [Zn].[Ag] BSWGGJHLVUUXTL-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 125000000542 sulfonic acid group Chemical group 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 238000007725 thermal activation Methods 0.000 description 1
- 125000000335 thiazolyl group Chemical group 0.000 description 1
- 238000013519 translation Methods 0.000 description 1
- JOHWNGGYGAVMGU-UHFFFAOYSA-N trifluorochlorine Chemical compound FCl(F)F JOHWNGGYGAVMGU-UHFFFAOYSA-N 0.000 description 1
- ODHXBMXNKOYIBV-UHFFFAOYSA-N triphenylamine Chemical compound C1=CC=CC=C1N(C=1C=CC=CC=1)C1=CC=CC=C1 ODHXBMXNKOYIBV-UHFFFAOYSA-N 0.000 description 1
- 229910001930 tungsten oxide Inorganic materials 0.000 description 1
- MEYZYGMYMLNUHJ-UHFFFAOYSA-N tunicamycin Natural products CC(C)CCCCCCCCCC=CC(=O)NC1C(O)C(O)C(CC(O)C2OC(C(O)C2O)N3C=CC(=O)NC3=O)OC1OC4OC(CO)C(O)C(O)C4NC(=O)C MEYZYGMYMLNUHJ-UHFFFAOYSA-N 0.000 description 1
- 229910001935 vanadium oxide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Landscapes
- Semiconductor Memories (AREA)
Abstract
The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.
Description
Technical field
The present invention relates to a kind of semiconductor device and manufacture method thereof that can transmit/receive data.
Background technology
In recent years, the semiconductor device that has difference in functionality and have a plurality of circuit on insulating surface is developed.In addition, promoted to utilize the development of the semiconductor device of antenna wireless transmission/reception data.The semiconductor device that is called as wireless chip (being called ID label, IC tag, IC chip, RF (radio frequency) label, wireless identification tag, electronic tag and RFID (radio-frequency (RF) tag)) has been introduced in the part market.
By using, can provide a kind of semiconductor device with high-performance and high added value as the memory circuits (also abbreviating memory as) various circuit, the storage data that are integrated on the substrate.As memory circuit, can use DRAM (dynamic random access memory), SRAM (static random access memory), FeRAM (ferromagnet random asccess memory), mask rom (mask ROM), EPROM (EPROM), EEPROM (Electrically Erasable Read Only Memory), flash memory etc.Wherein, DRAM and SRAM require to write data as the volatile memory circuit that outage back data are wiped free of at every turn when powering on.FeRAM is to use the non-volatile memory of the electric capacity that comprises ferroelectric layer, needs a large amount of manufacturing steps.Mask rom has simple structure, however data need in manufacture process, write, thereby data can not repeatedly write.EPROM, EEPROM and flash memory are to use the non-volatile memory of the element with two gate electrodes, thereby its manufacturing step increases.
Summary of the invention
In view of described problem, the invention provides and a kind ofly comprise semiconductor device non-volatile memory, that be easy to make and that can repeatedly write, and manufacture method.
Semiconductor device of the present invention comprises: be arranged at the transistor on the insulating barrier; Conductive layer as transistorized source wiring or drain electrode wiring; The memory element overlapping with described transistor; And the conductive layer that is used as antenna.Described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer, and their laminations in this order.Be set on identical layer as the conductive layer of antenna and conductive layer as a plurality of transistor sources wirings or drain electrode wiring.
Semiconductor device of the present invention comprises: be arranged on the transistor on the insulating barrier; The memory element overlapping with described transistor; And the conductive layer that is used as antenna.Described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer, and their laminations in this order.Conductive layer as antenna is set on the identical layer with first conductive layer.
Semiconductor device of the present invention comprises: be arranged on the transistor on the insulating barrier; The memory element overlapping with described transistor; And the conductive layer that is used as antenna.Described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer, and they are lamination in this order.Conductive layer as antenna is set on the identical layer with second conductive layer.
Semiconductor device of the present invention comprises: the first element cambium layer; The second element cambium layer; The bonding first element cambium layer and the second element cambium layer also comprise the adhesive layer of conductive particle.The described first element cambium layer comprises: be arranged on the transistor on the insulating barrier; Conductive layer as transistorized source wiring or drain electrode wiring; And be arranged on this transistor as the conductive layer of antenna.The described second element cambium layer comprises: lamination has the memory element of first conductive layer, organic compound layer or phase change layer and second conductive layer therein.First conductive layer or second conductive layer with as the conductive layer of transistorized source wiring or drain electrode wiring, be connected by at least one conductive particle.
Semiconductor device of the present invention comprises: the element cambium layer; Has substrate as the conductive layer of antenna; With element cambium layer and substrate is bonding and comprise the adhesive layer of conductive particle.Described element cambium layer comprises: be arranged on first and second transistors on the insulating barrier; As the source wiring of the first transistor or the conductive layer of drain electrode wiring; With with the transistor seconds overlaid and wherein lamination the memory element of first conductive layer, organic compound layer or phase change layer and second conductive layer is arranged.As the conductive layer of antenna be connected by at least one conductive particle as the source wiring of the first transistor or the conductive layer of drain electrode wiring.
Semiconductor device of the present invention comprises: the first element cambium layer; The second element cambium layer; With bonding this first element cambium layer and this second element cambium layer and comprise the adhesive layer of conductive particle.The described first element cambium layer comprises: be arranged on first and second transistors on the insulating barrier; As the source wiring of this first transistor or first conductive layer of drain electrode wiring; With as the source wiring of this transistor seconds or second conductive layer of drain electrode wiring.The described second element cambium layer comprises: wherein lamination has the memory element of first conductive layer, organic compound layer or phase change layer and second conductive layer; And the conductive layer that is used as antenna.As the conductive layer of antenna be connected by conductive particle as the source wiring of the first transistor or first conductive layer of drain electrode wiring.First conductive layer of memory element or second conductive layer be connected by at least one conductive particle as the source wiring of transistor seconds or second conductive layer of drain electrode wiring.
Semiconductor device of the present invention comprises: be arranged on the transistor on the substrate; Conductive layer as this transistorized source wiring or drain electrode wiring; Comprise as the first element cambium layer that is arranged at the conductive layer of the antenna on a plurality of transistors; With the second element cambium layer, this second element layer is arranged on the substrate or across adhesive layer and is arranged on the first element cambium layer, and comprises that lamination wherein has the memory element of first conductive layer, organic compound layer or phase change layer and second conductive layer.First conductive layer of memory element or second conductive layer are connected by described conductive layer with conductive layer as transistorized source wiring or drain electrode wiring.
Semiconductor device of the present invention comprises: the element cambium layer; Has substrate as the conductive layer of antenna; With attaching components cambium layer and substrate and comprise the adhesive layer of conductive particle.This element cambium layer comprises: be arranged on first and second transistors on the insulating barrier; Cover this first and second transistorized interlayer insulating film; Source region by being arranged on opening portion and the first transistor on the interlayer insulating film or the drain region is connected and as the source wiring of the first transistor or drain electrode wiring and by being arranged on the conductive layer that opening portion on insulating barrier and the interlayer insulating film is exposed to the cambial back side of element; Transistor seconds; With this transistor seconds overlaid, wherein lamination has the memory element of first conductive layer, organic compound layer or phase change layer, second conductive layer.Be connected as the conductive layer of antenna and as the expose portion of the conductive layer of the source wiring of the first transistor or drain electrode wiring conductive particle by described adhesive layer.
Semiconductor device of the present invention comprises: the first element cambium layer; The second element cambium layer; With bonding this first element cambium layer and the second element cambium layer and comprise the adhesive layer of conductive particle.This first element cambium layer comprises: be arranged on the transistor on the insulating barrier; Cover this transistorized interlayer insulating film; By be arranged on opening portion on the interlayer insulating film, be connected with this transistorized source region or drain region and as this transistorized source wiring or drain electrode wiring and by being arranged on the conductive layer that opening portion on insulating barrier and the interlayer insulating film is exposed to the cambial back side of first element; And the conductive layer that is used as antenna.The second element cambium layer comprises: wherein lamination has the memory element of first conductive layer, organic compound layer or phase change layer, second conductive layer.First or second conductive layer of this memory element and be electrically connected as the expose portion of the conductive layer of transistorized source wiring or drain electrode wiring at least one conductive particle by adhesive layer.
Semiconductor device of the present invention comprises: the first element cambium layer; The second element cambium layer; The bonding first element cambium layer and the second element cambium layer also comprise the adhesive layer of conductive particle.This first element cambium layer comprises: be arranged on first and second transistors on the insulating barrier; Cover this first and second transistorized interlayer insulating film; With first and second conductive layers, in them each be by being arranged on opening portion and the first and second transistorized source regions in the interlayer insulating film or the drain region is connected and as wiring of first and second transistor sources or drain electrode wiring, and in them one is exposed to the cambial back side of first element by the opening portion that is arranged in insulating barrier and the interlayer insulating film.This second element cambium layer comprises: as the conductive layer of antenna; Wherein lamination has the memory element of first conductive layer, organic compound layer or phase change layer, second conductive layer.First or second conductive layer of this memory element and be electrically connected by at least one conductive particle in the adhesive layer as the expose portion of first conductive layer of the source wiring of the first transistor or drain electrode wiring.Be electrically connected by at least one conductive particle in the adhesive layer with expose portion as the conductive layer of antenna as second conductive layer of the source wiring of transistor seconds or drain electrode wiring.
Semiconductor device of the present invention comprises: the first element cambium layer; The second element cambium layer; The bonding first element cambium layer and the second element cambium layer also comprise first adhesive layer of conductive particle; Has substrate as the conductive layer of antenna; Bonding second element cambium layer and substrate also comprise second adhesive layer of conductive particle.This first element cambium layer comprises: wherein lamination has the memory element of first conductive layer, organic compound layer or phase change layer and second conductive layer.This second element cambium layer comprises: be arranged on first and second transistors on the insulating barrier; Cover this first and second transistorized interlayer insulating film; Be connected with the source region or the drain region of the first transistor by the opening portion that is arranged on the interlayer insulating film, and as the source wiring of the first transistor or first conductive layer of drain electrode wiring; Source region by being arranged on opening portion and transistor seconds on insulating barrier and the interlayer insulating film or the drain region is connected and as this transistorized source wiring or drain electrode wiring and by being arranged on second conductive layer that opening portion on insulating barrier or the interlayer insulating film is exposed to the cambial back side of second element.First or second conductive layer of memory element be electrically connected by at least one conductive particle in first adhesive layer as the source wiring of the first transistor or first conductive layer of drain electrode wiring.Be electrically connected by at least one conductive particle in second adhesive layer with expose portion as the conductive layer of antenna as second conductive layer of the source wiring of transistor seconds or drain electrode wiring.
In having the semiconductor device of the present invention of described structure, memory element is connected with transistor.The transistor that is connected with memory element is MOS transistor, thin-film transistor or organic semiconductor transistor.
In addition, memory element partly or wholly with described transistor, the first transistor, transistor seconds overlaid.
In addition, described insulating barrier is a silicon oxide layer.
In addition, when the organic compound layer use of memory element is added with the conjugated polymer material of photosensitive acid agent, electron transport material or hole mobile material, the resistance of memory element is irreversibly changed by optical effect or electrical effects, so the interelectrode distance of memory element changes.The thickness that changes the preceding organic compound layer of distance is 5～60nm, be preferably 10～20nm.
The phase change layer of memory element comprises can be at the material of reversibly changing between crystalline state and the noncrystalline state, the material that can reversibly change between first crystalline state and second crystalline state, the material that maybe can only change from the noncrystalline state to the crystalline state.
In addition, the semiconductor device of the present invention with described structure comprises: one or more circuit of selecting from power circuit, clock generation circuit, data demodulation/modulation circuit, control circuit and interface circuit.
Semiconductor device of the present invention comprises and the equitant memory element of a plurality of transistors.Therefore, the semiconductor device of compact and high integration can be provided.
Semiconductor device of the present invention has substrate and is attached in the structure that has on a plurality of transistorized element cambium layer, and wherein said substrate is the substrate that comprises the substrate of memory element or comprise the conductive layer that is used as antenna.Therefore can provide compact semiconductor device.
The present invention includes and have the memory element that organic compound layer or phase change layer is clipped in the simple structure between the pair of conductive layer.Therefore, the semiconductor device and the manufacture method thereof of the cheapness that is easy to make can be provided.In addition, owing to be easy to realize high integration, so semiconductor device and the manufacture method thereof with big capacity storage circuit can be provided.
When the memory circuit of semiconductor device of the present invention comprised the memory element that organic compound layer is clipped between the pair of conductive layer, data write by optical effect or electrical effects.That is, this memory element is the non-volatile memory device that can additionally write data.Therefore, can prevent by writing the forgery of carrying out again, and can repeatedly write new data.That is, can provide semiconductor device with non-volatile memory.
When the memory circuit of semiconductor device of the present invention comprises when phase change layer is clipped between the pair of electrodes memory element between the conductive layer, because memory element is a non-volatile memory device, so need not to be used to keep the battery of data.Like this, can provide a kind of compactness, thin, lightweight semiconductor device.By phase change layer being used irreversible material, data can not rewrite.Therefore, can provide the semiconductor device that prevents the high security forged.
Therefore, can provide semiconductor device and the manufacture method thereof that has realized high-performance and high added value.
Description of drawings
Figure 1A and 1B illustrate semiconductor device of the present invention.
Fig. 2 A～2C illustrates semiconductor device of the present invention.
Fig. 3 A and 3B illustrate semiconductor device of the present invention.
Fig. 4 A and 4B illustrate semiconductor device of the present invention.
Fig. 5 A and 5B illustrate semiconductor device of the present invention.
Fig. 6 A and 6B illustrate semiconductor device of the present invention.
Fig. 7 A～7E illustrates semiconductor device of the present invention.
Fig. 8 A and 8B illustrate semiconductor device of the present invention.
Fig. 9 A～9E illustrates the manufacture method of semiconductor device of the present invention.
Figure 10 A～10C illustrates the manufacture method of semiconductor device of the present invention.
Figure 11 A and 11B illustrate the manufacture method of semiconductor device of the present invention.
Figure 12 A～12C illustrates the circuit diagram of memory circuit of the present invention.
Figure 13 A～13C illustrates the circuit diagram of memory circuit of the present invention.
Figure 14 A～14C illustrates the circuit diagram of memory circuit of the present invention.
Figure 15 illustrates the circuit diagram of semiconductor device of the present invention.
Figure 16 illustrates the curve chart of the I-V characteristic of memory element.
Figure 17 illustrates the curve chart of the I-V characteristic of memory element.
Figure 18 illustrates the circuit diagram of laser irradiation device.
Figure 19 A～19E illustrates the application of semiconductor device of the present invention.
Figure 20 illustrates the electronic installation that uses semiconductor device of the present invention.
Figure 21 A and 21B illustrate the application of semiconductor device of the present invention.
Figure 22 A and 22B illustrate the curve chart of the I-V characteristic of memory element.
Figure 23 A and 23B illustrate the curve chart of the I-V characteristic of memory element.
Figure 24 A and 24B illustrate the curve chart of the I-V characteristic of memory element.
Figure 25 A～25F illustrates the structure chart of memory element.
Figure 26 A～26E illustrates semiconductor device of the present invention.
Figure 27 A and 27B illustrate semiconductor device of the present invention.
Figure 28 A and 28B illustrate semiconductor device of the present invention.
Figure 29 A and 29B illustrate semiconductor device of the present invention.
Figure 30 A and Figure 30 B illustrate semiconductor device of the present invention.
Figure 31 A and Figure 31 B illustrate semiconductor device of the present invention.
Figure 32 illustrates semiconductor device of the present invention.
Figure 33 illustrates semiconductor device of the present invention.
Figure 34 A～34E illustrates the manufacture method of semiconductor device of the present invention.
Figure 35 A～35C illustrates the manufacture method of semiconductor device of the present invention.
Figure 36 A and 36B illustrate the manufacture method of semiconductor device of the present invention.
Figure 37 illustrates semiconductor device of the present invention.
Embodiment
Though by following execution mode and embodiment the present invention has been carried out comprehensive description with reference to accompanying drawing, those skilled in the art can carry out various changes and modification to it.Therefore, unless such change and modification have departed from scope of the present invention, otherwise this change and change all should be considered to be included in interior and be narrated.Notice that the same section in different accompanying drawings is with identical symbolic representation.
The 1st execution mode
With reference to Figure 1A, 1B, 2A～2C, 7A and 15, the structure of the semiconductor device of present embodiment is narrated.As shown in figure 15, semiconductor device 20 of the present invention has the function that need not to contact and transmit data, comprises power circuit 11, clock generation circuit 12, data demodulation/modulation circuit 13, the control circuit 14 of controlling other circuit, interface circuit 15, memory circuit 16, data/address bus 17 and antenna (aerial coil) 18.
With reference to Fig. 7 A, the perspective view of the semiconductor device 20 of present embodiment is narrated.Shown in Fig. 7 A, the semiconductor device of present embodiment has the structure that is integrated with a plurality of circuit on substrate.Here, element cambium layer 101a comprises a plurality of transistors that are formed on the substrate 100a.Having a plurality of transistorized element cambium layer 101a comprises: the zone 102 and 103 that comprises a plurality of TFT respectively; The zone 104 that comprises memory element; And be arranged on the zone 102 that has a plurality of TFT respectively and 103 and comprise memory element zone 104 the periphery, as the conductive layer 105 of antenna.
In the execution mode below, have a plurality of transistorized element cambium layer and comprise the zone 102 that comprises a plurality of TFT respectively and 103 etc., yet, have a plurality of transistorized element cambium layer and also can be formed on transistor on the single crystalline substrate, constitute by use as MOS transistor or TFT.At this moment, this substrate 100a is the semiconductor monocrystal substrate.In addition, also can use insulating barrier and stacked SOI (silicon-on-insulator) substrate of single-crystal semiconductor layer.In addition, can have a plurality of transistorized element cambium layer by using organic semiconductor transistor to form.
Comprise that the zone 104 of memory element forms the memory circuit of storage data, and comprise the circuit etc. of memory element and this memory element of control.The zone 104 that comprises memory element is connected with zone 103 formation control circuit, interface circuit etc., that have a plurality of TFT.
Next, with reference to Figure 1A, the cross-section structure of semiconductor device with the structure among Fig. 7 is described.Having a plurality of transistorized element cambium layer 101a is formed on the substrate 100a.Here, comprising: the TFT 111 (parts that comprise the zone 104 of memory element among Fig. 7 A) that forms the circuit of control store element; The switching TFT 112 of memory element (parts in the zone that comprises memory element 104 of Fig. 7 A); TFT 113 (parts in the zone that comprises a plurality of TFT 102 of Fig. 7 A) is formed for handling the circuit of the signal that is received by antenna, as power circuit, clock generation circuit, data demodulation/modulation circuit; And TFT 114 (parts in the zone that comprises a plurality of TFT 103 of Fig. 7 A), form control circuit, interface circuit etc.
These TFT can be by suitably being used in combination the p channel TFT and the n channel TFT forms.Here, the TFT that constitutes each circuit is the n channel TFT.
Each semiconductor layer of TFT 111～114 can comprise any as active layer in amorphous semiconductor, crystallite semiconductor, poly semiconductor, the organic semiconductor etc.Preferably, use with metallic element as catalyst and the semiconductor layer of crystallization or with laser radiation the semiconductor layer of crystallization obtains to have the transistor of superperformance.In addition, can use by plasma CVD method, utilize SiH
4/ F
2Gas, SiH
4/ H
2Gas (Ar gas) and the semiconductor layer that forms, or the semiconductor layer of laser radiation is as described semiconductor layer.
In addition, each TFT 111～114 crystalline semiconductor layer (high temperature polycrystal layer) formation that can form by the crystalline semiconductor layer (low temperature polycrystal layer) that forms down 200～600 ℃ temperature (preferably at 350～550 ℃) or under more than or equal to 600 ℃ temperature.When on substrate, forming the high temperature crystallization layer, can use quartz substrate to replace to adding thermo-responsive glass substrate.Can be with 1 * 10
19～1 * 10
22Atom/cm
3Concentration, preferably with 1 * 10
19～5 * 10
20Atom/cm
3Concentration, the semiconductor layer (specifically being channel formation region) of each TFT 111～114 is added protium or halogens.Therefore, the active layer that can obtain to have low defective and be difficult for producing fracture.
Preferably, to have thickness be 20～200nm to each TFT 111～114, be preferably 40～170nm, more preferably 45～55nm, the semiconductor layer of 50nm more preferably.Therefore, even can provide under the situation of bending, semiconductor layer also be difficult for to produce the element cambium layer 101a of fracture.
In addition, preferably, form to constitute the crystalline solid of the semiconductor layer of each TFT 111～114, it is had in the direction parallel with the carrier flow direction (orientation) go up the crystal boundary that extends.In addition, each TFT 111～114 preferably has smaller or equal to 0.35V/sec and (is preferably 0.09～0.25V/sec) S value (subthreshold value) and more than or equal to 10cm
2The characteristic of the mobility of/Vs.Such semiconductor layer can form more than or equal to 10MHz, the semiconductor layer that is preferably the pulsed laser irradiation of 60～100MHz by continuous oscillation laser or frequency.
In low concentration impurity district, source region and drain region, added the element of giving p type or n type conductivity.Here, can utilize ion implantation or ion doping method,, the impurity element of giving n type conductivity be added among source region and drain region 119a～119d and the low concentration impurity district 120a～120d in self aligned mode.
Though it should be noted that TFT 111～114 has low concentration impurity district 120a～120d and sidewall 118a～118d here, yet, the present invention is not limited to this.If low concentration impurity district and sidewall do not need, then can not be provided with.
As semiconductor layer, the organic semiconducting materials that use that can be suitable is known.Typically, the pi-conjugated high polymer material with conjugated double bond skeleton is preferred.For example, can use soluble high polymer material, as polythiophene, poly-(3-alkylthrophene), polythiofuran derivative and pentacene.
In addition, can form semiconductor layer by preformed soluble precursors is handled.As the organic semiconducting materials that can obtain by precursor, can use poly-thienylene ethenylidene, poly-(2, the 5-thienylene ethenylidene), polyacetylene, polyacetylene derivative, poly-propine ethenylidene etc.
When precursor is formed organic semiconductor, except that heat treatment, also add the catalysts such as hydrogen chloride gas.As the typical solvent that is used to dissolve these solvable organic semiconducting materials, can use toluene, dimethylbenzene, chlorobenzene, dichloro-benzenes, methyl phenyl ethers anisole, chloroform, dichloromethane, γ-butyl lactone, butyl cellulose, cyclohexane, NMP (N-N-methyl-2-2-pyrrolidone N-), cyclohexanone, 2-butanone, dioxane, dimethyl formamide (DMF), THF (tetrahydrofuran) etc.
Insulating barrier 123 is set, to cover TFT 111～114 and as the insulating barrier 122 of passivating film.This insulating barrier 123 is set to obtain smooth surface.Conductive layer 124a～124d as source wiring or drain electrode wiring contacts with source region and drain region 119a～119d, and fills the contact hole that is formed in insulating barrier 122 and 123.In addition, as the conductive layer 125a of antenna be formed on as the conductive layer 124a～124d of source wiring or drain electrode wiring identical layer on.Conductive layer 125 be connected as the source wiring of TFT 113 or the conductive layer 124a of drain electrode wiring.Insulating barrier 126 and 127 are set, to cover conductive layer 124a～124d and 125.Insulating barrier 126 and 127 are set, to obtain smooth surface and to protect TFT 111～114 and conductive layer 124a～124d and 125.
In TFT 111～114, when with 9 inverter looping oscillators, TFT 113 and 114 has the characteristic more than or equal to 1MHz at least, preferably has the characteristic more than or equal to 10MHz (under 3～5V).Optionally, the frequency characteristic of each is preferably greater than and equals 100KHz, more preferably greater than equaling 1MHz (under 3～5V).
As described below, be pursuant to its structure, utilize and use the optical effect of laser to write data in the memory element 134 of lamination on TFT 111～114.At this moment, be subjected to the infringement that causes by laser, with insulating material formation insulating barrier 127 with shading characteristic and the insulating barrier 135 that forms subsequently in order to prevent TFT111～114.Insulating material with shading characteristic is for example by carbon granule, metallic particles, dyestuff, pigment etc. being added in the known insulating material and stirring, filter on request then the material that obtains; And by adding material that surfactant or dispersant so that carbon granule etc. are mixed equably etc.This insulating material can utilize spin-coating method to form.
In addition, memory element 134 is set on the insulating barrier 127.The part or all of overlaid of this memory element and TFT112.Utilize as above structure, this memory element can high integration be integrated on the semiconductor device with little space.
First conductive layer 131, organic compound or phase change layer 132, second conductive layer 133 by lamination on insulating barrier 127.This laminated structure is corresponding to memory element 134.This insulating barrier 135 is arranged between adjacent organic compound layer or the phase change layer 132.First conductive layer 131 be connected as the source wiring of TFT 112 or the conductive layer 124b of drain electrode wiring.Insulating barrier 136 is arranged on second conductive layer 133.TFT 112 is as the switching TFT of memory element.
Next, with reference to Figure 1B, to the memory circuit that replaces comprising memory element, be that the cross-section structure of the semiconductor device active matrix memory circuit, that comprise passive memory circuit describes with switching TFT.Particularly, describe compare, comprise cross-section structure with the semiconductor device shown in Figure 1A with different structure memory element 134 and the semiconductor device that is attached thereto the different TFT that connects.
On insulating barrier 127, be provided with: first conductive layer 151, be connected as the source wiring of TFT 111 or the conductive layer 124a of drain electrode wiring; Organic compound layer or phase change layer 152 are to be connected with first conductive layer 151; And second conductive layer 153, to be connected with organic compound layer or phase change layer 152.The laminated structure of first conductive layer 151, organic compound layer or phase change layer 152, second conductive layer 153 is corresponding to memory element 154.Insulating barrier 155 is arranged between adjacent organic compound layer or the phase change layer 152.Insulating barrier 156 is arranged on the memory element 154.
First conductive layer 151 is as public electrode.By using first conductive layer 151 to form a plurality of memory elements 154.
In Figure 1A and Figure 1B, the sectional structure chart that element cambium layer 101a is had a plurality of transistorized semiconductor device on substrate is described, yet the present invention is not limited to this.For example, shown in Fig. 2 A, after peel ply being set on the substrate and formation has a plurality of transistorized element cambium layer 101a on peel ply, this can be had a plurality of transistorized element cambium layer 101a and peel off, and utilize adhesive layer 201 to be bonded on the substrate 200a from peel ply.As stripping means, can use: (1) by at substrate with have between a plurality of transistorized element cambium layer metal oxide film is set, and by crystallization this metal oxide film that weakens, will have the method that a plurality of transistorized element cambium layer are peeled off; (2) by at substrate and comprise between a plurality of transistorized element cambium layer hydrogeneous amorphous silicon film is set, and remove this amorphous silicon film, will have the method that a plurality of transistorized element cambium layer are peeled off by laser radiation or etching; (3) mechanically remove to have formed thereon and comprise the cambial substrate of a plurality of transistorized elements, or utilize solution or as CF
3Deng gas, remove the method for substrate with the method for etching; (4) by at substrate and comprise be provided with between a plurality of transistorized element cambium layer peel ply and metal oxide film and by crystallization weaken this metal oxide film, use solution or as the gas of CF3 etc. come etching with removal part peel ply, with method such as scraper element cambium layer physically at the metal oxide film place that has weakened.
Preferred use flexible, thin, lightweight plastic as substrate 200a.Particularly, the substrate that can use PET (polyethylene terephthalate), PEN (poly-naphthalene methylene acid ethyl), PES (polyether sulfone), polypropylene, polypropylene sulfide, Merlon, Polyetherimide, polyphenylene sulfides, polyphenylene oxide, polysulfones, poly-phthalal acid amides etc. to form.In addition, also can use laminated film (constituting) by polypropylene, polyester, vinyl, polyvinyl fluoride, polyvinyl chloride etc., the paper that forms by fiber material, the lamination tunic of basilar memebrane (polyester, polyamide, inorganic vapor deposition film, paper etc.), viscosity synthetic resin film (acrylic acid synthetic resin, epoxy synthetic resin etc.).
By hot press laminated film is laminated on the object.When carrying out lamination treatment, by heat treatment make the adhesive layer of the uppermost surface that is arranged on laminated film or be set to outermost layer (non-adhesive layer) layer fusing, and pressurization make it bonding.Adhesive layer can be arranged on the surface of substrate 200a, but and nonessential setting.
Adhesive layer 201 is the layers that comprise as adhesives such as heat reactive resin, ultraviolet curable resin, epoxy resin-based adhesive and resin additives.
As mentioned above, be attached on flexible, thin, the lightweight plastic by a plurality of transistorized element cambium layer 101a that have that will be peeled off, can provide a kind of thin, lightweight and when dropping not easily broken semiconductor device.In addition, this flexibility makes and semiconductor device can be bonded on curved surface or the erose surface, causes various application.For example, can be with semiconductor device of the present invention closely attached on the curved surface as medicine bottle etc.If reuse this substrate, can reduce the cost of semiconductor device.
Shown in Fig. 2 B, the identical conduction layer that can make and be used as memory element 134 first conductive layers 131 forms the conductive layer 215 as antenna.At this moment, be connected on the conductive layer 124c as source wiring or drain electrode wiring as the conductive layer 215 of antenna.
In addition, shown in Fig. 2 C, can use with identical conduction layer and form conductive layer 225 as antenna as second conductive layer 133 of memory element 134.At this moment, by conductive layer 214, will be connected to as the conductive layer 225 of antenna on the conductive layer 124c as source wiring or drain electrode wiring.
It should be noted that, semiconductor device shown in Fig. 2 A～2C can be applied to comprise the semiconductor device of passive matrix memory circuit, described passive matrix memory circuit comprises memory element, and wherein each described memory element does not have the switching TFT shown in Figure 1B.
Semiconductor device of the present invention has comprising lamination on the element cambium layer of a plurality of TFT the structure of memory element is arranged.Therefore can make compact semiconductor device.In addition, as forming simultaneously one of in the conductive layer of the source wiring of the conductive layer of antenna and TFT or drain electrode wiring and memory element, so can reduce the quantity of manufacturing step, boost productivity.
In having the semiconductor device of said structure, memory element has the simple structure that organic compound layer or phase change layer is clipped in (first conductive layer and second conductive layer) between the pair of conductive layer.Therefore a kind of that be easy to make, cheap semiconductor device and manufacture method thereof can be provided.In addition, owing to can easily realize high integration, therefore can provide semiconductor device and manufacture method thereof with big capacity storage circuit.
Utilize optical effect or electrical effects that the included memory circuit of semiconductor device of the present invention is write data.That is, this memory element is non-volatile memory element that can additionally write data.Therefore, can prevent to utilize overwriting data and the forgery carried out, and can additionally write new data.That is, can realize the semiconductor device of high-performance and high added value, and its manufacture method can be provided.
The 2nd execution mode
In the present embodiment, with reference to accompanying drawing 3A, 3B, 7B, 37, the structure of the semiconductor device of the present invention that is different from above-mentioned execution mode is described.
Shown in Fig. 7 B, the semiconductor device of present embodiment has and utilizes adhesive layer will be included in a plurality of transistorized element cambium layer 301a that the first substrate 100a go up to form to be formed at structure on the second substrate 300a, that be bonded together as the element cambium layer 302a of the conductive layer 105 of antenna with comprising.
Here, have a plurality of transistorized element cambium layer 301a and typically comprise the zone 102 that comprises a plurality of TFT respectively and 103 and comprise the zone 104 of memory element.In addition, though and not shown, utilize conductive particle will be formed on the element cambium layer 302a, be connected to as the conductive layer 105 of antenna and be formed on the zone 102 on the element cambium layer 301a, that comprise a plurality of TFT that constitute telecommunication circuit.
With reference to accompanying drawing 3A, 3B the cross-section structure of semiconductor device of the present invention with structure shown in Figure 7 is described.
As shown in Figure 3A, the semiconductor device of present embodiment has the element cambium layer 301a that will comprise a plurality of transistors that are formed on the first substrate 100a and memory element by adhesive layer 306 and is formed on structure on the second substrate 300a, that be bonded together as the element cambium layer 302a of the conductive layer 303 of antenna with comprising.
The element cambium layer 301a that will comprise a plurality of TFT 111～114 that are formed on the substrate 100a and memory element 134 by the adhesive layer 306 that comprises conductive particle 305 is bonding with the element cambium layer 302a that comprises the conductive layer 303 that is formed on the substrate 300a.In addition, be connected with conductive layer 224 by conductive layer 214 as the source wiring of TFT 113 or the conductive layer 124c of drain electrode wiring.Conductive layer 224 is as splicing ear.In addition, conductive layer 214 forms simultaneously with first conductive layer 131 of memory element 134.Conductive layer 224 forms simultaneously with second conductive layer 133 of memory element 134.In addition, be electrically connected by conductive particle 305 as the conductive layer 224 of splicing ear with as the conductive layer 303 of antenna.
Having the second substrate 300a as the conductive layer 303 of antenna, can be the substrate similar to substrate 200a.In addition, can on the surface of substrate 300a and conductive layer 303, form insulating barrier 307.Yet, conductive layer 303 with zone that conductive layer 224 as the splicing ear of TFT 113 is connected in be exposed.
In addition, as shown in figure 37, can use to comprise that to have diameter be 0.5～10 μ m, the adhesive layer 306 of the conductive particle 308 of 1～5 μ m more preferably.At this moment, conductive layer 303 is connected by the conductive particle 309 with vertical extrusion shapes with conductive layer 224.At this moment, the distance between conductive layer 303 and the conductive layer 224 is kept by conductive particle 309.
In addition, also can use by on the particle surface that constitutes by resin, form the conductive particle that the formed film of one or more elements selected obtains from gold, silver, copper, palladium or platinum.In addition, also can use the anisotropic conductive film that forms film shape and be transferred on the basis film to substitute anisotropic-electroconductive adhesive.Be similar to anisotropic-electroconductive adhesive, this anisotropic conductive film is dispersed with conductive particle.
Each memory element 134 as shown in Figure 3A has switching TFT 112.That is, provide the semiconductor device that comprises active matrix stores circuit.Shown in Fig. 3 B, also can provide the memory element 154 that comprises first conductive layer 151, organic compound layer or phase change layer 152 and second conductive layer 153.Utilize this structure, memory element 154 is connected with each switching TFT, but be directly connected to similarly on the TFT 111 shown in Figure 1B.A kind of semiconductor device that comprises the passive matrix memory circuit is provided, and in this passive matrix memory circuit, first conductive layer 151 utilizes first conductive layer 151 to form a plurality of memory elements 154 as public electrode.
In addition, in the present embodiment, also can provide shown in Fig. 2 A, on substrate 200a, to comprise a plurality of transistorized element cambium layer 301a, between this element cambium layer 301a and substrate 200a, insert adhesive layer 201.
Semiconductor device of the present invention has and will comprise the amassing layer by layer in the structure that comprises on the element cambium layer of a plurality of TFT of memory element.Therefore can make compact semiconductor device.In addition, form the cambial step of element comprise a plurality of transistors and memory element and form step as the conductive layer of antenna and can walk abreast independently and carry out.Therefore, semiconductor device can be made at short notice expeditiously.After the element cambium layer that comprises a plurality of transistors and antenna forms, the performance of each circuit is detected and sorting, the element cambium layer that will comprise a plurality of transistors and antenna then is electrically connected, thereby finishes this semiconductor device.Therefore, can suppress the manufacturing defect rate, improve rate of finished products.
The 3rd execution mode
In the present embodiment, with reference to Fig. 4 A, 4B, 7C, 8A and 8B, the cross-section structure of semiconductor device of the present invention that use is different from the structure of above-mentioned execution mode describes.Particularly, describe having the cross-section structure that on substrate, is formed with the element cambium layer 402a that comprises memory element but not is formed with among Fig. 3 A and the 3B as the semiconductor device of the structure of the conductive layer of antenna.
The semiconductor device of present embodiment has and utilizes adhesive layer will be included in a plurality of transistorized element cambium layer 401a that the first substrate 100a go up to form and be included in the structure that element cambium layer 402a that the second substrate 400a goes up the memory element that forms is bonded together.
Here, comprise a plurality of transistorized element cambium layer 401a and typically comprise the zone 102 and 103 that has a plurality of TFT respectively and be used as the conductive layer 105 of antenna.The element cambium layer 402a that comprises memory element comprises the zone 104 with memory element.The zone 104 that comprises memory element is connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by not shown conductive particle.
With reference to accompanying drawing 4A, 4B, the cross-section structure with the semiconductor device of the present invention shown in Fig. 7 C is described.
Shown in Fig. 4 A, on substrate 100a, form the element cambium layer 401a that comprises a plurality of transistors and be used as the conductive layer of antenna.The element cambium layer 401a that comprises a plurality of TFT comprises the TFT 111,113 and 114 with said structure.The element cambium layer 402a that comprises memory element is formed on the substrate 400a.In Fig. 4 A, switching TFT 412a is connected with 434b with memory element 434a respectively with 412b.That is, each of first conductive layer 431a of memory element and 431b is connected with source wiring or the drain electrode wiring of switching TFT 412a or 412b.In addition, the source wiring of switching TFT 412a or 412b or in the drain electrode wiring another be connected simultaneously as first conductive layer of memory element or the conductive layer of second conductive layer.Here, be connected with conductive layer 426 by conductive layer 425 as source wiring or drain electrode wiring, conductive layer 424 another.It should be noted that first conductive layer 431a and the 431b of 425 whiles of conductive layer as memory element.426 whiles of conductive layer are as second conductive layer 433a and the 433b of memory element.
It is bonding by adhesive layer 306 with the element cambium layer 402a that comprises memory element to comprise a plurality of transistorized element cambium layer 401a.As the conductive layer 424 of the source wiring of the switching TFT 412a of memory element or drain electrode wiring be electrically connected by conductive particle 305, conductive layer 421,425 and 426 as the source wiring of the TFT 111 of the circuit that constitutes the operation store element or the conductive layer 124a of drain electrode wiring.
Exist to use laser, utilize optical effect to write data into to comprise the situation among the element cambium layer 402a of memory element.At this moment, need arrange, make them not overlap each other comprising on the element cambium layer 402a of memory element switching TFT 412a, 412b, memory element 434a and 434b.
In the above-described embodiment, the circuit of operation store element is formed on and comprises on a plurality of transistorized element cambium layer 401a, yet, the present invention is not limited to this.For example, the circuit of operation store element also can be formed on the element cambium layer 401a that comprises memory element.Particularly, shown in Fig. 8 A, the TFT 811 that constitutes the circuit of operation store element is formed on the substrate 400a with memory element 434a and 434b, then, can utilize the adhesive layer 306 that comprises conductive particle 305 will comprise the element cambium layer 402a of memory element and comprise a plurality of transistorized element cambium layer 401a carries out bonding.At this moment, be electrically connected with one of the source wiring of TFT 114 or drain electrode wiring by conductive particle 305, conductive layer 825,826 and 827 as one of the source wiring of the TFT 811 of the circuit that forms the operation store element or conductive layer 424 of drain electrode wiring.It should be noted that conductive layer 826 and be connected as one of the source wiring of TFT 811 or conductive layer 424 of drain electrode wiring.826 whiles of conductive layer are as second conductive layer of memory element.825 whiles of conductive layer are as first conductive layer of memory element.
In Fig. 4 A, the element cambium layer 402a that comprises memory element is formed on the substrate 400a, but shown in Fig. 8 B, the element cambium layer 402a that comprises memory element also can be adhered on the substrate 800a by the adhesive layer 834 that is inserted between this element cambium layer and the substrate 800a.
Semiconductor device of the present invention have will comprise the layer of memory element be adhered to and comprise a plurality of transistors and as the structure on the element cambium layer of the conductive layer of antenna.Therefore, can make compact semiconductor device.In addition, form and to comprise a plurality of transistors and as the cambial step of element of the conductive layer of antenna with form the cambial step of element that comprises memory element and can walk abreast independently and carry out.Therefore, can make semiconductor device at short notice efficiently.After comprising a plurality of transistorized element cambium layer and memory element and forming, can detect the performance of each circuit and sorting, will comprise a plurality of transistorized element cambium layer and memory element then and be electrically connected to finish the manufacturing of semiconductor device.Therefore, thus the ratio of defects that can suppress to produce improves rate of finished products.
The 4th execution mode
In the present embodiment, the cross-section structure to semiconductor device of the present invention with structure different from the embodiment described above describes.Particularly, with reference to Fig. 5 A, 5B, 7D, to have will form thereon the substrate of layer of memory element and antenna be adhered to the cross-section structure that comprises the semiconductor device on a plurality of transistorized element cambium layer and describe.
The semiconductor device of present embodiment have utilize adhesive layer will comprise a plurality of the transistorized element cambium layer 501a that forms on the first substrate 100a be included in the memory element that forms on the second substrate 500a and the bonding structure of element cambium layer 502a of antenna.
Here, comprise a plurality of transistorized element cambium layer 501a and typically have the zone 102 and 103 that comprises a plurality of TFT respectively.In addition, the element cambium layer 502a that comprises memory element and antenna comprises having memory element and as the zone 104 of second conductive layer 105 of antenna.This zone 104 that comprises memory element is connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by not shown conductive particle.In addition, the conductive layer 105 as antenna is connected with the zone 102 that comprises a plurality of TFT that constitute telecommunication circuit by not shown conductive particle.
With reference to accompanying drawing 5A, 5G, the semiconductor device of the present invention of structure with Fig. 7 D is described.
Shown in Fig. 5 A, the element cambium layer 501a that comprises a plurality of TFT comprises the TFT 111,113 and 114 of said structure.In addition, comprise as the conductive layer 525 of antenna and the element cambium layer 502a of memory element 434 and be formed on the substrate 500a.In Fig. 5 A, memory element 434 is connected with switching TFT 412.That is, in the source wiring of switching TFT 412 or the drain electrode wiring is connected with first conductive layer of memory element 434.
The source wiring of switching TFT 412 or in the drain electrode wiring another be connected simultaneously as first conductive layer of memory element or the conductive layer 425 of second conductive layer.Here, be connected with conductive layer 426 by conductive layer 425 as another of the conductive layer 424 of source wiring or drain electrode wiring.Conductive layer 426 as second conductive layer of memory element 434, is used as splicing ear simultaneously.
As the conductive layer 424 of the source wiring of TFT 412 or drain electrode wiring be electrically connected by conductive layer 421,225,426 and conductive particle 305 as the source wiring of TFT111 or the 124a conductive layer of drain electrode wiring.
In addition, form first or second conductive layer of memory element simultaneously as the conductive layer 525 of antenna.This conductive layer 525 by conductive particle 305 and conductive layer 521 be electrically connected as the source wiring of TFT113 or the conductive layer 124c of drain electrode wiring.Conductive layer 521 as splicing ear is connected with the conductive layer that is used as antenna.
According to the structure of memory element, exist the optical effect utilize laser to write data into situation in the memory element 434.At this moment, need arrange, make and not hinder at least light from the side of the element cambium layer 502a that comprises memory element and antenna to memory element 434 to switching TFT 412, conductive layer 424 and memory element 434.
The TFT 111 that constitutes the operation store element circuitry is formed on and comprises on a plurality of transistorized element cambium layer 501a, but the invention is not restricted to this.The circuit of operation store element can be formed on the element cambium layer that comprises memory element and antenna.In Fig. 5 A, the element cambium layer 502a that comprises memory element and antenna is formed on the substrate 500a; But the element cambium layer 502a that comprises memory element and antenna also can utilize and be inserted into the adhesive layer between this element cambium layer and the substrate and be adhered on the substrate.In addition, be formed on the substrate 100a though this comprises a plurality of transistorized element cambium layer 501a, comprise a plurality of transistorized element cambium layer 501a and also can be adhered on the substrate 200a by adhesive layer shown in Fig. 2 A, that be inserted between substrate 200a and this element cambium layer.
Semiconductor device of the present invention have comprise memory element and antenna element cambium layer lamination in the structure that comprises on the element cambium layer of a plurality of TFT.Therefore can provide compact semiconductor device.In addition, formation comprises parallel independently the carrying out of the cambial step of element that the cambial step of a plurality of transistorized elements can comprise memory element and antenna with formation.Therefore, semiconductor device can be made at short notice efficiently.After having formed the element cambium layer that comprises a plurality of transistors, memory element and antenna, performance to each detects and sorting, the element cambium layer and the antenna that to comprise a plurality of transistorized element cambium layer then, comprise memory element are electrically connected, to finish the manufacturing of semiconductor device.Thereby, can suppress the manufacturing defect rate, improve rate of finished products.
The 5th execution mode
In the present embodiment, the semiconductor device with structure different from the embodiment described above is described.Particularly,, the cross-section structure of semiconductor device is described, wherein, comprise that the element cambium layer 602a of memory element is formed on the substrate 100a, be formed with on this substrate 100a and comprise a plurality of transistorized element cambium layer 601a with reference to Fig. 6 A, 6B, 7E.
Shown in Fig. 7 E, semiconductor device of the present invention have the element cambium layer 602a that utilizes adhesive layer will comprise memory element be adhered to be formed on the substrate 100a, comprise a plurality of transistorized element cambium layer 601a and go up or be adhered to structure on the substrate 100a.
Here, comprise zone 102 and the zone 103 that a plurality of transistorized element cambium layer 601a typically comprise the conductive layer 105 that comprises a plurality of TFT respectively and be used as antenna.The element cambium layer 602a that comprises memory element comprises the zone 104 with memory element.The zone 104 that comprises memory element is electrically connected on the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by electric conducting material 631.
With reference to Fig. 6 A and 6B, the of the present invention semi-conductive cross-section structure with the structure among Fig. 7 E is described.
As shown in Figure 6A, the element cambium layer 601a that comprises a plurality of TFT comprises the TFT 111,113 and 114 with described structure.In addition, utilize adhesive layer 611, the substrate 621a that has formed the element cambium layer 602a that comprises memory element thereon is installed on the substrate 100a.In Fig. 6 A, memory element 634 is connected with switching TFT 112.Promptly, in the source wiring of switching TFT 112 or the drain electrode wiring is connected with first conductive layer of memory element.The source wiring of this switching TFT 112 or in the drain electrode wiring another are connected on the conductive layer that forms first conductive layer or second conductive layer simultaneously.Here, be connected on the conductive layer 626 by conductive layer 625 as another of the conductive layer 124b of source wiring or drain electrode wiring.These 625 whiles of conductive layer are as first conductive layer of memory element.Conductive layer 626 is simultaneously as second wiring layer of memory element, and as splicing ear.
The TFT 111 that forms among the switching TFT 112 of the memory element 634 that forms in comprising the element cambium layer 602a of memory element and the element cambium layer 601a that is comprising a plurality of TFT, constitute the circuit of operation store element is electrically connected by electric conducting material 631.Here, utilize the lead-in wire bonding method will be used for TFT 111 and 112 be connected as the electric conducting material 631 of wiring, but also can be by forming conductive film and its etching being formed electric conducting material 631 for the shape of expectation.In addition, can use method of attachment as print process etc.
In the present embodiment, the element cambium layer 602a that comprises memory element is installed on the substrate 100a, but the present invention is not limited to this.The element cambium layer that comprises the element cambium layer of memory element and antenna and comprise antenna can be installed on the substrate 100a.
Semiconductor device of the present invention has the layer that will comprise memory element and is arranged on the structure that has on the cambial substrate of the element that comprises a plurality of TFT.Therefore can provide compact semiconductor device.In addition, form and to comprise the cambial step of element that the cambial step of a plurality of transistorized elements can comprise memory element with formation concurrently, form independently.Thereby, can make semiconductor device at short notice, efficiently.Comprise the element cambium layer of a plurality of transistors and memory element when formation after, the performance of each element is detected and sorting, be electrically connected with memory element comprising a plurality of transistorized element cambium layer then, to finish the manufacturing of semiconductor device.Therefore, the ratio of defects that can suppress to make, improve rate of finished products.
The 6th execution mode
In the present embodiment, with reference to accompanying drawing, the manufacture method of semiconductor device is described.Here, show the manufacture method of the semiconductor device in the 1st execution mode shown in Fig. 2 A, but present embodiment can be applied to the semiconductor device shown in each execution mode.
Shown in Fig. 9 A, on a surface of substrate 1100, peel ply 1101 and 1102 have been formed.
This substrate 1100 is made of the plastic etc. that has glass substrate, quartz substrate, metal substrate, the stainless substrate of insulating barrier and can resist the treatment temperature of this step on a surface of each substrate.Described substrate 1100 is not restriction on size and dimension.Therefore, have rectangular substrate 1100, can improve output significantly more than or equal to 1 meter the length of side by use.This point is compared with the situation of using circular silicon substrate has very big advantage.
Comprising a plurality of transistorized element cambium layer that is arranged on the substrate 1100 is peeled off from substrate 1100 after a while.Therefore, substrate 110 can utilize again, comprises a plurality of transistorized element cambium layer to form once more on substrate 1100.Its result can reduce cost.The substrate 1100 of Li Yonging can be made of quartz substrate again.
By on a surface of substrate 1100, forming film, and utilize photoetching process to use Etching mask to carry out etching selectively and form peel ply 1101 and 1102.Utilize plasma CVD method, sputtering method etc., with an element from tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), plumbous (Pb), osmium (Os), iridium (Ir), silicon (Si), selecting, comprise above-mentioned element as the alloy material of main component or comprise the individual layer of the layer that above-mentioned element forms as the compound-material of main component or each of laminated layer formation peel ply 1101 and 1102.Siliceous layer can have any structure in amorphous, crystallite, the polycrystalline.
When each peel ply 1101 and 1102 has single layer structure, form the layer of tungsten layer, molybdenum layer or tungstenic, molybdenum mixture.In addition, also can form the oxide of tungstenic or layer or tungstenic, the oxide of molybdenum mixture or the layer of nitrogen oxide of the layer of nitrogen oxide, the oxide that contains molybdenum or nitrogen oxide.The mixture of tungsten, molybdenum is the alloy of tungsten, molybdenum for example.
When each peel ply 1101 and 1102 uses composition graded layer, be preferably formed with tungsten layer, molybdenum layer or tungstenic, molybdenum mixture layer as ground floor, and with oxide, nitride, oxynitride or the oxynitride layer of tungsten, molybdenum or tungsten, molybdenum mixture as the second layer.
When the composition graded layer of the layer that forms tungstenic and the oxide skin(coating) of tungstenic during as peel ply 1101 and 1102, form the layer of tungstenic, and on it the layer of formation silicon oxide-containing, on the interface between tungsten layer and the silicon oxide layer, form the layer of the oxide of tungstenic like this.In addition, can carry out thermal oxidation, oxygen plasma treatment, use high oxide solution to the surface that contains tungsten layer, as the processing of Ozone Water etc., with the layer of the oxide that forms tungstenic.Can form the layer of nitride, oxynitride and the nitrogen oxide of tungstenic similarly.After formation contains tungsten layer, can be on it formation silicon nitride layer, silicon oxynitride layer and silicon oxynitride layer.
The oxide of tungsten is with WO
xExpression.X is in the scope of 2≤x≤3.When x was 2, the oxide of tungsten was (WO
2), when x was 2.5, the oxide of tungsten was (W
2O
5), when x was 2.75, the oxide of tungsten was (W
4O
11), when x was 3, the oxide of tungsten was (WO
3).In the process of the oxide that forms tungsten, described x value does not limit especially, and can determine according to etch rate etc.In oxygen, utilize the layer of the oxide of the formed tungstenic of sputtering method to have optimum etch rate (WO
x, 0≤x≤3).Therefore, preferably utilize sputtering method in oxygen, to form the layer of oxide of tungstenic to shorten manufacturing time.
In above-mentioned steps, peel ply 1101 and 1102 and described substrate be formed in contact, but the present invention is not limited to this.Can form insulating barrier contiguously with substrate 1100, and peel ply 1101 and 1102 are set in contact with this insulating barrier as basal layer.
Next, form insulating barrier 1105, make it shown in Fig. 9 B, cover peel ply 1101 and 1102 as basal layer.Utilize known method (sputtering method, plasma CVD method etc.), form this insulating barrier 1105 with the individual layer or the laminated layer of the nitride of siliceous oxide or silicon.The oxide material of silicon is the material of siliceous (Si) and oxygen (O), as silica, silicon oxynitride, silicon oxynitride.The nitride material of silicon is siliceous and the material of nitrogen (N), as silicon nitride, silicon oxynitride, silicon oxynitride.As the insulating barrier of basal layer as preventing that impurity from entering the barrier film of substrate.
Next, on insulating barrier 1105, form noncrystal semiconductor layer (layer that for example, contains amorphous silicon).This noncrystal semiconductor layer forms by known method (sputtering method, LPCVD method, plasma CVD method etc.), and thickness is that 25～200nm (is preferably 30～150nm).Next, on insulating barrier 1105, form noncrystal semiconductor layer (layer that for example, contains amorphous silicon).This noncrystal semiconductor layer forms by known method (sputtering method, LPCVD method, plasma CVD method etc.), and thickness is that 25～200nm (is preferably 30～150nm).Then, utilize known crystallization method (laser crystallization method, the thermal crystallisation method of using RTA or annealing furnace, the thermal crystallisation method of using the metallic element that promotes crystallization, use promote the method that the thermal crystallisation method of the metallic element of crystallization combines with laser crystallization etc.) to make the noncrystal semiconductor layer crystallization, to obtain crystalline semiconductor layer.Then, with the shape of crystalline semiconductor layer etching, to form crystalline semiconductor layer 1127～1130 for expectation.When peel ply 1101 and 1102 is made of tungsten, can utilize above-mentioned heat treatment, peel ply 1101 and 1102 and the interface of insulating barrier 1105 on form the oxide of tungsten.
In order to form crystalline semiconductor layer 1127～1130, at first, utilize plasma CVD method to form the noncrystal semiconductor layer of thickness for 66m.Then, the solution that will contain as the nickel of the metallic element that promotes crystallization remains on the noncrystal semiconductor layer, and noncrystal semiconductor layer applied (500 ℃, one hour) is handled in dehydrogenation and thermal crystallisation is handled (550 ℃, four hours), with the formation crystalline semiconductor layer.Afterwards, improve crystallization by required laser radiation, then with photoetching process, utilize mask that crystalline semiconductor layer is carried out etching, to form crystalline semiconductor layer 1127～1130.
When utilizing the laser crystallization method to form crystalline semiconductor layer 1127～1130, use continuous oscillation or impulse hunting gas laser or solid state laser.As gas laser, use excimer laser, YAG laser, YVO
4Laser, YLF Lasers device, YAlO
3Laser, amorphous laser, ruby laser, Ti: sapphire laser etc.As solid state laser, used such as with Cr, Nd, Er, Ho, Ce, Co, Ti or Tm doped YAG, YVO
4, YLF, YAlO
3Laser in crystal.
Use to promote the advantage of crystallization of noncrystal semiconductor layer of the metallic element of crystallization to be: crystallization can be at low temperatures, carry out with the short time, and crystallization direction is neat; But its shortcoming is: owing to metallic element is retained in cut-off current is increased, so its characteristic instability.Given this, preferably on crystalline semiconductor layer, form noncrystal semiconductor layer as gettering point.Requirement comprises impurity element as phosphorus and argon as the noncrystal semiconductor layer of gettering point.Therefore, preferably utilize sputtering method to form noncrystal semiconductor layer, make it possible to comprise argon with high concentration.Then, utilize heat treatment (using the thermal annealing of RTA method or annealing furnace etc.) that metallic element is dispersed in this noncrystal semiconductor layer.Next, remove the noncrystal semiconductor layer that contains metallic element.Like this, can reduce or remove the content of the metallic element in crystalline semiconductor layer.
Next, form the insulating barrier that covers crystalline semiconductor layer 1127～1130.This insulating barrier is individual layer or a laminated layer of utilizing the nitride of the oxide that comprises silicon of formation such as plasma CVD method, sputtering method or silicon.Particularly, form or the nitrogen oxide of the layer of the layer of siliceous oxide, siliceous oxynitride, containing silicon layer individual layer or laminated layer.
Then, lamination first conductive layer and second conductive layer on insulating barrier.This first conductive layer utilizes plasma CVD method and sputtering method to form, and its thickness is 20～100nm.Second conductive layer is to utilize known method to form, and its thickness is 100～400nm.First conductive layer and second conductive layer are by a kind of element of selecting from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminium (Al), copper (Cu), chromium (Cr), niobium (Nd) etc. or to comprise with above-mentioned element be that the alloy material or the compound-material of essential element forms.Also can use to have mixed as semi-conducting material such as the polysilicon of the impurity element of phosphorus etc. as representative.
The combination of first conductive layer and second conductive layer is tantalum nitride (TaN) layer and tungsten (W) layer, tungsten nitride (WN) layer and tungsten layer, molybdenum nitride (MoN) layer and molybdenum (Mo) layer etc.Because tungsten and tantalum nitride have high thermal resistance, therefore can after forming first conductive layer and second conductive layer, be used for the heat treatment of thermal activation.
Next, utilize photoetching process to form Etching mask, utilize this Etching mask to form gate electrode then by etching method.So, form conductive layer (being sometimes referred to as gate electrode layer) 1107～1110 as gate electrode.
Then, can utilize ion doping method or ion implantation, add in the crystalline semiconductor layer 1127～1130 with low concentration, form n type extrinsic region by the impurity element that will give n type conductivity.The impurity element of giving n type conductivity can be the element that belongs in the 15th group of the periodic table of elements, as phosphorus (P), arsenic (As) etc.In addition, can form p type extrinsic region by the impurity element that p type conductivity is given in interpolation.This impurity element of giving p type conductivity can be boron (B) etc. for example.
Then, form insulating barrier to cover above-mentioned insulating barrier and conductive layer 1107～1110.This insulating barrier is formed by the individual layer or the laminated layer that comprise such as the layer (sometimes, being also referred to as inorganic layer) of inorganic material such as silicon, Si oxide or silicon nitride and comprise, constitute as the layer (being also referred to as organic layer sometimes) of organic materials such as organic resin.Preferably, form the insulating barrier of Si oxide.
Then, the contacted insulating barrier 1115～1118 in side of formation and conductive layer 1107～1110 (after, be called side wall insulating layer) (shown in Fig. 9 B).This side wall insulating layer 1115～1117 mixes to form the mask of source region and drain region as being used to afterwards.
The etch step that is used to form side wall insulating layer 1115～1118 is also carried out etching to insulating barrier, therefore, has formed gate insulation layer 1119～1122.This gate insulation layer 1119～1122 and conductive layer 1107～1110 and side wall insulating layer 1115～1118 overlaids.Like this and since the material of gate insulation layer have with the identical etch rate of side wall insulating layer 1115～1118, so this gate insulation layer is etched shown in Fig. 9 B like that.Therefore, when the material of gate insulation layer and side wall insulating layer 1115～1118 had different etch rates, insulating barrier can be held after the etch step that is used to form side wall insulating layer 1115～1118.
Then, use side wall insulating layer 1115～1118 as mask, the impurity element of giving n type conductivity is applied in the crystalline semiconductor layer 1127～1130, to form n type extrinsic region (being also referred to as a LDD zone) 1123a～1123d and the 2nd n type extrinsic region (being also referred to as source region or drain region) 1124a～1124d.The one n type extrinsic region 1123a～1123d has the low impurity element concentration than the 2nd n type extrinsic region 1124a～1124d.
The one n type extrinsic region 1123a～1123d can form with two kinds of methods.In one approach, gate electrode has the laminated structure more than or equal to 2 layers, and gate electrode is carried out conical surface etching or anisotropic etching, and the conductive layer of the lower floor of formation gate electrode is used mask.In another method, with side wall insulating layer as mask.Thin-film transistor has GOLD (the overlapping lightly doped drain of grid) structure.The present invention both can use the former method also can use the latter's method.But, when using side wall insulating layer, be easy to control the width in LDD zone as the latter's of mask method, can accurately form the LDD zone.
By above-mentioned steps, formed n type TFT 1131～1134.
Each of n type TFT 1131～1134 has the LDD structure, and comprise the active layer with a n type extrinsic region (being also referred to as the LDD zone), the 2nd n type extrinsic region (being also referred to as source region or drain region) and active layer, gate insulation layer with channel formation region, as the conductive layer of gate electrode.
Next, form the insulating barrier of individual layer or laminated layer, to cover TFT 1131～1134.The insulating barrier that covers TFT 1131～1134 be utilize that known method (as SOG method, drop method for releasing etc.) forms such as inorganic material layer such as silica, silicon nitride and such as the individual layer or the laminated layer of organic materials such as polyimides, polyamide, benzocyclobutene, propylene, epoxy, siloxanes.The material of siloxy group be for example have silicon oxygen bond skeleton and at least with hydrogen as substituent material; Or have the share price of silicon oxygen bond and a kind of with in fluoride, alkyl group, the aromatic hydrocarbon at least as substituent material.
Shown in cross-section structure in, two insulating barrier phase laminations are to cover TFT 1131～1134.Formation comprises the layer of silicon nitride as first insulating barrier 1142, and formation comprises the layer of silica as second insulating barrier 1141.In addition, also can on second insulating barrier, form comprise silica the layer as the 3rd insulating barrier.
Before forming insulating barrier 1141 and 1142, or after the one or more films that form insulating barrier 1141 and 1142, can heat-treat, add impurity element and this semiconductor layer of hydrogenation in the semiconductor layer to the crystallinity, the activation that recover semiconductor layer.This heat treatment can be thermal annealing method, laser annealing method, RTA method etc.
Then, shown in Fig. 9 C, utilize photoetching process that insulating barrier 1141 and 1142 is carried out etching, to form contact hole 1143～1150, to expose the 2nd n type extrinsic region 1124a～1124d's.
Next, form conductive layer with filling contact hole 1143～1150.Then, shown in Fig. 9 D, with this conductive layer patternization, to form conductive layer 1154～1162.Conductive layer 1155～1162 is as source wiring or the drain electrode wiring of TFT, and conductive layer 1154 is as antenna.
In the conductive layer 1154～1162 each for example, by the composition graded layer that comprises barrier layer, aluminium silicon (Al-Si) layer and barrier layer, or comprises that the composition graded layer on barrier layer, aluminium silicon (Al-Si) layer, titanium nitride (TiN) layer and barrier layer forms.The barrier layer comprises titanium, titanium nitride, molybdenum or molybdenum nitride.The aluminium of low-resistance cheapness and aluminium silicon are the preferred materials that is used to form conductive layer 1154～1162.By the layer of barrier layer as the upper and lower is set, can prevent the hillock of aluminium and aluminium silicon.By the barrier layer of lower floor is set, can between crystalline semiconductor layer and aluminium and aluminium silicon, obtain excellent contact.By forming titanium barrier layer as high reduction elements, can reduce the natural oxide film that on crystalline semiconductor layer, forms, therefore, can access with the good of crystalline semiconductor layer and contact.
Next, shown in Fig. 9 E, form the insulating barrier 1163 of individual layer or laminated layer, to cover conductive layer 1154～1162.The insulating barrier 1163 that covers conductive layer 1154～1162 can be by forming with transistorized insulating barrier 1142 similar methods of cover film and material.Next, in the insulating barrier 1163 that covers conductive layer 1154～1162, form contact hole, thereby form first conductive layer 1164.This conductive layer 1164 is as first conductive layer of the memory element that forms after a while.Form this first conductive layer, with cover film transistor 1132.
Then, after the insulating barrier 1165 that forms the marginal portion that covers first conductive layer 1164, form organic compound layer or the phase change layer 1166 and second conductive layer 1167.This first conductive layer 1164, organic compound layer or phase change layer 1166 and second conductive layer 1167 constitute memory element 1169.Afterwards, form insulating barrier 1168.This insulating barrier 1168 can be as the carbon containing of DLC (diamond-like-carbon) the layer, silicon nitride comprising the layer, contain silicon oxynitride the layer, contain organic material (being preferably epoxy resin) the layer.This insulating barrier might not be provided with as protective layer.By forming the thick-layer that the includes organic compounds (thickness that typically has 50～100 μ m as insulating barrier 1168, preferred 5～50 μ m, 5～10 μ m more preferably), a plurality of elements on substrate 1100 heavily to being enough to prevent that element is scattered and the distortion of element from substrate 1100, therefore can prevent element fracture and damage.Below, the layer that will comprise TFT 1131～1134 and memory element 1169 is called and comprises a plurality of transistorized element cambium layer 1170.
It is the drop method for releasing formation of representative that the organic compound layer of memory element can utilize with the ink-jet method.By using the drop method for releasing, can improve the utilance of material, and therefore the manufacture method of the semiconductor device with simple manufacturing step can be provided.The manufacture method of the semiconductor device that can shorten manufacturing time and reduce cost can be provided in addition.
Next, utilize photoetching process that insulating barrier 1105,1141,1142,1163,1165 and 1168 is carried out etching,, thereby form opening portion 1171 and 1172 with exposure peel ply 1101 and 1102.
Then, shown in Figure 10 B, in opening portion 1171 and 1172, add etching agent, thereby remove peel ply 1101 and 1102.The etching agent that is used for wet etching can be water and ammonium fluoride dilute hydrofluoric acid and the mixture that obtains; The mixture of hydrofluoric acid and nitric acid; The mixture of hydrofluoric acid, nitric acid and acetic acid; The mixture of hydrogen peroxide and sulfuric acid; The mixture of hydrogen peroxide, water soluble ammonium solution and water; The mixture of hydrogen peroxide, hydrochloric acid and water etc.The etching agent that is used for dry etching can be atom and molecule or the oxygen containing gas that comprises halogen radical as fluoride etc.The gas of compound or liquid are as etching agent between preferred use fluorinated halogen or halogen.For example, use chlorine trifluoride (ClF
3) as the gas of fluorinated halogen.
Next, shown in Figure 10 C, the surface that will have the memory element that comprises a plurality of transistorized element cambium layer 1170 is adhered on the substrate 1181, will comprise a plurality of transistorized element cambium layer 1170 then and peel off (referring to the profile of Figure 11 A) fully from substrate 1100.
Then, shown in Figure 11 B, it is bonding with substrate 1183a to use adhesive 1182a will comprise another surfaces of a plurality of transistorized element cambium layer 1170.
This substrate 1183a can use the similar material of the substrate 200a shown in the 1st execution mode to constitute.
Next, utilize cutter sweep, laser irradiation device etc. bonding mutually to comprise a plurality of transistorized element cambium layer 1170 and substrate 1181 cuts.
By above-mentioned steps, can provide to have the semiconductor device that carries out data communication function non-contactly.
In addition, after bonding, cut finishing semiconductor device, but the present invention is not limited to this comprising a plurality of transistorized element cambium layer 1170 and substrate 1183.Element cambium layer 1170 and substrate 1181 can be carried out bonding cutting then, substrate 1183 can be adhered on the element cambium layer 1170 then.
Like this, compact, thin and light and flexible semiconductor device of the present invention can be realized various application, even and with its attached to object on the time can not cause interference to the design of object yet.
The 7th execution mode
With reference to accompanying drawing 26A, 27A and 27B, the structure of the semiconductor device of present embodiment is described.
With reference to accompanying drawing 26A, the perspective view of the semiconductor device of present embodiment is described.Shown in Figure 26 A, the semiconductor device of present embodiment has a plurality of transistors and memory element is integrated in structure on the substrate.Here, formed the element cambium layer 101b that comprises a plurality of transistors and memory element and be arranged on the element cambium layer 107b that comprises antenna on the substrate 108.This element cambium layer 101b that comprises a plurality of transistors and memory element typically comprises the zone 102 that has a plurality of TFT respectively and 103 and the zone 104 that comprises memory element.In addition, the element cambium layer 107b that comprises as the conductive layer 105 of antenna is formed on the substrate 108b.Conductive layer 105 is attached to the back side of the element cambium layer 101b that comprises a plurality of transistors and memory element.Here, the back side that comprises the element cambium layer 101b of a plurality of transistors and memory element is the surface that has exposed insulating barrier.
Next, with reference to Figure 27 A and 27B, the cross-section structure with semiconductor device of structure shown in Figure 26 A is described.Substrate 100b is arranged on the element cambium layer 101b that comprises a plurality of transistors and memory element.Here, the shown element cambium layer 101b that comprises a plurality of circuit is, constitute the TFT 111 (part in the zone that comprises memory element 104 shown in Figure 26 A) of the circuit of operation store element, the switching TFT 112 of memory element (part in the zone that comprises memory element 104 shown in Figure 26 A), formation is such as power circuit, clock generation circuit, data demodulation/modulation circuit etc. are used to handle by the TFT 113 (part in the zone that comprises a plurality of TFT 102 shown in Figure 26 A) of the circuit of the received signal of antenna and the TFT 114 (part in the zone that comprises a plurality of TFT 103 shown in Figure 26 A) of formation such as control circuit and interface circuit.
Comprise the element cambium layer 101b of a plurality of transistors and memory element and comprise the element cambium layer 107b of antenna bonding by adhesive layer 106.More specifically, insulating barrier 115 is bonding by adhesive layer 106 with the element cambium layer 107b that comprises antenna.In addition, as the conductive layer 124c of the source wiring of the TFT 113 in element cambium layer 101b or drain electrode wiring, be electrically connected by the conductive particle 109 of adhesive layer 106 as the conductive layer 125b of the antenna of element cambium layer 107b.
In addition, insulating barrier 123 is set, makes it cover TFT 111～114 and as the insulating barrier 122 of passivating film.Form insulating barrier 123 to obtain smooth surface.Conductive layer 124a～124d as source wiring or drain electrode wiring is connected with drain region 119a～119d with the source region respectively, and is filled with the contact hole in insulating barrier 123.Pass insulating barrier 115,122 and 123 as one of the source wiring of TFT 113 or conductive layer 124c of drain electrode wiring, and be exposed to the back side of element cambium layer 101b.
Insulating barrier 126 and 127 are set, make it cover conductive layer 124a～124d and 125b.These insulating barriers 126 and 127 are set, to obtain smooth surface and to protect TFT 111～114 and conductive layer 124a～124d and 125b.
First conductive layer 131, organic compound layer or phase change layer 132 and second conductive layer 133, lamination is on insulating barrier 127 in this order.This laminated structure is corresponding to memory element 134.Insulating barrier 135 is arranged between the organic compound layer or phase change layer 132 of adjacency.First conductive layer 131 is connected on the conductive layer 124b as the source wiring of TFT 112 or drain electrode wiring.Insulating barrier 136 is arranged on the conductive layer 133.TFT 112 is as the switching TFT that also is provided with the memory element of switching TFT.Utilize this structure, the semiconductor device with active matrix memory circuit is provided.
Next, with reference to accompanying drawing 27B, describe comprising the cross-section structure that memory element that switching transistor is not set with the cross-section structure of the semiconductor device that replaces having transistorized memory element, promptly comprises the semiconductor device of passive matrix memory circuit.More specifically, to describing with the memory element 154 of different structure was compared, had to the semiconductor device shown in Figure 27 A the cross-section structure of semiconductor device.
On insulating barrier 127, be provided with: first conductive layer 151 that is connected with conductive layer 124a as the source wiring of TFT 111 or drain electrode wiring, the organic compound layer or the phase change layer 152 that are connected with first conductive layer 151 are with second conductive layer 153 that is connected with organic compound layer or phase change layer 152.The laminated structure of first conductive layer 151, organic compound layer or phase change layer 152 and second conductive layer 153 is corresponding to memory element 154.Insulating barrier 155 is arranged between adjacent organic compound layer or the phase change layer 152.Insulating barrier 156 is arranged on the memory element 154.
Semiconductor device according to the invention forms the cambial step of element comprise a plurality of transistors and memory element and forms the cambial step of element as the conduction of antenna and can walk abreast independently and carry out.Therefore, semiconductor device can be made at short notice efficiently.After having formed antenna and having comprised a plurality of transistorized element cambium layer, the performance of each circuit is detected and sorting, will comprise a plurality of transistorized element cambium layer and antenna then and be electrically connected, to finish semiconductor device.Therefore, the ratio of defects that can suppress to make, improve rate of finished products.
The 8th execution mode
In the present embodiment, the cross-section structure with of the present invention semiconductor device different with the structure of above-mentioned execution mode is described.More specifically, to comparing, on substrate 200b, formed the element cambium layer 202b that comprises memory element with the semiconductor device of Figure 27 A and 27B but not the cross-section structure that adheres to the semiconductor device of the conductive layer that comprises antenna describe.
The semiconductor device of present embodiment has with resin bed will comprise a plurality of transistorized element cambium layer 201b that is arranged on the first substrate 100b and the bonding structure of element cambium layer 202b that comprises the memory element that is formed on the substrate 200b.
Here, comprise a plurality of transistorized element cambium layer 201b and typically comprise the zone 102 and 103 that has a plurality of TFT respectively and be used as the conductive layer of antenna.The element cambium layer 202a that comprises memory element is made of the zone 104 that comprises memory element.The zone 104 that comprises memory element is connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by not shown conductive particle.
With reference to accompanying drawing 28A and 28B, the cross-section structure of the semiconductor device of the present invention of structure with Figure 26 B is described.
Shown in Figure 28 A, comprise a plurality of transistorized element cambium layer 201b and be arranged on the substrate 100b.This element cambium layer 201b comprises the TFT 111,113 and 114 that has said structure respectively.Be exposed to the back side as the source wiring of TFT 111 or the conductive layer 124a of drain electrode wiring.
In addition, the element cambium layer 202b that comprises memory element is formed on the substrate 200b.It is bonding by adhesive layer 106 with the element cambium layer 202b that comprises memory element to comprise a plurality of transistorized element cambium layer 201b.Particularly, insulating barrier 115 is bonding by adhesive layer 106 with the element cambium layer 202b that comprises memory element.In Figure 28 A, each of memory element 234a and 234b is connected with 212b with switching TFT 212a respectively.That is, a side of the source wiring of switching TFT 212a and 212b or drain electrode wiring is connected with 231b with the first conductive layer 231a respectively.The source wiring of switching TFT 212a and 212b or the opposite side of drain electrode wiring are connected on the conductive layer of first conductive layer that forms memory element simultaneously and second conductive layer.Here, the opposite side as the conductive layer 223 of source wiring or drain electrode wiring is connected with conductive layer 226 by conductive layer 225b.The conductive layer 225b while is as first conductive layer 231a and the 231b of memory element 234a and 234b.226 whiles of conductive layer are as second conductive layer 233a and the 233b of memory element 234a and 234b.
Be electrically connected by the conductive particle in the adhesive layer 106 as the conductive layer 223 of the source wiring of the TFT 212a of memory element or drain electrode wiring with as the source wiring of the TFT 111 of the circuit of operation control store element or the conductive layer 124a of drain electrode wiring.
According to the structure of memory element, exist the optical effect utilize laser to write data into situation on the element cambium layer 202b that comprises memory element.At this moment, need to arrange switching TFT 212a, 212b and memory element 234a, 234b, make it not overlapped in comprising the element cambium layer 202b of memory element.
In said structure, comprising the circuit that has formed the operation store element on a plurality of transistorized element cambium layer 201b, but the present invention is not limited to this.For example, the TFT 111 of the circuit of formation operation store element can be formed on the element cambium layer 202b that comprises memory element.Particularly, shown in Figure 31 A, after memory element 234a and 234b, formation constituted the circuit TFT 511 of operation store element, the element cambium layer 502b that can utilize adhesive layer 106 will comprise memory element was attached on this substrate 500b with the element cambium layer 501b that comprises a plurality of transistors and antenna on substrate 500b.At this moment, the conductive layer 526 that is connected with one of the source wiring of the TFT 511 of the circuit that constitutes the operation store element or drain electrode wiring 524, be electrically connected by conductive particle 109 with one of the source wiring of TFT 114 or drain electrode wiring 124d.Conductive layer 526 by conductive layer 525 and TFT 511 source wiring or drain electrode wiring 524 in one be connected.526 whiles of conductive layer are as second conductive layer of memory element.525 whiles of conductive layer are as first conductive layer of memory element.
In Figure 28 A, the element cambium layer 202b that comprises memory element is formed on the substrate 200b, but also can be shown in Figure 31 B, it is bonding to utilize the adhesive layer 513 that is inserted between element cambium layer 202b and the substrate 512b will comprise the element cambium layer 202b and the substrate 512b of memory element.Particularly, after peel ply being set on the substrate and formation comprises a plurality of transistorized element cambium layer 202b on this peel ply, to comprise a plurality of transistorized element cambium layer 202b and peel off from peel ply, and can utilize the adhesive layer 513 that is inserted between this element cambium layer 202b and the substrate 512b will comprise a plurality of transistorized element cambium layer 202b and substrate 512b bonding.Can use the described stripping means of the 1st execution mode arbitrarily.
In addition, as substrate 512b, can use similar material with substrate 200a.The adhesive of heat reactive resin, ultraviolet curable resin, epoxy resin-matrix and resin additive can be used as adhesive layer 513.
As mentioned above, be adhered on flexible, the gossamery plastic, can provide light and the semiconductor device that approaches and be difficult for breaking when dropping by a plurality of transistorized element cambium layer that comprise that will be peeled off.In addition, this flexibility makes semiconductor device can be adhered to curved surface or erose surface, causes various application.For example, can be with semiconductor device close attachment of the present invention to as on the curved surfaces such as medicine bottle.If reuse this substrate, then can reduce the manufacturing cost of semiconductor device.
Semiconductor device according to the invention, form comprise the cambial step of a plurality of transistorized elements and to form the cambial step of element that comprises memory element can be simultaneously, carry out independently.Therefore, can make semiconductor device at short notice efficiently.After each element cambium layer that comprises a plurality of transistors or memory element forms, the performance of each circuit is detected and sorting, can be electrically connected to finish the manufacturing of semiconductor transistor comprising a plurality of transistorized element cambium layer then.Therefore, the ratio of defects that can suppress to make improves rate of finished products.
The 9th execution mode
In the present embodiment, the cross-section structure to semiconductor device of the present invention with the structure that is different from described execution mode describes.More specifically, the cross-section structure that the substrate with the layer that will comprise have formed memory element and antenna thereon is adhered to the semiconductor device that comprises the structure on the cambial back side of a plurality of transistorized elements describes.
Shown in Figure 26 C, the semiconductor device of present embodiment has a plurality of transistorized element cambium layer 301b that utilizes adhesive layer to comprise to be arranged on the substrate 100b and comprises the memory element that is arranged on the second substrate 300b and the bonding structure of element cambium layer 302b of antenna.
Here, comprise a plurality of transistorized element cambium layer 301b and typically comprise the zone 102 and 103 that has a plurality of TFT respectively.The element cambium layer 302b that comprises memory element and antenna is by comprising memory element and constituting as the zone 104 of the conductive layer 105 of antenna.The zone 104 that comprises memory element is connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by not shown conductive particle.In addition, the conductive layer 105 as antenna is connected with the zone 102 that comprises a plurality of TFT that constitute telecommunication circuit by the conductive particle in the not shown adhesive layer.
With reference to Figure 29 A and 29B, the cross-section structure of semiconductor device with the structure shown in Figure 26 C is described.
Shown in Figure 29 A, the element cambium layer 301b that comprises a plurality of TFT comprises the TFT 111,113 and 114 with said structure.Comprise as the conductive layer 325 of antenna and the element cambium layer 302b of memory element 324 and be formed on the substrate 300b.In Figure 29 A, switching TFT 312 is connected with memory element 334.That is, be connected with first conductive layer of memory element 334, thereby constitute active matrix stores circuit as one of the source wiring of switching TFT 312 or conductive layer 324 of drain electrode wiring.
Be connected on the conductive layer of first or second conductive layer that forms memory element simultaneously as another of the conductive layer 324 of the source wiring of switching TFT or drain electrode wiring.Here, be connected with conductive layer 326 by conductive layer 225b as another of the conductive layer 324 of the source wiring of switching TFT 312 or drain electrode wiring.The conductive layer 225b while is as first conductive layer of memory element.Conductive layer 326 is simultaneously as second conductive layer of memory element, and as splicing ear.
In addition, utilize the adhesive layer 106 comprise conductive particle 109, the back side of element cambium layer 301b that will comprise a plurality of TFT is bonding with the element cambium layer 302b that comprises memory element and antenna.That is, utilize the adhesive layer 106 that comprises conductive particle 109, insulating barrier 115 is bonding with the element cambium layer 302b that comprises memory element and antenna.Be exposed to the back side as the source wiring of TFT 113 or the conductive layer 124c of drain electrode wiring.Like this, be electrically connected with the conductive layer 325 that is used as antenna by conductive particle 109 as the source wiring of TFT 111 or the conductive layer 124a of drain electrode wiring.
In addition, form first conductive layer or second conductive layer of memory element 334 simultaneously as the conductive layer 325 of antenna.Conductive layer 325 passes through conductive particle 109 and is electrically connected as the source wiring of TFT 113 or the conductive layer 124c of drain electrode wiring.Conductive layer 325 forms simultaneously with conductive layer 326.
According to the structure of memory element, exist the optical effect utilize laser to write data into situation in the memory element 334.At this moment, require conductive layer 325 and switching TFT 312 are arranged, make its not with the element cambium layer 302b that comprises memory element in the memory element overlaid.
Memory element 334 shown in Figure 29 A is the memory elements that comprise switching TFT 312.Shown in Figure 29 B, also can the substrate 300b that have as antenna conductive layer 525 is bonding with the memory element 354 with first conductive layer 351, organic compound layer or phase change layer 352 and second conductive layer 353.
The TFT 111 that constitutes the circuit of operation store element is formed on and comprises among a plurality of transistorized element cambium layer 301b, but the present invention is not limited to this.The TFT that constitutes the circuit of operation store element also can be formed among the element cambium layer 302b that comprises memory element.In Figure 29 A, the element cambium layer 302b that comprises memory element and antenna is formed on the substrate 300b, but the element cambium layer 302b that comprises memory element and antenna also can be bonded on the substrate 300b by adhesive layer.
Semiconductor device according to the invention, form comprise the cambial step of a plurality of transistorized elements, with form the cambial step of element that comprises memory element and antenna and can carry out independently simultaneously.Therefore, can make semiconductor device at short notice efficiently.When formed comprise a plurality of transistorized element cambium layer and comprise the element cambium layer and antenna of memory element after, performance to each circuit detects and sorting, the element cambium layer that will comprise a plurality of transistors, memory element then is electrically connected with the element cambium layer that comprises antenna, to finish the manufacturing of semiconductor device.Therefore, can suppress the manufacturing defect rate, thereby improve rate of finished products.
The 10th execution mode
In the present embodiment, the cross-section structure with the semiconductor device of the present invention that is different from described execution mode structure is described.More specifically, with reference to accompanying drawing 26D, 30A and 30B, describe comprising the cross-section structure that a plurality of transistorized element cambium layer 401b are clipped in the substrate with antenna and have a semiconductor device of the structure between the substrate of memory element having.
The semiconductor device of present embodiment have be included in form on the substrate 108b as the element cambium layer 107b of the conductive layer of antenna and be included between the element cambium layer 202b of the memory element that forms on the substrate 200b and clip the structure that comprises a plurality of transistorized element cambium layer 401b.It is bonding with the element cambium layer 202b that comprises as the conductive layer of antenna by adhesive layer to comprise a plurality of transistorized element cambium layer 401b.It is also bonding with the element cambium layer 107b that comprises as the conductive layer of antenna by adhesive layer to comprise a plurality of transistorized element cambium layer 401b.
Here, comprise a plurality of transistorized element cambium layer 401b and typically have the zone 102 and 103 that comprises a plurality of TFT respectively.The element cambium layer 202b that comprises memory element is made of the zone 104 that comprises memory element.The zone 104 that comprises memory element is connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc. by conductive particle in the adhesive layer, not shown.
With reference to accompanying drawing 30A and 30B, the cross-section structure with the semiconductor device of the present invention shown in Figure 26 D is described.
Shown in Figure 30 A, the element cambium layer 202b that comprises memory element is formed on the substrate 200b.It is bonding with the element cambium layer 202b that comprises memory element by the adhesive layer 406 that comprises conductive particle 109 to comprise a plurality of transistorized element cambium layer 401b.Comprise a plurality of transistorized element cambium layer 401b and comprise TFT 111,113 and 114 with said structure.The splicing ear that is connected to as the conductive layer 124a of the source wiring of TFT 111 or drain electrode wiring exposes from the teeth outwards.As the conductive layer 124c of the source wiring of TFT 111 or drain electrode wiring in exposed backside.
In Figure 30 A, switching TFT 212a is connected with 234b with memory element 234a respectively with 212b.Promptly, one of the source wiring of switching TFT 212a and 212b or drain electrode wiring are connected with 231b with the first conductive layer 231a respectively.Another of the source wiring of switching TFT 212a and 212b or drain electrode wiring is connected with 226 with the conductive layer 225b of first or second conductive layer that forms memory element simultaneously.Here, be connected with conductive layer 226 by conductive layer 225b as another of the conductive layer 223 of source wiring or drain electrode wiring.
As the conductive layer 223 of the source wiring of the switching TFT 212a of memory element or drain electrode wiring by conductive particle 105 and conductive layer be electrically connected as the source wiring of the TFT 111 of the circuit of formation operation store element or the conductive layer 124a of drain electrode wiring.
It is bonding with the element cambium layer 107b that is included in the last conductive layer 125b that forms of substrate 108b by the adhesive layer 407 that comprises conductive particle 105 to comprise a plurality of transistorized element cambium layer 401b.Be electrically connected with the conductive layer 125b that is used as antenna by the conductive particle in the adhesive layer 407 105 as the source wiring of TFT 113 or the conductive layer 124c of drain electrode wiring.
In the above-described embodiment, the circuit of operation store element is formed on and comprises among a plurality of transistorized element cambium layer 401b, but the present invention is not limited to this.For example, the circuit of operation store element can be formed among the element cambium layer 202b that comprises memory element.
In Figure 30 A, the element cambium layer 202b that comprises memory element is formed on the substrate 200b, but the element cambium layer 202b that comprises memory element also can be adhered on the substrate by adhesive layer.
Semiconductor device according to the invention forms to comprise the cambial step of a plurality of transistorized elements, form the cambial step of element that comprises memory circuit and to form step as the conductive layer of antenna and can walk abreast independently and carry out.Therefore, can make semiconductor device at short notice efficiently.Behind the element cambium layer that has formed the conductive layer that comprises a plurality of transistors, memory element and be used as antenna, performance to each circuit detects and sorting, then each the element cambium layer that comprises a plurality of transistors, memory element etc. respectively is electrically connected, to finish semiconductor device.Therefore, can suppress the manufacturing defect rate, thereby improve rate of finished products.
The 11st execution mode
In the present embodiment, the cross-section structure to semiconductor device of the present invention with structure different from the embodiment described above describes.More specifically, with reference to Figure 26 E and 32, describe having comprising the cross-section structure that is formed with the semiconductor device of the structure that is formed with element cambium layer 601b and 602b on element cambium layer 602b that comprises memory element and substrate 108b on a plurality of transistorized element cambium layer 601b with antenna.
The semiconductor device of present embodiment has the bonding structure of substrate 108b of utilizing adhesive layer will comprise a plurality of transistorized element cambium layer 601b and having formed antenna thereon.In addition, the semiconductor device of present embodiment has and utilizes element cambium layer 602b that adhesive layer will comprise memory element and comprise the bonding structure of a plurality of transistorized element cambium layer 601b.
Here, comprise a plurality of transistorized element cambium layer 601b and typically comprise the zone 102 and 103 that comprises a plurality of TFT respectively and be used as the conductive layer 105 of antenna.The element cambium layer 602b that comprises memory element is made of the zone 104 that comprises memory element.The zone 104 that comprises memory element is electrically connected with the zone 103 that comprises a plurality of TFT that constitute control circuit, interface circuit etc.
With reference to Figure 32, the cross-section structure with semiconductor device of the present invention of structure shown in Figure 26 E is described.
Shown in figure 32, the element cambium layer 601b that comprises a plurality of TFT comprises the TFT 111,113 and 114 with said structure.In addition, utilize adhesive layer 611, the insulating barrier 621b that has formed the element cambium layer 602b that comprises memory element thereon is installed on the insulating barrier 615.
Utilize adhesive layer 106, it is bonding with the element cambium layer 107b that comprises antenna to comprise a plurality of transistorized element cambium layer 601b.Particularly, utilize adhesive layer 106, insulating barrier 115 is bonding with the element cambium layer 107b that comprises antenna.Be electrically connected with the conductive layer 125b that is used as antenna among the element cambium layer 107b by the conductive particle 109 in the adhesive layer 106 as the conductive layer 124c of source wiring that comprises the TFT 113 among a plurality of transistorized element cambium layer 601b or drain electrode wiring.
In Figure 32, switching TFT 112 is connected with memory element 634.Promptly, one of the source wiring of switching TFT 112 or drain electrode wiring is connected with first conductive layer of memory element 634.Another of the source wiring of switching TFT 112 or drain electrode wiring is connected with the conductive layer of first or second conductive layer that forms memory element simultaneously.Here, be connected with conductive layer 626 by conductive layer 625 as another of the conductive layer 124b of source wiring or drain electrode wiring.625 whiles of conductive layer are as first conductive layer of memory element.Conductive layer 626 is simultaneously as second conductive layer of memory element, and as splicing ear.
The switching TFT 112 of the memory element 634 that forms in comprising the element cambium layer 602b of memory element is electrically connected by the TFT 111 of the circuit of the formation operation store element that forms among electric conducting material 631 and the element cambium layer 601b that is comprising a plurality of TFT.
In the present embodiment, the element cambium layer 602 that comprises memory element is installed on the element cambium layer 601, but the present invention is not limited to this.The element cambium layer that comprises the element cambium layer of memory element and antenna or comprise antenna also can be installed on the element cambium layer 601.
Semiconductor device according to the invention, the layer that comprises memory element is being comprised on the element cambium layer of a plurality of TFT by lamination.Therefore, can provide compact semiconductor device.In addition, form to comprise the cambial step of a plurality of transistorized elements, form the cambial step of element that comprises memory element and to form step as the conductive layer of antenna and can walk abreast independently and carry out.Thereby can make semiconductor device at short notice efficiently.Comprise the element cambium layer of a plurality of transistors and memory element when formation after, the performance of each circuit is detected and sorting, the element cambium layer that will comprise a plurality of transistors and memory element then is electrically connected, to finish the manufacturing of semiconductor device.Therefore, the ratio of defects that can suppress to make, thus improve rate of finished products.
The 12nd execution mode
In the present embodiment, with reference to accompanying drawing, the manufacture method of semiconductor device is described.Here, the manufacture method of the semiconductor device of the 7th execution mode among Figure 27 A is described, but present embodiment can be applied to the semiconductor device in each execution mode.
Shown in Figure 34 A, similar with execution mode 6, on a surface of substrate 1100, form peel ply 1101 and 1102.
Next, similar to the 6th execution mode shown in Figure 34 B, form insulating barrier 1105 as substrate to cover peel ply 1101 and 1102.After on insulating barrier 1105, forming noncrystal semiconductor layer, utilize known crystallization method to make the noncrystal semiconductor layer crystallization, to form crystalline semiconductor layer.Afterwards, with the shape of crystalline semiconductor layer etching, to form crystalline semiconductor layer 1127～1130 for expectation.Then, form gate insulation layer, to cover crystalline semiconductor layer 1127～1130.Next, with the first and second conductive layer laminations on gate insulation layer.Utilize photoetching process to form Etching mask, and it is carried out etching processing with the formation gate electrode, thereby form conductive layer 1107～1110.Next, utilize ion doping method or ion implantation, the impurity element of giving n conductivity is added in the crystalline semiconductor layer 1127～1130 with low concentration, form n type impurity range thus.Then, form insulating barrier 1141, to cover above-mentioned insulating barrier and conductive layer 1107～1110.
Next, similar to the 6th execution mode, utilize the anisotropic etching method, mainly selectively insulating barrier is carried out etching in vertical direction, thus the contacted side wall insulating layer 1115～1118 in side of formation and conductive layer 1107～1110.Utilize the etch step that forms side wall insulating layer 1115～1118, insulating barrier also is etched, thereby forms gate insulation layer 1119～1122.Then, with side wall insulating layer 1127～1130 as mask, the impurity element of giving n type conductivity is added in the crystalline semiconductor layer 1127～1130, thereby form n type impurity range (being also referred to as a LDD district) 1123a～1123d and the 2nd n type impurity range (being also referred to as source region or drain region) 1124a～1124d.The one n type impurity range 1123a～1123d comprises the low impurity concentration of impurity concentration than the 2nd n type impurity range 1124a～1124d.
By above-mentioned steps, form n type TFT 1131～1134.
Then, form insulating barrier 1142, to cover TFT 1131～1134 with individual layer or laminated layer.
Next, similar to the 6th execution mode, shown in Figure 34 C, utilize photoetching process etching insulating barrier 1141～1142, thereby form the contact hole 1143～1150 that exposes n type impurity range 1124a～1124d.At this moment, because insulating barrier 1105 and insulating barrier 1141～1142 all be etched, so contact hole 1151 exposes the part of substrate 1101.
Then, shown in Figure 34 D, form conductive layer with filling contact hole 1143～1151, and with this conductive layer patternization to form conductive layer 1155～1162.Conductive layer 1155～1162 is as source wiring or the drain electrode wiring of TFT.Conductive layer 1159 arrives the surface of substrate.Conductive layer 1159 does not contact with 1102 with peel ply 1101, but contacts with 1142 with insulating barrier 1105,1141.Therefore, when utilizing etching agent to remove peel ply 1101 and 1102, conductive layer 1159 agent that can not be etched is removed.
Next, similar to the 6th execution mode shown in Figure 34 E, form insulating barrier 1163 with individual layer or laminated layer, to cover conductive layer 1155～1162.The insulating barrier 1163 that covers conductive layer 1155～1162 can utilize with transistorized insulating barrier 1142 similar methods of cover film and material and form.Then, in the insulating barrier that covers conductive layer 1154～1162, form contact hole, form conductive layer 1164 then.Conductive layer 1164 is as first conductive layer of the memory element that forms after a while.
Next, after the insulating barrier 1165 that forms the marginal portion that covers conductive layer 1164, form organic compound layer or phase change layer 1166 and conductive layer 1167.Conductive layer 1164, organic compound layer or phase change layer 1166 and conductive layer 1167 constitute memory element 1169.Conductive layer 1164 is as first conductive layer of memory element 1169.Afterwards, can form insulating barrier 1168.
Then, shown in Figure 35 A, utilize photoetching process, insulating barrier 1105,1141,1142,1163 and 1168 is carried out etching,, thereby be similarly constructed opening portion 1171 and 1172 with the 6th execution mode with exposure peel ply 1101 and 1102.
Then, shown in Figure 35 B, etching agent is put in opening portion 1171 and 1172, thereby similarly peel ply 1101 and 1102 is removed with the 6th execution mode.
Then, shown in Figure 35 C, the surface that will have the memory element that comprises a plurality of transistorized element cambium layer 1170 is adhered on the substrate 1181, similarly will comprise a plurality of transistorized element cambium layer 1170 with the 6th execution mode then and peel off (referring to the cross-section structure of Figure 36 A) fully from substrate 1100.
Next, shown in Figure 36 B, another surface that will comprise a plurality of transistorized element cambium layer 1170 is adhered on the substrate 1183b with conductive layer 1182b.At this moment, use the adhesive layer 1191 that comprises conductive particle 1900.In addition, it is bonding with substrate 1183b to comprise a plurality of transistorized element cambium layer 1170, so that contact by conductive particle 1190 with conductive layer 1182b on the substrate 1183b as the conductive layer 1159 of the source wiring of TFT 1133 or drain electrode wiring.
Then, utilize cutter sweep, laser irradiation device etc., mutual bonding comprise a plurality of transistorized element cambium layer 1170 and substrate 1181 and 1183b are cut.
By above-mentioned steps, provide semiconductor device with function of transmitting data non-contactly.
In addition, cut after bonding finishing the manufacturing of semiconductor device will comprising a plurality of transistorized element cambium layer 1170 and substrate 1183, but the present invention is not limited to this.Can be after will comprising the bonding and cutting of a plurality of transistorized element cambium layer 1170 and substrate 1181, the substrate 1183 that will comprise conductive layer 1182b is adhered to and comprises on a plurality of transistorized element cambium layer 1170.
Like this, compact, gossamery, flexible semiconductor device of the present invention can be realized various application, even and it can not disturbed the design of object to some extent attached to time on the object yet.
The 13rd execution mode
Next, with reference to accompanying drawing, the configuration and the operation of the memory circuit in the semiconductor device of the present invention described.Memory circuit of the present invention comprises that memory cell 21 is arranged as rectangular memory cell array 22, decoder 23 and 24, selector 25 and reads/write circuit 26.Memory cell 21 comprises memory element 30 (referring to Figure 12 A).
According to the structure of organic compound layer or phase change layer 29, exist and to utilize optical effect to write data into situation in the memory element 30.At this moment, require in first conductive layer 27 and second conductive layer 28 or all can pass printing opacity.The conductive layer of printing opacity is made of the electric conducting material of for example indium tin oxide printing opacities such as (ITO); Or when not using the electric conducting material of printing opacity, form enough thin so that can printing opacity.
Equivalent circuit figure shown in Figure 12 A is a passive matrix, but also can adopt the active array type (referring to Figure 14 A) that transistor 31 is set in memory cell 21.At this moment, the gate electrode of switching transistor 31 and word line Wy (1≤y≤n) be connected; And in source wiring or the drain electrode wiring one with bit line Bx (1≤x≤m) be connected, and another is connected with a conductive layer of memory element 30.
The exemplary of organic compound layer or phase change layer 29a is an organic compound material.Below, will be called organic compound layer by the layer that organic compound material constitutes.
Organic compound layer can be made of the material with high hole transmission characteristic, aromatic amino (promptly having phenyl ring-nitrogen key) compound typically, as 4,4 '-two (the N-[1-naphthyl]-N-phenyl-amine)-biphenyl (α-NPD), 4,4 '-two (the N-[3-aminomethyl phenyl]-N-phenyl-amine) biphenyl (TPD), 4,4 '; 4 "-three (N, N-diphenyl-amine) triphenylamine (TDATA), 4,4 '; 4 "-three (the N-[3-aminomethyl phenyl]-N-phenyl-amine) triphenylamine (MTDATA), with 4,4 '-two (N-(4-[N, N-two--benzyl amine] phenyl)-N-aniline) biphenyl (DNTPD); The phthalocyanine dye compound is as phthalocyanine dye (H2Pc), copper phthalocyaine dye (CuPc) and vanadyl phthalocyanine dye (VOPc).
In addition, as other organic compound material, also can use material with high electronics transmission characteristic.For example, can use metal complex, as three (oxine) aluminium (Alq with chinoline backbone or benzoquinoline skeleton
3), three (4-methyl-oxine) aluminium (Almq
3), two (10-hydroxy benzenes [h] oxyquinoline) beryllium (BeBq
2), two (2-methyl-oxine)-4-phenyl phenol oxygen-aluminium (BAlq).In addition, also can use metal complex, as two [2-(2-hydroxyphenyl)-benzothiazole] zinc (Zn (BOX) with azoles base or thiazolyl ligand
2) or (abbreviation: Zn (BTZ) of two [2-(2-hydroxyphenyl)-benzothiazole] zinc
2).Except that metal complex, also can use 2-(4-diphenyl)-5-(4-tert-butyl-phenyl)-1,3,4-oxadiazole (PBD), 1,3-two [5-(p-tert-butyl-phenyl)-1,3,4-oxadiazole-2-yl] benzene (OXD-7), 3-(4-tert-butyl-phenyl)-4-phenyl-5-(4-diphenyl)-1,2,4-triazole (TAZ), 3-(4-tert-butyl-phenyl)-4-(4-ethylphenyl)-5-(4-diphenyl)-1,2,4-triazole (p-EtTAZ); Bathophenanthroline (BPhen), bathocuproine (BCP) etc.
As other organic compound material, can use the two cyanogen methylene of 4--2-methyl-6-[-2-(1,1,7,7-tetramethyl-9-julolidine groups)-vinyl]-4H-pyrans (DCJT), the two cyanogen methylene of the 4--2-tert-butyl group-6-[2-(1,1,7,7-tetramethyl-julolidine groups-9-yl)-vinyl]-the 4H-pyrans, periflanthene, 2, the two cyanogen-1 of 5-, 4-two [10-methoxyl group-1,1,7,7-tetramethyl-julolidine groups-9-yl)-vinyl] benzene, N, N?-dimethyl quinoline a word used for translation ketone (DMQd), coumarin 6, cumarin 545T, three (oxine) aluminium (Alq
3), 9,9 '-two anthryls, 9,10-biphenyl anthracene (DPA), 9,10-two (2-naphthyl) anthracene (DNA), 2,5,8,11-four-tert-butyl group perylene (TBP) etc.Have under the situation of layer of light-emitting material forming diffusion, can use following material as the material of base material: anthracene derivant, as 9, two (2-the naphthyl)-2-tert-butyl anthracenes (t-BuDNA) of 10-; Carbazole derivates, as 4,4 '-two (N-carbazyl)-biphenyl (CBP); Or metal complex, as three (oxine) aluminium (Alq
3), three (4-methyl-oxine) aluminium (Almq
3), two (10-hydroxy benzenes [h]-oxyquinoline) beryllium (BeBq
2), two (2-methyl-oxine)-4-phenyl phenol oxygen-aluminium (BAlq), two [2-(2-hydroxyphenyl) pyridinato] zinc (Znpp
2) or two [2-(2-hydroxyphenyl) benzothiazole] zinc (ZnBOX).Material as constituting light-emitting layer 104 separately can use: three (oxine) aluminium (Alq
3), 9,10-two (2-naphthyl) anthracene (DNA) or two (2-methyl-oxine)-4-phenyl phenol oxygen-aluminium (BAlq) etc.
Conductor oxidate or metal oxide can be added in the described organic compound.Particularly, conductor oxidate or metal oxide are molybdenum oxide (MoO
x), vanadium oxide (VO
x), ruthenium-oxide (RuO
x), tungsten oxide (WO
x), cobalt oxide (CO
x), nickel oxide (NiO
x), cupric oxide (CuO
x) etc.In addition, also can use tin indium oxide (ITO), zinc oxide (ZnO) etc.
For organic compound layer, can use the material that changes resistance by optical effect.For example, can use be doped with by absorbing light acidic compound (photosensitive acid agent) grip polymer altogether.As gripping polymer altogether, can use polyacetylene, poly-(phenylene vinylidene), polythiophene, polyaniline, poly-(phenylene vinylene support) etc.As photosensitive acid agent, can use aryl sulfonium salt, aryl salt, nitre benzyl tosyl, aryl sulfonic acid groups acid p-nitre benzyl esters, sulphonyl acetophenone, iron-allene complex compound PF6 salt etc.
Next, the operation that writes data of the memory circuit of subtend with said structure describes.Data are utilized optical effect or electrical effects and are write.Optical effect obtains by the irradiation exterior light, and electrical effects obtains by first conductive layer and second conductive layer are applied the voltage that is higher than regulation.
When writing data " 1 " in memory cell 21, memory cell 21 decoded devices 23,24 and selector 25 are chosen.Particularly, be applied on the word line W3 that is connected with memory cell 21 by the voltage V2 of decoder 24 regulation.Utilize decoder 23 and selector 25, with bit line B3 be connected to read/memory cell 21 that write circuit 26 is connected on.Then, from read/write circuit 25 writes voltage V1 to bit line B3 output.Like this, voltage Vw=V1-V2 is applied between first conductive layer and second conductive layer that constitutes memory cell 21.By suitably selecting voltage Vw, physically or electrically change organic compound layer or the phase change layer 29 that is arranged between the conductive layer, thus the data of writing " 1 ".Particularly, preferably make to become and be far smaller than resistance when having write data " 0 " at the resistance between first and second conductive layers that write after the data " 1 ".For example, (V1, V2) can from (0V, 5～15V) or (3～5V ,-12～-2V) scope is selected.Voltage Vw can for 5～15V or-5～-15V.
Unchecked word line and bit line are controlled, make data " 1 " can be written to memory cell that they are connected in.For example, can unchecked word line and bit line be set to floating dummy status.First conductive layer and second conductive layer need have diode characteristic etc., in view of the above selection wire exactly.
On the other hand, when in memory cell 21, writing data " 0 ", memory cell 21 is not applied electrical effects.In circuit operation, data " 1 " are similar to writing, and memory cell 21 decoded devices 23,24 and selector 25 are chosen.From read/write circuit 26 is set to and the word line W3 that is chosen or the equal voltage levels of unchecked word line to the output potential of bit line B3, and the voltage that does not change the electrical characteristics of memory cell 21 (for example ,-5～5V) can be applied between first conductive layer and second conductive layer that constitutes memory cell 21.
Next, describe (referring to Figure 13 B) to utilizing optical effect to write data conditions.At this moment, utilize laser irradiation device 32, write data by shining organic compound layer from conductive layer one side (being second conductive layer 28) of printing opacity herein with laser.More specifically, thus the organic compound layer of selected memory element 30 by laser radiation with the organic compound damage layer.Ruined organic compound layer insulate, and has the resistance higher than other memory elements 30.Like this, utilize the resistance of memory element 30 to write data because of the physical phenomenon that laser radiation changes.For example, when not had data " 0 " by the memory element 30 of laser radiation, by with laser radiation memory element 30 with its destruction and increase its resistance, can write data " 1 ".
The present invention is not limited to by the organifying compound layer insulate and writes the pattern of data with laser radiation memory element 30; The intensity of component structure and laser that also can be by control store element 30 writes data by insulating with laser radiation memory element 30 and destroying organic compound layer with the resistance that changes memory cell.At this moment, the pair of conductive layer by short circuit memory element 30 have the resistance more much lower than other memory elements 30.Like this, can write data by the phenomenon of utilizing optical effect to change the resistance of memory cell.
Use the gripping altogether under the situation of compound as organic compound of acidic compound (photosensitive acid agent) of having mixed by absorbing light, changed by the resistance of the part of laser radiation, and do not changed by the resistance of the part of laser radiation.In addition, also utilize the phenomenon that changes the resistance of memory cell 30 with the selected organic compound layer of laser radiation to write data.For example, suppose do not had data " 0 " by the memory element 30 of laser radiation, then can be by changing its resistance to write data " 1 " with the selected memory element 30 of laser radiation.
Next, the operation to sense data describes (referring to Figure 12 B and 12C).Come sense data by utilizing in memory cell the phenomenon different with the electrology characteristic of first and second conductive layers of formation memory element in the memory cell with data " 1 " with data " 0 ".For example, data read method to the difference of utilizing resistance describes, wherein, under read-out voltage, constitute effective resistance between first and second conductive layers of memory cell with data " 0 " (below, abbreviate the resistance of memory cell as) be R0, the resistance that has the memory cell of data " 1 " under read-out voltage is R1.And, satisfy R1＜＜R0.Read/write circuit comprises and reads part that this is read part and has structure shown in Figure 12 B, that use the circuit 26 of resistance 46 and differential amplifier 47.Resistance 46 has resistance R r, and satisfies R1＜Rr＜R0.Can use transistor 48 to replace resistance 46, and can use clock inverter 49 to replace differential amplifier (shown in Figure 12 C).To clock inverter 49 input signals or inversion signal, this signal or inversion signal are Hi when sense data, become Lo when not having sense data.Certainly, circuit structure is not limited in Figure 12 B and 12C.
When from memory cell 21 sense datas, memory cell 21 is chosen by decoder 23,24 and selector 25.Particularly, by decoder 24 assigned voltage Vy is applied on the word line Wy that is connected with memory cell 21.In addition, by decoder 23 and selector 25, the bit line Bx that will be connected with memory cell 21 with read/terminals P of write circuit 26 is connected.Its result, the electromotive force Vp on the terminals P is cut apart decision by the resistance of the resistance of resistor 46 (resistance R r) and memory cell 21 (resistance R 0 or R1).Thereby, when memory cell 21 has data " 0 ", satisfy Vp0=Vy+ (V0-Vy) * R0/ (R0+Rr).When memory cell 21 has data " 1 ", satisfy Vp1=Vy+ (V0-Vy) * R1/ (R1+Rr).Its result, if select Vref to make it between the Vp0 and Vp1 shown in Figure 12 B, select the change of clock inverter to make it between the Vp0 and Vp1 shown in Figure 12 C, then Lo/Hi (or Hi/Lo) conduct is output with data " 0 "/" 1 " corresponding output voltage Vout, thus sense data.
For example, differential amplifier is worked under Vdd=3V, thereby satisfies Vy=0V, V0=3V, Vref=1.5V.Suppose R0/Rr=Rr/R1=9, when memory cell has data " 0 ", satisfy Vp0=2.7V, Hi is as Vout in output.When memory cell has data " 1 ", satisfy Vp1=0.3V, Lo is as Vout in output.Like this, can be from the memory cell sense data.
According to said method, utilize resistance to cut apart and difference, read the resistance states of organic compound layer or phase change layer 29 by voltage level.Certainly, reading method is not limited in this method.For example, replace, can utilize the difference of electric current to come sense data, rather than utilize the difference of resistance.In addition, when the electrical characteristics of memory cell had threshold voltage in diode characteristics different between data " 0 " and " 1 ", the difference between the threshold voltage also can be used for reading of data.
Above-mentioned explanation also is applicable to and utilizes the laser radiation organic compound layer and write data conditions.Difference between the resistance of resistance by electrically reading the memory cell 30 that is not applied in optical effect and the memory cell 30 that has applied optical effect is come sense data.
Above-mentioned explanation also is applicable to utilize to be doped with by what absorbing light was come acidic compound (photosensitive acid agent) grips polymeric situation altogether.Difference between the resistance of resistance by electrically reading the memory cell 30 that is not applied in optical effect and the memory cell 30 that has applied optical effect is come sense data.
In addition, as the exemplary of organic compound layer or phase change layer 29, can use phase change layer.Here, phase change layer be by can between crystalline state and the noncrystalline state reversibly the material of conversion or between first crystalline state and second crystalline state reversibly the material of conversion or only can from noncrystalline state be transformed into that the material of crystalline state constitutes layer.
When using reversible material, can read and write data.And when using irreversible material, can only sense data.Like this, according to the kind of material, phase transition storage can be read-only memory or read/writeable memory.The material that is used for phase change layer, can according to semiconductor device should be used for suitably select.
In the phase change layer, reversibly the material of conversion is the material that comprises the multiple element of selecting from germanium (Ge), tellurium (Te), antimony (Sb), sulphur (S), tellurium oxide (TeOx), tin (Sn), gallium (Ga), selenium (Se), indium (In), thallium (Tl), cobalt (Co) and silver (Ag) between crystalline state and noncrystalline state.For example, can use based on Ge-Te-Sb-S, Te-TeO
2-Ge-Sn, Te-Ge-Sn-Au, Ge-Te-Sn, Sn-Se-Te, Sb-Se-Te, Sb-Se, Ga-Se-Te, Ga-Se-Te-Ge, In-Se, In-Se-Tl-Co, Ge-Sb-Te, In-Se-Te or Ag-In-Sb-Te.
The material of between first crystalline state and second crystalline state, reversibly changing, be the material that comprises the multiple element of from silver (Ag), zinc (Zn), copper (Cu), aluminium (Al), nickel (Ni), indium (In), antimony (Sb), selenium (Se), tellurium (Te), selecting, for example Te-TeO
2, Te-TeO
2-Pd and Sb
2Se
3/ B
12Te
3When using these materials, between two different crystalline states, realized phase transformation.
In phase change layer, only the material that is transformed into crystalline state from noncrystalline state is the material that comprises the multiple element of selecting from tellurium (Te), tellurium oxide (TeOx), antimony (Sb), selenium (Se) and bismuth (Bi), for example Ag-Zn, Cu-Al-Ni, In-Sb, In-Sb-Se and In-Sb-Te.
The memory element that clips phase change layer between the pair of conductive layer is made by simple steps, therefore can provide cheap semiconductor device.Because phase transition storage is non-volatile memory element, therefore need not to be provided for keeping the battery of data.Like this, can provide compact, gossamery semiconductor device.By phase change layer being used irreversible material, data can not be write once more.Thereby can provide the semiconductor device of the high security of anti-counterfeiting.
Next, the data write operation to memory element with phase change layer describes.Similar to memory element with organic compound layer, between first conductive layer 27 and second conductive layer 28, apply voltage changing the phase change layer material mutually, thereby data are write.
Next, describe (referring to Figure 13 B) to utilizing light to write data.At this moment, with conductive layer one side (here refer to second conductive layer 28) the irradiation phase change layer of laser from printing opacity.When phase change layer during by laser radiation, the change of crystalline state structurally takes place.Like this, utilization writes data by the phenomenon that laser radiation changes the state of phase change layer.
For example, when writing data " 1 ", phase change layer is by laser radiation and be heated to be crystallization temperature or higher temperature, cools off then, thus with the phase change layer crystallization.And when writing data " 0 ", phase change layer is cooled off rapidly then, thereby makes phase change layer become noncrystalline state by laser radiation and by with more than or equal to the heating of the temperature of its fusing point and be melted.
According to the size of memory element 21, by with the diameter being the phase transformation that the irradiation of the laser of μ m magnitude realizes phase change layer 29.For example, when diameter be 1 μ m laser beam with the speed of 10m/sec by the time, be included in phase change layer in the memory cell 21 by laser radiation 100nsec.In order to undergo phase transition in the time short as 100nsec, for example, the power of laser preferably is made as 10mW, and its power density preferably is set to 10kW/mm
2
Can also can carry out selectively to the phase change layer irradiating laser whole memory cell 21.For example, when the phase change layer that forms a little earlier is noncrystalline state, without laser radiation keeping noncrystalline state, and with laser radiation so that it becomes crystalline state.That is, can write data by selectable laser radiation.Like this, when irradiating laser selectively, preferably use the pulsed oscillation laser irradiation unit.
As mentioned above, according to the structure of utilizing laser radiation to write data of the present invention, can make semiconductor device easily, in large quantities.Therefore, can provide cheap semiconductor device.
Similar from the operation of memory element sense data to operation from semiconductor element sense data with organic compound layer with phase change layer.The changes in resistance that the variation of voltage or electric current can cause from the state by phase change layer is read.
In addition, as the structure different, can the element (referring to Figure 13 C) with rectification characteristic be set between first conductive layer 27 and organic compound layer or the phase change layer 29a or between second conductive layer 28 and organic compound layer or phase change layer 29 with described structure.Element with rectification characteristic is the transistor that is connected with drain electrode of Schottky diode, PN junction diode, PIN junction diode or grid typically.Certainly, also can use diode with other structures.Here, the PN junction diode that will comprise semiconductor layer 44 and 45 is arranged on first conductive layer and includes between the layer of organic compounds.One in the semiconductor layer 44 and 45 is the n type semiconductor layer, and another is the p type semiconductor layer.Like this, by the element with rectification characteristic is provided, can improve that the selectivity of memory cell and each are read or the operation surplus of write operation.
As mentioned above, the memory circuit that is included in the semiconductor device of the present invention comprises having the memory element that clips the simple structure of organic compound layer or phase change layer between the pair of conductive layer.Therefore, the semiconductor device and the manufacture method thereof of the cheapness that is easy to make can be provided.In addition, owing to be easy to realize high integration, therefore can provide semiconductor device and manufacture method thereof with big capacity storage circuit.
Utilize optical effect or electrical effects, write data in the memory circuit that is included in the semiconductor device of the present invention.That is, memory element is non-volatile memory element that can additionally write data.Therefore, owing to can prevent by writing the forgery that data are carried out once more, thereby fail safe can be guaranteed; Simultaneously can additionally write new data.Therefore, provide semiconductor device and the manufacture method thereof that realizes high-performance and high added value.
The 14th execution mode
Next, configuration and the operation to the memory circuit that semiconductor device of the present invention comprised describes.Memory cell 21 comprises that constituting bit line Bx (first conductive layer of 1≤x≤m), constitutes word line Wy (second conductive layer, transistor 31 and the memory cell 30 of 1≤y≤n).Memory cell comprises the organic compound layer that is arranged between the pair of conductive layer.Transistorized gate electrode is connected with word line; One in transistor source or the drain electrode is connected with bit line, and another is connected with a terminal of memory element.Another terminal of memory element is connected with public electrode (electromotive force is Vcom).
Next, the operation that writes data into memory cell 21 is described (Figure 14 B and 14C).
At first, the operation that utilizes electrical effects to write data is described.Note, write data, the initial condition (also not applying electrical effects) of memory cell is defined as data " 0 ", and the state after electrology characteristic changed is defined as data " 1 " by the electrology characteristic that changes memory cell.
Here, the situation in the memory cell 21 that writes data into the capable x row of y is described.When writing data " 1 " in memory cell 21, memory cell 21 is chosen by decoder 23,24 and selector 25.Particularly, utilize decoder 24 that the voltage V22 of regulation is applied on the word line Wy that is connected with memory cell 21.Utilize decoder 23 and selector 25, the bit line Bx that will be connected with memory cell 21 with read/write circuit 26 is connected.Then, from read/write circuit 26 writes voltage V21 to bit line Bx output.
Then, constitute transistor 31 conductings of memory cell 21, bit line is connected to memory element 30, and the voltage Vw that equates with Vcom-V21 is applied on the transistor 31.Terminal of memory element 30 and electromotive force are that the public electrode of Vcom is connected.By suitably selecting voltage Vw, physically or electrically change the organic compound layer that is arranged between the conductive layer, thus the data of writing " 1 ".Particularly, preferably make, first write in data " 1 " in the resistance value between second conductive layer fashionable much smaller than the resistance value when writing data " 0 ", for example for short circuit.Electromotive force (V21, V22, Vcom) can from (5～15V, 5～15V, 0V) or (3～5V) scope is selected for 12～0V ,-12～0V.Voltage Vw can be 5～15V or-5～-15V.
Unchecked word line and bit line are controlled, and make in the memory cell that data " 1 " do not write with they link to each other.Particularly, can apply the voltage that the transistor that links to each other with this word line is ended to unchecked word line (for example, 0V), can be set to floating dummy status or apply the iso-electric voltage with Vcom by unchecked bit line.
On the other hand, when writing data " 0 ", memory cell 21 is not applied electrical effects to memory cell 21.In circuit operation, similar to the situation that writes data " 1 ", memory cell 21 is chosen by decoder 23,24 and selector 25.From read/write circuit 26 is set to the electromotive force that equates with Vcom to the electromotive force of bit line Bx output, or bit line Bx is made as floating dummy status.Therefore, memory cell 30 be applied in low-voltage (for example ,-5～5V) or be not applied to voltage, thereby the electrology characteristic of memory cell is constant, data " 0 " are written in the memory cell.
Note, in this operation and the 13rd execution mode to utilize optical effect to write data conditions similar.
Next, the operation that utilizes the electrical effects sense data is described.The electrical effects of utilizing memory cell 30 in memory cell with data " 0 " with the memory cell with " 1 " in different phenomenon come sense data.For example, utilize the method for sense data of the difference of resistance value to describe, wherein, under read-out voltage, resistance value with memory cell of data " 0 " is R0, and under read-out voltage, resistance value with memory cell of data " 1 " is R1.Satisfy R1＜＜R0.Read/write circuit has the part of reading, and this is read part and has the use resistor 246 as shown in Figure 14B and the structure of the circuit 26 of differential amplifier 247.Resistor 246 has resistance value Rr, and satisfies R1＜Rr＜R0.Can use transistor 248 to replace transistor 246, and can use clock inverter 249 to replace differential amplifier 247 (Figure 14 C).Certainly, circuit structure is not limited in Figure 14 B and Figure 14 C.
When from memory cell 21 sense datas of the capable x of y row, memory cell 21 is chosen by decoder 23,24 and selector 25.Particularly, the voltage V24 with regulation is applied on the word line Wy that links to each other with memory cell 21 by decoder 24, and transistor 31 conductings.In addition, by decoder 23 and selector 25, the bit line Bx that will link to each other with memory cell 21 with read/terminals P of write circuit 26 is connected.Its result, the resistance that the electromotive force Vp of terminals P is caused by resistor 246 (resistance value Rr) and memory cell 30 (resistance value R0 or R1) cut apart determine.Therefore, when memory cell 21 has data " 0 ", satisfy Vp0=Vcom+ (V0-Vcom) * R0/ (R0+Rr).When memory cell 21 has data " 1 ", satisfy Vp1=Vcom+ (V0-Vcom) * R1/ (R1+Rr).Select Vref so that it between the Vp0 and Vp1 of Figure 14 B, and selects the change point of clock inverter so that it is between the Vp0 and Vp1 of Figure 14 C; Its result, with data " 0 "/" 1 " accordingly, output Lo/Hi (or Hi/Lo) as output voltage, thereby sense data.
For example, differential amplifier is operated under the Vdd=3V, therefore satisfies Vcom=0V, V0=3V, Vref=1.5V.Suppose that the conduction resistance value that satisfies R0/Rr=Rr/R1=9, transistor 31 can ignore, when memory cell has data " 0 ", satisfy Vp0=2.7V, and output Hi is as Vout.When memory cell has data " 1 ", satisfy Vp1=0.3V, and output Lo is as Vout.Like this, can be from memory cell sense data.
According to said method, utilize the difference of the resistance between the memory cell 30 and resistance to cut apart, with voltage level data are read.Certainly, reading method is not limited in this.For example, the difference of electric current also can be used for sense data, to replace utilizing resistance difference.In addition, when the electrology characteristic of memory cell had threshold voltage in diode characteristics different between data " 0 " and the data " 1 ", the difference of this threshold voltage also can be used for data and read.
In the present embodiment, to describing when utilizing electrical effects to write the experimental result that I-V characteristic data, that be formed on the memory element on the substrate detects.This memory element is by lamination first conductive layer, first organic compound layer, second organic compound layer and second conductive layer constitute in order.First conductive layer comprises the compound (being abbreviated as ITSO sometimes) of silica and tin indium oxide, first organic compound layer comprises 4,4 '-two (the N-[3-aminomethyl phenyl]-N-phenyl-amine) biphenyl (being abbreviated as TPD sometimes), second organic compound layer comprises 4,4 '-two (N-[1-naphthyls]-N-phenyl-amine)-biphenyl (are abbreviated as sometimes that α-NPD), second conductive layer comprises aluminium.The first organic compound layer thickness is 10nm, and the second organic compound layer thickness is 50nm.
At first, with reference to Figure 16, the test result in the I-V characteristic of utilizing the memory cell of electrical effects before or after writing data is described.In Figure 16, abscissa is a voltage level, and ordinate is a current value.Curve 261 expression utilizes electrical effects that memory cell is write I-V characteristic before the data, and curve 262 expressions utilize electrical effects that memory cell is write I-V characteristic after the data.As shown in figure 16, before writing data with write after the data, very big change is arranged on the I-V characteristic.For example, when adding the voltage of 1V, current value was 4.8 * 10 before writing data
-5MA, and electric current is 1.1 * 10 after data write
2MA like this, has the change of 7 orders of magnitude writing electric current before and after the data.So, writing the data front and back, change on the resistance of memory cell.By the change of reading resistance from voltage level or current value, can be with memory element as memory circuit.
Then, with reference to Figure 22 A～24B, describe utilizing electrical effects to write the experimental result of I-V characteristic of memory element data, that have a sample 1～6 of the memory element that on substrate, forms respectively.Here, by voltage being applied on organic memory element so that its short circuit writes data.In Figure 22 A～24B, abscissa is represented voltage level, ordinate is represented current density value, the curve representation of representing with circle utilizes electrical effects to write the I-V characteristic of the memory element before the data, and utilizes electrical effects to write the I-V characteristic of the memory element after the data with the curve representation that square is represented.In addition, each of example 1～6 is of a size of 2 * 2mm.
As sample 1, shown in Figure 25 A, be the element that forms by lamination first conductive layer 701, first organic compound layer 702 and second conductive layer 703 in order.First conductive layer 701 comprises ITSO, and first organic compound layer 702 comprises TPD, and second conductive layer 703 comprises aluminium.The first organic compound layer thickness is 50nm.The I-V characteristic of sample 1 is shown in Figure 22 A.
As sample 2, shown in Figure 25 B, be the element that forms by lamination first conductive layer 701, first organic compound layer 711 and second conductive layer 703 in order.First conductive layer comprises ITSO, and first organic compound layer 702 comprises and added 2,3,5,6-tetrafluoro-7,7,8, and the TPD of 8-four cyanogen dimethyl 1,4-benzoquinone (being abbreviated as F4-TCNQ), second conductive layer comprises aluminium.First organic compound layer has added the F4-TCNQ of 0.01wt%, and thickness is 50nm.The I-V characteristic of sample 2 is shown in Figure 22 B.
As sample 3, shown in Figure 25 C, be the element that forms by lamination first conductive layer 701 in order, first organic compound layer 721, second organic compound layer 722 and second conductive layer 703.First conductive layer comprises ITSO, and first organic compound layer comprises TPD, and second organic compound layer comprises F4-TCNQ, and second conductive layer comprises aluminium.Thickness as the TPD of first organic compound layer is 50nm, is 1nm as the thickness of the F4-TCNQ of second organic compound layer.The I-V characteristic of sample 3 is shown in Figure 23 A.
As sample 4, shown in Figure 25 D, be the element that forms by lamination first conductive layer 701, first organic compound layer 731, second organic compound layer 732 and second conductive layer 703 in order.First conductive layer comprises ITSO, and first organic compound layer comprises F4-TCNQ, and second organic compound layer comprises TPD, and second conductive layer comprises aluminium.Thickness as the F4-TCNQ of first organic compound layer is 1nm, is 50nm as the thickness of the TPD of second organic compound layer.The I-V characteristic of sample 4 is shown in Figure 23 B.
As sample 5, shown in Figure 25 E, be the element that forms by lamination first conductive layer 701, first organic compound layer 741, second organic compound layer 742 and second conductive layer 703 in order.First conductive layer comprises ITSO, and first organic compound layer comprises the TPD that has added F4-TCNQ, and second organic compound layer comprises TPD, and second conductive layer comprises aluminium.First organic compound layer has added the F4-TCNQ of 0.01wt%, and thickness is 40nm; The thickness of second organic compound layer is 40nm.The I-V characteristic of sample 5 is shown in Figure 24 A.
As sample 6, shown in Figure 25 F, be the element that forms by lamination first conductive layer 701, first organic compound layer 751, second organic compound layer 752 and second conductive layer 703 in order.First conductive layer comprises ITSO, and first organic compound layer comprises TPD, and second organic compound layer comprises the TPD that has added F4-TCNQ, and second conductive layer comprises aluminium.The thickness of first organic compound layer is 40nm; Second organic compound layer has added the F4-TCNQ of 0.01wt%, and its thickness is 10nm.The I-V characteristic of sample 6 is shown in Figure 24 B.
In the result of Figure 22 A～24B, with afterwards, the I-V characteristic of memory element has very big change before the memory element that writes data into sample 1～6.In these memory element samples, the short-circuit voltage of each memory element is had error be reproducibility smaller or equal to 0.1V.
Next, writing voltage and writing the forward and backward characteristic of data of sample 1～6 has been shown in table 1.
Table 1
| Write voltage (V) | R(1V) | R(3V) | |
| | 8.4 | 1.9E+07 | 8.4E+03 |
| | 4.4 | 8.0E+08 | 2.1E+02 |
| Sample 3 | 3.2 | 8.7E+04 | 2.0E+02 |
| Sample 4 | 5.0 | 3.7E+04 | 1.0E+01 |
| | 6.1 | 2.0E+05 | 5.9E+01 |
| Sample 6 | 7.8 | 2.0E+04 | 2.5E+02 |
In table 1, write the voltage level that voltage (V) expression is applied, each memory element is short circuit under this voltage level respectively.Row R (1V) are illustrated in when applying 1V voltage, write current density and the ratio that writes the current density before the data after the data.Similar, row R (3V) are illustrated in when applying 3V voltage, write current density and the ratio that writes the current density before the data after the data.That is, shown the variation that writes the current density of memory element after the data.Compare with applying the 3V voltage condition, the difference of the current density of organic memory element reaches 10 when applying the voltage of 1V
4Or it is higher.
When using above-mentioned memory element, when each sense data, prescribed voltage level (not causing the voltage level of short circuit) is applied on the memory cell, thereby reads resistance as memory circuit.Like this, even the I-V characteristic that requires described memory element is not when read operation repeats, change when repeating to apply the voltage of regulation yet.Consider this situation,, the test result of the I-V characteristic of the memory element after the sense data is described with reference to Figure 17.In this experiment, the I-V characteristic of test storage element after each sense data.Because data are read out 5 times altogether, the test of the I-V characteristic of memory element is carried out 5 times.The memory element that resistance when utilizing electrical effects to write data is changed and test with the I-V characteristic of the constant memory element of resistance.
In Figure 17, abscissa is represented voltage level, and ordinate is represented current value, the I-V characteristic of the curve 271 expression memory elements that resistance changes when utilizing electrical effects to write data, the I-V characteristic of the memory element that curve 272 expression resistance are constant.Shown in curve 271, the I-V characteristic of the memory element that resistance is constant has shown good repeatability during more than or equal to 1V at voltage level.Similarly, shown in curve 272, the I-V characteristic of the memory element that resistance changes has shown good repeatability during more than or equal to 1V at voltage level.Consider above-mentioned situation, even when repeatedly repeating sense data, the I-V characteristic of memory element can not change much yet, thereby good repeatability is provided.Above-mentioned memory element can be used as memory circuit.
In the present embodiment, with reference to accompanying drawing 18, describe utilizing optical effect employed laser irradiation device when memory circuit writes data.
Laser irradiation device 1001 comprises: the computer 1002 that is used to carry out the various controls of laser radiation; The laser oscillator 1003 of outgoing laser beam; Power supply 1004; The optical system 1005 of attenuated laser beam; The acousto-optics modulator 1006 that is used for the modulated laser beam intensity; Comprise the lens of the cross section that is used to reduce laser beam and be used to change the optical system 1007 of speculum etc. of the light path of laser beam; The substrate mobile device 1009 that comprises X-axis stand and Y-axis stand; Conversion is by the D/A converter 1010 of the control data of computer 1002 outputs; Come the driver 1011 of guide sound optical modulator 1006 according to aanalogvoltage from D/A converter 1010 outputs; And output drives the driver 1012 of the signal of substrate mobile device 1009.Also comprise and being used for the auto convergence device 1013 (seeing Figure 18) of laser convergence on irradiated object.Laser oscillator 1003 can be the laser oscillator that can launch ultraviolet ray, visible light or infrared light beam.Particularly, laser oscillator 1003 can be for example argon excimer laser, KrF excimer laser, XeCl excimer laser or Xe excimer laser.In addition, also can use such as gas laser oscillators such as He laser, He-Cd laser, ArF laser, He-Ne laser or HF lasers.In addition, can also use such as the YAG that is doped with Cr, Nd, Er, Ho, Ce, Co, Ti or Tm respectively, GdVO
4, YVO
4, YLF or YAlO
3Solid-state laser oscillator in crystal.In addition, also can use semiconductor laser oscillator, as GaN laser, GaAs laser, GaAlAs laser or InGaAsP laser etc.
Next, the laser irradiation device 1001 with said structure is described.When substrate 1014 was installed on the substrate mobile device 1009, computer 1002 uses camera (not shown) to detect will be by the position of the memory element of laser radiation.Then, computer 1002 produces the mobile data that is used for mobile substrate mobile device 1009 according to the position data that is detected.Then, will be after laser oscillator 1003 emitted laser beam attenuations in optical system 1005, acousto-optics modulator 1006 control luminous quantities are to make it to become the amount of regulation.Simultaneously, pass optical system 1007, thereby change the light path and the light spot shape of laser beam from acousto-optics modulator 1006 emitted laser bundles.After by lens laser beam being assembled, substrate 1014 is by laser beam irradiation.Here, control substrate mobile device 1009, it is moved on X-direction and Y direction according to the mobile data that produces by computer 1002.Its result, the zone of regulation is by laser beam irradiation, and the energy density of laser beam is converted into heat, is arranged on memory element on the substrate 1014 selectively by laser beam irradiation.In the above description, the irradiation of laser is undertaken by mobile substrate mobile device 1009, but also can be by control optical system 1007 with mobile laser beam on directions X and Y direction.
Under the aforesaid laser radiation that utilizes laser irradiation device writes data the present invention and situation that read/write device combines, can easily write data.Therefore, can write lot of data at short notice.
Embodiment 3
The application of semiconductor device is very extensive.The object lesson of these application is as described below.Semiconductor device 20 of the present invention can be used for bill, coin, marketable securities, certificate, bearer bond (as driving license, the card of living, see Figure 19 A), the packing (as wrapping paper, plastic bottle, see Figure 19 B), recording medium is (as DVD software and video tape, see Figure 19 C), the vehicles are (as bicycle, see Figure 19 D), personal belongings (, seeing Figure 19 E), food, clothing, commodity, electronic equipment etc. as school bag, glasses.Electronic equipment refers to liquid crystal indicator, EL display unit, television set (being also referred to as TV, TV receiver, television receiver), mobile phone etc.
By being installed in this device on the printed substrates, maybe this device being adhered to from the teeth outwards, maybe this device being implanted to interior of articles, come semiconductor device 20 of the present invention to be fixed on the object.For example, if object is books, then come this semiconductor device to be fixed on the books by be implanted into this device at paper; If this object is the packing of organic resin system, then this semiconductor device is fixed on this packing by this device is implanted in the organic resin.Because semiconductor device of the present invention 20 is little, light and thin, even therefore after being fixed on this device on the object, designing quality can not descend yet.By semiconductor device 20 of the present invention is arranged on bill, coin, marketable securities, certificate, the bearer bond etc., authentication function can be provided, thereby prevent to forge.In addition, when semiconductor device 20 of the present invention being arranged on packing, recording medium, personal belongings, food, clothing, commodity, electronic equipment etc. and going up, can become more effective as the system of detection system etc.
Next, with reference to accompanying drawing, the pattern of electronic equipment that semiconductor device of the present invention has been installed is described.Here the electronic equipment that illustrates is a mobile phone, comprising: shell 2700 and 2706; Panel 2701; Frame 2702; Printed circuit substrate 2703; Action button 2704; Battery 2705 grades (seeing Figure 20).Panel 2701 is combined in the frame 2702 in removable mode.Frame 2702 is installed on the printed circuit substrate 2703.The shape and size of frame can be carried out suitable variation according to electronic installation that will installation panel 2703.On the printed circuit substrate 2703, a plurality of semiconductor device that encapsulated are installed; Semiconductor device of the present invention can be as in these a plurality of semiconductor device that encapsulated.Be installed in a plurality of semiconductor device on the printed circuit substrate 2703 each and have any one function in controller, CPU (CPU), memory, power circuit, audio frequency processing circuit, the transmission/receiving circuit etc.
As mentioned above, semiconductor device of the present invention is little, light and approach, and therefore can effectively utilize the shell 2700 of electronic equipment and 2706 the confined space.
Since semiconductor device of the present invention have comprise memory element layer by lamination in the structure that comprises on the layer of TFT, therefore, can provide the electronic equipment that uses compact semiconductor device.
The memory circuit that is included in the semiconductor device of the present invention comprises having the memory element that clips the simple structure of organic compound layer or phase change layer between the pair of conductive layer.Therefore, can provide the electronic installation that uses cheap semiconductor device.In addition, owing to can easily realize high integration, therefore can provide the electronic installation that uses semiconductor device with big capacity storage circuit.
Data are to utilize optical effect or electrical effects and be written in the memory circuit that is included in the semiconductor device of the present invention ground.That is, memory element is the non-volatile memory device that can additionally write data.Therefore, owing to can prevent to write once more the forgery of data, so can guarantee fail safe; Simultaneously can write new data.The electronic installation of the use semiconductor device of having realized high-performance and high added value can be provided like this.
Below, the example of the system that uses semiconductor device of the present invention is described.At first, read/write device 295 is arranged on the side surface of the portable terminal that comprises display part 294; Semiconductor device 20 of the present invention is arranged on the side surface of object 297 (seeing Figure 21 A).In addition, about the information of object 297,, be stored in advance in the semiconductor device 20 as history of material, production area or the process of circulation etc.Then, when semiconductor device 20 was maintained on the read/write device 295, the information in the semiconductor device 20 was displayed in the display part 294.Like this, utilize the system that provides usefulness.As another example, read/write device 295 is arranged on conveyer belt next door (seeing Figure 21 B).Like this, can provide a kind of system that can detect object 297 easily.In view of the above, by semiconductor device of the present invention being used for the management or the system for the distribution of commodities, can realize the high functionality and the validity of system to object.
The application is the No.2004-328295 of Japanese patent application formerly and the No.2004-328298 on November 11st, 2004 based on the applying date, and this this quote its content.
Claims (25)
1. semiconductor device comprises:
Be arranged on the transistor on the insulating barrier;
Conductive layer as described transistorized source wiring or drain electrode wiring;
With the equitant memory element of described transistor; With
As the conductive layer of antenna,
Wherein, described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Described conductive layer as antenna is arranged on the identical layer with described conductive layer as described transistorized source wiring or drain electrode wiring.
2. semiconductor device comprises:
Be arranged on the transistor on the insulating barrier;
With the equitant memory element of described transistor; With
As the conductive layer of antenna,
Wherein, described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Described conductive layer as antenna is arranged on the identical layer with described first conductive layer.
3. semiconductor device comprises:
Be arranged on the transistor on the insulating barrier;
With the equitant memory element of described transistor; With
As the conductive layer of antenna,
Wherein, described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Described conductive layer as antenna is arranged on the identical layer with described second conductive layer.
4. as any one described semiconductor device of claim 1～3, wherein,
Described memory element and described transistorized a part of overlaid.
5. semiconductor device comprises:
The first element cambium layer;
The second element cambium layer; With
The conductive layer that comprises conductive particle, by this conductive layer that described first element cambium layer and the described second element cambium layer is bonding,
Wherein, the described first element cambium layer comprise the transistor that is arranged on the insulating barrier, as the conductive layer of described transistorized source wiring or drain electrode wiring with as the conductive layer of antenna;
The described second element cambium layer comprises memory element, and this memory element has first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Described first conductive layer is electrically connected with described conductive layer as described transistorized source wiring or drain electrode wiring by described conductive particle.
6. semiconductor device comprises:
The element cambium layer;
Has substrate as the conductive layer of antenna; With
The adhesive layer that comprises conductive particle, be used for described element cambium layer and described substrate bonding,
Wherein, described element cambium layer comprise the first transistor that is arranged on the insulating barrier and transistor seconds, as the conductive layer of the source wiring of described the first transistor or drain electrode wiring and with the equitant memory element of described transistor seconds, described memory element comprises first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Described conductive layer as antenna is electrically connected by described conductive particle as the source wiring of described the first transistor or the conductive layer of drain electrode wiring with described.
7. semiconductor device comprises:
The first element cambium layer;
The second element cambium layer; With
The adhesive layer that comprises conductive particle, be used for described first element cambium layer and the described second element cambium layer bonding,
Wherein, the described first element cambium layer comprise the first transistor that is arranged on the insulating barrier and transistor seconds, as first conductive layer of the source wiring of described the first transistor or drain electrode wiring with as the source wiring of described transistor seconds or second conductive layer of drain electrode wiring;
The described second element cambium layer comprises the memory element of the 3rd conductive layer, organic compound layer or phase change layer with lamination in this order, the 4th conductive layer and as the 5th conductive layer of antenna;
As described the 5th conductive layer of antenna by conductive particle be electrically connected as the source wiring of described the first transistor or described first conductive layer of drain electrode wiring.
8. semiconductor device comprises:
The first element cambium layer comprises the transistor that is arranged on the substrate, as the conductive layer of described transistorized source wiring or drain electrode wiring be arranged on the described transistor and as the conductive layer of antenna;
The second element cambium layer, be arranged on the described substrate, and between this second element cambium layer and described substrate, having inserted adhesive layer, this second element cambium layer comprises having first conductive layer, organic compound layer or the phase change layer of lamination and the memory element of second conductive layer in this order
Wherein, first conductive layer of described memory element is electrically connected with described conductive layer as transistorized source wiring or drain electrode wiring by conductive particle.
9. semiconductor device comprises:
The element cambium layer;
Has substrate as the conductive layer of antenna;
The adhesive layer that comprises conductive particle is used for bonding described element cambium layer and described substrate,
Wherein, described element cambium layer comprises:
Be arranged on the first transistor and transistor seconds on the insulating barrier;
Cover the interlayer insulating film of described the first transistor and described transistor seconds;
As the source wiring of described the first transistor or the conductive layer of drain electrode wiring, this conductive layer is connected with the source region or the drain region of described the first transistor by first opening portion that is arranged in the described interlayer insulating film, and is exposed to the cambial back side of described element by second opening portion that is arranged in described insulating barrier and the described interlayer insulating film;
Transistor seconds; With
With the equitant memory element of described transistor seconds, this memory element has first conductive layer, organic compound layer or phase change layer and second conductive layer of lamination in this order;
Wherein, described conductive layer as antenna is electrically connected with described source wiring or the exposed region of the conductive layer of the drain electrode wiring described conductive particle by described adhesive layer as the first transistor.
10. semiconductor device comprises:
The first element cambium layer;
The second element cambium layer; With
The adhesive layer that comprises conductive particle, be used for described first element cambium layer and the described second element cambium layer bonding,
Wherein, the described first element cambium layer comprises:
Be arranged on the transistor on the insulating barrier;
Cover described transistorized interlayer insulating film;
Conductive layer as described transistorized source wiring or drain electrode wiring, this conductive layer is connected with described transistorized source region or drain region by first opening portion that is arranged in the described interlayer insulating film, and by being arranged on the surface that opening portion in described insulating barrier and the described interlayer insulating film is exposed to described insulating barrier; And
As the conductive layer of antenna,
Wherein, the described second element cambium layer comprises the second element cambium layer,
Have first conductive layer, organic compound layer or the phase change layer of lamination and the memory element of second conductive layer in this order,
Wherein, the described conductive particle of described first conductive layer of described memory element by described adhesive layer is electrically connected with the expose portion of described conductive layer as described transistorized source wiring or drain electrode wiring.
11. a semiconductor device comprises:
The first element cambium layer;
The second element cambium layer; With
Conductive layer with the adhesive layer that comprises conductive particle, by this conductive layer that described first element cambium layer and the described second element cambium layer is bonding,
Wherein, the described first element cambium layer comprises:
Be arranged on the first transistor and transistor seconds on the insulating barrier;
Cover the interlayer insulating film of described the first transistor and described transistor seconds; With
As the source wiring of described the first transistor or first conductive layer of drain electrode wiring, this first conductive layer is connected with the source region or the drain region of described the first transistor by first opening portion that is arranged in the described interlayer insulating film, and be exposed to the cambial back side of described first element by second opening portion that is arranged in described insulating barrier and the described interlayer insulating film
As the source wiring of described transistor seconds or second conductive layer of drain electrode wiring, this second conductive layer is connected with the source region or the drain region of described transistor seconds by the 3rd opening portion that is arranged in the described interlayer insulating film, and is exposed to the cambial back side of described first element by the 4th opening portion that is arranged in described insulating barrier and the described interlayer insulating film;
Wherein, the described second element cambium layer comprises the 3rd conductive layer and the memory element as antenna, and this memory element comprises the 4th conductive layer, organic compound layer or phase change layer and the 5th conductive layer of lamination in this order;
Described the 4th conductive layer of described memory element at least one described conductive particle by described adhesive layer is electrically connected with expose portion as described first conductive layer of the source wiring of described the first transistor or drain electrode wiring;
Be electrically connected with expose portion as described the 3rd conductive layer of antenna at least one described conductive particle by described adhesive layer as described second conductive layer of the source wiring of described transistor seconds or drain electrode wiring.
12. a semiconductor device comprises:
The first element cambium layer;
The second element cambium layer;
First adhesive layer that comprises first conductive particle is used for described first element cambium layer and the described second element cambium layer bonding;
Has substrate as first conductive layer of antenna;
Second adhesive layer that comprises second conductive particle, be used for described second element cambium layer and described substrate bonding,
Wherein, the described first element cambium layer comprises second conductive layer, organic compound layer or the phase change layer with lamination in this order, the memory element of the 3rd conductive layer,
The described second element cambium layer comprises:
Be arranged on the first transistor and transistor seconds on the insulating barrier;
Cover the interlayer insulating film of described the first transistor and described transistor seconds;
As the source wiring of described the first transistor or the 4th conductive layer of drain electrode wiring, the 4th conductive layer is connected with the source region or the drain region of described the first transistor by first opening portion that is arranged in the described interlayer insulating film;
The 5th conductive layer as transistorized source wiring or drain electrode wiring, the 5th conductive layer is connected with the source region or the drain region of described transistor seconds by second opening portion that is arranged in the described interlayer insulating film, and be exposed to the cambial back side of described second element by the 3rd opening portion that is arranged in described insulating barrier and the described interlayer insulating film
Wherein, first conductive particle of described second conductive layer of described memory element by first adhesive layer be electrically connected as the source wiring of described the first transistor or the 3rd conductive layer of drain electrode wiring;
Be electrically connected with expose portion as described first conductive layer of antenna described second conductive particle by described second adhesive layer as described the 5th conductive layer of the source wiring of described transistor seconds or drain electrode wiring.
13. as any one described semiconductor device of claim 1～3 and 4～12, wherein, transistor, described the first transistor or described transistor seconds are thin-film transistors.
14. as any one described semiconductor device of claim 1～3 and 4～12, wherein, transistor, described the first transistor or described transistor seconds are organic semiconductor transistors.
15. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described insulating barrier is a silicon oxide layer.
16. as any one described semiconductor device of claim 1～3 and 4～12, wherein, the resistance of described memory element changes by optical effect.
17. as any one described semiconductor device of claim 1～3 and 4～12, wherein, the resistance of described memory cell changes by electrical effects.
18. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described organic compound layer is formed by the polymer material of gripping altogether of the photosensitive acid agent that mixed.
19. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described organic compound layer is formed by electron transport material or hole mobile material.
20. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer comprises the material that can reversibly change between crystalline state and noncrystalline state.
21. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer forms by contain the multiple material of selecting from germanium, tellurium, antimony, sulphur, tin, gold, gallium, selenium, indium, thallium, cobalt or silver.
22. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer comprises the material that can reversibly change between first crystalline state and second crystalline state.
23. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer forms by contain the multiple material of selecting from silver, zinc, copper, aluminium, nickel, indium, antimony, selenium or tellurium.
24. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer comprises the material that can only be transformed into noncrystalline state from crystalline state.
25. as any one described semiconductor device of claim 1～3 and 4～12, wherein, described phase change layer forms by contain the multiple material of selecting from tellurium, tellurium oxide, antimony, selenium or bismuth.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP328295/2004 | 2004-11-11 | ||
| JP2004328298 | 2004-11-11 | ||
| JP328298/2004 | 2004-11-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101057329A true CN101057329A (en) | 2007-10-17 |
| CN100541803C CN100541803C (en) | 2009-09-16 |
Family
ID=38796178
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005800385821A Expired - Fee Related CN100541803C (en) | 2004-11-11 | 2005-11-09 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100541803C (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102104047A (en) * | 2009-12-16 | 2011-06-22 | 夏普株式会社 | Nonvolatile semiconductor memory device and method for producing the same |
| CN102751243A (en) * | 2011-04-20 | 2012-10-24 | 旺宏电子股份有限公司 | Semiconductor device and manufacture method of semiconductor device |
| CN103003934A (en) * | 2010-07-16 | 2013-03-27 | 株式会社半导体能源研究所 | Semiconductor device |
| US9059047B2 (en) | 2010-04-09 | 2015-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| CN107706154A (en) * | 2017-09-28 | 2018-02-16 | 京东方科技集团股份有限公司 | A kind of memory element, storage device, preparation method and driving method |
| CN109427880A (en) * | 2017-08-22 | 2019-03-05 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and its manufacturing method |
| CN109585670A (en) * | 2017-09-29 | 2019-04-05 | 乐金显示有限公司 | The organic light-emitting display device of package substrate with high heat conductance |
| US10505520B2 (en) | 2009-11-20 | 2019-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile latch circuit and logic circuit, and semiconductor device using the same |
| CN110797326A (en) * | 2018-08-03 | 2020-02-14 | 富士电机株式会社 | Resistor element and method for manufacturing the same |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018179332A1 (en) * | 2017-03-31 | 2018-10-04 | シャープ株式会社 | Display device, display device manufacturing method, and display device manufacturing apparatus |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69942442D1 (en) * | 1999-01-11 | 2010-07-15 | Semiconductor Energy Lab | Semiconductor arrangement with driver TFT and pixel TFT on a substrate |
| EP1186042A1 (en) * | 2000-03-28 | 2002-03-13 | Koninklijke Philips Electronics N.V. | Integrated circuit with programmable memory element |
| US6717181B2 (en) * | 2001-02-22 | 2004-04-06 | Semiconductor Energy Laboratory Co., Ltd. | Luminescent device having thin film transistor |
| EP1437683B1 (en) * | 2002-12-27 | 2017-03-08 | Semiconductor Energy Laboratory Co., Ltd. | IC card and booking account system using the IC card |
| US7973313B2 (en) * | 2003-02-24 | 2011-07-05 | Semiconductor Energy Laboratory Co., Ltd. | Thin film integrated circuit device, IC label, container comprising the thin film integrated circuit, manufacturing method of the thin film integrated circuit device, manufacturing method of the container, and management method of product having the container |
-
2005
- 2005-11-09 CN CNB2005800385821A patent/CN100541803C/en not_active Expired - Fee Related
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10505520B2 (en) | 2009-11-20 | 2019-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile latch circuit and logic circuit, and semiconductor device using the same |
| CN102104047B (en) * | 2009-12-16 | 2014-04-23 | 夏普株式会社 | Nonvolatile semiconductor memory device and method for producing the same |
| CN102104047A (en) * | 2009-12-16 | 2011-06-22 | 夏普株式会社 | Nonvolatile semiconductor memory device and method for producing the same |
| US10008515B2 (en) | 2010-04-09 | 2018-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US9059047B2 (en) | 2010-04-09 | 2015-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US9431429B2 (en) | 2010-04-09 | 2016-08-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US9768199B2 (en) | 2010-04-09 | 2017-09-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US10879274B2 (en) | 2010-04-09 | 2020-12-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US10510777B2 (en) | 2010-04-09 | 2019-12-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US8847326B2 (en) | 2010-07-16 | 2014-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| CN103003934B (en) * | 2010-07-16 | 2015-07-01 | 株式会社半导体能源研究所 | Semiconductor device |
| CN103003934A (en) * | 2010-07-16 | 2013-03-27 | 株式会社半导体能源研究所 | Semiconductor device |
| CN102751243A (en) * | 2011-04-20 | 2012-10-24 | 旺宏电子股份有限公司 | Semiconductor device and manufacture method of semiconductor device |
| CN109427880B (en) * | 2017-08-22 | 2021-12-28 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and method for manufacturing the same |
| CN109427880A (en) * | 2017-08-22 | 2019-03-05 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and its manufacturing method |
| US10651377B2 (en) | 2017-09-28 | 2020-05-12 | Beijing Boe Display Technology Co., Ltd. | Storage element, storage device, method for manufacturing the same and driving method |
| CN107706154B (en) * | 2017-09-28 | 2020-06-30 | 京东方科技集团股份有限公司 | Storage element, storage device, manufacturing method and driving method |
| CN107706154A (en) * | 2017-09-28 | 2018-02-16 | 京东方科技集团股份有限公司 | A kind of memory element, storage device, preparation method and driving method |
| US10770675B2 (en) | 2017-09-29 | 2020-09-08 | Lg Display Co., Ltd. | Organic light-emitting display device having an encapsulating substrate of high thermal conductivity |
| CN109585670A (en) * | 2017-09-29 | 2019-04-05 | 乐金显示有限公司 | The organic light-emitting display device of package substrate with high heat conductance |
| CN109585670B (en) * | 2017-09-29 | 2021-09-07 | 乐金显示有限公司 | Organic light emitting display device having encapsulation substrate with high thermal conductivity |
| CN110797326A (en) * | 2018-08-03 | 2020-02-14 | 富士电机株式会社 | Resistor element and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100541803C (en) | 2009-09-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101057329A (en) | Semiconductor device | |
| CN101064287A (en) | Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit | |
| JP5622799B2 (en) | Semiconductor device | |
| CN1893033A (en) | Method for manufacturing semiconductor device | |
| CN1294619C (en) | Semiconductor device and making method thereof | |
| CN101044623A (en) | Semiconductor device and driving method thereof | |
| CN1992369A (en) | Semiconductor device and manufacturing method thereof | |
| CN1866568A (en) | Semiconductor device | |
| TWI511160B (en) | Semiconductor device | |
| CN1734750A (en) | Method for manufacturing film integrated circuit and element substrate | |
| CN101043026A (en) | Crystalline semiconductor film, semiconductor device and method for manufacturing thereof | |
| CN101051439A (en) | Semiconductor device, display device, and electronic device | |
| CN1925187A (en) | Semiconductor device manufacturing method | |
| CN1697195A (en) | Memory element and memory device | |
| CN1790741A (en) | Semiconductor device and method for manufacturing the same | |
| CN101044624A (en) | Semiconductor device | |
| CN101064347A (en) | Semiconductor device and manufacturing method thereof | |
| CN101064320A (en) | Semiconductor device and method for manufacturing the semiconductor device | |
| CN1947253A (en) | Limiter, and semiconductor device using same | |
| CN101047190A (en) | Nonvolatile semiconductor storage device and method for manufacturing the same | |
| CN1975844A (en) | Semiconductor device, display device and electronic device | |
| CN101128935A (en) | Semiconductor device | |
| CN101064321A (en) | Semiconductor device and method for manufacturing the same | |
| CN1770474A (en) | Semiconductor device and method of fabricating the same | |
| CN1905165A (en) | Manufacturing method of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090916 Termination date: 20171109 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |