CN101017424A - Marking controller based on USB interface - Google Patents
Marking controller based on USB interface Download PDFInfo
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- CN101017424A CN101017424A CN 200610125131 CN200610125131A CN101017424A CN 101017424 A CN101017424 A CN 101017424A CN 200610125131 CN200610125131 CN 200610125131 CN 200610125131 A CN200610125131 A CN 200610125131A CN 101017424 A CN101017424 A CN 101017424A
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Abstract
This invention relates to one target controller based on USB interface in laser marker controller, which comprises USB interface controller unit, data memory unit, program memory unit, D/A conversion unit, logic control unit and human to machine interface unit.
Description
Technical field
The invention belongs to the marking controller of laser marking machine, be specifically related to a kind of marking controller based on the general-purpose serial bus USB interface.
Background technology
In the vibration mirror scanning type laser marking system, the hardware circuit of control system all is based on Computer I SA bus or pci bus and the control card that designs, must be installed in the isa bus or pci bus expansion slot of computer motherboard, bring influence for the stable operation of total system, reduced the stability of marking system; The analog voltage signal of control card output will just can be transferred in the galvanometer control circuit by one section long cable, the strong electromagnetic that Laser Power Devices in the marking system produce is easy to be incorporated in the galvanometer control circuit by transmission cable, influences the operate as normal of galvanometer; Control card will use together with computing machine, has increased the volume of control system, has also increased the cost of control system.Though also have a kind of isa bus or pci bus that has broken away from computing machine by monolithic processor controlled laser marking controller based, but the memory capacity of single-chip microcomputer is limited, and its speed of carrying out interpolation operation is very slow, can only carry out some simple interpolation algorithms, thereby can not carry out marking to some complicated patterns, its usable range is limited, can not give full play to laser marking and use advantage flexibly.
Summary of the invention
The invention provides a kind of USB interface-based marking controller, purpose is the defective that overcomes prior art, has both satisfied the requirement of client to the complex figure mark, satisfy requirement again to the simple pattern mark, adjust simultaneously, modification, easy for installation, industry spot stable and reliable operation, plug and play.
A kind of USB interface-based marking controller of the present invention comprises usb interface controller unit, data storage cell, program storage unit (PSU), D/A converting unit, logic control element and man-machine interface unit; Wherein
(1) the USB1.1 standard is supported in usb interface controller unit, has independently 8 bit data bus and 16 bit address buses, helps the peripheral circuit expansion of chip;
(2) data storage cell, when online use pattern as the data buffer of this marking controller, the marking data that temporary host computer transmits, the marking data of storage mark file when off line is used pattern;
(3) program storage unit (PSU), the firmware program of storage usb interface controller unit;
(4) D/A converting unit has 3 road D/A ALT-CH alternate channels, and marking data is carried out the D/A conversion, exports analog voltage signal respectively and goes to control galvanometer X-axis, Y-axis and laser power;
(5) logic control element, decipher address to the usb interface controller unit, produce the gating signal of D/A converting unit, data storage cell, program storage unit (PSU), man-machine interface unit, the high address of data storer is latched, for peripheral circuit provides I/O mouth;
(6) man-machine interface unit is made up of keyboard and LCD display module, when off line is used controller is carried out the mark file and chooses, sets operations such as mark parameter, deletion mark file.
Described USB interface-based marking controller, it is characterized in that control galvanometer X-axis is changed simultaneously with 2 road D/A that control the galvanometer Y-axis in the described D/A converting unit, its output process operational amplifier is so that the input voltage signal compatibility of its output voltage signal and galvanometer; The D/A circuit of control laser power has only 1 road D/A ALT-CH alternate channel, for 12 voltage output D C of 8 bit data bus compatibilities, the input voltage compatibility of its voltage output signal and laser power control signal requirement.
Described USB interface-based marking controller, it is characterized in that in the described man-machine interface unit, the interface mode of keyboard adopts independent mode, and each independent button is directly received on the I/O incoming line in man-to-man mode, and LCD shows the employing dot-matrix lcd module.
The present invention can use with computer interconnection, can use separately by divorced from computer again.When the content complexity of mark, when the marking data of generation was bigger, controller just used with computer interconnection, and the marking data of being handled through interpolation by computing machine is transferred to controller by usb bus and carries out real-time D/A switch, directly controls marking system.When the content of mark fairly simple, when the marking data that generates is smaller, can be kept at the marking data of handling through interpolation by computing machine in the storer of controller by USB interface, control the D/A switch of marking data then by the single-chip microcomputer in the controller, remove to control marking system again, single-chip microcomputer is handled with regard to not needing that marking data is carried out interpolation like this, thereby has improved the mark speed of controller significantly.In addition, mark content wherein can also arbitrarily be rewritten by USB interface by computing machine, and can edit, set operations such as mark parameter to it by keyboard on the controller and LCD demonstration.
Description of drawings
Fig. 1 is that the present invention forms synoptic diagram;
Fig. 2 is the usb interface controller element circuit;
Fig. 3 is data storage cell and program storage unit (PSU) circuit;
Fig. 4 is the D/A conversion unit circuit;
Fig. 5 is the logic control element circuit;
Fig. 6 is the logic control relation figure of controller logic control module;
Fig. 7 is man-machine interface unit circuit;
Fig. 8 is the process flow diagram of on-line working USB transmission course;
Fig. 9 is an off-line working USB transmission course process flow diagram;
Figure 10 is a firmware program framework process flow diagram;
Figure 11 is marking data output process flow diagram;
Figure 12 is keyboard input and LCD flow for displaying figure.
Embodiment
Below in conjunction with accompanying drawing the present invention is illustrated.
Fig. 1 is an overall framework synoptic diagram of the present invention, comprises usb interface controller unit, data storage cell, program storage unit (PSU), D/A converting unit, logic control element and man-machine interface unit.
The present invention is described in detail by embodiment below in conjunction with Fig. 2～Fig. 7:
1.USB interface controller unit
The usb interface controller element circuit as shown in Figure 2, it is by chip U1, U7, U8, U9, U10, socket and wire jumper J1, J2, J3, J5 and plucking number sign switch S4 form.
U1 selects for use the AN2131Q of EZ-USB series of Cypress company as usb interface controller, it is a full speed usb interface controller chip of supporting the USB1.1 standard, it is the core of entire circuit, have 80 pins, independently 8 bit data bus and 16 bit address buses are arranged, help the peripheral circuit expansion of chip, its processor is 8051 kernels of enhancement mode, compatible with general 8051 instructions, but fast 2.5 times of average running speed helps improving the speed of marking data output; The crystal oscillator of external 12MHz arrives 24HMz at chip internal by the frequency multiplier circuit frequency multiplication, and USBD-links to each other with D-with the D+ of Type B USB socket J1 respectively by two 22 Ω resistance with the USBD+ pin.6 pins such as PA2/OE#, PA3/CS#, PA4/FWR#, PA5/FRD#, PC6/WR#, PC7/RD# are multi-functional pins, and pin must connect and draw resistance when using second function, and leg signal is invalid when guaranteeing not have control signal output.It is in order to prevent that 8051 enter suspended state, to guarantee that EZ-USB can both move always that the WAKEUP# pin connects pull down resistor.
Whether wire jumper J2 decision EZ-USB disconnects when resetting reconnects operation, when 1-2 links to each other, has to disconnect to reconnect operation, does not disconnect reconnecting operation when 2-3 links to each other.Wire jumper J3 determines that 8051 kernels are to begin to obtain program code or begin to obtain code from external program memory from EZ-USB chip internal program RAM, when 1-2 links to each other, begin to obtain code from external program memory, the PSEN pin begins effectively from the address 0x0000 of program storage, begin to obtain program code among the program RAM internally when 2-3 links to each other, the PSEN pin begins effectively from the address 0x1B40 of program storage.Wire jumper J5 uses when the hardware circuit of controller is tested, and when 2-3 linked to each other, all functions pin of EZ-USB was floating empty so that the peripheral circuit of EZ-USB is carried out at board test, when normally using, 1-2 is linked to each other.
U7 is the SN75240PW chip of TI company, and it is the USB interface transient suppressor, is used for preventing the electrostatic damage usb circuit.
U8 is the MAX687 chip of MAXIM company, and it is the 3.3V linear voltage regulator, is used for a 5V voltage to become 3.3V.EZ-USB is the 3.3V power supply, and present most direct supply can only provide 5V voltage, therefore must become 3.3V to 5V voltage.The scope of the input voltage of U8 be 2.7V to 11.5V, the scope of output voltage be 3.15V to 3.45V, representative value is 3.3V, and the electric current of 200mA can be provided, and satisfies the requirement of EZ-USB to power supply fully.
U9 is the I2C serial EEPROM 24LC02 of Microchip company, and its capacity is 2Kbit (256 * 8), the scope of Vcc be 1.8V to 5.5V, can be erasable 1,000,000 times.It is mainly used to storage products identification code PID, the identification code VID of producer and equipment mark code DID, and this moment, first byte of serial EEPROM was necessary for 0xB0.It also can be used for storing the EZ-USB firmware program, and this moment, first byte of serial EEPROM was necessary for 0xB2, when AN2131Q powers on, its USB kernel can be automatically pack into the program storage area of RAM of AN2131Q of firmware program.
U10 is the MAX706 microprocessor monitors chip of MAXIM company, functions such as output reset signal, the effective hand-reset input of low level, WatchDog Timer, 1.25V threshold detector when having system's power on and off.The PFI pin is the power fail input end, R11 and R12 are divider resistance, when+when the 5V power source voltage was lower than 4.7V, the input voltage of PFI pin was lower than 1.25V, low level signal of power fail output terminal PFO output of MAX706, notice AN2131Q is that power supply power-fail is prepared.The WDI pin is the house dog input end, when the input signal of WDI pin did not change in 1.6s, house dog output terminal WDO can become low level, linked to each other with manual input end by diode D4, make reset output terminal produce a low level signal, AN2131Q is resetted.WatchDog Timer can make single-chip microcomputer break away from the deadlock state.
2. data storage cell and program storage unit (PSU)
Data storage cell and program storage unit (PSU) are made up of data-carrier store U3 and program storage U4, and its hardware circuit as shown in Figure 3.
The data storage cell data storage capacity is 2048K * 8, it has 20 bit address buses, address bus is divided into low 15 and high 6 two parts, low 15 bit address are by low 15 outputs of the address bus of AN2131Q, and high 6 data buss by AN2131Q are exported by the latch that is provided with in CPLD.Data storage cell when online use pattern as the data buffer of this marking controller, the marking data that temporary host computer transmits, the marking data of storage mark file when off line is used pattern, fast, the erasable number of times of read or write speed is not limit so it should have, data are not lost and characteristics such as memory capacity is big after the power down.Therefore can adopt the storage chip of the nonvolatile memory BQ4016MC of TI company as data storage cell, capacity is 1024K * 8 ,+5V power supply.Its inside is made up of the SRAM and the voltage monitoring circuit of lithium battery and standard.When voltage monitoring circuit finds that the Vcc pin voltage of BQ4016MC is lower than voltage decompression detection threshold 4.62V; internal control circuit takes the write-protect measure to protect its inner data not to be destroyed to SRAM automatically; all output pins are high-impedance state; all input pins are invalid; when Vcc is reduced to 3V; internal control circuit automatically switches to lithium battery to the power supply of SRAM by the outside, till Vcc recovers normal voltage.Therefore, after powering on, its use is the same with general SRAM, has read or write speed fast (70ns), erasable number of times without limits, internal data can not lost after the power down, and can preserve 10 years at least.Consider that TI company capacity is the pin of nonvolatile memory BQ4017MC of 2048K * 8 and the pin compatibility of BQ4016MC, the pin 2 that does not connect among the BQ4016MC is the A20 pin of address bus in BQ4017MC, other pins are all corresponding identical, what therefore in fact the latch among the CPLD was exported is 6 bit address lines, so that later on the data storer is carried out dilatation.
The firmware program of program storage unit (PSU) storage usb interface controller.Though the AN2131Q chip internal has the RAM of 8KB, can be used for storing the firmware program of downloading from main frame, but the program's memory space of its internal RAM can not surpass 6976 bytes, consider that the function ratio that controller will realize is more, firmware program can be bigger, so firmware program all is placed on outside program's memory space, therefore in the peripheral expansion of usb interface controller a program storage unit (PSU)
Procedure stores chip U4 adopts the AT29C512 Flash storage chip of Atmel company.But its to be capacity that a kind of CMOS of employing technology is made be 64K * 8 32 pin read the erasable ROM (read-only memory) of removing of fast programming fast, the read access time is 70ns, can not need to insert latent period with general high speed microprocessor coupling.For fear of bus collision, two gatings control pins are arranged on the chip: chip enable CE and output enable OE.It can carry out a page programming operation, and home address and the data latching of 128B arranged.Have the programming cycle time fast, the page or leaf wipe with the programming cycle time all be 10ms.Single power supply voltage is used for working power and the programming power supply all is+5V ± 10%.Ternary output, input and output all with the Transistor-Transistor Logic level compatibility.Erasable number of times capable of circulation is 10,000 times.Writing on programmable device of firmware program carried out, and should forbid writing the writing enable pin WE and should connect high level of chip during the chip operate as normal.For program storage is chosen in the AN213lQ operational process always, chip enable CE pin should ground connection.Program storage read enable pin OE control by the PSEN# pin.
3.D/A converting unit
The D/A converting unit is carried out the D/A conversion to marking data, and the output analog voltage signal goes to control galvanometer X-axis and Y-axis and laser power, so it has 3 road D/A ALT-CH alternate channels.
The hardware circuit diagram of D/A converting unit as shown in Figure 4, it is made up of two D/A conversion chip U5 and U6, two operational amplifier U12 and U13 and standard of precision voltage chip U11.
The effect of U5 is that the galvanometer X-axis of marking data and Y-axis control signal are carried out D/A switch, makes them become analog voltage signal and removes to control galvanometer X-axis and y-axis motor.For the curve smoothing that makes mark changes, 2 road D/A of control galvanometer X-axis and Y-axis should change simultaneously, so that the motor of these two axles rotates when mark is exported simultaneously, so select the D/A switch chip MX7837 of MAXIM company for use, it is binary channels, 12, multiplication, voltage output type D/A converter, and every road D/A converter all has an output amplifier and a feedback resistance.It has 8 bit data bus interfaces of double buffering, and with 8 bus compatibles of single-chip microcomputer, the input of 12 translation data needs twice write operation.All logical signals all be low level trigger and with Transistor-Transistor Logic level and CMOS level compatibility.U5 employing ± 12V or ± 15V power supply, transformed error be ± 1LSB that it is 4 μ s that voltage is exported Time Created.
The D/A circuit U 11 of control laser power is selected the standard of precision voltage chip MAX675 of MAXIM company for use, it has only 1 road D/A ALT-CH alternate channel, for with 12 voltage output D C of 8 bit data bus compatibilities, the input voltage compatibility that its voltage output signal and laser power control signal require.U5 inside does not have built-in reference voltage, and its reference voltage need be by VREFA pin and the input of VREFB pin.In order to obtain high-precision D/A conversion, the reference voltage source of high stability must be arranged.The effect of U11 is the reference voltage that high stability is provided for U5.It is+5V standard of precision voltage chip, has excellent temperature stability, can guarantee extremely low temperature drift coefficient, also has characteristics such as low suction electric current and low noise simultaneously, the scope of input voltage be 8V to 33V, representative value is 15V.Can finely tune the output voltage of U5 by potentiometer Rp1, the scope of adjusting is 5V ± 150mV.
U12, U13 are low noise, the high precision operating amplifier MAX427 of MAXIM company.The voltage output range of U5 is-5V-0V, and the input voltage range that the galvanometer control circuit requires is-5V-+5V therefore, must become by operational amplifier handle-5V-0V-5V-+5V.U12, U13 have low noise, ultralow offset voltage and characteristics such as temperature drift, high voltage gain, employing ± 15V power supply.Can finely tune the input off-set voltage of two-way operational amplifier respectively by potentiometer Rp2 and Rp3.
U6 is the D/A switch chip MX7248 of MAXIM company, and it is 12 voltage output types of single channel D/A converter, and inside carries Zener voltage reference and voltage output amplifier, does not therefore need outside reference voltage source.It has the double buffer logic interface, 8 bit data bus, and the input of 12 translation data needs twice write operation.All logical signals all be low level trigger and with Transistor-Transistor Logic level and CMOS level compatibility.U6 employing+15V power supply, transformed error are ± 1LSB that it is 5 μ s that voltage is exported Time Created.
The effect of U6 is that the power control signal to marking data carries out D/A switch, makes it become the output power that analog voltage signal removes to control laser instrument.The voltage output range of U6 is 0V-+10V, with the input voltage compatibility of laser power control signal requirement, so do not need operational amplification circuit that it is carried out voltage transformation.
4. logic control element
Logic control element adopts the MAX3000A series CPLD chip of altera corp, and its hardware circuit as shown in Figure 5.
Logic control element is finished the address of AN2131Q is deciphered, and produces the gating signal of each functional unit of peripheral circuit, the high address of data storer is latched, for peripheral circuit provides I/O mouth.Because the I/O pin that logic control element needs is many, the inconvenience that brings for fear of a large amount of chips, so select the EPM3128ATC100 in the serial programmable logic device (CPLD) of the MAX3000A of altera corp for use, it has 100 pins, 80 can be distributed I/O.Because logic control relation can be downloaded to by jtag interface by eda softwares such as MAX+PLUS and Quartus and goes among the CPLD, and its logic control relation of change under can be at the hardware circuit of the CPLD constant situation.
MAX3000A series CPLD is high-performance, low cost programmable logical device.It adopts the MAX architecture, has the ability of carrying out the 3.3V in-system programming by jtag interface.Highdensity PLD has 600 to 10,000 available door.Logical time delay between the pin is 4.5ns, and the multivoltage interface can make the device kernel be operated in 3.3V and I/O pin and 5V, 3.3V, 2.5V logic level compatibility, the scope of pin number from 44 to 256.It adopts CMOS EEPROM technology, and programming and erasing times can reach 100 times.Have encrypted bits able to programme, can encrypt, make others can not read the interior design data of chip easily the design in the chip.
Fig. 6 is the logic control relation figure of controller logic control module.Can be input to it among the eda software MAX+PLUS of altera corp or the Quartus with the method for figure input and compile, download line by JTAG then and download among the CPLD.
The address bus of AN2131Q is 16, can visit outside 64KB storage space, but in the address is the storage space of 0x0000-0x1FFF and 0x7B40-0x7FFF, control signals such as its RD#, WR#, CS#, OE# are invalid, thereby when the AN2131Q access external memory, can not the outside 64KB storage space of addressing continuously.For external data memory is realized consecutive access, make full use of its storage space, storer is read and write by page or leaf, every page of size is 32KB, its memory unit address is provided by the low 15 bit address line A0-A14 of single-chip microcomputer, for fear of the invalid address space of read-write control signal, the address of every page of storage unit is decided to be 0x8000-0xFFFF.The high address of storer is a page address, and for the storer of 2048K * 8, its page address is from 0x00 to 0x40.From the logic control relation figure of Fig. 6 as can be seen, as AN2131Q visit 0x0000 during to the storage space of 0x7FFF, the A15 pin is a low level, the chip selection signal CE of external data memory is a high level, external data memory does not have selected, single-chip microcomputer can not the access external data storer, and as AN2131Q visit 0x8000 during to the storage space of 0xFFFF, the A15 pin is a high level, the chip selection signal CE of external data memory is a low level, external data memory is selected, and single-chip microcomputer can the access external data storer.The page address of external data memory (storer is high 6) 1A15-1A20 is exported by latch by data bus.
Address wire A4-A15 participates in decoding, produces the chip selection signal of exterior I/O mouth by code translator.Each port address is as follows:
1.DAC1_2:D/A conversion start signal port LDACa address-0x300X (X is an arbitrary value, down together);
Chip selection signal output port CSa address-0x301X;
2.DAC3:D/A conversion start signal port LDACb address-0x302X;
Least-significant byte output port CSLSB address-0x303X;
High 4 output port CSMSB address-0x304X;
3.LCD: chip selection signal output port CS1 address-0x305X;
4. acousto-optic Q-switching: control signal output ends mouth Q address-0x306X;
5. data-carrier store: high address output port AddrH address-0x307X;
6. keyboard: interface A port KeyA address-0x308X;
Interface B port KeyB address-0x309X.
The read-write RD of AN2131Q and WR and data bus D0-D7 are in order to improve their driving force through CPLD output.The maximum output current of each pin of AN2131Q has only ± 1.6mA, and the chip that AN2131Q data bus and control bus will drive has 5 more than, the maximum output current of considering each I/O pin of MAX3000A series CPLD reaches ± 25mA, therefore do the data bus that both improved single-chip microcomputer and the driving force of control bus like this, save the trouble of using impact damper again, made full use of the I/O pin of CPLD.
The RESET signal of microprocessor monitors chip U10 output is that low level is effective, and that the reset signal of AN2131Q is a high level is effective, therefore makes the anti-phase back output in CPLD of RESET signal.
5. man-machine interface unit
The man-machine interface unit mainly is to choose, set control operations such as mark parameter, deletion mark file to what controller carried out the mark file when off line is used, it is made up of keyboard and LCD display module, its hardware circuit as shown in Figure 7, it mainly comprises the phase inverter U15 of keyboard interface socket P9 and LCD display module interface socket P2 and band application schmitt trigger.
In order to utilize the I/O pin that makes full use of CPLD, simplify the button polling routine, the interface mode of keyboard adopts independent mode, each independent button is directly received on the I/O incoming line of CPLD in man-to-man mode, each input pin all connects a pull-up resistor, make keyboard to be input as low level effective.The state of the state of 8 button KEYA0-KEYA7 of keyboard port A and 8 button KEYB0-KEYB7 of port B is read in by data bus by single-chip microcomputer, and the phase inverter U15 of other input pins by the band application schmitt trigger directly links to each other with INT0, INT1, the interrupt request singal input pins such as INT4, INT6 of single-chip microcomputer.The phase inverter of band application schmitt trigger makes the waveform input signal of button become steep, guarantees that the monolithic machine can detect interrupt request singal reliably.
The functional definition of each button is as follows:
S1-numerical key 0; S2-numerical key 1; S3-numerical key 2; S4-numerical key 3; S5-numerical key 4;
S6-numerical key 5; S7-numerical key 6; S8-numerical key 7; S9-numerical key 8; S10-numerical key 4:
S11-keeps; S12-"+" number; S13-"-" number; S14-confirms; The S15-cancellation;
S16-keeps; S17-stops; S18-begins; S19-resets; The S20-function;
The model of LCD display module is YM12864F, and its interface pin as shown in Figure 7.YM12864F is 128 * 64 dot-matrix lcd modules, it carries T6963C lcd controller and T6A39, T6A40 lcd driver, the outside display-memory (SRAM) of 8KB, the inside character generator CGROM of 128 characters has figure, character, figure and character to mix three kinds of display modes and 6 * 8 and 8 * 8 two kinds of display fonts.
YM12864F can adopt negative supply and+5V power supply, also can adopt single-+the 5V power supply.Adopt negative supply and+5V can regulate LCD contrast of display degree by potentiometer Rp4 during power supply.Adjustable resistance R52 is used for regulating the backlight illumination of display module.
Below in conjunction with Fig. 8 to Figure 12 the course of work of the present invention is described:
The transmission of USB batch data is the transmission of large quantities of serial datas, light has the form of marking data also not all right, must stipulate the transmission sequence of marking data, allow single-chip microcomputer know when marking data transmits beginning, when end of transmission (EOT), each byte belongs to which part of which mark interpolated point data.
We stipulate, first bulk transfer affairs to begin be the marking data transmission beginning of a mark file, behind the marking data end of transmission of mark file, main frame sends a marking data end of transmission signal by control transmission, and single-chip microcomputer is just known the marking data end of transmission.In the bulk transfer process, marking data is the marking data by the marking data of the marking data of the 1st interpolated point → 2nd interpolated point → 3rd interpolated point ... such sequential delivery, and each byte of each interpolated point data is transmitted in the following order:
1. during the vector mark: galvanometer X-axis positioning control signal least-significant byte XL → galvanometer X-axis positioning control signal most-significant byte XH → galvanometer Y-axis positioning control signal least-significant byte YL → galvanometer Y-axis positioning control signal most-significant byte YH → acousto-optic Q-switching control signal Q;
2. during the dot matrix mark: galvanometer X-axis positioning control signal least-significant byte XL → galvanometer X-axis positioning control signal most-significant byte XH → galvanometer Y-axis positioning control signal least-significant byte YL → galvanometer Y-axis positioning control signal most-significant byte YH.
When the single-chip microcomputer in the controller correctly takes out marking data from the data that usb bus transmits after, add control signal corresponding, as: delay control signal, laser power control signal are (with 2 byte representations, PL represents least-significant byte, PH represents most-significant byte), with the interpolated point is unit, exports by the order that usb bus transmits.During interpolated point of each output, the output order of each byte of its data is as follows:
1. during the vector mark: galvanometer X-axis positioning control signal least-significant byte XL → galvanometer X-axis positioning control signal most-significant byte XH → galvanometer Y-axis positioning control signal least-significant byte YL → galvanometer Y-axis positioning control signal most-significant byte YH → laser power control signal least-significant byte PL → laser power control signal most-significant byte PH → acousto-optic Q-switching control signal Q → delay control signal;
2. during the dot matrix mark: galvanometer X-axis positioning control signal least-significant byte XL → galvanometer X-axis positioning control signal most-significant byte XH → galvanometer Y-axis positioning control signal least-significant byte YL → galvanometer Y-axis positioning control signal most-significant byte YH → laser power control signal least-significant byte PL → laser power control signal most-significant byte PH → acousto-optic Q-switching goes out optical control signal Q → delay control signal → acousto-optic Q-switching and closes optical control signal Q;
The process flow diagram of on-line working USB transmission course as shown in Figure 8.At first host computer sends the controller state request of obtaining by control transmission to controller, controller uses the data of 1 byte to return controller state, if controller returns " in the mark " or " makeing mistakes " state or does not return the controller state data at the appointed time, then host computer is reported the state of controller, if controller returns " free time " state, then host computer sends to controller and the mode of operation request is set and the mark parameter request is set, tell controller mark mode of operation to be " on-line working; vector mark or dot matrix mark ", and definite interpolation cycle and laser power.If host computer is received the answer signal that control operation completes successfully in the state phase of control transmission, then host computer just can use OUT affairs (length in data net load district is 64 bytes) in the bulk transfer to transmit the marking data of each interpolated point successively.The marking data that controller transmits host computer leaves in the impact damper of 32KB, and when being filled with the 16KB marking data in the impact damper, controller regularly produces interruption with interpolation cycle, each 1 interpolated point of output that interrupts.When marking data deficiency 16KB, host computer is by sending the mark output that beginning mark request comes the start-up control device.When the marking data end of transmission, host computer sends the DTD request by control transmission, tells controller marking data end of transmission.In online mark process, Halfway Stopping mark if desired, host computer can finish the mark operation by abandoning the mark request.
The process flow diagram of off-line working USB transmission course as shown in Figure 9.At first, host computer sends the controller state request of obtaining by control transmission to controller, controller uses the data of 1 byte to return controller state, if controller returns " in the mark " or " makeing mistakes " state or does not return the controller state data at the appointed time, then host computer is reported the state of controller, if controller returns " free time " state, then host computer sends the remaining memory space request of obtaining to controller again, controller returns controller remaining memory space size with the data of 4 bytes, returns the quantity of documents of storage with 1 byte.If the remaining memory space is 10 less than mark file size or quantity of documents, then host computer just reports that controller remaining space deficiency or quantity of documents exceed the quata, if if the remaining memory space more than or equal to mark file size and quantity of documents less than 10, then host computer re-uses control transmission and sends to controller and the mode of operation request is set and the mark parameter request is set, tell controller mark mode of operation to be " off-line working, vector mark or dot matrix mark ", and definite interpolation cycle and laser power.If host computer is received the answer signal that control operation completes successfully in the state phase of control transmission, then host computer uses OUT affairs (length in data net load district is 64 bytes) in the bulk transfer to transmit the marking data of each interpolated point successively, and the data storage that controller transmits host computer is in the data-carrier store of controller.When the marking data end of transmission, host computer sends the DTD request by control transmission, tells controller marking data end of transmission, waits for off-line working.
The laser marking controller based firmware is the bottom program that is cured to the EZ-USB code area, can write with assembly language or C51, it is mainly finished usb protocol and handles and exchanges data, Configuration Control Unit, functions such as the usb communication of realization and computing machine and output marking data.Firmware is the emphasis and the difficult point of USB device exploitation, design firmware, just must both be familiar with usb protocol, understands the internal hardware resources of usb interface controller chip again, and the programming experience of assembly language or C51 must be arranged.Firmware should be realized the USB transmission of USB device and main frame, realize the function of USB device again, so its performance directly determines the actual transmission speed of usb communication and the performance of USB device.Owing to used EZ-USB chip, manufacturer that director demon framework and general driving program are provided, accelerated the progress of program development greatly, and the difficulty of development sequence.
The firmware program framework will be finished initialization, the power management when handling standard USB device request and self-defining device request and USB and hanging up of EZ-USB, and the realization of controller function is finished by three functional modules such as the marking data transmission of firmware, marking data output, man-machine interfaces.
The program frame process flow diagram of controller firmware as shown in figure 10.Behind the EZ-USB electrification reset, program frame is all internal state variable of initialization at first, invoke user initialization function T D_Init () then, and initialization user's global state variable, and open interruption simultaneously.After the task above finishing, the EZ-USB firmware program just carried out the primary equipment re-enumeration till end points 0 receives a SETUP bag every 1 second.In case EZ-USB receives the SETUP bag, the firmware program framework just begins to carry out Task Distribution.Task Distribution is exactly repeatedly to carry out following processes successively:
1. judged whether that key presses,, then called man-machine interface function Key_Display () if having.The task of function Key_Display () is that button is judged, analyze its function, and it is handled accordingly, as: select the mark file, set the mark parameter, deletion mark file etc., and its corresponding information is shown by the LCD display module.2. invoke user function T D_Poll ().User function TD_Poll () is exactly a marking data USB transmission firmware module, to be receiving computer be transferred to the marking data of EZ-USB bulk transfer end points by usb bus to its task, and decide according to the mode of operation (on-line working or off-line working) of controller and temporarily to be stored in them in the impact damper of controller or to be stored in the mark file storing space.3. judged whether device request,, then analyzed this request and make corresponding operation if having.The controller firmware program not only will be made response to the request of USB standard device, also will make corresponding processing to the self-defining device request.Before the marking data transmission, computing machine also will transmit some control commands to controller, as inquire about controller state, controller and reset, select mark mode and transmission mark delay parameter and laser power parameter etc., these signals all are transferred to controller with the form of self-defining device request by the SETUP bag, thereby reach the purpose that controller is controlled.Under the situation of on-line working pattern, when marking data is transferred to some, computing machine sends beginning mark instruction by the SETUP bag, start Timer0 and begin mark output, behind the marking data end of transmission of a file, computing machine sends the data transmission instruction that finishes by SETUP bag, and controller can be operated in the normal termination mark.If mark needs Halfway Stopping, computing machine sends by the SETUP bag and abandons the mark request, and the mark process is ended.4. need to judge whether initialization Timer0, if desired, then call the initialization function T imer0_Init () of Timer0.All to carry out initialization before each mark file output to Timer0.Initialized operation comprises the mode of operation of setting Timer0, count value, opens Timer0 and interrupts etc.5. judge whether the USB kernel receives the USB pending signal.If receive, invoke user function T D Suspend () then, this function can make equipment be in low power consumpting state and return true or FALSE.When TD_Suspend () is returned as TRUE, detect whether the USB wake events takes place again, if do not detect, then processor enters suspended state, if detect, then invoke user function T D_Resume () is restarted processor, program continues operation.If be returned as FALSE from TD_Suspend () function, then program continues operation.
Marking data output is finished by the clock interrupt service routine of Timer0.
Marking data transmission firmware module TD_Poll () mainly finishes the task of the marking data that reception transmits by usb bus, and the process flow diagram of its implementation as shown in Figure 9.
Firmware program at first carries out initialization to variable, then according to the mode of operation that mode of operation requirement analysis mark file is set that sends by control transmission, judgement is any in online vector mark, online dot matrix mark, the mark of off line vector and the mark of off line dot matrix.
When the mode of operation of mark file was online vector mark, firmware program was carried out following process in order:
1. whether the bulk transfer end points OUT2 (the bulk transfer end points of supposing the reception marking data is the OUT2 end points) that judges EZ-USB has marking data.If the OUT2 end points does not have marking data, then directly turn back to the program frame of firmware, other statement and function in the executive routine framework from TD_Poll () function.
2. judge in the impact damper whether temporary marking data surpasses 16KB, and just judge whether the value at the indexed variable MarkFlag of mark equals 0.When these two conditions satisfy simultaneously, just start Timer0 and pick up counting, and give MarkFlag 1 assignment, to show the mark well afoot,, the Timer0 timing time interrupts when then just producing Timer0, carry out marking data output.
3. judge whether impact damper has been filled with marking data.For fear of losing of marking data, before depositing marking data, to judge whether full of data of impact damper toward impact damper.If impact damper is full, then enter waiting status, till having marking data output to make impact damper vacate a buffer cell.
4. the marking data of getting an interpolated point from the OUT2 end points deposits impact damper in, makes the next buffer cell of impact damper input pointed then, makes the value of counter i increase by 5 again.I is used for counting the byte number of taking data from the OUT2 end points away, and it is because the marking data of vector mark interpolated point is made of 5 bytes that the value of i adds 5.
5. the size that compares the byte counter OUT2BC value of i value and OUT2 end points.If i, illustrates the data of OUT2 end points less than OUT2BC and has not also got, must continue to begin to carry out from the process 2 of front, the marking data of next interpolated point in the OUT2 end points is deposited in the impact damper.If i, illustrates the data of OUT2 end points greater than OUT2BC and has got, write 0 then in OUT2BC, turn back to the program frame of firmware again.Write in 0 to OUT2BC is in order to make the OUT2 end points be ready to receive next packet when calling TD_Poll () function next time.
When the mode of operation of mark file was online dot matrix mark, the data transmission procedure of the transmission course of marking data and online vector mark was basic identical.Because the interpolated point data of dot matrix mark are made of 4 bytes, thereby after having got the marking data of an interpolated point, the value of counter i increases by 4 at every turn.
When the mode of operation of mark file was mark of off line vector and the mark of off line dot matrix, their marking data transmission course was all identical, and firmware program is carried out following processes in order:
1. whether the bulk transfer end points OUT2 that judges EZ-USB has marking data.If the OUT2 end points does not have marking data, then direct implementation 5.
2. whether the judgment data value that begins to transmit indexed variable StartFlag equals 0.If the value of StartFlag equals 0, then call Start_Addr () function.Start_Addr () function realizes that mainly mark parameter that the self-defining device request by control transmission is transmitted and mark type stores are in data-carrier store, set the start address of mark file storage, and make marking data import functions such as pointed start address.After program was returned from Start_Addr () function, the value that makes variable StartFlag was 1, had begun transmission to show marking data.If the value of variable StartFlag is not equal to 0, then explanation has begun the transmission of marking data, does not need to call Start_Addr () function, directly implementation 3.
3. the marking data of getting 1 byte from the OUT2 end points deposits the storage unit of marking data input pointed in, makes the next storage unit of marking data input pointed then, then makes the value of counter i add 1.
4. the size that compares the byte counter OUT2BC value of i value and OUT2 end points.If i, illustrates the data of OUT2 end points less than OUT2BC and has not also got, must continue to carry out the step that marking data is got in the front, the marking data of next byte in the OUT2 end points is deposited in the storer.If i, illustrates the data of OUT2 end points greater than OUT2BC and has got, write 0 then in OUT2BC, make the OUT2 end points be ready to receive next packet.
5. whether the value of judging marking data end of transmission indexed variable DataFinish equals 0.If the value of DataFinish equals 0, the marking data end of transmission then is described, call End_Addr () function then, set the end address of mark file, after program was returned from End_Addr () function, the value that makes variables D ataFinish again was 1, the value that makes variable StartFlag is 0, return to marking data transmission original state before with regard to the value that makes these two variablees like this, turn back to the program frame of firmware then, prepare the transmission of marking data next time.If the value of variables D ataFinish is not equal to 0, illustrate that then marking data does not also have end of transmission, turn back to the program frame of firmware then, prepare to receive the bulk transfer of USB next time of marking data.
Marking data output firmware module is the interrupt service routine of Timer0, mainly finishes the task that the marking data that is stored in impact damper or the data-carrier store is carried out D/A conversion output, and the process flow diagram of its implementation as shown in figure 11.
When the Timer0 timing time then, produce Timer0 and interrupt, enter the interrupt service routine of Timer0.Firmware program at first stops the Timer0 timing, analyzes the mode of operation of mark file then, and judgement is any in online vector mark, online dot matrix mark, the mark of off line vector and the mark of off line dot matrix.
When the mode of operation of mark file was online vector mark, interrupt service routine was carried out following process in order:
1. judge whether impact damper is empty.If impact damper is empty, illustrating does not wherein have marking data, then turns off laser, judges whether the value of marking data end of transmission indexed variable DataFinish equals 0 again.If DataFinish equals 0, just illustrating that marking data has been exported finishes, then make variable MarkFlag equal 0, variables D ataFinish equals 1, and mark input and output pointer is all resetted, make them all return to mark output state before like this, interrupt then returning, wait for the output of mark next time.If DataFinish is not equal to 0, illustrate that marking data does not also have output to finish, then start the Timer0 timing, interrupt then returning, wait for and carry out mark output once more.
2.X the positioning control signal of axle is sent into DACl, the positioning control signal of Y-axis is sent into DAC2, starts DACl and DAC2 then simultaneously.
3. laser power signal is sent into DAC3, starts DAC3 then.
4. output acousto-optic Q-switching control signal makes the mark output pointer point to next buffer cell then.
5. start the Timer0 timing, interrupt then returning, wait for the marking data output of next interpolated point.
When the mode of operation of mark file is online dot matrix mark, it is basic identical when interrupt service routine implementation and mode of operation are online vector mark, during online dot matrix mark output that different is, be used in and judge closing laser and after starting DAC3, opening the acousto-optic Q-switching control signal output function of these two online vector marks of operation replacement of laser when exporting before the whether full process of impact damper.
When the mode of operation of mark file was the mark of off line vector, interrupt service routine was carried out following process in order:
1. whether judgement just equals 0 in the value of mark indexed variable MarkFlag.If the value of MarkFlag equals 0, the output first time that current marking data output is this mark file is described, then call Set_Pointer () function.Set_Pointer () function is mainly realized reading the start address of mark file and it is composed the function of giving the mark output pointer from data-carrier store.And then the value that makes variable MarkFlag is 1, exports to show marking data.
2. judging whether marking data is exported finishes.If output finishes, the value that then makes variable MarkFlag is 0, closes laser then, interrupts returning again, and waits for the output of next mark file.
3.X the positioning control signal of axle is sent into DAC1, the positioning control signal of Y-axis is sent into DAC2, starts DAC1 and DAC2 then simultaneously.
4. laser power signal is sent into DAC3, starts DAC3 then.
5. output acousto-optic Q-switching control signal makes the mark output pointer point to next storage unit then.
6. start the Timer0 timing, interrupt then returning, wait for the marking data output of next interpolated point.
When the mode of operation of mark file is the mark of off line dot matrix, it is basic identical when interrupt service routine implementation and mode of operation are the mark of off line vector, during off line dot matrix mark that different is output, whether equal closing laser and starting before 0 the process with the value of judgement symbol variable MarkFlag and open the acousto-optic Q-switching control signal output function of these two operations of laser when replacing the mark of off line vector to export after the DAC3.
Wherein mark file of the modification of the selection of mark file, mark parameter during man-machine interface firmware module Key_Display () function is mainly finished the data storer when off line is used, deletion, begin mark, abandon mark, operation such as controller resets, thereby realize the control to controller, the process flow diagram of its implementation as shown in figure 12.
Firmware module at first carries out initialization to variable, analyzes the function that it will be realized according to the key assignments of input then, determine be select the mark file, revise the mark parameter, any in 3 kinds of operations such as deletion mark file.
Whether when the function key of input is selection mark file, at first judging has the reference number of a document input, if not just wait always, till the reference number of a document input would be arranged.If the reference number of a document input is arranged, judge that then whether the file selection is confirmed, if do not confirm, just directly returns from function.If file is selected to confirm, just specify the reference number of a document of selecting, then again the reference number of a document of selecting is shown by the LCD display module, turn back to the program frame of firmware then from function.
When the function key of input is modification mark parameter, at first select the parameter that to revise.Whether if what select is to revise laser power: at first judging has the parameter input, if there is not the parameter input just to wait for always, till the parameter input is arranged; If parameter input is arranged, then whether judgement is revised and is confirmed, does not have affirmation if revise, and just directly returns from function, confirms if revise, and shows with regard to the mark parameter of preservation modification and by the LCD display module, then turns back to the program frame of firmware again.If what select is to revise delay parameter, the process of its execution is identical with the process of revising laser power.
When the function key of input is deletion mark file, at first select the deletion mode.If what select is last file of deletion: judge that at first whether deletion is confirmed, if do not confirm, just directly returns from function; If deletion obtains confirming, just from data-carrier store, remove the information of a last file of numbering, and then show " deletion finishes " information by the LCD display module, turn back to the program frame of firmware at last again from function.If what select is the deletion all files, its implementation process with last file of deletion substantially is identical, and different is after deletion is confirmed, just the information of All Files to be deleted from data-carrier store.
In addition, the beginning mark, abandon function keys such as mark, controller reset and directly link to each other with the external interrupt input pin of EZ-USB, their function realization is to finish by interrupt service routine separately.
Claims (3)
1. a USB interface-based marking controller comprises usb interface controller unit, data storage cell, program storage unit (PSU), D/A converting unit, logic control element and man-machine interface unit; Wherein
(1) the USB1.1 standard is supported in usb interface controller unit, has independently 8 bit data bus and 16 bit address buses, helps the peripheral circuit expansion of chip;
(2) data storage cell, when online use pattern as the data buffer of this marking controller, the marking data that temporary host computer transmits, the marking data of storage mark file when off line is used pattern;
(3) program storage unit (PSU), the firmware program of storage usb interface controller unit;
(4) D/A converting unit has 3 road D/A ALT-CH alternate channels, and marking data is carried out the D/A conversion, exports analog voltage signal respectively and goes to control galvanometer X-axis, Y-axis and laser power;
(5) logic control element, decipher address to the usb interface controller unit, produce the gating signal of D/A converting unit, data storage cell, program storage unit (PSU), man-machine interface unit, the high address of data storer is latched, for peripheral circuit provides I/O mouth;
(6) man-machine interface unit is made up of keyboard and LCD display module, when off line is used controller is carried out the mark file and chooses, sets operations such as mark parameter, deletion mark file.
2. USB interface-based marking controller as claimed in claim 1, it is characterized in that control galvanometer X-axis is changed simultaneously with 2 road D/A that control the galvanometer Y-axis in the described D/A converting unit, its output process operational amplifier is so that the input voltage signal compatibility of its output voltage signal and galvanometer; The D/A circuit of control laser power has only 1 road D/A ALT-CH alternate channel, for 12 voltage output D C of 8 bit data bus compatibilities, the input voltage compatibility of its voltage output signal and laser power control signal requirement.
3. USB interface-based marking controller as claimed in claim 1 or 2, it is characterized in that in the described man-machine interface unit, the interface mode of keyboard adopts independent mode, each independent button is directly received on the I/O incoming line in man-to-man mode, and LCD shows the employing dot-matrix lcd module.
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