CN101000745A - Current driving circuit - Google Patents

Current driving circuit Download PDF

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Publication number
CN101000745A
CN101000745A CNA2007100012579A CN200710001257A CN101000745A CN 101000745 A CN101000745 A CN 101000745A CN A2007100012579 A CNA2007100012579 A CN A2007100012579A CN 200710001257 A CN200710001257 A CN 200710001257A CN 101000745 A CN101000745 A CN 101000745A
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China
Prior art keywords
current
output
voltage
grid
bias voltage
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CNA2007100012579A
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CN100538798C (en
Inventor
水木诚
大森哲郎
小宽
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • Y02B20/325
    • Y02B20/42

Abstract

A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Description

Current driving circuit
Technical field
The present invention relates to a kind of current driving circuit that is used to export corresponding to a plurality of output currents of reference current.
Background technology
As the load that need handle by steady current, known have LED (light emitting diode) display panel of having arranged a plurality of light emitting diodes, arranged organic EL (electroluminescence) display panel of organic EL device of the electroluminescence phenomenon of a plurality of employing organic compounds, or the like.In such display panel, a plurality of LED or organic EL are as light emitting devices, and display panel has very big display area.Therefore, the current driving device that is used to drive display panel can not be formed by single current driving circuit (IC).For this reason, usually, a plurality of current driving circuits are used for the single display panel, drive operation and are shared by a plurality of current driving circuits and carry out thereby make.
Figure 13 is a structural drawing of describing exemplary current known driving circuit.Described current driving circuit comprises two current driving circuits 90 and reference current supply circuit 91.Each current driving circuit 90 comprise reference current input terminal 901, bias voltage generation transistor 902, the individual driving transistors 903-1 of n (n is a natural number) to 903-n and n output current lead-out terminal 904-1 to 904-n.N output current Iout-1 is to Iout-n in each current driving circuit 90 output, and the current value that each output current had is corresponding to given reference current Iref.Reference current supply circuit 91 comprises PMOS transistor 911,912-1 and 912-2.Reference current supply circuit 91 is supplied with reference current Iref to each current driving circuit 90.In Figure 13, the quantity of electric current supply circuit 90 is 2, and formed reference current supply circuit 91 is used for supplying with two reference currents.
Yet, in traditional technology, can only use the current driving circuit of predetermined quantity.Particularly, because reference current must supply to each current driving circuit, the quantity of current driving circuit can not be greater than the quantity of reference current to be supplied with.As indicated above, the quantity of current driving circuit to be used is restricted according to the structure of reference current supply circuit, makes the quantity of current driving circuit to be used freely not change.
Summary of the invention
According to an aspect of the present invention, a kind of current driving circuit comprises: the reference current input terminal, supply with first reference current to it; Current mirror circuit, it is used for receiving first reference current of supplying with to described reference current input terminal at its input end, and from first internal current of its output output corresponding to described first reference current; Bias voltage generation part, it is used to receive first internal current from described current mirror circuit, and produces the bias voltage corresponding to described first internal current; The output reference current generation section, it is used to receive the bias voltage that the part generation is taken place by described bias voltage, and produces second reference current corresponding to described bias voltage; The reference current lead-out terminal, its second reference current that is used for being produced by described output reference current generation section outputs to the outside; Internal current generation transistor, it is used for, and the bias voltage that part produces takes place by described bias voltage in reception at the grid place, and produces second internal current corresponding to described bias voltage; And output current generation section, it is used to receive second internal current that is produced by described internal current generation transistor, and produces n output current corresponding to described second internal current.
Adopt this configuration, current driving circuit can move in the mode of chain reaction.Therefore, the quantity of current driving circuit to be connected can adopt simple mode to change, and does not need to change the quantity of the reference current of being supplied with.
Preferably, described current driving circuit further comprises: the reference voltage node; Operational amplifier; With the adjusting transistor, wherein said reference voltage node receives reference voltage, non-inverting input of wherein said operational amplifier is connected to described reference voltage node, and the reversed input terminal of described operational amplifier is connected to the transistorized source electrode of described adjusting, and the transistorized source electrode of wherein said adjusting is connected to described reference current input terminal, described adjusting transistor drain is connected to the input end of described current mirror circuit, and the transistorized grid of described adjusting receives the output of described operational amplifier.
In described current driving circuit, current driving circuit can connect into chain form, and does not need to provide separately from the outside reference current supply circuit.
Preferably, take place in the part at described bias voltage, the current/voltage-converted coefficient that is used for described first internal current is converted to described bias voltage is variable, and in described output reference current generation section, the voltage/current conversion coefficient that is used for described bias voltage is converted to described second reference current is variable.
In described current driving circuit, the circuit values of each output current that produces in described output current generation section can be controlled by the current/voltage-converted coefficient of regulating it.In addition, by regulation voltage/current conversion coefficient, the reference current with appropriate electrical flow valuve can be fed into the current driving circuit in the next stage.
Preferably, described output current generation section comprises grid voltage generation part, a grid circuit and n driving transistors, described grid voltage generating unit divides reception described second internal current, and generation is corresponding to the grid voltage of described second internal current, one termination of described grid circuit is received by described grid voltage the grid voltage that part produces is taken place, and the other end of described grid circuit is connected to one grid in the described n driving transistors, in the described n driving transistors grid separately each is connected to described grid circuit, and the voltage that the output current of each output in the described n driving transistors applies corresponding to the grid to himself, the current/voltage-converted rate that part takes place described bias voltage is provided so that, when the current value of described first reference current is predetermined value, current value by first output current of first driving transistors in described n driving transistors output becomes desirable value, the voltage/current conversion ratio of described output reference current generation section is provided so that, the current value of described second reference current equals the ratio of the current value of described first reference current with respect to the current value of described first output current substantially with respect to the ratio of the current value of second output current of being exported by second driving transistors of a described n driving transistors, and compare the described other end of the more close described grid circuit of tie point of the grid of described second driving transistors and described grid circuit with the tie point of described grid circuit with the grid of described first driving transistors.
Adopt this configuration, the variation of the current value of the output current between the current driving circuit that can suppress to be close to.Correspondingly, the change of the current value of the output current between the current driving circuit becomes continuously, thereby makes the brightness of display panel change not obvious.
Preferably, described current driving circuit further comprises control section, and it is used to regulate described bias voltage the current/voltage-converted coefficient of part and the voltage/current conversion coefficient of described output reference current generation section take place.
Preferably, described current driving circuit further comprises storage area, its current value that is used at described first output current is desirable value, and described second reference circuit equals described first reference current substantially with respect to the ratio of the current value of described second output current current value is during with respect to the ratio of the current value of described first output current, the information of the voltage/current conversion coefficient of current/voltage-converted coefficient partly and described output reference current generation section takes place in storage at described bias voltage, based on the described information that is stored in described storage area, described control section is regulated described bias voltage the current/voltage-converted coefficient of part and the voltage/current conversion coefficient of described output reference current generation section is taken place.
In described current driving circuit, there is no need when each current driving circuit moves, all control signal to be provided with.
Description of drawings
Fig. 1 is the structural drawing of describing according to the configuration of first embodiment of the present invention current driving circuit equipment.
Fig. 2 is a structural drawing of describing the exemplary connection that is used for Fig. 1 current driving circuit.
Fig. 3 is the structural drawing of description according to the configuration of the current driving circuit of second embodiment of the invention.
Fig. 4 is a structural drawing of describing the exemplary connection that is used for Fig. 3 current driving circuit.
Fig. 5 is the structural drawing of description according to the configuration of the current driving circuit of third embodiment of the invention.
Fig. 6 describes the structural drawing of the internal configurations of bias voltage generation part as shown in Figure 5.
Fig. 7 is a structural drawing of describing the internal configurations of exporting reference current generation section as shown in Figure 5.
Fig. 8 is the structural drawing to the performed adjustment process of the current driving circuit of Fig. 5.
Fig. 9 A showed before adjustment process is carried out as yet the chart from the current value of current driving circuit output current separately.
Fig. 9 B shows after adjustment process is carried out the chart from the current value of current driving circuit output current separately.
Figure 10 is a structural drawing of describing the exemplary connection that is used for Fig. 8 current driving circuit.
Figure 11 shows the chart from the current value of as shown in figure 10 current driving circuit output current separately.
Figure 12 is a structural drawing of describing the transformation example of current driving circuit among Fig. 5.
Figure 13 is a structural drawing of describing the configuration of known current driving circuit.
Embodiment
Hereinafter, embodiments of the present invention is described in detail with reference to the accompanying drawings.Identical or the corresponding element that occurs in each different views of accompanying drawing is marked by identical reference number, and will no longer repeat its description.
(first embodiment)
<configuration 〉
Fig. 1 is the structural drawing of description according to the configured in one piece of the current driving circuit 1 of first embodiment of the invention.Current driving circuit 1 comprises that reference current input terminal 11, current mirror circuit 12 and 13, reference current lead-out terminal 14, output current generation section 15 and n output current lead-out terminal 16-1 are to 16-n.Current driving circuit 1 produces output current Iout-1 corresponding to reference current Irefi to Iout-n, and corresponding to the output reference current Irefo of reference current Irefi.
Current mirror circuit 12 receives reference current (first reference current) Irefi by reference current input terminal 11 from the outside, and output internal current (first internal current) Irefa, and the current value that it had is corresponding to the current value of reference current Irefi.
Current mirror circuit 12 comprises: PMOS transistor 101, and it is used to produce the grid voltage corresponding to the current value of reference current Irefi; With PMOS transistor 102, it is used for receiving at its grid place the grid voltage of PMOS transistor 101 generations.
Current mirror circuit 13 receives internal current Irefa from current mirror circuit 12, and output internal reference electric current (second internal current) Irefb and output reference current (second reference current) Irefo.Output reference current Irefo outputs to the outside by reference current lead-out terminal 14.Each current value in internal reference electric current I refb and the output reference current Irefo current value separately corresponding to reference current Irefi.
Current mirror circuit 13 comprises: bias voltage generation transistor (bias voltage generation part) 103, output reference current generation transistor (output reference current generation section) 104 and internal current generation transistor 105.The magnitude of voltage that the bias voltage that bias voltage generation transistor 103 produces has is corresponding to the current value of internal current Irefa.Output reference current generation transistor 104 receives the bias voltage that is produced by bias voltage generation transistor 103, and output output reference current Irefo, and its current value that has is corresponding to the magnitude of voltage of bias voltage.Internal current generation transistor 105 receives the bias voltage that is produced by bias voltage generation transistor 103, and output internal reference electric current I refb, and its current value that has is corresponding to the magnitude of voltage of described bias voltage.
Output current generation section 15 receives internal reference electric current I refb from current mirror circuit 13, and n output current Iout-1 of output is to Iout-n.Described n output current Iout-1 outputs to the outside by output current lead-out terminal 16-1 to 16-n respectively to Iout-n.N output current Iout-1 each current value in the Iout-n current value separately corresponding to reference current Irefi.
Output current generation section 15 comprises: PMOS transistor 111 and 112, grid voltage generation transistor 113, grid circuit 114 and n driving transistors 114-1 of having made up current mirror circuit are to 114-n.PMOS transistor 111 receives internal reference electric current I refb, and produces grid voltage, and the magnitude of voltage that this grid voltage has is corresponding to the current value of internal reference electric current I refb.The current value that electric current had of PMOS transistor 112 outputs is corresponding to the magnitude of voltage of the grid voltage that is produced by PMOS transistor 111.The electric current that grid voltage generation transistor 113 receives from PMOS transistor 112, and produce grid voltage, the magnitude of voltage that this grid voltage has is corresponding to the current value of internal reference electric current I refb.One end of grid circuit 114 is connected to the grid of grid voltage generation transistor 113, and the other end of grid circuit 114 is connected to the grid of driving transistors 114-n.Driving transistors 114-1 is connected to grid circuit 114 to 114-n grid separately, and the current value that the output current of each output of driving transistors 114-1 in the 114-n has is corresponding to the voltage that receives at its grid.Therefore just exported n output current.
<be used for the exemplary connection of current driving circuit 〉
Fig. 2 is a structural drawing of describing a kind of large-scale current driving device, and in this device, the current driving circuit 1 among Fig. 1 is connected to chain form.In Fig. 2, reference number 1A represents first order current driving circuit 1, and reference number 1B represents second level current driving circuit 1, and reference number 1C represents third level current driving circuit 1.The reference current input terminal 11 of current driving circuit 1A is connected to the constant current source REF1 that is used to provide reference current Iref.The reference circuit input terminal 11 of current driving circuit 1B is connected to the reference current lead-out terminal 14 of the current driving circuit 1A in the prime of current driving circuit 1B.The reference current input terminal 11 of current driving circuit 1C is connected to the reference current lead-out terminal 14 of the current driving circuit 1B in the prime of current driving circuit 1C.
In the present embodiment, suppose that current value that output reference current that output reference current generation transistor 104 produces has equals current value of the reference current that (or equaling substantially) supply with to reference current lead-out terminal 14.
In current driving circuit 1A, output to the outside by output current lead-out terminal 16-1 to 16-n respectively to IoutA-n corresponding to the output current IoutA-1 of the reference current Iref that in reference current input terminal 11, flows.Output reference current IrefoA is offered the reference current input terminal 11 of current driving circuit 1B by reference current lead-out terminal 14, the current value that described output reference current IrefoA is had equals the current value of reference current Iref.
In current driving circuit 1B, output to the outside by output current terminal 16-1 to 16-n respectively to IoutB-n corresponding to the output current IoutB-1 of the output reference current IrefoA that in reference current input terminal 11, flows.Output reference current IrefoB offers the reference current input terminal 11 of current driving circuit 1C by reference current lead-out terminal 14, and the current value that described output reference current IrefoB is had equals to export the current value of reference current IrefoA.
In current driving circuit 1C, output to the outside by output current lead-out terminal 16-1 to 16-n respectively to IoutC-n corresponding to the output current IoutC-1 of the output reference current IrefoB that in reference current input terminal 11, flows.
In this case, each in output reference current IrefoA and the IrefoB current value separately all equals the current value of (or equaling substantially) reference current Iref.That is to say that identical reference current (or substantially the same reference current) is fed into current driving circuit 1A, 1B and 1C.
<effect 〉
As indicated above, with chain reaction (chain reaction) mode drive current driving circuit, thereby make the quantity of current driving circuit to be connected can adopt simple mode to change, and do not need to change the quantity of the reference current that is provided.
(second embodiment)
<configuration 〉
Fig. 3 is the structural drawing of description according to the configured in one piece of the current driving circuit 2 of second embodiment of the invention.Except current driving circuit 1, current driving circuit 2 also comprises reference voltage node 21, operational amplifier 22, regulates transistor 23 and on-off element 24.
Reference voltage node 21 receives reference voltage Vref.Non-inverting input of operational amplifier 22 is connected to reference voltage node 21, and the lead-out terminal of operational amplifier 22 is connected to the grid of regulating transistor 23, and reversed input terminal is connected to the source electrode of regulating transistor 23.The running status of operational amplifier 22 (being compute mode (operation state) or halted state (halting state)) is variable.Regulating transistor 23 is connected between the drain electrode of reference current input terminal 11 and PMOS transistor 101.On-off element 24 can switch opening (ON) state and close between (OFF) state, and is connected in the sources node and regulates between the transistor 23.
Current driving circuit 2 has two kinds of operational modes (that is, reference current emergence pattern and reference current input pattern).
In the reference current emergence pattern, operational amplifier 22 turns to compute mode, and on-off element 24 turns to closed condition.In this case, when reference current input terminal 11 is connected to grounding node by the resistance (not shown), reference current Irefi flows to grounding node by sources node, current mirror circuit 12 (PMOS transistor 101), adjusting transistor 23 and reference current input terminal 11, according to the magnitude of voltage of the reference voltage Vref of supplying with to reference voltage node 21 and the resistance value of described resistance, the current value that reference current Irefi is had is fixed.In the PMOS of current mirror circuit 12 transistor 102, the internal current Irefa that flowing, its current value that has is corresponding to the reference current Irefi that flows in PMOS transistor 101.Therefore, as in the current driving circuit of Fig. 1, output reference current Irefo, internal reference electric current I refb and output current Iout-1 have been produced to Iout-n.
On the other hand, in the reference current input pattern, operational amplifier 22 forwards halted state to, and on-off element 24 forwards open mode to.Correspondingly, the running status of regulating transistor 23 becomes identical with the running status of on-off element, all is in open mode (that is, regulate transistor 23 and be in conducting state).In this case, when reference current Irefi supplies to reference current input terminal 11 from the outside, reference current Irefi is provided for current mirror circuit 12 (PMOS transistor 101), and be not subjected to the influence of reference voltage node 21 and operational amplifier 22, and internal current Irefa flows in the PMOS of current mirror circuit 12 transistor 102, and the current value that internal current Irefa has is corresponding to the reference current Irefi that flows in PMOS transistor 101.Correspondingly, as in the current driving circuit of Fig. 1, output reference current Irefo, internal reference electric current I refb and output current Iout-1 have been produced to Iout-n.
<be used for the exemplary connection of current driving circuit 〉
Fig. 4 is a structural drawing of describing a kind of large-scale current driving device, has linked the current driving circuit 2 among Fig. 3 in this device.In Fig. 4, reference number 2A representative is in the current driving circuit 2 of the first order, and reference number 2B representative is in partial current driving circuit 2, and reference number 2C representative is in the current driving circuit 2 of the third level.The reference current input terminal 11 of current driving circuit 2A is connected to ground potential by resistance R REF.The connected mode of current driving circuit 2B and 2C is identical with current driving circuit 1B and 1C.The operational mode of current driving circuit 2A is set to the reference current emergence pattern, and current driving circuit 2B and 2C operational mode separately all is set to the reference current input pattern.
In current driving circuit 2A, operational amplifier 22 is in compute mode, and on-off element 24 is in closed condition.Correspondingly, the current value that mobile reference current Iref is had in reference current input terminal 11 is determined by the resistance value of reference voltage Vref of supplying with to reference voltage node 21 and resistance R REF.Like this, the output current IoutA-1 corresponding to reference current Iref outputs to the outside by output current lead-out terminal 16-1 to 16-n respectively to IoutA-n.Output reference current IrefoA offers the reference current input terminal 11 of current driving circuit 2A by reference current lead-out terminal 14, and the current value that described output reference current IrefoA is had equates with the current value of reference current Iref.
In current driving circuit 2B, as in the current driving circuit 1A of Fig. 2, exported corresponding to the output current IoutB-1 that exports reference current IrefoA to IoutB-n, and produced output reference current IrefoB, the current value that it had equates with the current value of output reference current IrefoA.
In current driving circuit 2C,, exported corresponding to the output current IoutC-1 that exports reference current IrefoB to IoutC-n as in the current driving circuit 1C of Fig. 2.
As indicated above, equate that with the reference current that produces among the current driving circuit 2A reference current of (or equal substantially) is fed into current driving circuit 2B and 2C.
<effect 〉
As indicated above, adopt the reference current makeup function offer current driving circuit, current driving circuit can connect into chain type, and does not need to provide from external discrete ground reference current supply circuit.
Be in the current driving circuit of reference current input pattern in setting, operational amplifier is in halted state, thereby can suppress unnecessary power loss.
(the 3rd embodiment)
For example, in the configuration of Fig. 2, if there is manufacturing variation in the characteristic of current driving circuit 1A, 1B and 1C, the value of the output reference current Irefo that produces in each of current driving circuit 1A, 1B and 1C also is different between current drives electric current 1A, 1B and 1C so.For internal current Irefa, internal reference electric current I refb and so on, also there is identical situation.Therefore, even the current value of output current is a continually varying in each current driving circuit, the variation in the current value of the output current of the adjacent part of each current driving circuit may be discontinuous.In this case, the variation of the brightness in the display panel can be discovered in the adjacent portions office of each current driving circuit.In addition, if the error among the internal reference electric current I refb is big, then output current Iout-1 may exceed desired scope to Iout-n value separately.
<configuration 〉
Fig. 5 is the structural drawing of description according to the configured in one piece of the current driving circuit 3 of third embodiment of the invention.Current driving circuit 3 comprises current mirror circuit 31, and has replaced the current mirror circuit 13 among Fig. 3.Current mirror circuit 31 comprises bias voltage generation transistor 103 and the bias voltage generation part 301 of exporting reference current generation transistor 104 and output reference current generation section 302 among replacement Fig. 3.In addition, the configuration that has of current driving circuit 3 is identical with current driving circuit 2 among Fig. 3.
The current value that the bias voltage Vbias that bias voltage generation part 301 produces has is corresponding to the current value from the internal current Irefa of current mirror circuit 12.In bias voltage generation part 301, can regulate the magnitude of voltage of the bias voltage Vbias relevant by control signal S32 with the current value of internal current Irefa.That is to say, can change the current/voltage-converted coefficient of bias voltage generation part 301.
The magnitude of voltage of the bias voltage Vbias that the current value that the output reference current Irefo that output reference current generation section 302 produces is had is produced corresponding to bias voltage generation part 301.In output reference current generation section 302, can regulate the current value of the output reference current Irefo relevant by control signal S33 with the magnitude of voltage of bias voltage Vbias.That is to say, can change the current/voltage-converted coefficient of output reference current generation section 302.
The exemplary configuration of part takes place in<bias voltage 〉
Fig. 6 is a structural drawing of describing the internal configurations of bias voltage generation part 301.Bias voltage generation part 301 comprises that the individual voltage generation transistor T 301-1 of P (P is a natural number) is to T301-P, select transistor T a301-1 to Ta301-P corresponding to P voltage generation transistor T 301-1 to P of T301-P, corresponding to P selection transistor T a301-1 to P the selection transistor T b301-1 of Ta301-P to Tb301-P.
The source electrode of voltage generation transistor T 301-1 is connected to ground potential, and its drain electrode is connected to the output terminal (that is the drain electrode of PMOS transistor 102) of current mirror circuit 12.Select the source electrode of transistor T a301-1 be connected to and select transistor T a301-1 corresponding to the grid of voltage generation transistor T 301-1, and its drain electrode is connected to the drain electrode of voltage generation transistor T 301-1.Select the source electrode of transistor T b301-1 to be connected to ground potential, and its drain electrode be connected to and select transistor T b301-1 corresponding to the grid of voltage generation transistor T 301-1.The annexation of voltage generation transistor T 301-2 each in the T301-P is identical with the annexation of voltage generation transistor T 301-1.Select the annexation of transistor T a301-2 each in the Ta301-P identical with the annexation of selection transistor T a301-1.Select the annexation of transistor T b301-2 each in the Tb301-P identical with the annexation of selection transistor T b301-1.
Control signal S32 comprise correspond respectively to P select transistor T a301-1 to P the control signal S32a-1 of Ta301-P to S32a-P, and correspond respectively to P selection transistor T b301-1 to P the control signal S32b-1 of Tb301-P to S32b-P.Control signal S32b-1 is the inversion signal of control signal S32a-1 to S32b-P to S32b-P.Control signal S32a-1 to S32a-P be provided for respectively corresponding to selection transistor T a301-1 to the grid of Ta301-P.Control signal S32b-1 to S32b-P be provided for respectively corresponding to selection transistor T b301-1 to the grid of Tb301-P.
In bias voltage generation part 301, when control signal S32a-1 was high level, control signal S32b-1 was a low level.Correspondingly, select transistor T a301-1 to forward open mode to, and select transistor T b301-1 to forward closed condition to.Therefore, internal current Irefa flows in voltage generation transistor T 301-1, and results from the grid place of voltage generation transistor T 301-1 corresponding to the grid voltage of internal current Irefa.On the other hand, when control signal S32a-1 was low level, control signal S32b-1 was a high level.Correspondingly, internal current Irefa does not flow in voltage generation transistor T 301-1.As indicated above, can transistorized number take place by the voltage of regulating the internal current Irefa that flowing by control signal S32, change the magnitude of voltage of the bias voltage Vbias that produces by bias voltage generation part 301.
The exemplary configuration of<output reference current generation section 〉
Fig. 7 is a structural drawing of describing the internal configurations of output reference current generation section 302.Output reference current generation section 302 comprises that the individual electric current generation transistor T 302-1 of Q (Q is a natural number) is to T302-Q, with Q electric current generation transistor T 302-1 to T302-Q corresponding to Q select transistor T a302-1 to Ta302-Q, and with Q electric current generation transistor T 302-1 to T302-Q corresponding to Q selection transistor T b302-1 to Tb302-Q.
The source electrode of electric current generation transistor T 302-1 is connected to ground potential, and its drain electrode is connected to reference current lead-out terminal 14.Select the source electrode of transistor T a302-1 be connected to and select transistor T a302-1 corresponding to the grid of electric current generation transistor T 302-1.Select the source electrode of transistor T b302-1 to be connected to ground potential, and its drain electrode be connected to and select transistor T b302-1 corresponding to the grid of electric current generation transistor T 302-1.Electric current generation transistor T 302-2 is identical with the annexation of electric current generation transistor T 302-1 to the annexation of T302-Q.Select the annexation of transistor T a302-2 each in the Ta302-Q identical with the annexation of Ta302-1.Select the annexation of transistor T b302-2 each in the Tb302-Q identical with the annexation of selection transistor T b302-1.
Control signal S33 comprise with Q select Q control signal S33a-1 that transistor T a302-1 corresponds respectively to Ta302-Q to S33a-Q, and Q the control signal S33b-1 that corresponds respectively to Tb302-Q with Q selection transistor T b302-1 is to S33b-Q.Q control signal S33b-1 is the inversion signal of Q control signal S33a-1 to S33a-Q to S33b-Q.Q control signal S33a-1 to S33a-Q be provided for respectively corresponding to selection transistor T a302-1 to the grid of Ta302-Q.Q control signal S33b-1 to S33b-Q be provided for respectively corresponding to selection transistor T b302-1 to the corresponding grid of Tb302-Q.
In output reference current generation section 302, when control signal S33a-1 was high level, control signal S33b-1 was a low level.Correspondingly, select transistor T a302-1 to forward open mode to, select transistor T b302-1 to forward closed condition to.Like this, bias voltage Vbias supplies to the grid of electric current generation transistor T 302-1, and the current value of the drain current that produces in electric current generation transistor T 302 is corresponding to the magnitude of voltage of bias voltage Vbias.On the other hand, when control signal S33a-1 was low level, control signal S33b-1 was a high level.Correspondingly, bias voltage Vbias is not fed into the grid of electric current generation transistor T 302-1.As indicated above, can transistorized number take place by regulating the electric current that receives bias voltage Vbias, change the current value of the output reference current Irefo that produces by output reference current generation section 302.
<adjustment process 〉
Next, the adjustment process of current/voltage-converted coefficient with the current/voltage-converted coefficient of output reference current generation section 302 of the bias voltage generation part 301 in the current driving circuit 3 is described with reference to Fig. 8.In Fig. 8, reference number 3A representative is in the current driving circuit 3 of the first order, and reference number 3B representative is in partial current driving circuit 3, and reference number 3C representative is in the current driving circuit 3 of the third level.Suppose in the characteristic of current driving circuit 3A, 3B and 3C and have manufacturing variation.Particularly, even identical reference current Iref is supplied among current driving circuit 3A, 3B and the 3C each, inequality from the corresponding current value of the output current of current driving circuit 3A, 3B and 3C respectively.In addition, suppose that output reference current IrefoA and IrefoB current value separately are inequality.
At first, each in current driving circuit 3A, 3B and the 3C reference current input terminal 11 separately is connected to grounding node by resistance R REF.The operational mode of each all is set to the reference current emergence pattern among current driving circuit 3A, 3B and the 3C.
Then, in current driving circuit 3A, regulate the current/voltage-converted coefficient of bias voltage generation part 301, make the current value of output current Iout-1 become predetermined target value.Regulate the current/voltage-converted coefficient of output reference current generation section 302, make reference current Iref, output current Iout-1, output reference current Irefo and output current Iout-n current value separately have the relation of expressing by equation A.
[equation A]
(Irefi)/(Iout-1)=(Irefo)/(Iout-n)
That is to say, regulate the voltage/current conversion coefficient of output reference current generation section 302, make the current value of output reference current Irefo become:
(Irefo)=(Iout-n)·(Irefi)/(Iout-1)
In in current driving circuit 3B and 3C each, the executive mode of adjustment process identical with in current driving circuit 3A.
To describe adjustment process in detail now.Suppose that the reference current Iref to current driving circuit 3A, 3B and 3C supply is 10.0 μ A.The desired value of output current is 1.0 μ A.
As shown in Figure 9, before carrying out adjustment process, even identical reference current is supplied to current driving circuit 3A, 3B and 3C, output current IoutA-1, IoutB-1 and IoutC-1 current value separately is also inequality.It is continuous that the current value of output current changes.That is to say that between the IoutA-n, current value changes to 1.2 μ A from 1.1 μ A at output current IoutA-1.Yet output current IoutB-1 changes and output current IoutC-1 is different from the variation of output current IoutA-1 to the current value of IoutA-n to the current value variation of IoutC-n to the current value of IoutB-n.
On the other hand, shown in Fig. 9 B, after carrying out adjustment process, output current IoutA-1, IoutB-1 identical with IoutC-1 current value separately (that is 1.0 μ A).That is to say that the relation between each among output current IoutA-1, IoutB-1 and the IoutC-1 and the reference current Iref is as follows:
(IoutA-1)/(Iref)=(1.0)/(10.0)
(IoutB-1)/(Iref)=(1.0)/(10.0)
(IoutC-1)/(Iref)=(1.0)/(10.0)
In addition, regulate the current value of output reference current, make output reference current IrefoA and IrefoB current value separately by following setting:
(IrefoA)=(IoutA-n)·(10.0)/(1.0)
(IrefoB)=(IoutB-n)·(10.0)/(1.0)
(IrefoC)=(IoutC-n)·(10.0)/(1.0)
As indicated above, in each in current driving circuit 3A, 3B and 3C, the relation between the relation between reference current and the output current and output current and the output reference current is regulated.
<at the exemplary connection of current driving circuit 〉
Figure 10 is a structural drawing of describing a kind of large-scale current driving device, and current driving circuit 3A, 3B and 3C are connected to chain form in this device.Note, carried out adjustment process in this supposition, and annexation and the operational mode of current driving circuit 2A, 2B among the annexation of current driving circuit 3A, 3B and 3C and operational mode and Fig. 4 and 2C are identical among current driving circuit 3A, 3B and the 3C each.
The current value of output reference current IrefoA is expressed by equation 1, and the current value of output reference current IrefoB is expressed by equation 2.
[equation 1]
(IrefoA)=(IoutA-n)·(10.0)/(1.0)
[equation 2]
(IrefoB)=(IoutB-n)·(10.0)/(1.0)
In addition, the current value of output current IoutB-1 is expressed by equation 3, and the output current of output current IoutC-1 is expressed by equation 4.
[equation 3]
(IrefoB-1)=(IrefoA)·(1.0)/(10.0)
[equation 4]
(IrefoC-1)=(IrefoB)·(1.0)/(10.0)
(IrefoA) by adopting equation 1 to replace in the equation 3 obtains (IoutB-1)=(IoutA-n).
(IrefoB) by adopting equation 2 to replace in the equation 4 obtains (IoutC-1)=(IoutB-n).
That is to say that the current value of output current IoutA-n becomes and equates with the current value of output current IoutB-1, and the current value of output current IoutB-n becomes and equates with the current value of output current IoutC-1.Correspondingly, current driving circuit 3A, 3B among Figure 10 and 3C current value variation pattern separately as shown in figure 11.
<effect 〉
As indicated above, by regulating the current/voltage-converted coefficient that part takes place bias voltage, can be to desirable scope with the current value adjustment of output current.In addition, by regulation voltage/current conversion coefficient in the output reference current generation section, can supply with the reference current that has at the appropriate electrical flow valuve of current driving circuit in the level of back.
Further, the current value of the output circuit between the current driving circuit that can suppress to be close to changes.That is to say, can suppress the discontinuous variation in the current value of the output current between the current driving circuit.Correspondingly, the current value of the output current between current driving circuit becomes continuously, thereby makes the brightness of display panel change not obvious.
(other embodiment)
As shown in figure 12, current driving circuit 3 can further comprise control section 401.Control section 401 increases or reduces control signal S32a-1 be in the quantity of those control signals of high level in S32a-n, thereby makes output current Iout-1 have desirable current value.In addition, control section 401 increases or reduces control signal S33a-1 be in the quantity of those control signals of high level in S33a-n, thereby keeps equation A.
Current driving circuit 3 can further comprise storage area 402.Storage area 402 storage makes output current Iout-1 have desirable value and keeps control signal S32 that equation A remains valid and the information of the output state of S33.Based on the information that is stored in the storage area 402, control section 401 output control signal S32 and S33.Adopt this configuration, there is no need when the current driving circuit each run, all to be provided with control signal.
Further, storage area 402 can comprise a plurality of can be by the fuse of laser adjusting process (lasertrimming) fusing.Adopt this configuration, by carrying out the laser adjusting process when the manufacturing/transportation, can change the current arrangements of storage area 402, have the control signal S32 and the S33 output state separately of desirable value thereby can store each that make among output current Iout-1 and the output reference current Irefo.
Current driving circuit according to the present invention can be used for the current drives type display driver such as organic EL panel.In addition, current driving circuit according to the present invention can be used for printer driver and so on, and described printer driver or the like comprises a plurality of discrete circuit blocks, and exports the electric current with pinpoint accuracy, and the current value of regulating output current simultaneously matches each other them.
Though the present invention has obtained description in a preferred embodiment, but it is evident that for a person skilled in the art, disclosed invention can adopt multiple mode to transform, and can take with above specifically set forth and describe different embodiment.Therefore, the invention is intended to by appending claims contain all fall among practicalness of the present invention and the scope at transformation of the present invention.

Claims (12)

1, a kind of current driving circuit comprises:
The reference current input terminal is supplied with first reference current to it;
Current mirror circuit, it is used for receiving first reference current of supplying with to described reference current input terminal at its input end, and from first internal current of its output output corresponding to described first reference current;
Bias voltage generation part, it is used to receive first internal current from described current mirror circuit, and produces the bias voltage corresponding to described first internal current;
The output reference current generation section, it is used to receive the bias voltage that the part generation is taken place by described bias voltage, and produces second reference current corresponding to described bias voltage;
The reference current lead-out terminal, it is used for second reference current that described output reference current generation section produces is outputed to the outside;
Internal current generation transistor, it is used for by described bias voltage the bias voltage that part produces taking place in its grid place reception, and produces second internal current corresponding to described bias voltage; With
Output current generation section, it is used to receive second internal current that is produced by described internal current generation transistor, and produces n output current corresponding to described second internal current.
2, current driving circuit according to claim 1, part takes place wherein said bias voltage is the bias voltage generation transistor with drain and gate connected to one another,
Wherein said output reference current generation section is output reference current generation transistor,
Wherein said bias voltage generation transistor drain is connected to the output terminal of described current mirror circuit, and described bias voltage transistorized grid takes place is connected to described internal current transistorized grid takes place, and
Wherein said output reference current generation transistor drain is connected to described reference current lead-out terminal, and described output reference current transistorized grid takes place is connected to described bias voltage transistorized grid takes place.
3, current driving circuit according to claim 1 further comprises:
The reference voltage node;
Operational amplifier; With
Regulate transistor,
Wherein said reference voltage node receives reference voltage,
Non-inverting input of wherein said operational amplifier is connected to described reference voltage node, and the reversed input terminal of described operational amplifier is connected to the transistorized source electrode of described adjusting, and
The transistorized source electrode of wherein said adjusting is connected to described reference current input terminal, and described adjusting transistor drain is connected to the input end of described current mirror circuit, and the transistorized grid of described adjusting receives the output of described operational amplifier.
4, current driving circuit according to claim 3, further comprise on-off element, it is used for forwarding open mode to when being in first pattern, forwards closed condition when being in second pattern to, described on-off element is connected between sources node and the transistorized grid of described adjusting, and
The running status of wherein said operational amplifier can be switched, so that described operational amplifier forwards compute mode to when being in described first pattern, and forwards halted state to when being in described second pattern.
5, according to each the described current driving circuit in the claim 1,3 and 4, wherein take place in the part at described bias voltage, the current/voltage-converted coefficient that is used for described first internal current is converted to described bias voltage is variable.
6, according to each the described current driving circuit in the claim 1,3 and 4, wherein in described output reference current generation section, the voltage/current conversion coefficient that is used for described bias voltage is converted to described second reference current is variable.
7, according to each the described current driving circuit in the claim 1,3 and 4, wherein take place in the part at described bias voltage, the current/voltage-converted coefficient that is used for described first internal current is converted to described bias voltage is variable, and
Wherein in described output reference current generation section, the voltage/current conversion coefficient that is used for described bias voltage is converted to described second reference current is variable.
8, current driving circuit according to claim 7, wherein said output current generation section comprise that part, grid circuit and n driving transistors take place grid voltage,
Wherein said grid voltage generating unit divides reception described second internal current, and produces the grid voltage corresponding to described second internal current,
One termination of wherein said grid circuit is received by described grid voltage the grid voltage that part produces is taken place, and the other end of described grid circuit is connected to one grid in the described n driving transistors,
In the wherein said n driving transistors grid separately each is connected to described grid circuit, and each output current exported in the described n driving transistors is corresponding to the voltage that is applied to himself grid,
The current/voltage-converted coefficient that part takes place wherein said bias voltage is provided so that, when the current value of described first reference current is predetermined value, current value by first output current of first driving transistors in described n driving transistors output becomes desirable value
The voltage/current conversion coefficient of wherein said output reference current generation section is provided so that, the current value of described second reference current is with respect to the ratio of the current value of second output current of being exported by second driving transistors of a described n driving transistors, substantially equal the ratio of the current value of described first reference current with respect to the current value of described first output current, and
Wherein compare the described other end of the more close described grid circuit of tie point of the grid of described second driving transistors and described grid circuit with the tie point of described grid circuit with the grid of described first driving transistors.
9, current driving circuit according to claim 8, the tie point of the grid of wherein said the first transistor and described grid circuit are positioned at a described end of described grid circuit, perhaps near the described end of described grid circuit, and
The tie point of the grid of wherein said second driving transistors and described grid circuit is positioned at the described other end of described grid circuit, perhaps the described other end of close described grid circuit.
10, current driving circuit according to claim 8 further comprises control section, and it is used to regulate described bias voltage the current/voltage-converted coefficient of part and the voltage/current conversion coefficient of described output reference current generation section take place.
11, current driving circuit according to claim 10; Further comprise storage area; Its current value that is used at the described first output electric current is desirable value; And the current value of described second reference current equals described first reference current substantially with respect to the ratio of current value of the described second output electric current current value is during with respect to the ratio of the current value of the described first output electric current; Storage is for the information of the voltage/current conversion coefficient of the current/voltage-converted coefficient of described biased electrical Hair Fixer first portion and described output reference current generation section
Wherein, based on the described information that is stored in described storage area, described control section is regulated described bias voltage the current/voltage-converted coefficient of part and the voltage/current conversion coefficient of described output reference current generation section is taken place.
12, current driving circuit according to claim 11, wherein said storage area comprises a plurality of fuses that can be fused by the laser adjusting process, and described storage area is stored described information according to the state that whether is fused about these fuses of described fuse.
CNB2007100012579A 2006-01-12 2007-01-11 Current driving circuit Expired - Fee Related CN100538798C (en)

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CN103781235A (en) * 2012-10-25 2014-05-07 新绿科技股份有限公司 LED lighting driver
CN105953823A (en) * 2016-04-21 2016-09-21 矽力杰半导体技术(杭州)有限公司 Ambient light filtering circuit, photoelectric sensor, and photoelectric detection apparatus using photoelectric sensor
CN117059020A (en) * 2023-09-14 2023-11-14 广东保伦电子股份有限公司 LED display screen driving circuit with low turning voltage and LED display screen

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FR2332584A1 (en) * 1975-11-24 1977-06-17 Carpano & Pons Moving surface type screen - has twin magazine power drives and solid transparent support surface for projection and writing
JP3610923B2 (en) * 2001-05-30 2005-01-19 ソニー株式会社 Active matrix display device, active matrix organic electroluminescence display device, and driving method thereof
JP2003195808A (en) * 2001-12-25 2003-07-09 Matsushita Electric Ind Co Ltd Display device using organic el element and its driving method, and portable information terminal

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CN103781235A (en) * 2012-10-25 2014-05-07 新绿科技股份有限公司 LED lighting driver
US9220140B2 (en) 2012-10-25 2015-12-22 Greenmark Technology Inc. LED lighting driver
CN103781235B (en) * 2012-10-25 2016-02-03 新绿科技股份有限公司 LED lighting driver
CN105953823A (en) * 2016-04-21 2016-09-21 矽力杰半导体技术(杭州)有限公司 Ambient light filtering circuit, photoelectric sensor, and photoelectric detection apparatus using photoelectric sensor
CN105953823B (en) * 2016-04-21 2018-12-18 矽力杰半导体技术(杭州)有限公司 Ambient light rejection circuit, photoelectric sensor and the optoelectronic detecting device using it
CN117059020A (en) * 2023-09-14 2023-11-14 广东保伦电子股份有限公司 LED display screen driving circuit with low turning voltage and LED display screen
CN117059020B (en) * 2023-09-14 2024-02-27 广东保伦电子股份有限公司 LED display screen driving circuit with low turning voltage and LED display screen

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