CN1009048B - Image signal coding device - Google Patents

Abstract

This device comprises reference row, code line circuits for detecting changing picture elements and register, symbol detector, counter and code identification circuit.The code line circuits for detecting changing picture elements receives serial reference row picture signal.The reference row register receives reference row picture signal serial change point data and the parallel reference row change point data of output.The capable picture signal serial of code line register received code change point data are also exported the capable change point data of parallel encoding.Symbol detector is monitored above-mentioned register output.Pixel count between counter meter code line picture signal change point.The code identification circuit is exported the code line image signal encoding according to the symbol detector sum counter.

Description

Image signal coding device

This invention relates at facsimile system, visual electronic storage device or the image signal coding device that uses during similarly other installs.

(for example common facsimile system) or a kind of Image storage system that uses modern CD or disk in graphic transmission system, picture intelligence is encoded, so that reduce the quantity of signal data, and the transmission of data and storage (just weaving into group) are finished effectively at a high speed.

For example, in facsimile, the improved Huffman sign indicating number of MH() coding is known a kind of one-dimensional coding scheme; The improved Reed sign indicating number of MR() coding is a kind of two-dimensional coding scheme; The improved Reed sign indicating number of MMR() coding is a kind of high efficiency two-dimensional coding scheme.This MH, MR and MMR scheme have pass described as follows system, and this MMR scheme includes those technology that are similar to this MH scheme, and is obtained by the improvement partly of this MR scheme.

Image that is encoded and coding rule are being followed the committee by CCITT(Telephone And Telegraph international advisers) T that recommends ₄And T ₆

This MMR scheme is in a recommended communication system, being described to is a kind of two-dimensional coding scheme efficiently (No. the 197th, post and telecommunications and radio communication), and this communication system is used for some devices of No. the 4th, described facsimile group in the 52nd page of this Official Journal (No. the 29th, supplementary issue) of on March 22nd, 1985 and the subsequent page or leaf.No. 1013, the Postal Service Ministry notice and radio communication in 1981 this aspect two in, this MH scheme is described to the one-dimensional coding scheme and this MR scheme is a two-dimensional coding scheme.

In above-mentioned encoding scheme, utilize the picture intelligence of given row and the corresponding relation between the immediate previous row in this MR and the MMR scheme, so that make the encoding image signal of given row, the discriminating of corresponding relation needs comprehensive data processing, and this processing is to utilize the software of microcomputer or similar devices to finish.For coding rate the discriminating of this corresponding relation of a upper limit is arranged, software processes needs some steps.An original figure reads in photovoltaic.To produce a picture intelligence, this picture intelligence is temporarily stored in the mass storage, this picture intelligence is read out and is coded by synchronous encoding operation then, thereby picture intelligence for such output, the picture intelligence of reading that does not have delay like this, just encode on real-time basis, this is difficult.

In addition, because encoding operation is to finish in the pattern corresponding to the corresponding relation identification result, thereby will obtaining to read one by photovoltaic, not have the picture intelligence of the original image of delay be difficult.

For the ease of representing a long relatively stroke corresponding to MMR scheme horizontal pattern, the sign indicating number that needs a multicomponent coding, if after pattern is differentiated, produced the sign indicating number of these codings, this encoding operation speed is slower than picture intelligence input speed, will produce difficulty thereby will finish the real-time coding operation.

After corresponding relation was differentiated, when encoding operation was done, formerly Shu Ru pixel and the pixel imported subsequently must be monitored, so that make encoding operation and picture intelligence synchronous, coding must be finished after the corresponding relation discriminating is done immediately.

In the encoding image signal that utilizes MH, MR and MMR scheme, the number of picture elements of picture intelligence is represented a kind of identical color, it is an a kind of stroke must representing by sign indicating number, more particularly, a stroke represented by terminal code and make-up code, and this terminal code is represented in the stroke in 1 to 63, and make-up code represents 64,192 ... 64XM ..., in the stroke in 2560 one.Therefore, for ease of representing a kind of long relatively stroke, need a kind of multicomponent coding.In any case if these yards quilt produces simultaneously, a coding circuit can be overloaded, and need a long processing time.

This MH, MR and MMR scheme can selectedly be used in the microprocessor of handling the different types of picture intelligence corresponding to being used to thereafter.If processing format change thereafter so just needs the circuit of a modification, so as compatible mutually with the variation of processing format, thereby reduce code efficiency.Because these three encoding schemes described above are phase cross-correlation, in single code device, using the requirement of these three encoding schemes that increase has been arranged.

The purpose of this invention is at full speed to finish coding to picture intelligence synchronously with image input signal.

Another purpose of this invention is parallel processing one a serial input signal, so that reach the not real-time coding lingeringly of picture intelligence of input, and does not use mass storage or similar equipment.

This invention also has another purpose, it is the sign indicating number that during encoding, in each pattern, produces coding simultaneously, and according to these sign indicating numbers of priority selection output, so that the sign indicating number of forced coding can be output, and can not finish coding at the figure signal of input when the end that pattern is differentiated with being delayed.

It is in the coding that uses multi-mode that this invention also has another purpose, and pattern differentiates that firm finishing produces the sign indicating number of encoding immediately, thereby reaches the high-speed real-time coding.

This invention also has another purpose to be, import and encode a kind of have for coding the figure signal of the pixel that must have, thereby input signal is appropriately encoded with the method for synchronization with the figure input signal.

It is the sign indicating number of predictive coding that prestores that this invention also has another purpose, and reads the sign indicating number of this coding that prestores, so that the coding load can reduce at the sign indicating number output of timing, and can import the picture intelligence that is encoded, and the picture intelligence of importing is not delayed.

This invention also has another purpose to be, produce a kind of pattern and the back to back sign indicating number of coding subsequently of authentication code, so remove to constitute a comprehensive coding, thereby compare with the situation of multicomponent coding output and to have shortened output time, and thereby the coding of input image signal is not delayed from picture intelligence input there.

This invention also has the another one purpose, exports a multicomponent coding respectively for single pixel, deposits the load of coding and encodes effectively thereby reduce this.

This invention also has another purpose, uses a kind of multicomponent coding scheme in single encoded device, and reaches and making coding be suitable for thereafter processor, and don't uses this circuit structure is carried out big change.

Above-mentioned and other the purpose about this invention, characteristics and advantage.To embody in the detailed description together with accompanying drawing below.

Fig. 1 and 2 is to use the calcspar of the code device of this invention.

Fig. 3 is the time diagram that is used for the operation of key diagram 1 and this device of Fig. 2.

Fig. 4,5 and 6 is the schematic diagrames that are used to illustrate the correlation between reference row and the code line.

Fig. 7 is the circuit diagram of virtual change point generator among Fig. 1.

Fig. 8 is the time diagram that is used for key diagram 7 virtual change point generator operations.

Fig. 9 is the circuit diagram of selector among Fig. 1.

Figure 10 is the circuit diagram of circuits for detecting changing picture elements among Fig. 1.

Figure 11 and 12 is circuit diagrams that part is shown of symbol detection circuit among Fig. 2.

Figure 13 is the circuit diagram of a trip count device among Fig. 2.

Figure 14 is the circuit diagram of the equivalent electric circuit of a ROM Table A among Fig. 2.

Figure 15 is the block diagram of a ROM table C among Fig. 2.

Figure 16 is the data format that content is shown of this ROM table C among Figure 15.

Figure 17 is the circuit diagram that sign indicating number is measured circuit among Fig. 2.

Figure 18 is the circuit diagram of make-up code generator and memory among Fig. 2.

Figure 19 is the time diagram that is used for illustrating Figure 18 make-up code generator and storage operation.

Figure 20 is the schematic diagram that is used to illustrate the correlation between a reference row and the code line.

Figure 21 is the coding of a kind of H pattern of explanation.

Figure 22 is the schematic diagram of virtual change point delay circuit.

Figure 23 is the time diagram of delay circuit operation in explanation Figure 22.

Figure 24 is the schematic diagram of line terminal code generator control circuit.

Figure 25 is the time diagram that is used to illustrate the operation of a coding interrupt control circuit.

Figure 26 is the calcspar of picture intelligence parallel-to-serial converter.

Figure 27 is the time diagram of parallel-to-serial converter output state among Figure 26.

Fig. 1 and 2 is to use the block diagram of the coding circuit structure of this invention, and the operation of coding circuit will be described in detail to Fig. 5 in conjunction with Fig. 1 then.

With reference to Fig. 1 signal 121 are picture intelligences that are encoded, and this picture intelligence is by an ancillary equipment, and as an image scanning device, an image storage device or a computer provide.This picture intelligence is a string row binary data (for example on behalf of white pixel and " 1 ", " 0 " represent black picture element) of being represented by " 0 " and/or " 1 ", clock 134 is provided by importing synchronous ancillary equipment with picture intelligence 121, each pixel is come regularly by each clock, and synchronizing signal 136 comprises the vertical and horizontal-drive signal in the vertical and horizontal signal cycle of representing images signal 121.

In this concrete scheme, the picture intelligence 121 that is encoded provides a signal to laser printer or similar equipment as the scanned picture signal that is used for a string row image signal of each main scanning line with same method.

One of circuit 101 generation of forced are the change point of a pixel (virtual pixel just) like this, this actual image that is close on the code line (main scanning line of this image is encoded) is the final pixel of this change point, this circuit 101 is referred to as " a virtual change point generator A " 101, and this virtual change point generator A has a kind of actual image structure that does not change on code line.

Line buffer memory A102 and line buffer memory B103 are connected to the output of virtual change point generator A101, this memory A102 and B103 comprise the RAMs(random asccess memory of independently bearing read/write access), each of memory A102 and B103 all has a constant volume (main scanning line number), so that be stored in a binary graphics on the code line.

This line buffer memory A102 finishes a write operation, and this line buffer memory B103 finishes a read operation, and vice versa.In other words, these two buffer storage constitute a double buffer storage.

111 pairs of clocks of a memory addressing counter, 134 countings, quantity corresponding to the number of picture elements of code line, the counting of counter 111 is provided to this line buffer memory A102 and B103 simultaneously as memory addressing signal 135, and the counting of memory addressing counter 111 is reset to the initial value that is used for each code line and counts again.The binary image that is written in the every row in each line buffer memory is read out in the pixel unit corresponding to the pixel location of the picture intelligence 121 of a new incoming line.

Selector 104 provides one to select signal 901 in line buffer memory A102 and the B103, be chosen in this buffer storage in the form of reading like this, thereby obtain this sense data, selecteed data offer next stage by selector 104, as a reference row 125, just as code line reference data (image).

The such pixel of change point of circuit 105 generation of forced (virtual pixel just) is the final pixel of this change point to the actual image on code line (main scanning line of the image that is encoded) further.Circuit 105 is referred to as " a virtual change point generator B " 105, and this virtual change point generator B105 has the structure that does not change the actual graphical on code line.

Circuit 106 detects the pixel of the change point of the actual row that is used on reference row and virtual pixel.This circuit 106 is referred to as " a circuits for detecting changing picture elements A " 106.

Circuit 107 detects the pixel of the change point of the actual line that is used on code line and virtual pixel.This circuit 107 is referred to as " a circuits for detecting changing picture elements B " 107.

A shift register A108, a shift register B109 and a shift register C110 comprise 4 bit shift register respectively.

Signal 126 is illustrated in actual image and the virtual pixel on the reference row.Signal 127 is to be used for the actual image on reference row and the change point signal of a virtual pixel.Signal 128 is to be used for the actual image on code line and the change point signal of a virtual pixel.

Timing circuit 112 receives this clock 134 and this synchronizing signal 136, and produces various timing signals 137 on the basis of input signal, so that to each circuit block regularly.

The operation of the circuit block among Fig. 1, given when an actual image (image that is encoded just) among Fig. 4 and corresponding to the improved Reed sign indicating number of this MMR() the scheme coding time will be described.

For the cause of simplifying, in the image of Fig. 4, delegation comprises that 32 pixels (main scanning line=32) and two row (subscan line number=2) constitute one page.

In Fig. 4, for ease of the actual coding of the 1st row 402, a dummy row 401 is defined as reference row, and the 1st row 402 is defined as code line, as indicated among Fig. 5.

In Fig. 4, for ease of the coding of the 2nd row 403, the 1st row 402 is defined as reference row, and the 2nd row 403 is defined as code line, as indicated among Fig. 6.

If even one page comprises 3 or more a plurality of main scanning line, just ... the 3rd row, the 4th row ..., the correlation between reference row and the code line all makes it to be suitable for continuous programming code, and no matter subscan line number.

When the image among Fig. 4 when carry the there, Fig. 3 is the time diagram that is used for key diagram 1 circuit block operation.

Referring to Fig. 3, a vertical synchronization (V-SYNC) signal 136-1 represents along the one-period of an image of sub scanning direction, i.e. the input cycle of one page image.Horizontal synchronization (H-SYNC) signal 136-2, its expression is along the one-period of the image of main scanning line, i.e. the input cycle of 1 row image.Clock 134 is as visual clock signal, figure signal 121 among Fig. 3 is expressed as the signal waveform of the picture intelligence of be encoded (Fig. 4), and has the high level that is used for black picture element, just " 1 ", with the low level that is used for white pixel, just " 0 ".In the image in Fig. 3, be used for one-period T ₁An image component be at the 1st row 402(Fig. 4) on an actual image and be used for one-period T ₂An image component be at the 2nd row 403(Fig. 4) on an actual image.

The top margin of a Print Form of dummy row 401 expressions among Fig. 4, or the blank scope in the form outside.According to the MMR scheme, this dummy row 401 is whole white wires (just the whole pixels in 1 line are white pixel) by hypothesis, thereby the dummy row 401 in Fig. 4 does not appear at 121 li of picture intelligences among Fig. 3.

Fig. 5 is the time diagram that is used to illustrate the 1st row 402 encoding operations, and particularly explanation is as the dummy row 401 of this reference row with as the correlation between the 1st row 402 of this code line.

When in Fig. 5, when the image on the 1st row 402 was sent to virtual change point generator A101, a virtual change point (virtual pixel) 302 was affixed on this image, as in Fig. 3 by 122(one code line) specified, for this period T ₁Actual image do not change.Final pixel 301 on the 1st row to next pixel 302, has opposite logic level (just white is to black).The virtual pixel of following this virtual change point (this virtual pixel) 302 has identical level with virtual change point (virtual pixel) 302, so that prevent them to become change point, because this reason is described later.

In Fig. 3, code line signal 122 is input to circuits for detecting changing picture elements B107 as the picture intelligence that is encoded, and as represented among Fig. 1, code line signal 122 also is sent to line buffer memory A102 and B103 as white data.

Address counter 111 only is used for period T ₁The counting of visual clock 134, and export a count value 135 in Fig. 3, this counting output is delivered to this line buffer memory A102 and B103 as a memory addressing signal 135 jointly.

If this line buffer memory A102 and B103 are arranged to WriteMode and read mode respectively, the data that are used for code line 122 so are written in the address in response to this line buffer memory A102 of this memory addressing signal 135.If all " 0 " are written in the line buffer memory B103 that is changed to the mode of reading, " 0 " is called in the address by these memory addressing signal 135 accesses so, and is used for Fig. 1 by the 124 read output signal B that represent.This read output signal B124 is selected and is used as the data of reference row 125 by selector 104.

Data signal waveforms 125 these reference row data of expression in Fig. 3, " 0 " that is provided with like this is used for period T ₁, as indicated among Fig. 5, obtained dummy row 401 is as " whole white " reference row.As mentioned above, code line signal 122 also is used to circuits for detecting changing picture elements B107, this testing circuit B107 detects the change point (pixel just) that is input to the there in data, the change point pixel is the output as data " 1 ", other pixel that is not used in change point is that this output is corresponding to the output among Fig. 1 128 as data " 0 " output.

Virtual change point generator B105 and circuits for detecting changing picture elements A106 finish generator 101 and the testing circuit 107 such identical operations that are used for code line signal 122.Therefore, be reference row signal 125, be provided with this generator B105 and this testing circuit A106.

Reference row signal 125 by virtual change point generator B105 be converted to by with final pixel have a kind of different colours, resemble the poly-signal that obtains by additional virtual, and be added to this final pixel.

This signal 128 is from circuits for detecting changing picture elements B107 output, and order displacement in response to the shift register A108 of clock 124.Symbol A in shift register A108 ₁To A ₄Represent four parallel positions, these parallel four outputs that output is standard.The signal output waveform of this shift register A108 is expressed as waveform 129-1 among Fig. 3 respectively to 129-4.When this relevant pixel on this code line is shifted, as the output A of shift register A108 ₄The time, no matter whether change point exists in the 3-pixel data of this relevant pixel and can both be determined by output 129 following.

Shift register B109 and C110 produce output 130-1 respectively to 130-4 and 131-1 and 131-4 in Fig. 3.More particularly, shift register B109 and C110 store respectively corresponding to this change point signal of the pixel location data that store in shift register A108 and the colour signal of this reference row.If the output A of shift register A108 ₄Be the relevant pixel of this code line, so, no matter whether change point exists following in the relevant 3-pixel data of this reference row, can both be determined by shift register B109 and C110.In addition, the color of this 3-pixel data (this logic level just) also can be determined.

The 2nd row 403 in Fig. 4 is to be input to coding the 2nd row as picture intelligence 121, and then this line buffer memory A102 and B103 are set to WriteMode respectively and read mode.In other words, during the coding as the 1st row 402 of reference row, the 1st row 402 writes in the line buffer memory B103, and the 2nd row 403 is as code line then.Then, the same operation with the 1st row is done.

During the input of the 2nd row 403, each signal waveform is presented on the period T among Fig. 3 ₂Within.In this case, as period T ₂The data of reference row signal 125 be in period T ₁Write on the data of the 1st row 402 in the line buffer memory A102.

The detail operations of circuit block is described as above among Fig. 1.

Circuit block among Fig. 2 will be described below.

Symbol detection circuit 201 is from shift register A, B and C(Fig. 1) received signal 129,130 and 131, and detect symbol a0, a1, a2, b1, b2 that needs and the simileys of encoding corresponding to MMR.These symbols are defined as follows:

The initial pixel of the coding of a0=on code line.

A1=on code line, first change point (pixel) on pixel a0 the right.

A2=on code line, first change point (pixel) on pixel a1 the right.

A1=on reference row, first change point (pixel) on pixel a0 the right.

A color opposite with pixel a0 is arranged in pixel b1.

B2=is at first change point (pixel) on pixel b1 the right.

In Fig. 4, this " right side " direction means the right at pixel here.

Shift register B ' 202 comprises one 3 bit shift register and is received in change point signal b1 202 among Fig. 2, and sequentially to this input data shift in response to clock 134.Because the change point signal b1 that symbol detection circuit 201 detects keeps 3 clock cycle, so that determine the position of change point signal b1 with respect to relevant pixel.

Trip count device 203 comprises a binary counter, is used for to the counting of the number of picture elements from pixel a0 to pixel a1 (stroke just), or the number of picture elements from pixel a1 to pixel a2 is counted.12 outputs that the trip counter 203 produces a maximum amount to like this and forward the 2559(decimal system to).

Signal 228 expression among Fig. 2 is from low 6 of the count value of these counter 203 outputs, signal 227 high 6 from the count value of trip count device 203 outputs among Fig. 2.

The 204 main storages of ROM Table A are by position (code length) number of pattern (P-pattern) and vertical mode (V-pattern) coding and these yards.This ROM Table A 204 produce one comprise this yard and corresponding to the code length of address signal and line output.

The ROM table main storage of water of B205 flat-die type powdered (H-pattern) make-up code and their word length data.This signal 227 is used as from ROM table B205 and reads corresponding sign indicating number, and its word length data.

ROM table C206 mainly stores H-mode terminal sign indicating number and word length data thereof, and this signal 208 is used to address signal, is used for ROM table C206, so that read corresponding sign indicating number and word length data.

Latch-up signal circuit 207 and 208 temporary make-up code and word length data thereof of from this ROM205, reading.Latch circuit 209 temporary sign indicating number and word length data thereof of reading from ROM table C206.

Buffer storage 210 orders receive from latch circuit 209 and the sign indicating number and the word length data thereof that are temporarily stored in here.

The MMR coding rule will be by more detailed description.Determine to be positioned on the code line corresponding to symbol a0, a1 and the a2 of MMR coding, symbol b1 and b2 are positioned on the reference row.This coding mode is only selected from following three kinds of modes corresponding to the relative position relation between symbols a0, a1 and a2 and symbols b1 and the b2 (distance just).

(1) by pattern (P-pattern)

If pixel b2 is positioned in pixel a1(and only produces a sign indicating number) the left side, just select the P-pattern.

(2) vertical mode (V-pattern)

If satisfy | a1b1|≤3(adopts 7 sign indicating numbers of different distance), just select the V-pattern.

(3) horizontal pattern (H-pattern)

Under the situation of getting rid of those P-patterns of use and H-pattern (finishing coding), select the H-pattern, and a following coded format be provided according to the stroke code table:

H+M（a0a1）+M（a0a1）

Here H represents the sign indicating number of H-pattern, M(a0a1) is the run length code of white or black (a0a1), and M(a1a2) be the run length code of black or white (a1a2).

If can select dual mode at least, then pattern 1,2 and 3 priority order provide as follows:

(1) P-pattern＞(2) V-pattern＞(3) H-pattern

Determine that by a kind of coding circuit 212 comes priority resolution order, this circuit 212 is selected these latch circuits 207 and 208 and this buffer storage 210.

The coding of the 1st row (image) 402 will be described among Fig. 4.

In this coding, the coding zero-time is the time t of base 320 according among Fig. 3 the time _oGiven.

At time t _o, the initial pixel of this benchmark and code line shows as shift register C110(Fig. 1 respectively) a C ₄This A of output and shift register A108 ₄Output, more particularly, at time t _o, from shift register A110, the output of B109 and A108 be benchmark and the initial pixel of code line and line output, and follow be the 3-pixel signal initial pixel and line output.This pixel a0 is changed to initial value " 0 " (white pixel=virtual), as by 221 A among Fig. 3 _o(a0) indicated.

At time t _o, from initial value " 0 ", trip count device 203 begins visual clock B4 counting.

In Fig. 3, on corresponding time separately, counter 203 output count values 322.

In Fig. 3, at time t _oThe time signal 129-4 be not changed to logical one.In other words, in Fig. 2, the output terminals A of register A108 ₄Change point does not appear.Equally, the output B of register B109 ₄Do not show change point yet.Therefore, do not need to produce a sign indicating number, and the counting of trip count device 203 adds 1.In other words, time t ₁State and time t _oThe time state be identical.

Time t ₂, signal 129-4 is changed to logical one.The output A of register A108 ₄Be changed to logical one, a change point on the corresponding position of code line, just occurred.Because this change point is first change point on the existing initial pixel a0 right side (for the later time), this change point is by symbol detection circuit 201(Fig. 2) symbol a1 is detected, this detected state of symbol a1 is that Fa1 is stored in the symbol detection circuit 201.

At time t ₂, all signals of 130-1 to 130-4 all are not changed to logical one among Fig. 3, this means from time t ₂On the inherent reference row of three clock cycle of rising change point b1 can not appear.When symbol detection circuit 201 detected this pixel b1, pixel b1 was shifted in register B ' 202 and can continues three clock cycle.It should be noted that symbol detector circuit 201 also comprises the circuit of the pixel b1 information that storage is detected.

In this case, symbol detection circuit 201 is determined in three pixel coverages that are right after change point pixel a1 change point pixel b1 can not occur, and mensuration change point pixel b1(can not occur from starting point pixel a0 to pixel a1 thereby pixel b2 can not occur in this scope yet).

Though at time t ₂Pixel a1 is detected, but does not satisfy the condition of P pattern (pixel b2 must detected) and V model (| a1b1|≤3).Therefore, H pattern set.

The number of the pixel of the count value of trip count device 203 representative from pixel a0 to pixel a1 is as if what indicated by trip count device value 322 in Fig. 3 is " 2 ".The color of this stroke remains on initial value " 0 " (=white).By be fed to ROM table C206 from the represented stroke value of the output of trip count device 203 and pixel color or the like.Corresponding code and code length data are read from ROM table C206.At this moment, " white stroke 2 " code, i.e. M(a0a1 of output)=white 2.

This code is detected as first code in the H pattern.Represent the code " 001 " and the output simultaneously of " white operation 2 " code " 0111 " of H pattern with a clock.At one time, the code length data are to export with binary number.

The initial value of trip count device 203 is changed to " 1 " (noticing that this initial value is not " 0 ").The trip count device begins the pixel from pixel a1 to pixel a2 is counted.Set for initial value (pixel a1 just) is at time t ₂Carry out, in counter to this initial value set, at time t ₃Counter just starts.From time t ₃, the color of A0 (the time t just, that overturns ₂The time equal " 0 ", time t ₃The time be " 1 "), up to time t _nTill, the output A of register A108 ₄All be changed to logical one, to remove t detection time ₄The change point at place.Because symbol detection circuit 201 has been stored the change point a1(that has been admitted to Fa1=1 just), testing circuit 201 is determined above-mentioned A ₄The change point of output is pixel a2, and the detected state of pixel a2 is stored in the pixel testing circuit 201 as Fa2.At time t ₄, the counting of trip count device 203 is " 2 ", and A0=" 1 " (being equivalent to black).Because at time t ₂The time H pattern set, so when detecting pixel a2, needn't test to the state of reference row (just among Fig. 3 signal 131-1 to 131-4 and signal 130-1 to 130-4).Even pixel b1 and b2 appear at (though this situation can not exist) on its reference row, these pixels also are can be uncared-for.

M(a1a2)=code and the code length data of black " 2 " are at M(a0, a1 with similar) in identical mode export, but and M(a0a1) the situation difference be that the code " 001 " of expression H pattern is not added.

At time t ₄After, just at time t ₅, the counting of trip count device is changed to initial value " 1 ".In addition, A _o(=a _o) be reversed, at time t ₄The time change point a2 be considered to be in initial point pixel a0 in the next pattern.

Code 501 is obtained by first row, 402 codings shown in Figure 5.

Time t in Fig. 3 ₃₀The time, the counting of trip count device is " 9 ".At this moment, symbol a1 is " (a=1) detected.Two pixels behind change point pixel b1 ", at symbol a1 on the reference row " are according at time t ₃₀The output 131-2 of the output of register B109 and register C110 and detected (Fig. 3).Because satisfy condition | a1b1|≤3 and P pattern do not have set (b2 requirement), then place V model.Export a VL(2) sign indicating number (pixel a1 is positioned at the position of the left side of pixel B1 near two pixels).

In this case, though given this state makes that " stroke white 9 " can be produced in the H pattern, according to the definition of the priority of pattern, V model is an effective code.H schema code thereby be under an embargo.Because of the generation of V model code, and make up to time t ₃₀The counting of trip count device 203 be eliminated, trip count device 203 places initial value " 1 " as a result.After the V model code produces, starting point pixel a ₀The color of signal is reversed.It should be noted that it is simultaneously (just at time t that the change point of V model code and a1 signal detects ₃₀) produce.

Omitted this situation in the superincumbent narration, promptly if symbol b1 is detected before signal a1 detects, and the detection signal of then symbol b1 is provided in register B ' 202 and is shifted.To three clock cycle of back, register B ' the 202nd, by the sequence of B5, B6 and B7 be shifted.Output after this is under an embargo.Even after symbol b1 is detected, if the output B of register B109 ₄Do not have code to produce, this is actually as output Fb1 and is stored in the symbol detection circuit 201.

Each circuit function block in the circuit block diagram shown in Figure 1 also will be described in detail.

Virtual change point generator A101 is identical with the formation of virtual change point generator B105, and they all are made up of virtual change point generator shown in Figure 7.This virtual change point generator comprises a trigger 702,703, one of AND gates or 704 and inverter 705.The working condition of circuit 7 is illustrated in the sequential chart of Fig. 8.Except in Fig. 7 and Fig. 8 by memory address counter 111(Fig. 1) counting decoding and the row (regularly) of the signal 701 that obtains and an expression final pixel position, the same section among Fig. 1 and Fig. 3 and Fig. 7 and Fig. 8 is to represent with same label.When signal 701 produces regularly, trigger 702 be changed to clock 134 synchronous so that obtain the identical color of last pixel of code line.After trigger 702 was set, after promptly horizontal-drive signal 136-2 was cut off, the output of the Q of trigger 702 end was as signal 122.Before trigger 702 was set, picture intelligence 121 was as the signal 122 during producing at horizontal-drive signal 136-2.

Selector 104 among Fig. 1 can be made of circuit shown in Figure 9, and this selector comprises 902, one OR-gates 903 of AND gate and an inverter 904.Output 123 among Fig. 9 with 124 with Fig. 1 in be identical from the output 123 and 124 of line buffer memory A and B.Signal 901 among Fig. 9 is one and selects signal that their level is anti-phase for each provisional capital of image.Signal 901 is that the horizontal-drive signal 136-2 from Fig. 1 gets.Select signal 901 conversion outputs for signal 125.

Circuits for detecting changing picture elements A106 in Fig. 1 is identical with the formation of circuits for detecting changing picture elements B107.These two circuit are represented by the circuits for detecting changing picture elements B107 of Figure 10.Testing circuit B107 comprises 1002, one partial sum gates 1003 of a trigger and an inverter 1004.

Shown in the sequential of Fig. 8, signal 122 synchronously is input to trigger 1002 with clock 134 and by the output of Q end, and carries out logical exclusive-OR, detecting the different colours of contiguous pixel, thereby the signal 128 that changes.

The functional block of circuit block diagram also will be described in detail among Fig. 2.

The signal Fa1 that circuit produces among Figure 11 is illustrated in pixel a1 detected in the code line or pixel a1 and a2.The Fa1 signal generator is installed in by trigger 1102, in the symbol detection circuit 201 of AND gate 1104 and inverter 1105 compositions.

Part identical among Figure 11 and Fig. 1 is represented with same label.Signal 1101 among Figure 11 is control signals, is used for initial value with trigger 1102 to reset (being that the output of Q end equals logical zero) or forbid that the Q output is changed to logical one.When logical one, control signal is set normally." RESET " signal is with working with control signal 1101 identical modes.If change point A ₄(being signal 129-4) at first occurs, then A ₄=" 1 ".At this moment, because the Q of given trigger 1102 is output as " 1 " and control signal 1101 is " 1 "; AND gate 1104 output symbol a1=" 1 " therefore detect this symbol a1.The a1 detection signal is exported trigger set=" 1 " to obtain Q.In fact symbol a1 is detected and is stored (being Q output=Fa1=" 1 ").At this state, if A ₄=" 1 ", then a2=" 1 ".So symbol a2 is detected.

Circuit shown in Figure 12 is used for detected symbol b1 or similar situation, and this symbol detection circuit comprises a partial sum gate 1201, trigger 1202 and 1203, AND gate 1204 and inverter 1205.Among Figure 12 with Figure 11 in identical part adopt identical label.Because symbol b1 must have a color opposite with symbol a0, one changes on reference row in the symbol detection circuit of Figure 12 distance signal and a0 signal are resolved by partial sum gate 1201.This circuit of Figure 12 is included in the symbol detection circuit 201 of Fig. 2.

The detailed composition of the trip count device 203 among Fig. 2 provides in Figure 13.This trip count device 203 comprises a binary counter of 12 of having mentioned in front.The isarithmic scope of this binary counter is the 0(decimal number) be decimal number 2559 to 2560-1().Counter 203 has a preparatory function and a Protection Counter Functions.The universal integrated circuit IC74F163 that a kind of U.S. Fairchild Camere and Instrument company makes can be used as counter 203.

Trip count device 203 comprises that also an output count value that is used for monitor counter 203 is a decimal number 2559 and the circuit 1301 that is used to produce a MK1 signal, and one to be used to check low six the resulting values of decoding by the output count value be a decimal system 63 and the circuit 1302 that is used to produce a MK2 signal.

Preparatory function allows to be predisposed to the decimal system " 0 " or the decimal system " 1 ".

Characteristic about trip count device 203 will illustrate below.Each left end of going of code line is all preset counter 203 or zero clearing is initial value " 0 ", and the clock of pixel unit is counted in 203 pairs of area of images of counter.But if when being in following value or state, the count resets of counter is to " 1 ":

(1) if change point a1 or a2 is detected

(2) if count down to 2559

(3) if produce the code of P or V model

Therefore, according to cryptoprinciple, except the code line low order end, if change point a1 is defined as pixel a2, when detecting pixel a1, the counting of counter 203 is cleared.

The formation of ROM Table A 204 will be described in detail below among the figure.The arrangement of ROM Table A 204 is for code that produces 8 P and V model and their code length data.Obviously find out from the theory of constitution of this concrete device and the narration of front, when appear at the coding and baseline up conversion point position between relativeness the time, (particularly the change point b2 on baseline appears at the output B4 of register B109 or the output terminals A that the change point in the code line appears at register A108 ₄), the output state of the state of signal deteching circuit 201 and register A108, B109 and C110 can detect in the corresponding time simultaneously.The combination of these outputs is limited, can be regarded as fixing output in detection time.Therefore, P or V model code and they can be detected with the code length data that are output in each combination, thereby constitute the ROM table.The detailed content of ROM table is too tediously long, utilizes ROM equivalence logical circuit shown in Figure 14 to illustrate here.This equivalent electric circuit produces a P schema code and its code length data.Circuit comprises reverser 1409,1410, one NOT-AND gates 1411 of timing circuit and an OR-gate 1412.The change point b2 that signal 1401 among Figure 14 is illustrated on the baseline is detected by sign indicating number position testing circuit 201 among Fig. 2.

That is to say, be the output B that appears at register B109 among Fig. 1 as the change point of pixel b2 ₄Register A108 output terminals A in a1 signal 1402 presentation graphs 1 among Figure 14 ₄Change point a1.Fa1 signal 1403 expression symbol detection circuit 201(Fig. 2 among Figure 14) detected change point a1.

The logical circuit of Figure 14 utilizes " falseness " a1 or Fa1 signal to determine the P pattern according to the detection of pixel b2.In other words, after starting point pixel a0, until pixel b2 when being detected till, change point a1 does not appear.In other words, in this images, to being lower than the immediate position of change point pixel b2 change point a1 does not appear all from starting point pixel a0.Therefore, limit according to this, this pattern is determined by the P pattern.This P pattern is detected by P mode detection signal 1404.The code of this P pattern is represented with code 1405.Code length data 1406 expression P schema code length data.The generation of P schema code is to detect with signal 1407.Above-mentioned explanation is the situation about the P mode detection.This process and composition for the P pattern can be used for V model equally, have constituted ROM Table A 204 like this.

When b2 or a1 signal are detected, the status signal of each register as the input feeds of data to ROM Table A 204 in a clock cycle, to produce P or V model code and its code length data.

Because ROM table B205 has identical structure with ROM table C206, they are represented by the table of the ROM among Figure 15 and Figure 16 C206.

ROM206 has input of 11 bit address and the output of 21 parallel-by-bits at least.Input is 228 corresponding to the signal among Fig. 2 228, and it is low six of trip count device 203 among Fig. 2.Input 1502 among Figure 15 is the signals that are used to specify the stroke color, and in this example, " 0 " corresponding to white, " 1 " is corresponding to black.Input 1503 is to be used to specify code (=001) added signal whether of representing the H pattern.If addition, this signal level is " 1 ", otherwise is " 0 ".If importing 1503 is to place logical one, code " 001 " is added to first stroke code of H pattern so, reaches a clock cycle, and the code after this addition is output.Whether the output signal of chip selection signal 1504 control ROM206 is by gating.Address input end is an EOL1507, EOL+1 1508 and EOL+0 1509.According to each address input synchronous with clock pulse, the terminal code of corresponding line can be read out.Address code output 1505 is visited by address input end.Another output is code length data 1506 outputs.

Figure 16 is A among a relevant Figure 15 ₀To A ₁₀The table of relation between address and the storage content (data).

The detailed formation and the working condition of code detection circuit 212 describes in detail with reference to Figure 17 among Fig. 2.This code detection circuit 212 comprises AND gate 1706 and reverser 1707.

In the present embodiment, the principle of code generation is conspicuous.P, V and H schema code also are not defined as last code by the ROM table 204 among Fig. 2,205 or 206 in prestage, can read from corresponding ROM table usually for two in P, V and the H schema code.Thereby in these codes one selects according to aforesaid predetermined priority order.The only definite sign indicating number that will be produced of the circuit of Figure 17.

If the code of P, V and H pattern is to produce simultaneously, the code that has more senior priority so is selecteed by following priority order:

P pattern＞V model＞H pattern

Do not have selecteed code at this moment to be under an embargo and do not produce.

Mode signal 1708 determines that coding circuit is to be used for MH coding (being one-dimensional coding) still to be used for MMR or MR coding (promptly two-dimensional encoded).If one-dimensional coding is used, then mode signal 1708 is changed to low level, otherwise is changed to high level.When using one-dimensional coding, the generation of P and V model code is under an embargo, and the code of the H schema code is only arranged, promptly representing the trip is started.

Latch A207 among Fig. 2 and the effect of latch B208 will illustrate below.Latch A207 and B208 are used for temporarily storing the code of H pattern formation and the circuit of its code length data, and these two latchs produce during encoding, till the H pattern is confirmed as effectively.If this H pattern is confirmed as effectively, the content of these two latchs just is fed to the next stage circuit so.

When forming the stroke of a make-up code (for example stroke=2972), the working condition of latch A207 and B208 will be illustrated.When this situation, this code is divided into three stroke codes (i.e. two make-up codes and an one-dimensional code) and these codes are output.

(1) mends calculation code 1=stroke 2560 codes (being generally used for white and black)

(2) mend calculation code 2=stroke 384 codes (white or black)

(3) stop code=stroke 28 codes (white or black)

If a stroke is by a plurality of coded representation, that is: 2560+384+28(=2972), then the counting whenever trip count device 203 is that 63 * 64 * N(N is a positive integer, as 0,1,2 ...) time, the output terminals A of register A108 ₄Just be determined.If in output terminals A ₄Change point a1 does not occur, and then judges it is to produce to mend to calculate code.Wanting high benefit to calculate code 1 than high 6 place values (corresponding to N) of counter 203 reads from ROM table B205 with corresponding code length data.These data of reading are temporarily stored (being latched) in latch B208.Afterwards, along with this counting increases 64(promptly: in 63+64 * N, N increases by 1), the content among the latch B208 just is updated.

When the counting of trip count device reaches 2559(promptly in 63+64 * N, N is 39) time, the output A of register A108 ₄Detected.At this moment, if change point pixel a1 is not detected, then can expect existing counting 2560 or bigger stroke.Aforesaid same procedure corresponding to the code and the code length data of stroke 2560, is to read from ROM table B205.These data of reading are temporarily to be stored among the latch A207.Meanwhile, the content of storing among the latch B208 is under an embargo.The count value of trip count device 203 turns back to initial value " 1 ".When this counting when being updated subsequently, each value to the storage capability of the composition code of latch B208 from 63+64 * N.

When change point a1 is detected, then determine contention with other pattern (that is, P and V model).If the H pattern is determined, the code length data of its termination code and it (the two all has low 6 the represented stroke of value of the trip count device 203 by corresponding to change point pixel a1 the time) temporarily are stored among the latch C209.The same as mentioned above, the content of latch A207 and B208 also effectively or be under an embargo.

If corresponding to change point pixel a1 the time, the V model code is produced, and then can not produce the H schema code.At this moment, the content of latch A207 and B208 is under an embargo.The V model code is latched device C209 as a valid code rather than termination code and latchs.

Be shown among Figure 18 in order to produce and to store the circuit of mending calculation code 1 and mending calculation code 2.This circuit is included in the timing circuit 112.When stroke is 2972, be shown among Figure 19 in order to the time diagram of explaining circuit working among Figure 18.Circuit among Figure 18 comprises trigger 1801 and 1802, one AND gates 1803 and a reverser 1804.

Signal MK1 and MK2 are the signals from 2559 testing circuits 1301 stroke counter 203 and 1302 outputs of 63 testing circuits.Trigger 1802 response signal MK2 and be set and produce the MK2 detection signal.Trigger 1801 response signal MK1 and be set and produce the MK1 detection signal.Trigger 1802 resets when response signal MK1.

If the counting of trip count device 203 is 64 or more for a long time, the MK2 detection signal is to put at high level.If trip count device 203 countings surpass 2560, only are that two detection signals of MK1 detection signal or MK1 and MK2 are to put at high level.Mending the combination of calculating code no matter the code of expression stroke only is a stop code or termination code, no matter mending the number of calculating code is 1 or 2, all is to determine according to the level of MK1 and MK2 detection signal also.If a code produces in the H pattern, then the level of MK1 and MK2 detection signal is detected by storage circuit 211.This storage circuit is selected an effective latch among three latch A, B and the C and is taken out its latched data.

Mending and calculating code is to produce last clock cycle that is expected at before benefit calculation code produces.This code is stored in the interim storage circuit (latch A and B).When change detected point a1, the number of simultaneously processed output code and the number of bit can reduce, thereby have brought convenience in the side circuit design.Before stroke counter 203 was determined the H pattern, the number of required benefit calculation code and their code length data were temporarily to be stored among latch A207 and the B208 in counting.In the detection of H pattern, only there are termination code and its code length data processed, therefore when detecting pixel a1, all H schema codes all are ready to, just do not postpone when carrying out the coding of back.

Latch A207, the content among B208 and the C209 is perhaps to be buffer storage 210 with A207, B208 and C209() sequence deliver to the next stage circuit.In this case, if the content invalid of latch, they just can be omitted.

Because below, the content of latch C209 temporarily is stored in the buffer storage 210.In the moment after and then coding mode is determined, next coding just is activated.A coded data normally is imported among the latch C209 in the time interval of several clocks (minimum is a clock).At this moment, the content that latchs previously is destroyed.After this pattern was determined, the content of latch C209 was fed in the buffer storage 210, so that go to latch next coded data, this buffer storage 210 is regularly exported this coded data to the back level.

Here illustrate that a kind of special circumstances are to be positioned on the identical pixel according to coding rule change point a1 and a2.

Figure 20 has illustrated this situation.Referring to Figure 20, picture intelligence comprises baseline 2001 and code line 2002, and a final pixel 2003 and virtual change point (pixel) 2004 are arranged in code line

With reference to Figure 20, suppose that starting point pixel a0 is positioned at from the shown position of left coding.At this moment the code that is and then produced is " a H schema code+white 12 termination codes+black 0 termination code ".The available said method during corresponding to change point a1 of code among Figure 21 (1) is handled as a single code.Therefore, the code among Figure 21 (2) is a code that produces during corresponding to change point a2, and change point a2 at this moment is detected a time different with change point a1.In this case, code (2) can not clearly be detected with coincidence detection circuitry 201 as change point a2.

In this case, a circuit (Figure 22) that is installed in the symbol detection circuit 201 carries out following operation.The working condition of slip chart diagrammatic sketch 22 circuit of Figure 23.Contrast Figure 22, an imaginary area of signal 2201 presentation images, signal 2201 is that the method for horizontal signal paraphase is produced.Signal 2202 is as a1 change point detection signal, and signal 2203 expressions are up to the cycle of first terminal code generation.These signals all will be monitored, and a logical signal of signal 2201 to 2203 is used for detecting the state of Figure 20 and produces signal 2204-1(and the pixel a1 while by producing with door 2207).Sign indicating number among Figure 20 (1) is exported in the same manner.Carry out predetermined extremely zero the operation of program counter clearly that comprises.Signal 2204-1 among Figure 22 is by 2208 clock cycle of time-delay of delay circuit that comprise the D bistable circuit.Composite signal 2205-1 produces black (=" 0 ") terminal code.

Storage circuit 211 among Fig. 2 is accepted sign indicating number, and according to the method described above the order code length number (length, be bit number) that produces code be not predetermined, thereby the code length of the maximum that is provided is 16 bits that comprise H-sign indicating number (=001), and produces 16 signals.In an embodiment, 16 parallel-by-bit signals are delivered to external circuit.

Signal 238 is 16 bits (bit) sign indicating numbers that storage circuit 211 produces among Fig. 2, and signal 239 is answer signals, replys as the external circuit of 16 (bit) signals of storage with its dateout of next stage.Storage circuit 211 by the combination circuit common, for example makes up a code length adder easily, a binary digit bit shift register, and a signal connects takes advantage of device and a latch register to realize.

The RTC(that below will describe the termination of expression one page returns to control) signal.For MMR coding situation, RTC sign indicating number=EOL sign indicating number * 2, rtc signal (000000000001) * 2=000000000001 more particularly, 000000000001.In above embodiment, a clock cycle is exported 16 bit binary data sign indicating numbers.In order to export rtc signal, the termination of one page is to measure with the method for vertical synchronizing signal 136-1 or similar signal among monitoring Fig. 3.Right latter two clock cycle pulse is added to ROM table C206(Figure 15 as address signal 1570).EOL sign indicating number and its code length data write on the address of appointment of ROM table C206.According to these signals of reading from ROM table C206, the RTC sign indicating number can directly be followed the tracks of image code.

Table 1 illustrates the difference of three kinds of coded systems in a capsule.

The MH coding is identical with such a case basically.There, except that following each point, the H pattern of MMR coding occurs repeatedly:

(1) in the MH coding, do not require H mode code (=001)

(2) in the MH coding, do not require a pair of black and white stroke

(3) each row must insert the EOL sign indicating number in the MH coding

(4) the RTC sign indicating number in MMR coding and MH encode is different.

Below provide the identical point and the difference thereof of MR coding mode and MH or MMR coding mode:

(1) capable identical with the MMR coding of the one dimension of MR coding.

(2) the two dimension row of MR coding and MMR coding is identical.

(3) the capable terminal of MR coding is:

EOL+1＝0000000000011

Perhaps EOL+1=0000000000010

(4) the RTC sign indicating number of MH coding is different with the RTC sign indicating number of MH or MMR coding.

(5) owing to parameter K, peacekeeping two dimension row mixes in the MR coding.

Conversion between three kinds of coding modes is carried out easily in such a way, be exactly MMR coding circuit operating state be to control according to the selection signal of selecting MR or MH coding mode.

Figure 24 represents to be used for discerning the circuit of row, row terminal and sign indicating number.This identification circuit is made up of 2408, one of NAND gate and 2409 and phase inverters of door 2410.(t-1) of base 320 located when a pulse signal 2401 appeared at along Fig. 3.To produce pulse signal 2401 to each bar coding provisional capital.Locate not produce any sign indicating number relevant at (t-1) with picture coding.The pulse signal of locating at (t-1) is to be obtained by a value of translating address register 111.In order to specify a kind of coding form; Coding mode selection signal 2402 and 2403 is provided as CPU by an external circuit.Corresponding among the signal 136-2 of Figure 24 and Fig. 3.The pulse of the capable register 2407 count signal 136-2 of basic K is with the K value of consult volume in the monitoring MR coding.

2403 to 2406 these three signals that obtained by Figure 24 logical circuit are as the address input ( input 1507 and 1508 of corresponding Figure 15) of ROM table C206 to Fig. 2, and the specific address of access thus.Sign indicating number that needs and their code length number all are stored on the particular address of ROM table C206, read thus then, obtain desired capable terminal code.

The one dimension that selection signal 1708 can be controlled the MH coding is capable, so that make definite circuit (Figure 17) of MMR pattern provide last priority to the H pattern.

MH coding need H mode code (=001), and this point is as long as show ROM the address binary digit A of C206 ₇Zero setting can reach.

For different coding modes, can obtain EOL sign indicating number at the CRT sign indicating number varying number that is used for the different coding form as long as change the number of pulses be added to ROM table C206.

In this embodiment, coding circuit is according to moving with the synchronous mode of visual clock 134.Even clock interval (cycle) changes, coding work still can normally carry out.As shown in figure 25, according to producing the method that a visual gate signal removes to shelter clock 134, can in image or in the ranks, provide pause step.

With reference to Figure 25, when a visual gate signal 2501 is put logical zero, visual clock 134 will be lost its effect.The coincidence AND signal of image gate signal 2501 and clock 134 is as the clock 2502 that has omitted masking signal.If clock 2502 replaces clock 134 to be added to the interior circuit of the encoding device of embodiment, then logic state only changes according to this clock signal.Therefore, that time of shaded portion coding suspends among corresponding Figure 25.

The output speed of the picture intelligence of exporting from the coding image signal source is not subjected to the restriction of coding circuit speed, at image signal source, for example have in the image memory file of disk, even the output of one page picture intelligence is to be interrupted to produce, coding circuit is also worked according to the mode of being interrupted.Therefore, need not to use buffer storage or use the output speed of similarly big storage capacity device use picture intelligence output source and the coding rate of coding circuit to be complementary.The picture intelligence of signal source output can be encoded in order.

In conjunction with Figure 26 and Fig. 2 the method that the parallel signal of one coding image is added to the present embodiment coding circuit is described.In the lump/and serial shifter 2601 acceptance 8 parallel-by-bit data, export Bits Serial data.

Such as shown in figure 27, a coding image signal is packed into by 8 parallel-by-bit data in register 2602, and according to clock signal, parallel data forwards serial data to, obtains serialization graph picture signals 2602 shown in Figure 27 thus.In the parallel/serial capable transition period, clock signal is counted to produce the gate signal 2702 in expression real data cycle.By above-mentioned the same manner, also can corresponding real data clocking 2703.

By pause method shown in Figure 25, signal shown in Figure 27 has the form of codified.When image is provided by CPU or similar units, can use the parallel/serial row conversion of image effectively.

In above embodiment, MH, MR and MMR coding mode are illustrated as an example.Yet the present invention also can use other coding form.In addition, coding image signal can be provided or be provided by the equipment of reading original image with photoelectric method by a computer.The coding sign indicating number can be transmitted into So Far Away by transmission line or similar approach, also can be stored in the image memory file.The present invention is described in conjunction with a most preferred embodiment, but is not limited thereto, and can make multiple changes and improvements aspect the spirit of inventing and the visual field.

As mentioned above, the serialization graph picture signals changes into parallel data, and parallel data can be encoded on real-time baseline and do not required jumbo memory.

With regard to coding, the coding sign indicating number of expression pattern can produce simultaneously, and selects according to priority order.The coding sign indicating number an of the best can output immediately in pattern is concluded the time.Therefore, when encoding, the picture intelligence input does not produce time-delay relatively.

With regard to the multi-mode coding, the coding sign indicating number can be exported in pattern is concluded the time immediately, therefore, can obtain high-speed real-time coding.

Because coding is to carry out after a picture intelligence input of being made up of the pixel of coding requirement, can normally carry out so encode, and not time-delay of input image signal relatively.

Under the situation that the picture intelligence that is had the long stroke that needs many sign indicating numbers is encoded, the method for the coding sign indicating number that will produce by advance notice prestores and encodes yard, then it is read.Therefore, when sign indicating number is exported, can alleviate the coding load, simultaneously, not cause the coding of relative picture intelligence input time delay.

The identification code of a presentation code pattern and an initial code are exported as a comprehensive coding, and the result compares with the situation of the many sign indicating numbers of needs output, and output time can shorten.Therefore, obtain the coding sign indicating number that relative input imagery does not have time-delay.

The sign indicating number of an identification pixel is divided into many sign indicating numbers, alleviating the load of coding circuit, and encodes effectively whereby.

A signal encoding device can be applicable to a plurality of coding modes, and like this, circuit structure was not made the big processor that changes after coding can be applicable to.

Coded system MMR MR MH

Efficient two-dimensional approach one dimension mode

The project two-dimensional approach

Two dimension row (K-1) row does not completely have

One dimension is capable not to have every K capable capable entirely

K parameter K=∞ or suitable K=2 do not have

K=4(is any) etc.

Do not have one dimension capable=EOL+1 row=EOL entirely

Row terminal code two dimension row=EOL+0

The complete white row of imagination row does not have

Imagination pixel white pixel white pixel white pixel

(left side)

Imagination pixel final pixel counter-rotating two-dimensional process final pixel is counter not to be had

(right side) changes the one dimension processing not to be had

RTC sign indicating number EOL * 2 (EOL+1) * 6 EOL * 6

（EOFB）

Filling does not have

The P pattern has (mixing) not have to the two dimension row

V model has (mixing) not have (similar H pattern) to one dimension is capable

The H pattern

Claims (11)

1, a kind of image signal coding device comprises:

Input equipment.In order to import a serial code line picture intelligence:

Receiving equipment, in order to receive the serial reference row picture intelligence with this serial code row image signal Synchronization:

First checkout equipment, in order to detect by a change point in the code line picture intelligence of above-mentioned input equipment input:

Second checkout equipment, in order to detect a change point in the reference row picture intelligence that receives by above-mentioned receiving equipment:

Watch-dog, in order to according to the output monitoring code line picture intelligence of above-mentioned first and second checkout equipments and the correlation between the reference row picture intelligence:

Counting equipment, in order to count the pixel number between the code line picture intelligence change point:

Encoding device is encoded to the picture intelligence of code line in order to the output according to above-mentioned watch-dog and above-mentioned counting equipment,

It is characterized in that: above-mentioned watch-dog comprises: first conversion equipment, be converted to the capable change point data of parallel encoding in order to the serial change point data that will represent the change point in the detected code line picture intelligence of above-mentioned first checkout equipment, and second conversion equipment, be converted to parallel reference row change point data in order to the serial change point data that will represent the change point in the detected reference row picture intelligence of above-mentioned second checkout equipment: the correlation of the several pixels in pixel front and back that are encoded that above-mentioned watch-dog is noted according to the parallel reference row change point data parallel ground monitoring of the capable change point data of parallel encoding of above-mentioned first conversion equipment and above-mentioned second conversion equipment.

2, device according to claim 1, wherein, described watch-dog is in order to the relation of the position between monitoring code line picture intelligence change point and the reference row picture intelligence change point.

3, device according to claim 1, wherein, said first and second conversion equipments, output has the parallel picture intelligence of the required pixel number of coding.

4, device according to claim 1 also comprises storage device, in order to store one in advance the input the code line picture intelligence, then with it as the reference row picture intelligence in advance with output.

5, device according to claim 1, wherein, described encoding device comprises that a memory table in order to receive the output of above-mentioned supervising device and counting device, is used as address signal and outputting encoded data.

6, device according to claim 1, wherein, the code line picture intelligence comprises the binary data of representing each PEL (picture element) density.

7, device according to claim 1 also comprises:

The first generation equipment is in order to produce a coding sign indicating number according to the number of pixels between the code line picture intelligence change point;

The second generation equipment in order to the correlation between monitoring code line picture intelligence and reference row picture intelligence, produces a coding sign indicating number according to this correlation; And

Selection equipment when encoding sign indicating number in order to export it simultaneously at above-mentioned first and second generating meanss, is chosen a coding sign indicating number according to predetermined priority order.

8, device according to claim 4, wherein said storing apparatus is characterized in that:

When the counting of said counting device reaches predetermined value, the coding sign indicating number that storage has predetermined value.

9, device according to claim 1 also comprises:

The sign indicating number checkout equipment determines according to correlation between code line picture intelligence and the reference row picture intelligence whether the coding sign indicating number in this storage device is effective.

10, device according to claim 1, wherein, above-mentioned encoding device according to accepting the code line picture intelligence for the required number of picture elements of correlation that above-mentioned watch-dog is determined, is encoded then.

11, device according to claim 1 also comprises:

Storage device when being about to surpass predetermined value in order to the count value arrival when above-mentioned counting equipment, stores one first sign indicating number of encoding of expression one predetermined value;

Generation equipment is represented the second coding sign indicating number of the counting of above-mentioned counting equipment less than the value of pre-determining in order to generation;

Wherein, be stored in the coding of first in above-mentioned storage device sign indicating number and be read out, meanwhile, when detecting a change point pixel, produce the second coding sign indicating number by above-mentioned generation equipment.

Images