CN100583458C - Pixel structure, thin-film transistor and production method thereof - Google Patents
Pixel structure, thin-film transistor and production method thereof Download PDFInfo
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- CN100583458C CN100583458C CN200710193362A CN200710193362A CN100583458C CN 100583458 C CN100583458 C CN 100583458C CN 200710193362 A CN200710193362 A CN 200710193362A CN 200710193362 A CN200710193362 A CN 200710193362A CN 100583458 C CN100583458 C CN 100583458C
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Abstract
The present invention relates to a thin film transistor with a pixel structure and a manufacturing method of the thin film transistor, wherein, the thin film transistor is applied to a base-plate, and comprises a grid electrode, a grid insulation layer, a ring-shaped source electrode, a drain electrode and a semi-conductor layer. The grid electrode is configured on the base-plate. The grid insulation layer is arranged on the base-plate and covers the grid electrode. The ring-shaped source electrode is configured on the grid insulation layer. The drain electrode is arranged on the grid insulation layer, the drain electrode is surrounded by the ring-shaped source electrode. The semi-conductor layer is arranged above the grid electrode, the semi-conductor layer at least covers the grid insulation layer that is arranged between the ring-shaped source electrode and the drain electrode. When the pixel electrode with the thin film transistor structure is powered, the pixel electrode has a rather low electric consumption.
Description
Technical field
The invention relates to a kind of display floater and preparation method thereof, and particularly relevant for a kind of dot structure (pixel structure), thin-film transistor (thin film transistor, TFT) and preparation method thereof.
Background technology
In recent years, LCD replaces traditional iconoscope screen gradually with thin thickness, high image quality, low consumpting power, advantage such as radiationless.In general LCD, display panels is by colored optical filtering substrates (Color Filter substrate, CF substrate), thin-film transistor array base-plate (ThinFilm Transistor array substrate, TFT array substrate) is formed with liquid crystal layer (Liquid Crystallayer).Yet along with the size of display panels increases day by day, the electrical characteristic of the thin-film transistor on the thin-film transistor array base-plate (for example: the ability of charging, discharge) will directly have influence on the display quality of display panels.At present, most display panels producer is all towards the target hard-working of low power consumption and high display quality.
Figure 1A is the local schematic top plan view of existing dot structure, and Figure 1B is the generalized section along the A-A ' hatching line of Figure 1A.Please also refer to Figure 1A and Figure 1B, the dot structure 100 that is disposed on the substrate 110 comprises thin-film transistor 120 and pixel electrode 140.Thin-film transistor 120 comprises grid 122, gate insulation layer 124, channel layer 126, ohmic contact layer 128, ring-type source electrode 130 and drains 132.By Figure 1B as can be known, grid 122 is disposed on the substrate 110, and gate insulation layer 124 is disposed on the substrate 110 with cover gate 122, and channel layer 126 is covered on the gate insulation layer 124.In addition, ohmic contact layer 128 is covered on the part channel layer 126, and ring-type source electrode 130 is covered on the ohmic contact layer 128 with drain electrode 132, and drains and 132 be electrically connected with pixel electrode 140.What deserves to be mentioned is,, therefore, when applying driving voltage, can make channel layer 126 form an amorphous silicon region 126a and a channel region 126b to grid 122 because channel layer 126 is light dope or unadulterated amorphous silicon layer.
Learn by existing technology, when thin-film transistor 120 is driven and opens, the signal of video signal that data wire transmitted can be in regular turn via the ohmic contact layer 128 under the ohmic contact layer 128 under ring-type source electrode 130, the ring-type source electrode 130, amorphous silicon region 126a, channel region 126b, amorphous silicon region 126a, the drain electrode 132 and drain 132, and on the recording pixel electrode 140.Because channel layer 126 is light dope or unadulterated amorphous silicon layer, therefore, when seeing through thin-film transistor 120 image data being recorded in pixel electrode 140, must provide sufficiently high driving voltage, image data successfully is recorded on the pixel electrode 140 to grid 122.Clearly, in this dot structure 100, light dope or unadulterated amorphous silicon layer can't be lowered effectively by the power consumption of thin-film transistor 120.
Hold above-mentioned, the drain current (I of thin-film transistor 120
d) whole resistance (overall resistance) when being unlocked with driving voltage that is coupled to grid 122 and thin-film transistor 120 is relevant.In other words, when the whole resistance when thin-film transistor 120 is unlocked was low more, thin-film transistor 120 just can drive by lower driving voltage, to obtain required drain current (I
d), at this moment, the power consumption of thin-film transistor 120 is lower.Therefore, the power consumption that how to reduce drive thin film transistors 120 is one of subject under discussion of paying close attention to of everybody always.
Summary of the invention
The invention provides a kind of thin-film transistor, the driving voltage when it is unlocked is less.
The present invention also provides a kind of manufacture method of above-mentioned thin-film transistor.
The present invention provides a kind of dot structure in addition, has lower power consumption when it is driven.
The present invention provides a kind of above-mentioned production method of pixel structure again.
The present invention proposes a kind of thin-film transistor, and it is suitable for being configured on the substrate.This thin-film transistor comprises a grid, a gate insulation layer, a ring-type source electrode, a drain electrode and a semi-conductor layer.Gate configuration is on substrate.Gate insulation layer is disposed on the substrate with cover gate.The ring-type source electrode is disposed on the gate insulation layer.Drain configuration on gate insulation layer, and drain electrode for ring-type source electrode institute around.Semiconductor layer is disposed at the grid top, and wherein semiconductor layer covers the gate insulation layer between ring-type source electrode and drain electrode at least; Described semiconductor layer comprises: a channel layer; And an ohmic contact layer, be disposed between described channel layer and the described ring-type source electrode and between described channel layer and the described drain electrode.
The present invention proposes a kind of dot structure in addition, and it is suitable for being configured on the substrate.This dot structure comprises a thin-film transistor and a pixel electrode.Thin-film transistor for example is above-mentioned thin-film transistor.Pixel electrode electrically connects with drain electrode; Described semiconductor layer comprises: a channel layer; And an ohmic contact layer, be disposed between described channel layer and the described ring-type source electrode and between described channel layer and the described drain electrode.
In one embodiment of this invention, above-mentioned grid is shaped as circle or ellipse.
In one embodiment of this invention, an outline of above-mentioned annular source electrode is circular or oval.
In one embodiment of this invention, above-mentioned drain electrode is shaped as rectangle, circle or oval.
In one embodiment of this invention, above-mentioned semiconductor layer is shaped as circle or ellipse.
In one embodiment of this invention, above-mentioned semiconductor layer more covers the subregion of ring-type source electrode and the subregion of drain electrode.
In one embodiment of this invention, above-mentioned semiconductor layer comprises a channel layer and an ohmic contact layer.Ohmic contact layer is disposed between channel layer and the ring-type source electrode and between channel layer and the drain electrode.
In one embodiment of this invention, above-mentioned dot structure more comprises a protective layer.Protective layer is covered on the thin-film transistor, and wherein protective layer has a contact window with the exposure that will drain, and pixel electrode sees through contact window and drain electrode electric connection.
In one embodiment of this invention, above-mentioned dot structure more comprises a conductive plunger.Conductive plunger is disposed in the contact window, and wherein pixel electrode sees through the conductive plunger and drain electrode electric connection in the contact window.
The present invention reintroduces a kind of manufacture method of thin-film transistor.At first, on a substrate, form a grid.Then, on substrate, form a gate insulation layer, wherein gate insulation layer cover gate.Then, on gate insulation layer, form a ring-type source electrode and a drain electrode, wherein drain electrode for ring-type source electrode institute around.Come, form semi-conductor layer in the grid top, wherein semiconductor layer covers the gate insulation layer between ring-type source electrode and drain electrode at least.
The present invention more proposes a kind of production method of pixel structure.At first, on a substrate, form a grid.Then, on substrate, form a gate insulation layer, wherein gate insulation layer cover gate.Then, on gate insulation layer, form a ring-type source electrode and a drain electrode, wherein drain electrode for ring-type source electrode institute around.Come, form semi-conductor layer in the grid top, wherein semiconductor layer covers the gate insulation layer between ring-type source electrode and drain electrode at least, and grid, gate insulation layer, ring-type source electrode, drain electrode and semiconductor layer constitute a thin-film transistor.Continue it, form a protective layer and a pixel electrode on thin-film transistor and gate insulation layer, wherein pixel electrode electrically connects with drain electrode.
In one embodiment of this invention, the formation method of above-mentioned semiconductor layer may further comprise the steps.At first, go up formation one ohmic contact layer in the subregion of ring-type source electrode with drain electrode.Then, on the subregion of ohmic contact layer and gate insulation layer, form a channel layer, so that channel layer covers the gate insulation layer between ring-type source electrode and drain electrode at least.
In one embodiment of this invention, the above-mentioned protective layer and the formation method of pixel electrode may further comprise the steps.At first, on thin-film transistor and gate insulation layer, form a dielectric layer.Then, on dielectric layer, form a photoresist layer, wherein photoresist layer has one first a photoresist block and second a photoresist block that is connected with the first photoresist block, the thickness of the first photoresist block is greater than the thickness of the second photoresist block, and the second photoresist block has an opening that is positioned at above draining.Coming, is the cover curtain with the photoresist layer again, removes the dielectric layer that opening exposes.Continue it, reduce the thickness of photoresist layer, be removed up to the second photoresist block.Then, on photoresist layer, form a conductive layer.At last, remove photoresist layer, so that conductive layer pattern is turned to pixel electrode.
In one embodiment of this invention, the thickness of the above-mentioned formation first photoresist block is greater than the thickness of the second photoresist block, and the second photoresist block has a method that is positioned at the opening of drain electrode top and comprises and use a halftoning light shield.
In sum, the present invention is disposed at channel layer between ring-type source electrode and the drain electrode, makes that the whole resistance when thin-film transistor is unlocked reduces.Therefore, thin-film transistor just can drive by lower driving voltage, obtaining required drain current, and then makes thin-film transistor have lower power consumption.In other words, when the pixel electrode with above-mentioned thin-film transistor structure was driven, it had lower power consumption.
Description of drawings
Figure 1A is the local schematic top plan view of existing dot structure.
Figure 1B is the generalized section along the A-A ' hatching line of Figure 1A.
Fig. 2 A illustrates the local schematic top plan view into a kind of dot structure of the present invention.
Fig. 2 B illustrates and is the generalized section along the B-B ' line of Fig. 2 A.
Fig. 2 C is the electrical relatively schematic diagram of thin-film transistor of the present invention and existing thin-film transistor.
Fig. 2 D and Fig. 2 E are that the structure of thin-film transistor of the present invention and existing thin-film transistor compares schematic diagram.
Fig. 3 A～Fig. 3 I illustrates the making schematic flow sheet into a kind of dot structure of preferred embodiment of the present invention.
Fig. 4 is the generalized section of another dot structure of the present invention.
Drawing reference numeral:
100,200,300: dot structure
110,210: substrate
120,220: thin-film transistor
122,222: grid
124,224: gate insulation layer
126,232: channel layer
126a, 232a: amorphous silicon region
126b, 232b: channel region
128,234: ohmic contact layer
130,226: the ring-type source electrode
132,228: drain electrode
140,240: pixel electrode
230: semiconductor layer
250: protective layer, dielectric layer
252: contact window
260: conductive plunger
270: photoresist layer
272: the first photoresist blocks
274: the second photoresist blocks
276: opening
280: conductive layer
290: electric conducting material
A-A, B-B ': hatching line
Embodiment
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
First embodiment
Fig. 2 A illustrates the local schematic top plan view into a kind of dot structure of the present invention, and Fig. 2 B illustrates and is the generalized section along the B-B ' hatching line of Fig. 2 A.Please also refer to Fig. 2 A and Fig. 2 B, this dot structure 200 comprises a thin-film transistor 220 and a pixel electrode 240, and wherein thin-film transistor 220 is disposed on the substrate 210.Thin-film transistor 220 comprises a grid 222, a gate insulation layer 224, a ring-type source electrode 226, a drain electrode 228 and a semi-conductor layer 230.Pixel electrode 240 electrically connects with drain electrode 228.
By Fig. 2 B as can be known, grid 222 is arranged on the substrate 210, and in one embodiment, the shape of grid 222 can be circular or oval, and the material of grid 222 can be conductive material, for example is aluminium.In addition, gate insulation layer 224 is to be disposed on the substrate 210 with cover gate 222, and wherein, the material of gate insulation layer 224 is an insulator.In general, the material of gate insulation layer 224 can be the material of silicon dioxide or other non-conductive property.Above-mentioned only is one for example.
In addition, ring-type source electrode 226 is disposed on the gate insulation layer 224 with drain electrode 228, and drain 228 for 226 of ring-type source electrodes around.In one embodiment, an outline of ring-type source electrode 226 can be circle or ellipse, and 228 the shape of draining can be rectangle, circle or oval.At this, the present invention is not particularly limited the shape of ring-type source electrode 226 and drain electrode 228.In addition, ring-type source electrode 226 can be a conductive material with the material of drain electrode 228.
What deserves to be mentioned is that in an embodiment of the present invention, channel layer 230 can be light dope or unadulterated amorphous silicon layer, when applying driving voltage, can make channel layer 230 form an amorphous silicon region 232a and a channel region 232b to grid.
Please continue the 2B with reference to figure, in the present embodiment, dot structure 200 more comprises a protective layer 250 and a conductive plunger 260.This protective layer 250 is covered on the thin-film transistor 220, and wherein protective layer 250 has a contact window 252 with 228 exposures that will drain, and pixel electrode 240 sees through contact window 252 and drain electrode 228 electric connections.And conductive plunger 260 is disposed in the contact window 252, and wherein pixel electrode 240 sees through the conductive plunger 260 and drain electrode 228 electric connections in the contact window 252.Generally speaking, pixel electrode 240 is generally a conductive materials with light transmission, its for example be indium tin oxide (indium tin oxide, ITO) or indium-zinc oxide (indium zinc oxide, IZO).Certainly, pixel electrode 240 also can be to be made by the electric conducting material of other light-permeable.In one embodiment, pixel electrode 240 can be all a kind of electric conducting material with conductive plunger 260.In other words, making on the practice, both can one light shield manufacturing process make simultaneously.
Fig. 2 C is the electrical relatively schematic diagram of thin-film transistor of the present invention and existing thin-film transistor.Please refer to Fig. 2 C, solid line is the gate drive voltage V of existing thin-film transistor 120 when being unlocked
gWith drain current I
dRelation curve, and the gate drive voltage V that dotted line is a thin-film transistor 220 of the present invention when being unlocked
gWith drain current I
dRelation curve.At identical gate drive voltage V
1Down, thin-film transistor 220 has higher drain current I
2, in other words, thin-film transistor 220 has lower whole resistance.Under the situation of same current, consumed power and resistance value are proportional.Therefore, when obtaining required same drain electric current, thin-film transistor 220 has than low consumpting power, that is to say, the power consumption of thin-film transistor 120 is lower.
In order to be described in more detail above-mentioned operation principle, Fig. 2 D and Fig. 2 E are that the structure of thin-film transistor of the present invention and existing thin-film transistor compares schematic diagram.Please refer to Fig. 2 D and Fig. 2 E, be all under the situation of light dope or unadulterated amorphous silicon at channel layer 126,232, described as prior art, when thin-film transistor 120 is driven and opens, the signal of video signal that data wire transmitted can be in regular turn via ohmic contact layer 128, amorphous silicon region 126a, channel layers 126 under ring-type source electrode 130, the ring-type source electrode 130 be subjected to grid 122 voltages and the channel region 126b, the amorphous silicon region 126a that form, under the drain electrode 132 ohmic contact layer 128 and drain 132, and on the recording pixel electrode 140.When opening yet the thin-film transistor 220 in one embodiment of the invention is driven, the signal of video signal that data wire transmitted can be subjected to grid 222 voltages via the ohmic contact layer 234 on ring-type source electrode 226, the ring-type source electrode 226, channel layer 232 and ohmic contact layer 234 on the channel region 232b that forms, drain electrode 228 and drain 228 in regular turn, and on the recording pixel electrode 240.Clearly, when seeing through thin-film transistor 220 image data being recorded in pixel electrode 240, only need provide lower driving voltage, image data successfully is recorded on the pixel electrode 240 to grid 222.Therefore, in dot structure 200, thin-film transistor 220 has lower power consumption.
In addition, Fig. 3 A～Fig. 3 I illustrates the making schematic flow sheet into a kind of dot structure of the present invention.At first, please refer to Fig. 3 A, on a substrate 210, form a grid 222.The method that forms grid 222 for example be utilize traditional little shadow and etching manufacturing process (Photolithography and Etching Process, PEP).That is, can on substrate 210, form layer of metal material layer (not illustrating) earlier comprehensively, then, use little shadow and etching manufacturing process metal material layer is patterned as grid 222, illustrate as Fig. 3 A.Certainly, grid 222 can be metal or other semi-conducting material, and different materials has different generation types, and the present invention does not limit generation type.
Then, please refer to Fig. 3 B, on substrate 210, form a gate insulation layer 224, wherein gate insulation layer 224 cover gate 222.The method that forms gate insulation layer 224 for example is to use chemical vapour deposition technique, illustrates as Fig. 3 B.Generally speaking, this gate insulation layer 224 is silicon dioxide normally, and certainly, the material of gate insulation layer 224 also can be the megohmite insulant of other kind.
Then, please refer to Fig. 3 C, on gate insulation layer 224, form a ring-type source electrode 226 and a drain electrode 228, wherein drain 228 for 226 of ring-type source electrodes around.Form ring- type source electrode 226 and 228 the method for draining for example is to utilize little shadow and etching manufacturing process.That is, can on gate insulation layer 224, form metal material layer (not illustrating) earlier comprehensively, then, use little shadow and etching manufacturing process metal material layer be patterned as ring-type source electrode 226 and drain 228 on gate insulation layer 224, illustrate as Fig. 3 C.Certainly, ring-type source electrode 226 can be metal or other semi-conducting material with drain electrode 228, and different materials has different generation types, and the present invention does not limit generation type.
Then, please refer to Fig. 3 D, on the subregion of the subregion of ring-type source electrode 226 and drain electrode 228, form an ohmic contact layer 234.The method that forms ohmic contact layer 234 for example is to utilize little shadow and etching manufacturing process.That is, can be earlier at gate insulation layer 224, ring-type source electrode 226 and drain and form semi-conductor layer (not illustrating) on 228 comprehensively, wherein, the method that forms semiconductor layer for example is to use chemical vapour deposition technique.Afterwards, use little shadow and etching manufacturing process, illustrate as Fig. 3 D semiconductor layer pattern is turned to ohmic contact layer 234.Generally speaking, ohmic contact layer 234 is a heavily doped N type semiconductor material, and this is one for example certainly, does not limit the material behavior of ohmic contact layer 234.
Then, please continue 3E, on the subregion of ohmic contact layer 234 and gate insulation layer 224, form a channel layer 232, so that channel layer 232 covers the gate insulation layer 224 between ring-type source electrode 226 and drain electrode 228 at least with reference to figure.The method that forms channel layer 232 for example is to utilize little shadow and etching manufacturing process.That is, can on above-mentioned completed substrate 210, form semiconductor layer (not illustrating) earlier comprehensively, use little shadow and etching manufacturing process semiconductor layer pattern is turned to channel layer 232 afterwards, illustrate as Fig. 3 E.Generally speaking, channel layer 232 is the semi-conducting material of an amorphous silicon, and above-mentioned only is one for example.So far, finish the making of thin-film transistor 220.
Then, please refer to Fig. 3 F, form a dielectric layer 250 on thin-film transistor 220 and gate insulation layer 224, the method that forms dielectric layer 250 for example is to use the chemical vapour deposition technique or the mode of other semiconductor fabrication process.Then, on dielectric layer 250, form a photoresist layer 270, after forming photoresist layer 270, then use the 5th road light shield manufacturing process to carry out exposure imaging to form one first photoresist block 272 and one second photoresist block 274, the photoresist layer 270 second photoresist block 274 that has the first photoresist block 272 and be connected wherein with 272 in the first photoresist district, the thickness of the first photoresist block 272 is greater than the thickness of the second photoresist block 274, and the second photoresist block 274 has an opening 276 that is positioned at drain electrode 228 tops.The method that forms the first photoresist block 272 and the second photoresist block 274 for example is to utilize little shadow manufacturing process of halftoning light shield (half-tone).
Then, please continue the 3G with reference to figure, serve as cover curtain with aforesaid photoresist layer 270, removes the dielectric layer 250 that opening 276 is exposed, the method that wherein removes for example be the reactive ion etch method (ReactiveIon Etch, RIE).Then, reduce the thickness of photoresist layer 270, be removed, illustrate as Fig. 3 G up to the second photoresist block 274.
Then, please refer to Fig. 3 H, form a conductive layer 280 on the above-mentioned substrate of finishing 210, wherein, the method that forms conductive layer 280 can be sputtering method (sputtering) or vapour deposition method (evaporation).Certainly, the method for above-mentioned formation conductive layer is only for for example, not in order to limit the present invention.The material of this conductive layer for example be indium tin oxide (indium tin oxide, ITO) or indium-zinc oxide (indium zincoxide, IZO).
Then, please refer to Fig. 3 I, remove the partially conductive layer 280 on the photoresist layer 272, so that conductive layer 280 is patterned as pixel electrode 240, wherein, remove photoresist layer 272 and on the mode of conductive layer 280 for example be to peel off (lift-off) method, can be aided with ultrasonic waves concussion mode and promote and peel off effect.So far, finish the making (please refer to Fig. 2 B) of dot structure 200.
Second embodiment
In the dot structure of another form of the present invention, Fig. 4 is the generalized section of another dot structure of the present invention.Please refer to Fig. 4, the two is similar for dot structure 300 and dot structure 200, and identical components indicates with same-sign, and only the two difference is in the conductive plunger 260 in contact window 252.The conductive plunger 260 of dot structure 300 is different with the material of pixel electrode 240.
Therefore, on the manufacturing process practice, dot structure 300 is also similar to the manufacturing technology steps of dot structure 200, and identical components indicates with same-sign.This dot structure 300 is after forming dielectric layer 250 on thin-film transistor 220 and the gate insulation layer 224.Then, on dielectric layer 250, form comprehensive photoresist layer (not illustrating).Then, use one light shield manufacturing process to remove the photoresist of drain electrode 228 tops, make photoresist layer have an opening 276.Come, remove the dielectric layer 250 that exposes of drain electrode 228 top openings 276 and make it have a contact window 252, the method that removes for example is the reactive ion etch method.Then, the electric conducting material 290 that will be different from pixel electrode 240 is formed in the contact window 252, and wherein, electric conducting material 290 electrically connects with drain electrode 228.Moreover, form photoresist layer 270 on thin-film transistor 220, then, use one light shield manufacturing process to form the first photoresist block 272 and the second photoresist block 274, only different with the step of dot structure 200 be in, the second photoresist block 274 does not have the opening 276 that is positioned at drain electrode 228 tops.Then, reduce the thickness of photoresist layer 270, be removed up to the second photoresist block 274.Then, on substrate 210, form conductive layer 280, last, remove photoresist layer 272, so that conductive layer 280 is patterned as pixel electrode 240.So far, finish another dot structure 300 of the present invention.
In sum, dot structure of the present invention has following advantage at least.At first, by the position of designed channel layer, make that the whole resistance when thin-film transistor is driven reduces, and then feasible needs less driving voltage just can produce required drain current.In other words, because required driving voltage is less, therefore, thin-film transistor just has lower power consumption in use.In other words, the dot structure with thin-film transistor of the present invention in use, it has the characteristic of comparatively saving the energy.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this operator, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim scope person of defining.
Claims (18)
1. a thin-film transistor is suitable for being configured on the substrate, it is characterized in that, described thin-film transistor comprises:
One grid is disposed on the described substrate;
One gate insulation layer is disposed on the described substrate to cover described grid;
One ring-type source electrode is disposed on the described gate insulation layer;
One drain electrode is disposed on the described gate insulation layer, and described drain electrode be described ring-type source electrode institute around; And
Semi-conductor layer is disposed at described grid top, and wherein said semiconductor layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least;
Described semiconductor layer comprises: a channel layer; And an ohmic contact layer, be disposed between described channel layer and the described ring-type source electrode and between described channel layer and the described drain electrode.
2. thin-film transistor as claimed in claim 1 is characterized in that, described grid be shaped as circle or ellipse.
3. thin-film transistor as claimed in claim 1 is characterized in that, an outline of described ring-type source electrode is circular or oval.
4. thin-film transistor as claimed in claim 1 is characterized in that, described drain electrode be shaped as rectangle, circle or oval.
5. thin-film transistor as claimed in claim 1 is characterized in that, described semiconductor layer be shaped as circle or ellipse.
6. thin-film transistor as claimed in claim 1 is characterized in that, described semiconductor layer more covers the subregion of described ring-type source electrode and the subregion of described drain electrode.
7. a dot structure is suitable for being configured on the substrate, it is characterized in that, described dot structure comprises:
One thin-film transistor comprises:
One grid is disposed on the described substrate;
One gate insulation layer is disposed on the described substrate to cover described grid;
One ring-type source electrode is disposed on the described gate insulation layer;
One drain electrode is disposed on the described gate insulation layer, and described drain electrode be described ring-type source electrode institute around;
Semi-conductor layer is disposed at described grid top, and wherein said semiconductor layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least; And
One pixel electrode electrically connects with described drain electrode;
Described semiconductor layer comprises: a channel layer; And an ohmic contact layer, be disposed between described channel layer and the described ring-type source electrode and between described channel layer and the described drain electrode.
8. dot structure as claimed in claim 7 is characterized in that, described grid be shaped as circle or ellipse.
9. dot structure as claimed in claim 7 is characterized in that, an outline of described ring-type source electrode is circular or oval.
10. dot structure as claimed in claim 7 is characterized in that, described drain electrode be shaped as rectangle, circle or oval.
11. dot structure as claimed in claim 7 is characterized in that, described semiconductor layer be shaped as circle or ellipse.
12. dot structure as claimed in claim 7 is characterized in that, described semiconductor layer more covers the subregion of described ring-type source electrode and the subregion of described drain electrode.
13. dot structure as claimed in claim 7; it is characterized in that; described dot structure more comprises a protective layer; be covered on the described thin-film transistor; wherein said protective layer has a contact window so that described drain electrode is exposed, and described pixel electrode sees through described contact window and described drain electrode electric connection.
14. dot structure as claimed in claim 13, it is characterized in that, described dot structure more comprises a conductive plunger, is disposed in the described contact window, and described conductive plunger and described drain electrode that wherein said pixel electrode sees through in the described contact window electrically connect.
15. the manufacture method of a thin-film transistor, described method comprises:
On a substrate, form a grid;
Form a gate insulation layer on described substrate, wherein said gate insulation layer covers described grid;
On described gate insulation layer, form a ring-type source electrode and a drain electrode, wherein said drain electrode be described ring-type source electrode institute around; And
Form semi-conductor layer in described grid top, wherein said semiconductor layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least; The formation method of wherein said semiconductor layer comprises:
In the subregion of described ring-type source electrode and described drain electrode, form an ohmic contact layer; And
On the subregion of described ohmic contact layer and described gate insulation layer, form a channel layer, so that described channel layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least.
16. a production method of pixel structure, described method comprises:
On a substrate, form a grid;
Form a gate insulation layer on described substrate, wherein said gate insulation layer covers described grid;
On described gate insulation layer, form a ring-type source electrode and a drain electrode, wherein said drain electrode be described ring-type source electrode institute around;
Form semi-conductor layer in described grid top, wherein said semiconductor layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least, and described grid, described gate insulation layer, described ring-type source electrode, described drain electrode and described semiconductor layer constitute a thin-film transistor; And
Form a protective layer and a pixel electrode on described thin-film transistor and described gate insulation layer, wherein said pixel electrode and described drain electrode electrically connect;
The formation method of wherein said semiconductor layer comprises:
In the subregion of described ring-type source electrode and described drain electrode, form an ohmic contact layer; And
On the subregion of described ohmic contact layer and described gate insulation layer, form a channel layer, so that described channel layer covers the described gate insulation layer between described ring-type source electrode and described drain electrode at least.
17. production method of pixel structure as claimed in claim 16, wherein said protective layer and described pixel electrode formation method comprise:
On described thin-film transistor and described gate insulation layer, form a dielectric layer;
On described dielectric layer, form a photoresist layer, wherein said photoresist layer has one first a photoresist block and second a photoresist block that is connected with the described first photoresist block, the thickness of the described first photoresist block is greater than the thickness of the described second photoresist block, and the described second photoresist block has an opening that is positioned at described drain electrode top;
With described photoresist layer is the cover curtain, removes the described dielectric layer that described opening exposes;
Reduce the thickness of described photoresist layer, be removed up to the described second photoresist block;
On described photoresist layer, form a conductive layer; And
Remove described photoresist layer, so that described conductive layer pattern is turned to described pixel electrode.
18. production method of pixel structure as claimed in claim 17, wherein form the thickness of the thickness of the described first photoresist block, and the described second photoresist block has a method that is positioned at the opening of described drain electrode top and comprises and use a halftoning light shield greater than the described second photoresist block.
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|---|---|---|---|---|
| CN102243404B (en) * | 2010-05-14 | 2016-05-11 | 北京京东方光电科技有限公司 | Array base palte and manufacture method thereof |
| CN102566178B (en) * | 2011-12-26 | 2015-11-25 | 深圳市华星光电技术有限公司 | A kind of Thin Film Transistor-LCD, substrate and manufacture method |
| CN103762218A (en) | 2014-01-16 | 2014-04-30 | 北京京东方光电科技有限公司 | Array substrate, manufacturing method thereof and display device |
| CN104483793A (en) * | 2014-12-30 | 2015-04-01 | 深圳市华星光电技术有限公司 | TFT-LCD (Thin Film Transistor-Liquid Crystal Display) pixel structure and manufacturing method thereof |
| US20160190157A1 (en) * | 2014-12-30 | 2016-06-30 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Pixel structure and manufacturing method thereof |
| JP2016146422A (en) * | 2015-02-09 | 2016-08-12 | 株式会社ジャパンディスプレイ | Display device |
| CN111584640B (en) * | 2020-05-13 | 2021-11-23 | 深圳市华星光电半导体显示技术有限公司 | Transistor structure, GOA circuit and display panel |
| CN112835233A (en) * | 2021-01-07 | 2021-05-25 | Tcl华星光电技术有限公司 | Array substrate and display panel |
-
2007
- 2007-12-10 CN CN200710193362A patent/CN100583458C/en not_active Expired - Fee Related
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