CN100573951C - Phase change memory apparatus and manufacture method thereof - Google Patents
Phase change memory apparatus and manufacture method thereof Download PDFInfo
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- CN100573951C CN100573951C CNB2007100072480A CN200710007248A CN100573951C CN 100573951 C CN100573951 C CN 100573951C CN B2007100072480 A CNB2007100072480 A CN B2007100072480A CN 200710007248 A CN200710007248 A CN 200710007248A CN 100573951 C CN100573951 C CN 100573951C
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Images
Abstract
The invention provides phase change memory apparatus comprises: substrate; First electrode layer is formed on the substrate; The first phase change memory structure is formed on first electrode layer, and is electrically connected to first electrode layer; The second phase change memory structure is formed on the first phase change memory structure, and is electrically connected to the first phase change memory structure, and wherein first the or second phase change memory structure comprises: cup-shaped heating electrode is arranged in first dielectric layer; First insulating barrier is arranged on first dielectric layer along first direction, and part is covered in cup-shaped heating electrode; Second dielectric layer is arranged on first insulating barrier and first dielectric layer; First electrode structure, be arranged in second dielectric layer along second direction, and partly be covered in first insulating barrier and cup-shaped heating electrode, wherein above-mentioned first electrode structure has a pair of phase-change material clearance wall, be arranged on the pair of sidewalls of first electrode structure, and part is covered in cup-shaped heating electrode.The invention still further relates to the manufacture method of phase change memory apparatus.
Description
Technical field
The present invention relates to a kind of phase change memory apparatus, particularly relate to a kind of phase change memory apparatus of high storage density.
Background technology
Phase transition storage (phase change memory, PCM) be important candidate's element of (stand-alone) non-volatility memorizer of 64MB brilliance of future generation, how this component structure can produce best element electric heating characteristic will be that can the decision phase transition storage replace the important R﹠D direction that flash memory (flash memory) becomes main flow.Yet how can utilize the identical higher non-volatility memorizer of storing semiconductor manufacturing technology production storage density is important developing direction.
As shown in Figure 1a, the patent of American I NTEL company (US 6,501,111) is based on cup type heating electrode (Cup-Shaped Bottom Electrode) the 206 three-dimensional phase change memory apparatus of being realized (three-dimensional PCM, 3D-PCM) 212.The phase-change material 207 and the contact area of bottom electrode have been dwindled into the contact area of glass width of type heating electrode 206 and phase-change material 207, to improve storage density.Yet above-mentioned three-dimensional phase transformation storage architecture can run into bottleneck when unit storage area microminiaturization, be not suitable for microspur resolution less than the optical semiconductor carving technology below the 0.1 μ m.Shown in Fig. 1 b, the patent of U.S. STM company (EP 1339111), utilize the phase-change material plated film to insert in the alleged microchannels (minitrench) 58 of nano-scale contact hole 57 or STM company, dwindle a phase-change material and glass contact area 58 of type heating electrode 22, to reach the demand that improves storage density.Yet having bore hole size hour fills out very much discontented bottommost or the problem that discontented slit (Seam) occurs filling out when sidewall film top, both sides engages occurs.
Therefore need a kind of phase change memory apparatus, to meet the demand that improves storage density.
Summary of the invention
For realizing above-mentioned purpose of the present invention, the invention provides a kind of phase change memory apparatus, comprising: substrate; First electrode layer is formed on the aforesaid substrate; The first phase change memory structure is formed on above-mentioned first electrode layer, and is electrically connected to above-mentioned first electrode layer; The second phase change memory structure is formed on the above-mentioned first phase change memory structure, and is electrically connected to the above-mentioned first phase change memory structure, and the wherein above-mentioned first or second phase change memory structure comprises: cup-shaped heating electrode is arranged in first dielectric layer; First insulating barrier is arranged on the said first dielectric layer along first direction, and part is covered in above-mentioned cup-shaped heating electrode; Second dielectric layer is arranged on above-mentioned first insulating barrier and the said first dielectric layer; First electrode structure, be arranged in the said second dielectric layer along a second direction, and part is covered in above-mentioned first insulating barrier and above-mentioned cup-shaped heating electrode, wherein above-mentioned first electrode structure has a pair of phase-change material clearance wall, be arranged on the pair of sidewalls of above-mentioned first electrode structure, and part is covered in above-mentioned cup-shaped heating electrode.
For realizing another object of the present invention, the invention provides a kind of manufacture method of phase change memory apparatus, comprising: substrate is provided, has first electrode layer on it; On above-mentioned first electrode layer, form the first phase change memory structure, and be electrically connected to above-mentioned first electrode layer; On the above-mentioned first phase change memory structure, form the second phase change memory structure, and be electrically connected to the above-mentioned first phase change memory structure, wherein form the above-mentioned first or second phase change memory structure and comprise: in first dielectric layer, form cup-shaped heating electrode; First direction forms first insulating barrier in the said first dielectric layer upper edge, and part is covered in above-mentioned cup-shaped heating electrode; Form first electrode structure at above-mentioned first insulating barrier and said first dielectric layer upper edge second direction, and part is covered in above-mentioned first insulating barrier and above-mentioned cup-shaped heating electrode, wherein above-mentioned first electrode structure has a pair of phase-change material clearance wall, be arranged on the pair of sidewalls of above-mentioned upper electrode arrangement, and part is covered in above-mentioned cup-shaped heating electrode; On above-mentioned first insulating barrier and said first dielectric layer, form second dielectric layer, and be adjacent to above-mentioned first electrode structure.
Description of drawings
Fig. 1 a, 1b are existing phase change memory apparatus.
Fig. 2 a, 3a, 4a, 5a, 6a, 7a and 8a are the manufacturing process top view of the phase change memory apparatus of first embodiment of the invention.
Fig. 2 b, 3b, 4b, 5b, 6b, 7b and 8b are respectively along the manufacturing process profile of the A-A ' tangent line of Fig. 2 a, 3a, 4a, 5a, 6a, 7a and 8a.
Fig. 4 c, 6c, 7c and 8c are the manufacturing process profile along the B-B ' tangent line of Fig. 4 a, 6a, 7a and 8a.
Fig. 4 d is the manufacturing process profile of the phase change memory apparatus of another embodiment of the present invention along the B-B ' tangent line of Fig. 4 a.
Fig. 7 d and 8d are the manufacturing process profile along the C-C ' tangent line of Fig. 7 a and 8a.
Fig. 7 e is the manufacturing process top view of the phase change memory apparatus of another embodiment of the present invention.
Fig. 7 f is the manufacturing process profile along the B-B ' tangent line of Fig. 7 e.
Fig. 9 is the profile of the phase change memory apparatus of first embodiment of the invention.
Figure 10 is the profile of the phase change memory apparatus of second embodiment of the invention.
The simple symbol explanation
100a, 100b～phase change memory apparatus;
300～substrate;
302～the first electrode layers;
304～the first dielectric layers;
306～cup type opening;
308～diode structure;
310～conductive layer;
312～the 3rd insulating barriers;
314～cup-shaped heating electrode;
316～first direction;
317～circular edge;
318,318 ', 318a～first insulating barrier;
319～second direction;
320～the 4th insulating barriers;
322～conductive layer;
324～laminated construction;
326～phase-change material layers;
328～sidewall;
331a, 331b～first electrode structure;
330,330a, 330 ', 330a '～phase-change material clearance wall;
332～the second dielectric layers;
366～the second insulating barriers;
368～the second electrode lay;
380a, 380b～contact area;
400a～first phase change memory the structure;
400b～second phase change memory the structure.
Embodiment
Below utilize the manufacturing process profile, illustrate in greater detail the phase change memory apparatus and the manufacture method thereof of the preferred embodiment of the present invention.Fig. 2 a, 3a, 4a, 5a, 6a, 7a and 8a are the manufacturing process top view of the phase change memory apparatus of first embodiment of the invention.Fig. 2 b, 3b, 4b, 5b, 6b, 7b and 8b are respectively along the manufacturing process profile of the A-A ' tangent line of Fig. 2 a, 3a, 4a, 5a, 6a, 7a and 8a.Fig. 4 c, 7c and 8c are the manufacturing process profile along the B-B ' tangent line of Fig. 4 a, 7a and 8a.Fig. 4 d is the manufacturing process profile of the phase change memory apparatus of another embodiment of the present invention along the B-B ' tangent line of Fig. 4 a.Fig. 7 d and 8d are the process section along the C-C ' tangent line of Fig. 7 a and 8a.Fig. 7 e is the manufacturing process top view of the phase change memory apparatus of another embodiment of the present invention.Fig. 7 f is the manufacturing process profile along the B-B ' tangent line of Fig. 7 e.Fig. 9 is the profile of the phase change memory apparatus of first embodiment of the invention.Figure 10 is the profile of the phase change memory apparatus of second embodiment of the invention.In various embodiments of the present invention, identical symbolic representation components identical.
Please refer to Fig. 2 a, it shows the manufacturing process top view of the phase change memory apparatus 100a of the preferred embodiment of the present invention; Please refer to Fig. 2 b, it shows the manufacturing process profile of the phase change memory apparatus 100a of the preferred embodiment of the present invention.Substrate 300 is provided, and substrate 300 is a silicon substrate.In other embodiments, can utilize SiGe (SiGe), bulk semiconductor (bulk semiconductor), strain semiconductor (strainedsemiconductor), compound semiconductor (compound semiconductor), silicon-on-insulator (silicon on insulator, or other semiconductor substrate commonly used SOI).Then, can utilize for example physical vaporous deposition (physical vapor deposition, PVD), sputtering method (sputtering), Low Pressure Chemical Vapor Deposition (low pressure CVD, LPCVD) and atomic layer chemical vapor deposition method (atomiclayer CVD, ALD) or electroless plating modes such as (electroless plating), on substrate 300, form first electrode layer 302 (can be considered lower electrode layer 302).First electrode layer 302 can comprise polysilicon (polysilicon), amorphous silicon (amorphous silicon), metal nitride or metal silicide.First electrode layer 302 can comprise metal or alloy.First electrode layer 302 can comprise cobalt (cobalt, Co), tantalum (tantalum, Ta), nickel (nickel, Ni), titanium (titanium, Ti), (tungsten W), tungsten titanium (TiW) or other refractory metal and composition metal, also can comprise for example underlying metal such as aluminium or copper to tungsten.First electrode layer 302 can comprise simple layer or stack layer, for example the simple layer or the stack layer of aluminium (Al) layer, copper/tantalum nitride (Cu/TaN) lamination or other metal.
Then, (chemical vapor deposition CVD) waits the thin film deposition mode, forms p N-type semiconductor N material layer and n N-type semiconductor N material layer above first electrode layer 302 successively can to utilize chemical vapour deposition (CVD).Then, utilize the photoetching corrosion mode, remove this p N-type semiconductor N material layer of part and this n N-type semiconductor N material layer, to form diode structure 308.Diode structure 308 can be the semiconductor material combinations layer, the semiconductor material layer that is preferably the semiconductor material layer of Doped n-type impurity and doped p type impurity piles up and forms, to form the p/n diode junction, wherein n type impurity can comprise phosphorus (P) or arsenic (As), and p type impurity can comprise boron (B) or boron difluoride (BF
2).In other embodiments, diode structure 308 can comprise the polycrystalline or the amorphous semiconductor material of polysilicon (polysilicon) for example or amorphous silicon (amorphous silicon).
Then, (chemical vapor deposition CVD) waits the thin film deposition mode, forms first dielectric layer 304 above first electrode layer 302 and diode structure 308 can to utilize chemical vapour deposition (CVD).First dielectric layer 304 can comprise silica (SiO
2), silicon nitride (Si
3N
4) or other similar dielectric material.Then, utilize the photoresist (figure does not show) of composition to cover on first dielectric layer 304, define the formation position of glass type opening 306, carry out the anisotropic etching step again, remove first dielectric layer 304 that is not covered by photoresist, up to exposing diode structure 308, remove the photoresist of composition then, to form cup type opening 306.The bottom overlapping alignment of cup-shaped openings 306 (Overlay Alignment) is directly over diode structure 308.The pore size of cup type opening 306 is relevant with the thickness of follow-up formation phase-change material clearance wall, and in the present embodiment, the aperture of cup type opening 306 is preferably 0.2 μ m.
Then, please refer to Fig. 3 a and 3b, can utilize for example physical vaporous deposition (physical vapordeposition, PVD), sputtering method (sputtering), Low Pressure Chemical Vapor Deposition (low pressure CVD, LPCVD) and atomic layer chemical vapor deposition method (atomic layer CVD, ALD) or electroless plating modes such as (electroless plating), on the sidewall of first dielectric layer 304 and cup type opening 306, form conductive layer 310, and be covered in diode structure 308.Then, on this conductive layer, form the 3rd insulating barrier 312, and insert a glass type opening 306.The 3rd insulating barrier 312 can comprise silica, silicon nitride or its combination.Then, carrying out for example is that (chemical mechanical polishing, flatening process CMP) remove excessive conductive layer 310 and the 3rd insulating barrier 312 to cmp, to form a cup type heating electrode 314.Conductive layer 310 can comprise metal, alloy, metallic compound, semi-conducting material.Conductive layer 310 can comprise underlying metal and alloy (for example aluminium or copper) thereof, refractory metal and alloy thereof (cobalt for example, tantalum, nickel, titanium, tungsten, the tungsten titanium), transition metal nitride, refractory metal nitride (cobalt nitride for example, tantalum nitride, nickel oxide, titanium nitride, tungsten nitride), metal silicide (nitrogen cobalt silicide for example, the nitrogen tantalum silicide, the nitrogen nickle silicide, the nitrogen titanium silicide, the nitrogen tungsten silicide), metal silicide (cobalt silicide for example, tantalum silicide, nickle silicide, titanium silicide, tungsten silicide), polycrystalline or amorphous semiconductor material, phase-change material ((gallium antimonide (GaSb) for example, tellurium germanium (GeTe), Ge-Sb-Te alloy (Ge
2Sb
2Te
5), silver-indium-antimony-tellurium alloy (Ag-In-Sb-Te)), conductive oxide material (for example yttrium barium copper oxide (YBCO), cuprous oxide (Cu
2O), indium tin oxide (ITO)) or its combination, its thickness is preferably between between the 1nm to 300nm.Cup type heating electrode 314 is electrically connected to first electrode layer 302 by diode structure 308.
Please refer to Fig. 4 a, 4b and 4c, it shows the formation of first insulating barrier 318.The holomorphism precedent is as being that the insulating barrier of silicon nitride is on first dielectric layer 304 and cup type heating electrode 314.Then, utilize the photoresist (figure does not show) of composition to cover on the insulating barrier, define the formation position of first insulating barrier 318, carry out the anisotropic etching step again, remove not by the photoresist covered dielectric layer, remove the photoresist of composition then, to form first insulating barrier 318 of strip.Please refer to Fig. 4 d, it shows the formation of the first insulating barrier 318a in another embodiment.Can utilize induction coupling argon plasma (inductively coupled plasma-Ar, mode such as ICP-Ar), behind first insulating barrier 318 that forms strip, carry out cleaning again, or utilize the isotropic etch step that comprises dry ecthing or wet etching separately, have the first insulating barrier 318a at circle (rounded) edge 317 with formation.In embodiments of the present invention, the etching selectivity of first insulating barrier 318 or the first insulating barrier 318a and first dielectric layer 304 is preferably more than 1 and less than 1000.First insulating barrier 318 or the first insulating barrier 318a are formed on first dielectric layer 304 along first direction 316, and part is covered in a glass type heating electrode 314.In the present embodiment, first insulating barrier 318 or the first insulating barrier 318a preferably only are covered in one of them of two edges that glass type heating electrode 314 is parallel to first direction 316, for example are covered in half area of glass type heating electrode 314, and its thickness is preferably 60nm.
Please refer to Fig. 5 a and 5b, it shows the formation of laminated construction 324.Form insulating barrier and conductive layer successively on first dielectric layer 304 and first insulating barrier 318.Insulating barrier can comprise silica, silicon nitride or its combination.Conductive layer can comprise metal, alloy, metallic compound, semi-conducting material.Conductive layer can comprise underlying metal and alloy (for example aluminium or copper) thereof, refractory metal and alloy thereof (cobalt for example, tantalum, nickel, titanium, tungsten, the tungsten titanium), transition metal nitride, refractory metal nitride (cobalt nitride for example, tantalum nitride, nickel oxide, titanium nitride, tungsten nitride), metal silicide (nitrogen cobalt silicide for example, the nitrogen tantalum silicide, the nitrogen nickle silicide, the nitrogen titanium silicide, the nitrogen tungsten silicide), metal silicide (cobalt silicide for example, tantalum silicide, nickle silicide, titanium silicide, tungsten silicide), polycrystalline or amorphous semiconductor material, phase-change material (gallium antimonide (GaSb) for example, tellurium germanium (GeTe), Ge-Sb-Te alloy (Ge
2Sb
2Te
5), silver-indium-antimony-tellurium alloy (Ag-In-Sb-Te)), conductive oxide material (for example yttrium barium copper oxide (YBCO), cuprous oxide (Cu
2Indium tin oxide (ITO)) or its combination O).Conductive layer can be single layer structure, also can be the random order of aforementioned all material and the lamination layer structure that any repeat layer time number is piled up.Then, utilize the photoresist (figure does not show) of composition to be covered on the conductive layer, define the formation position of laminated construction 324, carry out the anisotropic etching step again, remove not by photoresist covered dielectric layer and conductive layer, remove the photoresist of composition then, to form the laminated construction 324 of strip.Laminated construction 324 comprise composition the 4th insulating barrier 320 and conductive layer 322 (can be considered upper electrode layer 322), it is formed on first dielectric layer 304 along second direction 319, and part is covered in glass type heating electrode 314 and first insulating barrier 318.In the present embodiment, first direction 316 is orthogonal with second direction 319.Laminated construction 324 preferably only is covered in one of them of two edges that glass type heating electrode 314 is parallel to second direction 319, for example be covered in 1/4th areas of glass type heating electrode 314, wherein the thickness of the 4th insulating barrier 320 and conductive layer 322 is preferably 100nm.
Please refer to Fig. 6 a and 6b, it shows the formation of phase-change material layers 326.Please refer to Fig. 6 c, it shows the formation of phase-change material layers 326 in another embodiment, and it is formed on the circular edge 317 of the first insulating barrier 318a.Can utilize for example physical vaporous deposition (physical vapor deposition, PVD), hot vapour deposition method (thermal evaporation), pulsed laser deposition (pulsed laser deposition) or Metalorganic chemical vapor deposition method (metal organic chemical vapor deposition, mode such as MOCVD), cover phase-change material layers 326 (phase change film, PC film) comprehensively.Phase-change material layers 326 can comprise binary, ternary or quaternary chalcogen compound (chalcogenide), for example gallium antimonide (GaSb), tellurium germanium (GeTe), Ge-Sb-Te alloy (Ge-Sb-Te, GST), silver-indium-antimony-tellurium alloy (Ag-In-Sb-Te) or its combination.In the present embodiment, the thickness of phase-change material layers 326 is preferably between 10nm to 50nm, if want thick in 100nm because of the phase change memory demand, then the aperture of the cup type opening 306 shown in Fig. 2 a and 2b must be strengthened again.Then, shown in Fig. 7 a, 7b, 7c and 7d, carry out the anisotropic etching step, on the sidewall 328 of laminated construction 324, to form phase-change material clearance wall 330, to form the first electrode structure 331a.Please refer to Fig. 7 e and 7f, it shows in another embodiment, forms phase-change material layers 326 on the first insulating barrier 318a circular edge 317 and be carrying out to remove fully naturally after the anisotropic etching step.The first electrode structure 331a comprises laminated construction 324 and phase-change material clearance wall 330.The contact area 380a of phase-change material clearance wall 330 and cup-shaped heating electrode 314 wherein, can be the area control of the film thickness right-angled intersection of phase-change material clearance wall 330 or conductive layer 310, the area that the heating electrode that utilizes photoetching process to form than prior art produces is littler, controls more accurate.
Please refer to Fig. 8 a, 8b, 8c and 8d, in another embodiment, selectively carried out etching step (over-etching), remove the phase-change material layers that is formed at first insulating barrier, 318 sidewalls, on the sidewall 328 of the laminated construction shown in Fig. 7 a, 7b, 7c and 7d 324, form phase-change material clearance wall 330a, and the height that makes phase-change material clearance wall 330a is lower than the height of laminated construction 324, to form the first electrode structure 331b.The first electrode structure 331b comprises silicon oxide layer 320, conductive layer 322 and phase-change material clearance wall 330a.Similarly, the contact area 380b of phase-change material clearance wall 330a and cup-shaped heating electrode 314, can be the area control of the film thickness right-angled intersection of phase-change material clearance wall 330a or conductive layer 310, the area that the heating electrode that utilizes photoetching process to form than prior art produces is littler, controls more accurate.
Then, as shown in Figure 9, utilize the thin film deposition mode, comprehensive deposition second dielectric layer 332, and be covered in first electrode structure 331.Second dielectric layer 332 can comprise silica (SiO
2), silicon nitride or other materials similar.Then, carry out for example being the flatening process of cmp (CMP), remove the second excessive dielectric layer 332, to form the first phase change memory structure 400a until the surface of the conductive layer 322 that exposes first electrode structure 331.Then, repeat processing step again, on the first phase change memory structure 400a, form the second phase change memory structure 400b as Fig. 2 a, 2b to 7a～7f.In the present embodiment, first insulating barrier 318 of the second phase change memory structure 400b ' orthogonal with the formation direction of first insulating barrier 318 of the first phase change memory structure 400a; The phase-change material clearance wall 330a ' of the second phase change memory structure 400b is orthogonal with the formation direction of the phase-change material clearance wall 330a of the first phase change memory structure 400a, to form the phase change memory apparatus 100a of first embodiment of the invention.The phase change memory apparatus 100a of first embodiment of the invention, the lower electrode layer that directly utilizes the upper electrode layer of the first phase change memory structure 400a to be used as the second phase change memory structure 400b piles up and forms, forming the storage matrix of three-dimensional (3D), but the number of plies that the phase change memory structure is piled up and indefinite.
The main element of the phase change memory apparatus 100a of first embodiment of the invention comprises substrate 300; First electrode layer 302 is formed on the aforesaid substrate 300; The first phase change memory structure 400a is formed on above-mentioned first electrode layer 302, and is electrically connected to above-mentioned first electrode layer 302; The second phase change memory structure 400b, be formed on the first phase change memory structure 400a, and be electrically connected to the above-mentioned first phase change memory structure 400a, the wherein above-mentioned first phase change memory structure 400a or the second phase change memory structure 400b comprise: cup-shaped heating electrode 314 is arranged in first dielectric layer 304; First insulating barrier 318 or 318 ', be arranged on the said first dielectric layer 304, and part is covered in above-mentioned cup-shaped heating electrode 314; Second dielectric layer 332 is arranged on above-mentioned first insulating barrier and the said first dielectric layer; First electrode structure 331 is arranged in the said second dielectric layer 332, and is covered in above-mentioned first insulating barrier 318 and above-mentioned cup-shaped heating electrode 314, and wherein first insulating barrier 318 and first electrode structure 331 are orthogonal.Above-mentioned first electrode structure 331 has a pair of phase-change material clearance wall 330a, be arranged on the pair of sidewalls 328 of above-mentioned first electrode structure 331, and part is covered in above-mentioned cup-shaped heating electrode 314.
Figure 10 is the profile of the phase change memory apparatus 100b of second embodiment of the invention.Itself and phase change memory apparatus 100a do not exist together for: on the first phase change memory structure 400a, form second insulating barrier 366 and a second electrode lay 368 successively.Then, repeat the processing step as Fig. 2 a, 2b to 7a～7f again, form the second phase change memory structure 400b on the second electrode lay 368, wherein the second electrode lay 368 is electrically connected to this second phase change memory structure 400b.In the present embodiment, first insulating barrier 318 of the second phase change memory structure 400b ' parallel to each other with first insulating barrier 318 of the first phase change memory structure 400a; The phase-change material clearance wall 330a of the phase-change material clearance wall 330a of the second phase change memory structure 400b and the first phase change memory structure 400 is parallel to each other.To form the phase change memory apparatus 100b of second embodiment of the invention.The phase change memory apparatus 100b of second embodiment of the invention mainly is stacked on the first phase change memory structure 400a with the second phase change memory structure 400b, forming the storage matrix of three-dimensional (3D), but the number of plies that the phase change memory structure is piled up and indefinite.
The three-dimensional phase change memory apparatus 100a and the 100b of the embodiment of the invention have the following advantages: a plurality of positions (bits) are arranged on (1) unit storage unit (unit memory cell) area, that is multilevel-cell (multi-levelcell, MLC).(2) lower electrode material of the upper electrode material of one deck phase change memory structure and last layer phase change memory structure is shared down, does not waste a layer insulating and one deck conductive layer and related process time.(3) contact area of phase-change material clearance wall and cup-shaped heating electrode can be by the area control of phase-change material clearance wall with the film thickness right-angled intersection of cup type heating electrode, to realize the minimized effect of contact area.
Though the present invention discloses as above with preferred embodiment; yet it is not in order to qualification the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can making a little change and modification, so protection scope of the present invention should be with being as the criterion that claims were defined.
Claims (28)
1. phase change memory apparatus comprises:
Substrate;
First electrode layer is formed on this substrate;
The first phase change memory structure is formed on this first electrode layer, and is electrically connected to this first electrode layer;
The second phase change memory structure is formed on this first phase change memory structure, and is electrically connected to this first phase change memory structure, and wherein this first or second phase change memory structure comprises:
Cup-shaped heating electrode is arranged in first dielectric layer;
First insulating barrier is arranged on this first dielectric layer along first direction, and part is covered in this cup-shaped heating electrode;
Second dielectric layer is arranged on this first insulating barrier and this first dielectric layer;
First electrode structure, comprise the 4th insulating barrier and the 4th conductive layer that is formed at the 4th insulating barrier top, be arranged in this second dielectric layer along second direction, and part is covered in this first insulating barrier and this cup-shaped heating electrode, wherein this first electrode structure has a pair of phase-change material clearance wall, be arranged on the pair of sidewalls of this first electrode structure, and part is covered in this cup-shaped heating electrode.
2. phase change memory apparatus as claimed in claim 1 also comprises:
Second insulating barrier and the second electrode lay are set in turn between this first phase change memory structure and this second phase change memory structure, and wherein this second electrode lay is electrically connected to this second phase change memory structure.
3. phase change memory apparatus as claimed in claim 1, wherein this cup-shaped heating electrode comprises:
Diode structure;
Conductive layer is arranged on this diode structure, and wherein this conductive layer is cup-shaped, and has opening;
Insulating barrier is inserted in this opening.
4. phase change memory apparatus as claimed in claim 3, wherein the thickness of this conductive layer is between between the 1nm to 300nm.
5. phase change memory apparatus as claimed in claim 3, wherein this conductive layer comprises metal, alloy, metallic compound, semi-conducting material or its combination.
6. phase change memory apparatus as claimed in claim 5, wherein this metal comprises aluminium, copper, cobalt, tantalum, nickel, titanium, tungsten or its combination.
7. phase change memory apparatus as claimed in claim 5, wherein this alloy comprises aluminium alloy, copper alloy, cobalt alloy, tantalum alloy, nickel alloy, titanium alloy, tungsten alloy, tungsten titanium, gallium antimonide, tellurium germanium, Ge-Sb-Te alloy, silver-indium-antimony-tellurium alloy or its combination.
8. phase change memory apparatus as claimed in claim 5, wherein this metallic compound comprises cobalt nitride, tantalum nitride, nickel oxide, titanium nitride, tungsten nitride, nitrogen cobalt silicide, nitrogen tantalum silicide, nitrogen nickle silicide, nitrogen titanium silicide, nitrogen tungsten silicide, cobalt silicide, tantalum silicide, nickle silicide, titanium silicide, tungsten silicide, yttrium barium copper oxide, cuprous oxide, indium tin oxide or its combination.
9. phase change memory apparatus as claimed in claim 5, wherein this semi-conducting material comprises polycrystalline semiconductor material or amorphous semiconductor material or its combination.
10. phase change memory apparatus as claimed in claim 1, wherein this first insulating barrier is covered in 1/2nd areas of this cup-shaped heating electrode.
11. phase change memory apparatus as claimed in claim 1, wherein this first electrode structure is covered in 1/4th areas of this cup-shaped heating electrode.
12. phase change memory apparatus as claimed in claim 1, wherein the 4th conductive layer comprises metal, alloy, metallic compound, semi-conducting material or its combination.
13. phase change memory apparatus as claimed in claim 12, wherein this metal comprises aluminium, copper, cobalt, tantalum, nickel, titanium, tungsten or its combination.
14. phase change memory apparatus as claimed in claim 12, wherein this alloy comprises aluminium alloy, copper alloy, cobalt alloy, tantalum alloy, nickel alloy, titanium alloy, tungsten alloy, tungsten titanium, gallium antimonide, tellurium germanium, Ge-Sb-Te alloy, silver-indium-antimony-tellurium alloy or its combination.
15. phase change memory apparatus as claimed in claim 12, wherein this metallic compound comprises cobalt nitride, tantalum nitride, nickel oxide, titanium nitride, tungsten nitride, nitrogen cobalt silicide, nitrogen tantalum silicide, nitrogen nickle silicide, nitrogen titanium silicide, nitrogen tungsten silicide, cobalt silicide, tantalum silicide, nickle silicide, titanium silicide, tungsten silicide, yttrium barium copper oxide, cuprous oxide, indium tin oxide or its combination.
16. as phase change memory apparatus as described in the claim 12, wherein this semi-conducting material comprises polycrystalline semiconductor material or amorphous semiconductor material or its combination.
17. phase change memory apparatus as claimed in claim 12, wherein the 4th conductive layer is simple layer or stack layer.
18. phase change memory apparatus as claimed in claim 1, wherein this first direction is vertical with this second direction.
19. phase change memory apparatus as claimed in claim 1, wherein this phase-change material clearance wall of this first and second phase change memory structure is orthogonal or parallel.
20. phase change memory apparatus as claimed in claim 1, wherein the etching selectivity of this first insulating barrier and this first dielectric layer is greater than 1 and less than 1000.
21. phase change memory apparatus as claimed in claim 1, wherein the height of this phase-change material clearance wall is lower than the height of this first electrode structure.
22. the manufacture method of a phase change memory apparatus comprises the following steps:
Substrate is provided, has first electrode layer on it;
On this first electrode layer, form the first phase change memory structure, and be electrically connected to this first electrode layer;
On this first phase change memory structure, form the second phase change memory structure, and be electrically connected to this first phase change memory structure, wherein form this first or second phase change memory structure and comprise:
In first dielectric layer, form cup-shaped heating electrode;
Form first insulating barrier at this first dielectric layer upper edge first direction, and part is covered in this cup-shaped heating electrode;
Form first electrode structure at this first insulating barrier and this first dielectric layer upper edge second direction, this first electrode structure comprises the 4th insulating barrier and is formed at the 4th conductive layer of the 4th insulating barrier top, and part is covered in this first insulating barrier and this cup-shaped heating electrode, wherein this first electrode structure has a pair of phase-change material clearance wall, be arranged on the pair of sidewalls of this upper electrode arrangement, and part is covered in this cup-shaped heating electrode;
On this first insulating barrier and this first dielectric layer, form second dielectric layer, and be adjacent to this first electrode structure.
23. the manufacture method of phase change memory apparatus as claimed in claim 22 also comprises:
Form second insulating barrier and the second electrode lay successively between this first and second phase change memory structure, wherein this second electrode lay is electrically connected to this second phase change memory structure.
24. the manufacture method of phase change memory apparatus as claimed in claim 22 also comprised before forming this cup-shaped heating electrode:
Utilize the thin film deposition mode, above this first electrode layer, form p type semiconductor layer and n type semiconductor layer successively;
Utilize the photoetching corrosion mode, remove this p type semiconductor layer of part and this n type semiconductor layer, form diode structure; And
Above this first electrode layer and this diode structure, form first dielectric layer, and cover this diode structure.
25. the manufacture method of phase change memory apparatus as claimed in claim 24 wherein forms this cup-shaped heating electrode and comprises:
Utilize the photoetching corrosion mode, remove this first dielectric layer of part up to exposing this diode structure, to form cup-shaped openings;
Form conductive layer in this cup-shaped openings, wherein this conductive layer is cup-shaped;
On this conductive layer, insert the 3rd insulating barrier, and insert in this cup-shaped openings;
Carry out flatening process, remove this conductive layer of part and the 3rd insulating barrier, to form this cup-shaped heating electrode.
26. the manufacture method of phase change memory apparatus as claimed in claim 22, wherein this first insulating barrier is covered in 1/2nd areas of this cup-shaped heating electrode.
27. the manufacture method of phase change memory apparatus as claimed in claim 22, wherein this first electrode structure is covered in 1/4th areas of this cup-shaped heating electrode.
28. the manufacture method of phase change memory apparatus as claimed in claim 22 wherein forms this first electrode structure and comprises:
On this first dielectric layer, form the laminated construction that comprises the 4th insulating barrier and conductive layer;
On this laminated construction, cover phase-change material layers;
Utilize the anisotropic etching mode, remove this phase-change material layers of part, on the pair of sidewalls of this laminated construction, forming a pair of phase-change material clearance wall, and make the height of this phase-change material clearance wall be lower than the height of this laminated construction, to form this first electrode structure.
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| CN106206938B (en) * | 2015-06-01 | 2019-01-18 | 江苏时代全芯存储科技有限公司 | Phase-change memory and its manufacturing method |
| US10418356B2 (en) * | 2017-12-21 | 2019-09-17 | Nanya Technology Corporation | Diode structure and electrostatic discharge protection device including the same |
| US10622555B2 (en) * | 2018-07-31 | 2020-04-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Film scheme to improve peeling in chalcogenide based PCRAM |
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