CN100570614C - The method of determining standard cell in integrated circuit design - Google Patents
The method of determining standard cell in integrated circuit design Download PDFInfo
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- CN100570614C CN100570614C CNB2007101088880A CN200710108888A CN100570614C CN 100570614 C CN100570614 C CN 100570614C CN B2007101088880 A CNB2007101088880 A CN B2007101088880A CN 200710108888 A CN200710108888 A CN 200710108888A CN 100570614 C CN100570614 C CN 100570614C
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Abstract
The integrated circuit (IC) design flow process comprises design RTL, synthetic, the automatic configuration/coiling of logic and layout, and integrated circuit (IC) design person can select suitable standard block in integrated circuit according to time, area and the best-of-breed element pointer of each standard block.Moreover, the step that produces the best-of-breed element pointer comprises the critical size of each standard block of generation at a plurality of ambient conditions, produce a plurality of circuit parameters corresponding to these a plurality of ambient conditions, calculate these a plurality of circuit parameters and this standard block difference at the circuit parameter of perfect condition, and the distribution of analyzing difference.
Description
Technical field
The present invention relates to a kind of method of integrated circuit (IC) design, relate in particular in the integrated circuit (IC) design flow process, the method for the standard block that the decision design circuit uses.
Background technology
Integrated circuit (Integrated Circuits, I C) by connecting multi-form mac function, is realized required integrated circuit specification usually.Please refer to Fig. 1, Fig. 1 is the block schematic diagram of integrated circuit 10.The mac function of general integrated circuit 10 comprises logical blocks 12, storage unit 14, I/O 16, analog block 18 and customization block 20.With simulation/mix signal block 18 is example, its be included as the phase-locked loop (Phase Locked Loops, PLL) and digital analog converter (Digital-Analog Converters, DAC).In these assemblies, I/O 16, storer 14 and analog block 18 normally use a preformed unit or grand firmly (Hard macro) by integrated circuit (IC) design person, and other block (mainly being logical blocks) is sub-block or standard block construction by one group of low order, sets and optimization to reach higher user specification.
An integrated circuit (IC) design person has multiple choices to realize each mac function usually, to set up the best possible design of this integrated circuit.Block about I/O, storer and analog functuion, at present existing manyly realize required function and, can select the only hard grand design that is used for for integrated circuit (IC) design person to fair speed, lower-wattage or optimized grand firmly than small size.
Owing to realize logic function, need tens thousand ofly usually to tens million of a large amount of standard blocks, and make the realization of logic function complicated more.The transistor that each standard block comprises a predetermined number links together, to carry out a special logic function.For instance, standard block can be carried out the function of logic gates such as NAND, AND, NOR and OR, also can carry out more complicated logic function, as single position totalizer.Integrated circuit (IC) design person can realize above-mentioned low order function with different modes usually, to reach low rate, to reach the purpose of small size at a high speed.When the logic function of design complexity, (Electronics Design Automation, EDA) instrument is analyzed different implementations, to obtain an optimum to need electric design automation.
Please refer to Fig. 2, Fig. 2 is the process flow diagram of previous integrated circuit (IC) design.The flow process such as the following step of previous integrated circuit (IC) design:
Step 110: design RTL, integrated circuit (IC) design person utilize register to shift level (RegisterTransfer Level RTL) describes the logic function demand of circuit, to produce the RTL file;
Step 120: logic is synthesized (Synthesis), the RTL file that utilizes logic composite software verification step 110 to produce, the logic composite software is attached to the chained library of a standard block, chained library comprises multiple different standard block type, as AND, NOR, trigger and reverse unit etc., and each unit has multiple different size; The logic composite software is analyzed the RTL file and is realized logic function to link dissimilar standard blocks;
Step 130: (Auto Place and Route automatically disposes and winds the line, APR), RTL file by the synthetic checking of logic can utilize electronic design automation tool configuration standard unit and coiling, automatically can produce a net list (Netlist) after configuration and the coiling, write down necessary binding the between required standard block and the standard block; In addition, integrated circuit (IC) design person can select suitable standard block to be used for integrated circuit according to restrictions such as area and times;
Step 140: layout (Layout), layout tool utilizes the information of database to carry out the layout of standard block, with with needed online the minimizing of net list, by router coiling between the standard block that disposes, finish layout again with the connection that is implemented in net list.
In general, each standard block has multiple different size, and size is relevant with the size of the driving transistors of output.Though the size Selection of standard block depends on design, it is inevasible that the smaller standard block of bigger standard block (bigger output driving transistors) has more serious delay.
In integrated circuit (IC) design, cost is to need one of optimized target.The less logical circuit of area is allowed more available integrated circuit on each silicon wafer, so just can reduce the cost of each integrated circuit.Integrated circuit (IC) design person's target is exactly to utilize minimum possible silicon area to design an integrated circuit up to specification.Integrated circuit (IC) design person can use various forms of grand firmly, and various forms ofly hard grandly at aspects such as area, speed and power preferable performance is arranged respectively.Concerning standard block, each logic function, for example one with the door, multiple different way of realization can be arranged, different ways of realization then needs different output drive strength.The size of the standard block that one drive strength increases usually can be bigger than the standard block of less relatively output drive strength.Previous integrated circuit (IC) design is to be most important consideration with cost, so the integrated circuit (IC) design flow process mainly is to help integrated circuit (IC) design person to set up to comprise the implementation of the integrated circuit of various logic functions block based on minimum area, yet when integrated circuit (IC) design person needs higher, the more stable circuit of usefulness, the but information that neither one can be for reference.
Summary of the invention
The invention provides a kind of method of determining standard cell in integrated circuit design, the standard block that provides a plurality of functions identical is provided; Produce the critical size data of each standard block in a plurality of ambient conditions; According to the critical size data of each standard block, produce a plurality of circuit parameters corresponding to these a plurality of ambient conditions in these a plurality of ambient conditions; Calculate a plurality of circuit parameters of each standard block and this standard block in the difference of the circuit parameter of a perfect condition, to produce the difference of a plurality of circuit parameters; Calculate the distribution of difference of a plurality of circuit parameters of each standard block, to produce the best-of-breed element pointer of each standard block; And according to the best-of-breed element pointer of each standard block, by selecting a standard block in this integrated circuit in the identical standard block of these a plurality of functions.
The present invention also provides a kind of method of determining standard cell in integrated circuit design, and the standard block that provides a plurality of functions identical is provided; According to the area size of each standard block, produce one first index; According to the time value of each standard block, produce one second index; According to the critical size data of each standard block, produce one the 3rd index in a plurality of ambient conditions; Determine the weight and the priority of this first index, this second index and the 3rd index; And according to the weight or the priority of this first index, this second index and the 3rd index, by selecting a standard block in this integrated circuit in the identical standard block of these a plurality of functions.
Description of drawings
Fig. 1 is the block schematic diagram of integrated circuit.
Fig. 2 is the process flow diagram of previous integrated circuit (IC) design.
Fig. 3 is the synoptic diagram that a standard block is used for three kinds of varying environment states.
Fig. 4 produces the process flow diagram of best-of-breed element pointer for the present invention.
Fig. 5 is the process flow diagram of integrated circuit (IC) design of the present invention.
Fig. 6 produces the synoptic diagram of best-of-breed element pointer according to the present invention for the identical standard block of function.
Fig. 7 is the synoptic diagram of choice criteria of the present invention unit in a layout.
The reference numeral explanation
10 integrated circuit, 12 logical blocks
16 I/O of 14 storage unit
18 analog blocks, 20 customization blocks
Embodiment
Please refer to Fig. 3, Fig. 3 is the synoptic diagram that a standard block is used for three kinds of varying environment states.Integrated circuit by connecting multi-form mac function, is realized to reach required integrated circuit specification usually.In integrated circuit (IC) design, one of them is exactly a cost to need optimized target.Integrated circuit (IC) design person on less each silicon wafer of logical circuit tolerable of area more available integrated circuit arranged, will reduce the cost of each integrated circuit, so will utilize minimum silicon area to design integrated circuit up to specification as far as possible.Usually integrated circuit (IC) design person has multiple choices to realize each mac function, to set up the best possible design of integrated circuit.In addition, integrated circuit (IC) design person also can utilize the standard block of some basic functions, forms different mac function, to realize low-power, to reach the integrated circuit of small size at a high speed.When the logic function of design complexity, need electronic design automation tool to analyze different implementations, to obtain optimum.Integrated circuit (IC) design person can select suitable standard block to be used for integrated circuit according to restrictions such as area and times.As shown in Figure 3, standard block AN4M6N (blank square) is used in three kinds of different ambient conditions, and the square A-H of state 1 is respectively LDFQRM2N, BUFM10N, DFQRMON, CKINVM8N, ADHMON, LAGCEM3N, FIL4N, OAI22M4N; The square A-I of state 2 is respectively SDFEZRMON, HDFM4N, BEMXM2N, ND2M4N, HDFQRM2N, HADFMON, OR4MON, BUFM14N, HSDFCRSM1N; The square A-H of state 3 is respectively AOI32M2N, HSDFQM2N, XOR3M1N, CKAN2M6N, ADHM4N, INVM14N, HADFM2N, LALM16N.When the ambient condition of standard block AN4M6N not simultaneously, may influence the usefulness of this standard block AN4M6N.For example, when the layout spacing of circuit is consistent, more be not vulnerable to environmental impact the time delay of this standard block, and preferable usefulness is arranged, but such layout needs bigger area usually, and the area that will dwindle layout certainly will be wanted the spacing of sacrificial section, just is easy to be subjected to the influence of ambient condition like this time delay of standard block, and usefulness also can be unstable.Therefore, the present invention utilizes emulator to produce a pointer according to the critical size data of standard block, for integrated circuit (IC) design person's reference.
Please refer to Fig. 4, Fig. 4 produces the process flow diagram of best-of-breed element pointer for the present invention.In embodiments of the present invention, produce flow process such as the following step of the best-of-breed element pointer BCI (Best Cell Index) of each standard block:
Step 210: produce net list (Netlist), select a plurality of different ambient conditions, with the environmental simulation device one standard block is produced a plurality of net lists corresponding to these a plurality of ambient conditions, critical size (the critical dimension of this standard block of record in the net list, CD), basically different ambient conditions is many more, can produce index more near real conditions, yet also need many more time costs, therefore in the present embodiment, with 60 ambient conditions is example, the net list of generation state 1～state 60;
Step 220: produce circuit parameter, circuit parameter comprises the time data and the power data of standard block, with the time data is example, utilize SPICE (Simulation Program with IntegratedCircuit Emphasis) emulator to produce the time data of many these standard blocks according to a plurality of net lists of step 210, these many time datas are respectively this standard block the time delay of these a plurality of ambient conditions (delay timing), give birth to 60 time datas according to the net list common property of state 1～state 60;
Step 230: computational data, a plurality of circuit parameters of calculation procedure 220 and this standard block so 60 time datas will deduct the time data of perfect condition respectively, produce 60 differences in the difference of the circuit parameter of a perfect condition;
Step 240: produce BCI, characteristic according to the DELTA formula, 60 differences of step 230 are depicted as chart, transverse axis is the scope of difference, the longitudinal axis is the counting of difference, and definition Y is the maximum count of difference, and N is the sum of difference, X is the scope of difference, produces best-of-breed element pointer (the Y/N)/X of this standard block.
Because the critical size according to standard block can produce different circuit parameters, therefore different circuit parameters can produce the best-of-breed element pointer of corresponding different circuit parameters according to step 210 to step 240.Suppose that the best-of-breed element pointer that produces with power data is BCI1, the best-of-breed element pointer that produces with time data is BCI2, and then BCI1 and BCI2 are respectively:
BCI1=(Y1/N1)/X1, wherein Y1 is the maximum count of the difference of power data, and N1 is the sum of the difference of power data, and X1 is the scope of the difference of power data.
BCI2=(Y2/N2)/X2, wherein Y2 is the maximum count of the difference of time data, and N2 is the sum of the difference of time data, and X2 is the scope of the difference of time data.
Please refer to Fig. 5, Fig. 5 is the process flow diagram of integrated circuit (IC) design of the present invention.The flow process of integrated circuit (IC) design is broadly divided into synthetic 120, four steps such as configuration/coiling 130 and layout 140 automatically of design RTL110, logic.Step 110 shifts the level design circuit for utilizing register, then carry out step 120, the program code that utilizes logic composite software verification step 110 to produce, program code by the synthetic checking of logic can carry out step 130, utilize electronic design automation tool configuration standard unit and coiling, in step 130, integrated circuit (IC) design person can select suitable standard block according to the characteristic of circuit, carries out step 140 at last with circuit layout.In embodiments of the present invention, integrated circuit (IC) design person can select suitable standard block according to restrictions such as area, time and BCI.BCI of the present invention is according to the pointer of standard block in the critical size generation of different environment, represent the resistibility of standard block for environmental factor, BCI numerical value is big more, and then environmental factor is more little for the influence of standard block, and just standard block has more stable usefulness.According to the information such as time, area and BCI of each standard block, when circuit is higher for the demand of stability, can select the bigger standard block of BCI numerical value, when the area of layout has in limited time, can select the less standard block of area.In addition, integrated circuit (IC) design person can be according to the demand of cost or usefulness, come the weight (weight) or the priority (priority) of information such as setting-up time, area and pointer, then electronic design automation tool just can help integrated circuit (IC) design person to pick out only standard block, for example but one is the priority 2,3,1 of top-priority layout setting-up time, area, index with usefulness, and weight is 30%, 20%, 50%; And but one be the priority 3,1,2 of top-priority layout setting-up time, area, index with cost, and weight is 20%, 50%, 30%.
Please refer to Fig. 6, Fig. 6 produces the synoptic diagram of best-of-breed element pointer according to the present invention for the identical standard block of function.In embodiments of the present invention, with standard block AN4M6N is example, have 2 two kinds of different layout type of type 1 and type, the area of type 1 is 5.4, the area of type 2 is 5.04, to step 240, type 1 and type 2 are produced 60 ambient conditions according to the step 210 of Fig. 4, respectively type 1, type 2 are produced 60 time differences with the SPICE emulator again with the environmental simulation device.At last, 60 time differences of type 1 are plotted as table 1, and 60 time differences of type 2 are plotted as table 2, wherein transverse axis is the scope of difference, 0.07 to be an interval, the longitudinal axis is the counting of difference, and is as follows according to the BCI of calculating formula (the Y/N)/X calculation type 1 of BCI and type 2:
The BCI=of type 1 (24/60)/0.21=1.905
The BCI=of type 2 (21/60)/0.35=1.000
By the result of calculation of BCI as can be known, the BCI of type 1 is bigger than the BCI numerical value of type 2, and the layout type of expression type 1 has more stable usefulness, in addition, also can be found out by table 1 and table 2, and the time difference of table 1 distributes more concentrated, near the DELTA formula.The characteristic of two kinds of different layouts of simple standard of comparison unit AN4M6N, the area of type 1 are big but be difficult for being influenced by environmental factor, and usefulness is more stable; The area of type 2 is less but usefulness is subjected to Effect of Environmental bigger.
Please refer to Fig. 7, Fig. 7 is the synoptic diagram of choice criteria of the present invention unit in a layout.For integrated circuit (IC) design person, BCI provides the reference pointer on the standard block usefulness, when circuit is higher for the demand of stability, can select the bigger standard block of BCI numerical value, on the other hand, limited when the area of layout, and circuit is for the requirement of usefulness stability when also not high, then the BCI of standard block is not so important just, and considers as first with the area of standard block.Standard block AN4M6N with Fig. 6 is an example again, when integrated circuit (IC) design person wants application standard unit AN4M6N in the layout of Fig. 7,2 two kinds of selections of type 1 and type can be arranged.The area of type 1 is big but be difficult for being influenced by environmental factor, and be applicable to the circuit that needs stable performance, but need bigger layout area, may be the integrated circuit of higher price.The area of type 2 is less but usefulness is subjected to Effect of Environmental bigger, is applicable to that layout area is limited, is preferential integrated circuit with cost consideration.Best-of-breed element pointer of the present invention provides the information of relevant usefulness stability, and information such as original time of matching standard unit and area help the suitable standard block of integrated circuit (IC) design person's easier selection when designing integrated circuit in layout again.
In sum, general integrated circuit (IC) design flow process comprises design RTL, synthetic, the automatic configuration/coiling of logic and layout, in embodiments of the present invention, integrated circuit (IC) design person can select suitable standard block in layout according to the information such as time, area and best-of-breed element pointer of each standard block.The step that produces the best-of-breed element pointer comprises utilizes the environmental simulation device to produce the critical size of each standard block at a plurality of ambient conditions, utilize the SPICE emulator to produce many circuit parameters corresponding to these a plurality of ambient conditions, calculate these a plurality of circuit parameters and this standard block in the difference of the circuit parameter of perfect condition, and the distribution of analyzing difference.The best-of-breed element pointer is according to the pointer that critical size produced of standard block in different environment, represent the resistibility of standard block for environmental factor, the best-of-breed element pointer is big more, and then environmental factor is more little for the influence of standard block, and just standard block has more stable usefulness.For integrated circuit (IC) design person, the best-of-breed element pointer provides the reference on the standard block usefulness, when circuit is higher for the demand of stability, can select the bigger standard block of best-of-breed element pointer, on the other hand, limited when the area of layout, and circuit is for the requirement of usefulness stability when also not high, then the best-of-breed element pointer of standard block is not so important just, and considers as first with the area of standard block.In addition, integrated circuit (IC) design person can come the weight or the priority of information such as setting-up time, area and pointer according to the demand of cost or usefulness, and then electronic design automation tool just can help integrated circuit (IC) design person to pick out only standard block.Therefore, best-of-breed element pointer of the present invention provides integrated circuit (IC) design person very important information when design circuit.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (18)
1. the method for a determining standard cell in integrated circuit design comprises:
Provide a plurality of functions identical standard block;
Produce the critical size data of each standard block in a plurality of ambient conditions;
According to the critical size data of each standard block, produce a plurality of circuit parameters corresponding to these a plurality of ambient conditions in these a plurality of ambient conditions;
A plurality of circuit parameters and this standard block of each standard block are subtracted each other in the circuit parameter of a perfect condition, to produce the difference of a plurality of circuit parameters;
Calculate the distribution of difference of a plurality of circuit parameters of each standard block, to produce the best-of-breed element pointer of each standard block; And
According to the best-of-breed element pointer of each standard block, by selecting a standard block in the identical standard block of these a plurality of functions in this integrated circuit.
2. the method for claim 1 wherein provides the identical standard block of these a plurality of functions to provide identical but the standard block that layout area is different of these a plurality of functions.
3. the method for claim 1, wherein calculate the distribution of difference of a plurality of circuit parameters of each standard block, with the best-of-breed element pointer that produces each standard block is the intensity of distribution of difference of calculating a plurality of circuit parameters of each standard block, to produce the best-of-breed element pointer of each standard block.
4. the method for claim 1, wherein according to the best-of-breed element pointer of each standard block, by selecting a standard block in the identical standard block of these a plurality of functions is weight or priority according to the best-of-breed element pointer of each standard block in this integrated circuit, by selecting a standard block in this integrated circuit in the identical standard block of these a plurality of functions.
5. the method for claim 1, wherein according to the critical size data of each standard block in these a plurality of ambient conditions, producing these a plurality of circuit parameters corresponding to these a plurality of ambient conditions is according to the critical size data of each standard block in these a plurality of ambient conditions, produces this a plurality of time datas corresponding to these a plurality of ambient conditions.
6. method as claimed in claim 5, wherein calculate the distribution of difference of a plurality of circuit parameters of each standard block, with the best-of-breed element pointer that produces each standard block is the distribution of difference of calculating a plurality of time datas of each standard block, definition Y is the maximum count of the difference of time data, N is the sum of the difference of time data, X is the scope of the difference of time data, to produce best-of-breed element pointer (the Y/N)/X of each standard block.
7. the method for claim 1, wherein according to the critical size data of each standard block in these a plurality of ambient conditions, producing these a plurality of circuit parameters corresponding to these a plurality of ambient conditions is according to the critical size data of each standard block in these a plurality of ambient conditions, produces this a plurality of power datas corresponding to these a plurality of ambient conditions.
8. method as claimed in claim 7, wherein calculate the distribution of difference of a plurality of circuit parameters of each standard block, with the best-of-breed element pointer that produces each standard block is the distribution of difference of calculating a plurality of power datas of each standard block, definition Y is the maximum count of the difference of power data, N is the sum of the difference of power data, X is the scope of the difference of power data, to produce best-of-breed element pointer (the Y/N)/X of each standard block.
9. the method for a determining standard cell in integrated circuit design comprises:
Provide a plurality of functions identical standard block;
According to the area size of each standard block, produce one first index;
According to the time value of each standard block, produce one second index;
According to the critical size data of each standard block, produce one the 3rd index in a plurality of ambient conditions;
Determine the weight and the priority of this first index, this second index and the 3rd index; And
According to the weight or the priority of this first index, this second index and the 3rd index, by selecting a standard block in the identical standard block of these a plurality of functions in this integrated circuit.
10. method as claimed in claim 9 wherein provides the identical standard block of these a plurality of functions to provide identical but the standard block that layout area varies in size of these a plurality of functions.
11. method as claimed in claim 9 wherein according to the critical size data of each standard block in a plurality of ambient conditions, produces the 3rd index and comprises:
Produce the critical size data of each standard block in these a plurality of ambient conditions;
According to the critical size data of each standard block, produce a plurality of time datas corresponding to these a plurality of ambient conditions in these a plurality of ambient conditions;
A plurality of time datas and this standard block of each standard block are subtracted each other in the time data of this perfect condition, to produce the difference of these a plurality of time datas; And
Calculate the distribution of difference of a plurality of time datas of each standard block, to produce the 3rd pointer of each standard block.
12. method as claimed in claim 11, wherein calculate the distribution of difference of a plurality of time datas of each standard block, with the 3rd pointer that produces each standard block is the distribution of difference of calculating a plurality of time datas of each standard block, definition Y is the maximum count of the difference of time data, N is the sum of the difference of time data, X is the scope of the difference of time data, to produce the 3rd pointer (the Y/N)/X of each standard block.
13. method as claimed in claim 9 wherein according to the critical size data of each standard block in a plurality of ambient conditions, produces the 3rd index and comprises:
Produce the critical size data of each standard block in these a plurality of ambient conditions;
According to the critical size data of each standard block, produce a plurality of power datas corresponding to these a plurality of ambient conditions in these a plurality of ambient conditions;
A plurality of power datas and this standard block of each standard block are subtracted each other in the power data of this perfect condition, to produce these a plurality of power time differences; And
Calculate the distribution of difference of a plurality of power datas of each standard block, with the power index of the 3rd pointer that produces each standard block.
14. method as claimed in claim 13, wherein calculate the distribution of difference of a plurality of power datas of each standard block, with the power index of the 3rd pointer that produces each standard block is the distribution of difference of calculating a plurality of power datas of each standard block, definition Y1 is the maximum count of the difference of power data, N1 is the sum of the difference of power data, X1 is the scope of the difference of power data, with power index (the Y1/N1)/X1 of the 3rd pointer that produces each standard block.
15. method as claimed in claim 13 wherein according to the critical size data of each standard block in a plurality of ambient conditions, produces the 3rd index and also comprises:
According to the critical size data of each standard block, produce a plurality of time datas corresponding to these a plurality of ambient conditions in these a plurality of ambient conditions;
A plurality of time datas and this standard block of each standard block are subtracted each other in the time data of this perfect condition, to produce the difference of these a plurality of time datas; And
Calculate the distribution of difference of a plurality of time datas of each standard block, with the time index of the 3rd pointer that produces each standard block.
16. method as claimed in claim 15, wherein calculate the distribution of difference of a plurality of time datas of each standard block, with the time index of the 3rd pointer that produces each standard block is the distribution of difference of calculating a plurality of time datas of each standard block, definition Y2 is the maximum count of the difference of time data, N2 is the sum of the difference of time data, X2 is the scope of the difference of time data, with time index (the Y2/N2)/X2 of the 3rd pointer that produces each standard block.
17. method as claimed in claim 9 determines that wherein the weight of this first index, this second index and the 3rd index and priority are weight and the priority that gives this first index, this second index and the 3rd index according to the characteristic of this integrated circuit.
18. method as claimed in claim 9, wherein according to the weight or the priority of this first index, this second index and the 3rd index, by selecting a standard block in the identical standard block of these a plurality of functions is weight or priority according to this first index, this second index and the 3rd index in this integrated circuit, selects the identical standard block of these a plurality of functions in this integrated circuit by an electronic design automation tool.
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| US8677292B2 (en) * | 2009-04-22 | 2014-03-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cell-context aware integrated circuit design |
| JP5552775B2 (en) * | 2009-08-28 | 2014-07-16 | ソニー株式会社 | Semiconductor integrated circuit |
| CN103366033B (en) * | 2012-04-02 | 2017-04-12 | 济南概伦电子科技有限公司 | method and system for statistical circuit simulation |
| CN104899364B (en) * | 2015-05-27 | 2018-01-02 | 上海华力微电子有限公司 | A kind of standard block system of selection for organs weight |
| CN111241768B (en) * | 2019-01-29 | 2023-06-30 | 叶惠玲 | Method and system for establishing standard cell library, chip design method and system |
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