CN100563262C - The pseudo wire emulation devices and methods therefor - Google Patents

The pseudo wire emulation devices and methods therefor Download PDF

Info

Publication number
CN100563262C
CN100563262C CNB2005100839455A CN200510083945A CN100563262C CN 100563262 C CN100563262 C CN 100563262C CN B2005100839455 A CNB2005100839455 A CN B2005100839455A CN 200510083945 A CN200510083945 A CN 200510083945A CN 100563262 C CN100563262 C CN 100563262C
Authority
CN
China
Prior art keywords
encapsulation
pseudo
cell
atm
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2005100839455A
Other languages
Chinese (zh)
Other versions
CN1897592A (en
Inventor
李喜祥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CNB2005100839455A priority Critical patent/CN100563262C/en
Publication of CN1897592A publication Critical patent/CN1897592A/en
Application granted granted Critical
Publication of CN100563262C publication Critical patent/CN100563262C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a kind of pseudo wire emulation device, comprise the mapping table memory cell, be used to store the Linear Mapping relation table between ATM cell head sign, connection identifier and the pseudo line tag three; Atm switching element is used for the Linear Mapping relation table according to the head identification index mapping table cell stores of the ATM cell that receives, and obtains corresponding connection identifier; And the head of replacing the ATM cell of reception with the connection identifier that obtains identifies; Pseudo-line map unit is used for the Linear Mapping relation table of the connection identifier index mapping table cell stores of the ATM cell sent according to atm switching element, obtains corresponding ATM cell head sign and pseudo line tag; And replace connection identifier in the ATM cell that receives, and the ATM cell of replacing after handling is carried out pseudo-line encapsulation with the pseudo line tag that obtains with the ATM cell head that obtains sign.The present invention can use the process of PW emulation ATM business practical.

Description

The pseudo wire emulation devices and methods therefor
Technical field
The present invention relates to pseudo-line emulation (PWE3, Pseudo Wire Emulation Edge to Edge) technology, relate in particular to a kind of pseudo wire emulation devices and methods therefor while arriving.
Background technology
Along with the develop rapidly of data service, existing data transmission network can develop gradually and be substituted by packet network (PSN, Packet Switch Network), and therefore research is carried out the low layer business simulating based on PSN has become an inevitable problem.
And wherein one of representative of packet network PSN is exactly multiprotocol label switching (MPLS, Multi-protocol Label Switching) network, and the PWE3 technology is Internet engineering duty group (IETF, Internet Engineering Task Force) treatment mechanism of on the MPLS network, the base attribute of low layer service [as asynchronous transfer mode (ATM, Asynchronous Transfer Mode) business, Ethernet service and frame relay FR business etc.] being carried out emulation that proposes.And when on the MPLS network, the ATM business being carried out emulation based on the PWE3 technology, mainly be the service quality (QoS, Quentily Of Service) of considering to guarantee the correct transmission of ATM business and satisfying the ATM business.
When pseudo wire emulation ATM is professional on the MPLS network, the ATM business is to be carried on pseudo-line (PW, Pseudo Wire), pseudo-line will be to the encapsulation that unitizes of ATM business datum, so that the external behavior that the ATM business datum can be consistent on pseudo-line and keep the particular attribute of self, thereby realize ATM operation layer (in the OSI seven layer model two layers) and MPLS network layer ('s 2.5 layers of OSI seven layer model) interconnection and interflow, and guarantee on the MPLS network, still can keep the attribute of ATM business.Please refer to Fig. 1, this figure is the main implementation procedure schematic diagram of pseudo wire emulation ATM business on the MPLS network, wherein:
Place in circuit (AC, Access Circuit) carries the ATM business; Provider edge equipment (PE, Provider Edge) is based on the packet network PSN of MPLS technology; The ATM business of the last carrying of AC is when the PSN that uploads to based on the MPLS technology, and provider edge equipment PE1 can be converted into the ATM business pseudo-line PW, promptly uses PW emulation ATM business to transmit on the PSN based on the MPLS technology; When PW was transferred to the opposite side of PSN, provider edge equipment PE2 restores PW became the ATM business, thereby was formed on the process that goes up pseudo wire emulation ATM business based on the PSN of MPLS technology, had realized the purpose that ATM operation layer and MPLS network layer interconnect.In based on the PSN of MPLS technology, only need each the bar PW between managed operation merchant edge device PE1 and the PE2 like this, and can't see the ATM business because PW emulation the various characteristics of ATM business.And from customer edge (CE, Client Edge) sees on the angle (promptly from user angle), PSN based on the MPLS technology is sightless, the user can think that ATM is professional or transmit on the ATM operation layer because based on the PSN emulation verily of MPLS technology the various characteristics of ATM business.
As fully visible, when in the MPLS network, using PW emulation ATM professional based on the PWE3 technology, Packet Data Unit (the PDU that will be correlated with to the ATM business datum at network ingress place, PacketData Unit) encapsulation process, Packet Data Unit after the PW carrying encapsulation process passes a passage or tunnel then, and Packet Data Unit is recovered to become the ATM business, thereby the basic act and the feature of the low layer original business of emulation as much as possible on the MPLS network have been realized at network egress place.From user perspective, the PWE3 technology has been set up a unshared connection link on the MPLS network.
Though at present in the PWE3 standard as the above-mentioned process of in the MPLS network, using PW emulation ATM business of having described, but in real implementation process, also do not design a kind of pseudo wire emulation platform that can support that the MPLS network uses PW emulation ATM business, so that practical in real implementation process in pseudo wire emulation ATM business on the MPLS network.
Summary of the invention
The technical problem to be solved in the present invention is to propose a kind of pseudo wire emulation devices and methods therefor, so that use the process of PW emulation ATM business practical in specific implementation process on the MPLS network.
For addressing the above problem, the technical scheme that the present invention proposes is as follows:
A kind of pseudo wire emulation device comprises:
The mapping table memory cell is used to store the Linear Mapping relation table between ATM cell head sign, connection identifier and the pseudo line tag three;
Atm switching element is connected with the mapping table memory cell, is used for the Linear Mapping relation table according to the head identification index mapping table cell stores of the ATM cell that receives, and obtains corresponding connection identifier; And the head of replacing the ATM cell of reception with the connection identifier that obtains identifies;
Pseudo-line map unit, be connected with atm switching element with the mapping table memory cell respectively, the Linear Mapping relation table that is used for the connection identifier index mapping table cell stores of the ATM cell sent according to atm switching element obtains corresponding ATM cell head sign and pseudo line tag; And replace connection identifier in the ATM cell that receives, and the ATM cell of replacing after handling is carried out pseudo-line encapsulation with the pseudo line tag that obtains with the ATM cell head that obtains sign.
Preferably, described pseudo wire emulation device also comprises:
The Generic Framing Procedure encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the encapsulation of Generic Framing Procedure;
VC Virtual Concatenation encapsulation unit is connected with the Generic Framing Procedure encapsulation unit, is used for that the Generic Framing Procedure data envelope after the processing of Generic Framing Procedure encapsulation unit is put into virtual container and forms the SDH frame;
The SDH cross unit is connected with VC Virtual Concatenation encapsulation unit, is used for the SDH frame after the VC Virtual Concatenation encapsulation unit encapsulation process is carried out the time slot cross processing.
Preferably, described pseudo wire emulation device also comprises:
The Generic Framing Procedure encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the encapsulation of Generic Framing Procedure;
ODU Virtual Concatenation encapsulation unit is connected with the Generic Framing Procedure encapsulation unit, is used for that the Generic Framing Procedure packet encapsulation after the processing of Generic Framing Procedure encapsulation unit is advanced at least one light data cell and forms OTN frame;
The OTN cross unit is connected with ODU Virtual Concatenation encapsulation unit, is used for the OTN frame after the ODU Virtual Concatenation encapsulation unit encapsulation process is carried out the time slot cross processing.
Preferably, described pseudo wire emulation device also comprises:
The Ethernet encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the Ethernet encapsulation;
The Ethernet crosspoint is connected with the Ethernet encapsulation unit, is used for that the Ethernet data bag after the Ethernet encapsulation unit encapsulation process is carried out the Ethernet exchange and handles.
Preferably, described pseudo wire emulation device also comprises:
The Ethernet encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the Ethernet encapsulation;
The wavelength cross unit is connected with the Ethernet encapsulation unit, is used for the Ethernet data bag after the Ethernet encapsulation unit encapsulation process is carried to wavelength, and the wavelength that carries the Ethernet data bag is carried out cross processing.
Described atm switching element specifically comprises:
The first index subelement is connected with described mapping table memory cell, is used for the Linear Mapping relation table according to the head identification index mapping table cell stores of ATM cell, obtains corresponding connection identifier;
The first sign commutator unit is connected with the first index subelement, and the connection identifier that is used for that the first index subelement index is obtained is replaced the head sign of ATM cell.
Described pseudo-line map unit specifically comprises:
The second index subelement, be connected with atm switching element with the mapping table memory cell respectively, the Linear Mapping relation table that is used for the connection identifier index mapping table cell stores of the ATM cell sent according to atm switching element obtains corresponding ATM cell head sign and pseudo line tag;
The second sign commutator unit is connected with the second index subelement, and the ATM cell head sign that is used for the second index subelement index is obtained is replaced the connection identifier of ATM cell;
Pseudo-line encapsulation subelement is connected with the second sign commutator unit with the second index subelement respectively, and the ATM cell that the pseudo line tag that is used for obtaining based on the second index subelement index is replaced after handling the second sign commutator unit is carried out pseudo-line encapsulation.
Described pseudo-line encapsulation subelement specifically comprises:
Control word encapsulation subelement is connected with the second sign commutator unit, is used to the ATM cell encapsulation control word after processing is replaced in the second sign commutator unit;
Pseudo line tag encapsulation subelement is connected with the second index subelement and control word encapsulation subelement respectively, and the ATM cell that is used to control word to encapsulate after the subelement encapsulation process encapsulates the pseudo line tag that the second index subelement index obtains;
Tunnel label encapsulation subelement is connected with pseudo line tag encapsulation subelement, is used to the ATM cell encapsulation tunnel label after pseudo line tag encapsulates the subelement encapsulation process.
The universal flow that described ATM cell head is designated in the user-network interface cell is controlled the combination sign that identifies with VCI; Or be VCI in the Network-Network interface cell.
Described ATM cell head is designated the combination sign of universal flow control sign, VCI and VPI in the user-network interface cell; Or be the combination sign of VCI in the Network-Network interface cell and VPI.
Accordingly, the invention allows for a kind of pseudo wire emulation method, comprise step:
Set up the Linear Mapping relation between ATM cell head sign, connection identifier and the pseudo line tag three;
According to the described Linear Mapping relation of the head identification index of the ATM cell that receives, obtain corresponding connection identifier; And
Replace the head sign of the ATM cell that receives with the connection identifier that obtains;
In pseudo-line encapsulation process process,, obtain corresponding ATM cell head sign and pseudo line tag according to the described Linear Mapping relation of the connection identifier index in the ATM cell that receives; And
With the connection identifier in the ATM cell of the ATM cell head sign replacement reception that obtains; And
With the pseudo line tag that obtains the ATM cell of replacing after handling is carried out pseudo-line encapsulation.
The universal flow that wherein said ATM cell head is designated in the user-network interface cell is controlled the combination sign that identifies with VCI; Or be VCI in the Network-Network interface cell.
Wherein said ATM cell head is designated the combination sign of universal flow control sign, VCI and VPI in the user-network interface cell; Or be the combination sign of VCI in the Network-Network interface cell and VPI.
The beneficial effect that the present invention can reach is as follows:
Pseudo wire emulation devices and methods therefor of the present invention is by setting up storage ATM cell head sign, connection identifier (LID, Link ID) and the Linear Mapping between pseudo line tag (PW Label) three relation, at first when the ATM exchange is handled, this Linear Mapping relation of head identification index according to ATM cell obtains corresponding LID, utilizes the LID that obtains to replace the head sign of ATM cell; When the PW encapsulation process, obtain corresponding ATM head sign and PWLabel according to this Linear Mapping relation of the LID index in the ATM cell again, use the LID in the ATM head sign replacement ATM cell then, based on the PWLabel that obtains the ATM cell of replacing after handling is carried out the PW encapsulation process again, thereby form the PW that can on PSN, transmit, therefore the invention enables and on the MPLS network, use the process of PW emulation ATM business practical in specific implementation process based on the MPLS technology.
Description of drawings
Fig. 1 is the main implementation procedure schematic diagram of pseudo wire emulation ATM business on the MPLS network;
Fig. 2 is the main composition structured flowchart of pseudo wire emulation device of the present invention;
Fig. 3 finishes the first example structure block diagram of the Generic Framing Procedure encapsulation of pseudo wire emulation ATM business on the MPLS network for pseudo wire emulation device of the present invention;
Fig. 4 finishes the second example structure block diagram of the Generic Framing Procedure encapsulation of pseudo wire emulation ATM business on the MPLS network for pseudo wire emulation device of the present invention;
Fig. 5 finishes the first example structure block diagram of the Ethernet encapsulation of pseudo wire emulation ATM business on the MPLS network for pseudo wire emulation device of the present invention;
Fig. 6 finishes the second example structure block diagram of the Ethernet encapsulation of pseudo wire emulation ATM business on the MPLS network for pseudo wire emulation device of the present invention;
Fig. 7 is the concrete composition structured flowchart of atm switching element in the pseudo wire emulation device of the present invention;
Fig. 8 is the concrete composition structured flowchart of PW map unit in the pseudo wire emulation device of the present invention;
Fig. 9 is the user-network interface (UNI, User Network Interface) in the ATM cell and the concrete form schematic diagram of Network-Network interface cell (NNI, Network Network Interface);
Figure 10 is the first embodiment A TM cell format schematic diagram after standard A TM cell format is handled through the atm switching element in the pseudo wire emulation device of the present invention;
Figure 11 is the second embodiment A TM cell format schematic diagram after standard A TM cell format is handled through the atm switching element in the pseudo wire emulation device of the present invention;
Figure 12 is the concrete composition structured flowchart of the encapsulation of the PW in the pseudo wire emulation device of the present invention subelement;
Figure 13 is that the structure of control word is formed schematic diagram;
Figure 14 is the PW encapsulation format schematic diagram after pseudo wire emulation device of the present invention carries out the PW encapsulation process;
Figure 15 is the main realization principle flow chart of pseudo wire emulation method of the present invention.
Embodiment
To at first be explained in detail below in conjunction with the specific implementation process of each accompanying drawing to pseudo wire emulation device of the present invention.
Please refer to Fig. 2, this figure is the main composition structured flowchart of pseudo wire emulation device of the present invention, pseudo wire emulation device of the present invention mainly comprises mapping table memory cell 1, atm switching element 2 and pseudo-line map unit 3 (being designated hereinafter simply as the PW map unit), and the effect of each part is specific as follows:
Mapping table memory cell 1 is mainly used in the Linear Mapping relation table between storage ATM cell head sign, connection identifier (LID, Link ID) and pseudo line tag (PWLabel) three; Wherein ATM cell head sign can adopt user-network interface (UNI, User-Network Interface) control of the universal flow in cell sign (GFC, Generic Flow Control) combination with VCI (VPI, VirtualPath Identifier) identifies; Or the VCI VPI in employing Network-Network interface (NNI, the Network NetworkInterface) cell.
Wherein the reference format schematic diagram of UNI cell and NNI cell please refer to Fig. 6, wherein the span of (GFC+VPI) combination sign is 0~4096 (taking the reason of 12bit owing to GFC+VPI altogether) in the UNI cell, the span of VPI (VCI, Virtual Channel Identifier) is 0~65535 (taking the reason of 64bit owing to VCI); The span of VPI is 0~4095 (taking the reason of 12bit owing to VPI) in the NNI cell, and the span of VCI is 65535 (taking the reason of 64bit owing to VCI).So consider that according to maximum magnitude the span of LID has the scope of 4K * 64K=256K.If according to this span of LID, it is corresponding one by one that all possible LID and pseudo-line PW are carried out, and almost can't realize for system like this.General because the ATM linking number that atm exchange system is supported be about 4K just approximately also, thus should consider to determine that according to the span about 4K the number of LID gets final product, make 4K individual in each LID and PW carry out correspondence one by one.Therefore just can select for use GFC+VPI combination sign (4096) in the UNI cell and the VPI (4096) in the NNI cell to identify as above-mentioned ATM cell head, with and LID (about 4K) form one to one that Linear Mapping concerns.
Based on above-mentioned, the Linear Mapping relation table between ATM cell head sign, LID and the PW Label three of 1 storage of mapping table memory cell can be as follows:
LID 1 2 ...... N
PW Label
5 10 ...... 3
GFC+VPI 33 2567 ...... 332
Certainly, the VPI in the combination of the GFC+VPI in above-mentioned employing UNI cell sign or the NNI cell just in order to improve the speed of tabling look-up, guarantees the runnability of atm exchange system, is that the present invention recommends the best mode that adopts.Look concrete condition, ATM cell head sign can also adopt the combination sign of the GFC+VPI+VCI in the UNI cell; Or adopt the combination of the VPI+VCI in the NNI cell to identify, at this moment Cun Chu Linear Mapping relation table will be expanded, because the combination of GFC+VPI+VCI sign span is (4096+65535) in the UNI cell, the combination of VCI+VPI sign span also is (4096+65535) in the NNI cell, therefore need have (4096+65535) individual LID and combinations thereof sign to form relation one to one.
Here why the Linear Mapping relation table of storage uses LID to connect corresponding relation between ATM head sign and the PW Label in mapping table memory cell 1, and main cause is as follows:
Because if flow into the ATM cell of PW map unit 3 from atm switching element 2, when its head sign still is VPI, VCI, be difficult to PW Label one to one; Because needing design is the Hash table of index according to VPI, VCI, therefore exist the time of searching not fix, search the low defective of hit rate.And the head identification field of utilizing ATM cell is here transmitted LID information, searches correspondence table according to LID, promptly can reduce and search algorithm complex, and set fixing searching the time.And be the correspondence table that follow-up PW map unit 3 designs are searched according to LID, corresponding PW Label and ATM head sign can be found and (GFC+VPI among the UNI can be, and the VPI among the NNI), can be the GFC+VPI among the UNI with the ATM head sign that finds again, and the VPI among the NNI) the head identification field to ATM cell refreshes (promptly using the LID territory in the ATM head identification field replacement ATM cell that finds), according to the regulation of the IETF PWE3 draft ATM cell encapsulation PW Label after to refresh process, can finish the mapping of ATM cell then to the PW encapsulation.
Atm switching element 2 is connected with mapping table memory cell 1, is mainly used in the Linear Mapping relation table according to storage in the head identification index mapping table memory cell 1 of the ATM cell that receives, thereby obtains corresponding LID; And the head that uses the LID that obtains to replace in the reception ATM cell identifies; Be that atm switching element 2 is used for finishing the head sign of ATM cell and the replacement of LID, carry LID to finish in the GFC+VPI territory of UNI cell or the VPI territory of NNI cell, then atm switching element 2 is handled the exchange of the VPI/VCI of ATM cell to LID/VCI from actual having become of the VPI/VCI exchange of original processing ATM cell.
Pseudo-line map unit 3, be connected with atm switching element 2 with mapping table memory cell 1 respectively, be mainly used in the Linear Mapping relation table of storage in the LID index mapping table memory cell 1 in the ATM cell of sending according to atm switching element 2, obtain corresponding ATM cell head sign and PW Label; And remove to replace the LID that receives in the ATM cell with the ATM cell head that obtains sign, the head identification field that is about to ATM cell uses GFC, VPI to recover; And then the ATM cell after replace handling is carried out the PW encapsulation with the PW Label that obtains.
Wherein PW map unit 3 has realized the mapping of ATM cell to the PW encapsulation, i.e. carrying ATM business on PW, and be the packet of sign to PSN output with label switched path tunnel label (LSP Tunnel Label) and pseudo line tag (PW Label).
Above mapping table memory cell 1, atm switching element 2 and 3 three functional units of PW map unit have just constituted the main logical block in the provider edge equipment (PE).
Please refer to Fig. 3, this figure is pseudo wire emulation device of the present invention is finished the Generic Framing Procedure encapsulation of pseudo wire emulation ATM business on the MPLS network the first example structure block diagram, on the basis of pseudo wire emulation device said structure of the present invention, after finishing the PW encapsulation process by PW map unit 3, also will be further by Generic Framing Procedure (GFP, Generic Framing Procedure) encapsulation unit 4 (hereinafter to be referred as the GFP encapsulation unit), 6 couples of PW of VC Virtual Concatenation encapsulation unit 5 and SDH cross unit do further processing, finally be encapsulated into the SDH frame and send to the SDH network, wherein the GFP encapsulation unit 4, the concrete effect of VC Virtual Concatenation encapsulation unit 5 and SDH cross unit 6 is as follows:
GFP encapsulation unit 4 is connected with PW map unit 3, is mainly used in the PW after PW map unit 3 encapsulation process is carried out the GFP encapsulation;
VC Virtual Concatenation encapsulation unit 5 is connected with GFP encapsulation unit 4, is mainly used in the GFP data envelope after GFP encapsulation unit 4 encapsulation process is put among the single or multiple virtual container VC4/VC3/VC12, to form the SDH frame;
SDH cross unit 6 is connected with VC Virtual Concatenation encapsulation unit 5, is mainly used in the SDH frame after VCAT/LCAS encapsulation unit 5 encapsulation process is carried out the time slot cross processing, transmits to send into the SDH Optical Transmission Network OTN.
Please refer to Fig. 4, this figure is pseudo wire emulation device of the present invention is finished the Generic Framing Procedure encapsulation of pseudo wire emulation ATM business on the MPLS network the second example structure block diagram, on the basis of pseudo wire emulation device said structure of the present invention, after finishing the PW encapsulation process by PW map unit 3, also will be further by GFP encapsulation unit 4, ODU Virtual Concatenation encapsulation unit 5 and optical transfer network (OTN, Optical TransportNetwork) 7 couples of PW of cross unit do further processing, finally be encapsulated into the OTN frame and send to the OTN optical transport network, wherein the GFP encapsulation unit 4, the concrete effect of ODU Virtual Concatenation encapsulation unit 5 and OTN cross unit 7 is as follows:
GFP encapsulation unit 4 is connected with PW map unit 3, is mainly used in the PW after PW map unit 3 encapsulation process is carried out the GFP encapsulation;
ODU Virtual Concatenation encapsulation unit 7 is connected with GFP encapsulation unit 4, is mainly used in the GFP data envelope after GFP encapsulation unit 4 encapsulation process is put into single or multiple smooth data cells (ODU, OpticalData Unit), to form the OTN frame;
OTN cross unit 8 is connected with ODU Virtual Concatenation encapsulation unit 7, is mainly used in the OTN frame after ODU Virtual Concatenation encapsulation unit 7 encapsulation process is carried out the time slot cross processing, transmits to send into the OTN Optical Transmission Network OTN.
Please refer to Fig. 5, this figure is pseudo wire emulation device of the present invention is finished the Ethernet encapsulation of pseudo wire emulation ATM business on the MPLS network the first example structure block diagram, on the basis of pseudo wire emulation device said structure of the present invention, after finishing the PW encapsulation process by PW map unit 3, also to further do further processing by Ethernet encapsulation unit 9, Ethernet crosspoint 10, finally send to optical transport network, wherein the concrete effect of Ethernet encapsulation unit 9, Ethernet crosspoint 10 is as follows:
Ethernet encapsulation unit 9 is connected with PW map unit 3, is mainly used in the PW after PW map unit 3 encapsulation process is carried out the Ethernet encapsulation;
Ethernet crosspoint 10 is connected with Ethernet encapsulation unit 9, is mainly used in the Ethernet data bag after Ethernet encapsulation unit 9 encapsulation process is carried out the Ethernet exchange, transmits to send into optical-fiber network.
Please refer to Fig. 6, this figure is pseudo wire emulation device of the present invention is finished the Ethernet encapsulation of pseudo wire emulation ATM business on the MPLS network the second example structure block diagram, on the basis of pseudo wire emulation device said structure of the present invention, after finishing the PW encapsulation process by PW map unit 3, also to further do further processing by Ethernet encapsulation unit 9, wavelength cross unit 11, finally send to optical transport network, wherein the concrete effect of Ethernet encapsulation unit 9, wavelength cross unit 11 is as follows:
Ethernet encapsulation unit 9 is connected with PW map unit 3, is mainly used in the PW after PW map unit 3 encapsulation process is carried out the Ethernet encapsulation;
Wavelength cross unit 11 is connected with Ethernet encapsulation unit 9, is mainly used in the Ethernet data bag after Ethernet encapsulation unit 9 encapsulation process is carried on the wavelength, and carries out the wavelength cross processing, transmits to send into optical-fiber network.
Please refer to Fig. 7, this figure is the concrete composition structured flowchart of atm switching element in the pseudo wire emulation device of the present invention, and atm switching element specifically comprises the first index subelement 21 and the first label commutator unit 22, and wherein the effect of each several part is specific as follows:
The first index subelement 21 is connected with mapping table memory cell 1, is mainly used in the Linear Mapping relation table according to storage in the head identification index mapping table memory cell 1 that receives ATM cell, obtains corresponding LID;
The first sign commutator unit 22 is connected with the first index subelement 21, is mainly used in the head sign that the LID that the first index subelement, 21 index are obtained replaces ATM cell.
Wherein traditional ATM cell head sign look-up table adopts following logical construction:
Going into the header standard laid down by the ministries or commissions of the Central Government knows Going out the header standard laid down by the ministries or commissions of the Central Government knows
GFC+VPI GFC+VPI
VCI VCI
Traditional ATM exchanged form is: atm exchange system extracts head sign GFC, VPI, the VCI territory of going into cell, carrying out classification then in look-up table searches: find the GFC+VPI that correspondence goes out cell according to the GFC+VPI that goes into cell earlier, find the VCI that correspondence goes out cell according to the VCI that goes into cell again, cell carries out GFC+VPI and VCI replaces to going into then, cell be will go out and universal test and the operating physical interface second layer (UTOPIA2, Universal Test ﹠amp passed out to from outbound port; Operations PHYInterface for ATM Level 2) bus.
The present invention can be identified at the look-up table that finds out PW Label in the look-up table fast and effectively according to the head of ATM cell in order to design, and the logical construction of traditional ATM cell head sign look-up table is improved, and is as follows:
Going into the header standard laid down by the ministries or commissions of the Central Government knows Going out the header standard laid down by the ministries or commissions of the Central Government knows
GFC+VPI LID
VCI VCI
According to improved look-up table, the present invention's first index subelement 21 here is at first according to head sign (GFC+VPI) index search table of going into cell, find corresponding LID, go into the VCI index search table of cell again with certificate, find corresponding VCI, use the LID find to be substituted into GFC+VPI in the cell then, use the VCI that finds to be substituted into VCI in the cell, form cell.Because the span in GFC+VPI territory is 0~4095, then the span of LID also can be 0~4095, promptly supports a maximum 4K PW, and is enough in general application.Follow-uply go out the GFP+VPI territory that is replaced by LID in the cell and in PW map unit 3, will be carried out reduction.
Please refer to Fig. 8, this figure is the concrete composition structured flowchart of PW map unit in the pseudo wire emulation device of the present invention, PW map unit 3 specifically comprises the second index subelement 31, the second label commutator unit 32 and pseudo-line encapsulation subelement 33 (hereinafter to be referred as PW encapsulation subelement), and wherein the effect of various piece is specific as follows:
The second index subelement 31, be connected with atm switching element 2 with mapping table memory cell 1 respectively, be used for the Linear Mapping relation table of storage in the LID index mapping table memory cell 1 of the ATM cell sent according to atm switching element 2, obtain corresponding ATM cell head sign and PW Label;
The second sign commutator unit 32 is connected with the second index subelement 31, and the ATM cell head sign that is used for the second index subelement, 31 index are obtained is replaced the LID of ATM cell; Soon in atm switching element 2, be replaced by and reduce, make it to carry again GFP+VPI to the head identification field of LID;
PW encapsulates subelement 33, is connected with the second sign commutator unit 32 with the second index subelement 31 respectively, and the ATM cell that the PW Label that is used for obtaining based on the second index subelement, 31 index replaces after handling the second sign commutator unit 32 is carried out the PW encapsulation.
The crucial part of PW map unit 3 is the LID of design ATM cell and the corresponding relation of PW Label, enables to find corresponding PW Label fast according to the LID of ATM cell; In addition, PW map unit 3 also need be finished according to the mapping to PW of the predetermined processing ATM cell of IETF PWE3 draft, i.e. the PW of ATM cell encapsulation.
Please continue with reference to Fig. 9, this figure is the user-network interface (UNI) in the ATM cell and the concrete form schematic diagram of Network-Network interface cell (NNI), if ATM cell head sign adopts the combination sign of the GFC+VPI in the UNI cell and the VPI in the NNI cell, ATM cell head sign after then handling through atm switching element 2 will be carried LID information, concrete form please refer to Figure 10, and this figure is the first embodiment A TM cell format schematic diagram after standard A TM cell format is handled through the atm switching element in the pseudo wire emulation device of the present invention;
Certainly, also can design the look-up table of different size, such as the VCI territory in UNI cell and the NNI cell is also used as LID, be that the ATM cell head identifies the combination sign of the GFC+VPI+VCI that adopts the UNI cell and the combination sign of the VPI+VCI in the NNI cell, ATM cell head sign after then handling through atm switching element 2 will be carried LID information, concrete form please refer to Figure 11, and this figure is the second embodiment A TM cell format schematic diagram after standard A TM cell format is handled through the atm switching element in the pseudo wire emulation device of the present invention;
Please refer to Figure 12, this figure is the concrete composition structured flowchart of the PW encapsulation subelement in the pseudo wire emulation device of the present invention, this PW encapsulation subelement 33 specifically comprises control word (CW, Control Word) encapsulation subelement 331 (being designated hereinafter simply as CW encapsulation subelement), pseudo line tag (PW Label) encapsulation subelement 332 (being designated hereinafter simply as PW Label encapsulation subelement) and tunnel label (Tunnel Label) encapsulation subelement 333 (being designated hereinafter simply as Tunnel Label encapsulation subelement), the main effect of various piece is as follows:
CW encapsulates subelement 331, is connected with the second sign commutator unit 32, and the ATM cell that is used to the second sign commutator unit 32 to replace after handling encapsulates CW;
Please refer to Figure 13, this figure is that the structure of control word is formed schematic diagram, wherein:
0000 part is expressed as control word CW, and Resvd is expressed as and keeps the territory;
Sequence number when Sequence Number territory carrying PW transmits can be used for correcting the incorrect order in the PW transport process;
ATM Specific part is then specified by different atm service categorys, comprises mainly whether VCI uses, payload type indication (PTI, Payload Type Indication) and cell loss priority attributes such as (CLP, Cellloss priority).
PW Label encapsulates subelement 332, is connected with the second index subelement 31 and CW encapsulation subelement 331 respectively, and the ATM cell that is used to CW to encapsulate after subelement 331 encapsulation process encapsulates the PW Label that the second index subelement, 31 index obtain;
Tunnel Label encapsulates subelement 333, is connected with PW Label encapsulation subelement 332, is used to the ATM cell encapsulation Tunnel Label after PW Label encapsulates subelement 332 encapsulation process.
Wherein the PW of ATM cell encapsulation has had clear and definite standard definition, please refer to Figure 14, and this figure is the PW encapsulation format schematic diagram after pseudo wire emulation device of the present invention carries out the PW encapsulation process, wherein:
That carry in PSN Transport Header territory is the LSP Tunnel Label of MPLS network;
That carry in Pseudo Wire Header territory is PW label (PW Label), wherein the form of LSP TunnelLabel and these two Label of PW Label is identical, it is the usage difference, one is the Tunnel label, one is the PW label, and clearly definition is arranged in RFC3032 and draft-ietf-pwe3-cw-03.txt;
ATM Control Word territory then is to be used to carry ATM CW, is used for the bearer service load data after the control word.
Based on the invention described above pseudo wire emulation device, be described in detail several key technologies of PW emulation ATM business on the MPLS network below:
1) ATM cell is after handling through atm switching element, can carry out PW encapsulation (regulation according to IETF PWE3 draft encapsulates) by the PW map unit, and the encapsulation of LSP Tunnel Label (according to the definition encapsulation of IETF), emulation mechanisms (PWE3) transmits (according to IETF PWE3 draft definition) to the packet after will encapsulating then while arriving by pseudo-line on based on the PSN network of MPLS technology.
2) utilize the head identification field (as the GFC+VPI territory of UNI cell or the VPI territory of NNI cell) of ATM cell to load LID information: because GFC+VPI in the UNI cell and the VPI in the NNI cell occupy same position, and to have same bit figure place and span: 0~4096; Simultaneously because the ATM LID value that general atm exchange system uses just can satisfy system's needs as 4K, therefore can use the GFC+VPI territory of ATM cell to load LID information, having arrived head sign reduction that the PW map unit will carry the ATM cell of LID again becomes GFC+VPI and gets final product.
3) the Linear Mapping relation table has two list items: the GFC+VPI of PW Label and ATM cell, the list item span of relation table is 4K (being N=4096).Can certainly design the mapping table of different size as required,, need in this case the unit byte number in the list item is carried out respective extension such as the VCI territory in the ATM cell also is used to carry LID.
After the PW map unit is received an ATM cell from the bus of atm switching element direction, can extract the LID (LID is carried on the original GFC+VPI territory of ATM cell) of its carrying, search in linear mapping relations table according to LID then, because relation table is a linear relationship, so can determine corresponding PW Label and two contents in table of GFC+VPI according to the value of LID, beginning PW encapsulation.
PW encapsulation is carried out according to the form that defines among the draft-pwe3-ietf-atm-encap-08.txt, and different a bit is exactly needs at first to replace LID information in the ATM cell with GFC+VPI.
Wherein the PW encapsulation is carried out according to the order that generates control word CW, interpolation control word CW, interpolation PW Label, interpolation MPLS LSP Tunnel Label.
4) two layers of packing forms can be GFP+SDH encapsulation or Ethernet encapsulation
The GFP encapsulation is to increase the GFP head on the basis after the PW encapsulation process, is used for locating PW at the SDH frame; Encapsulate in the SDH/PDH frame of single or multiple VC-4/VC-3/VC-12 into through the processing of Virtual Concatenation and LCAS agreement again through the bag of the GFP after the GFP encapsulation process and to form the SDH/PDH frame, be sent to the SDH cross unit and carry out the time slot cross processing by Low Voltage Differential Signal (LVDS, Low Voltage Differential Signal) bus at last.
In addition, the processing that also can pass through Virtual Concatenation and LCAS agreement through the bag of the GFP after the GFP encapsulation process again encapsulates formation SDH/PDH frame among the into single or multiple ODU, be sent to the OTN cross unit and carry out the frame cross processing by CML (CML, Current Mode Logic) bus at last.
In addition, the Ethernet encapsulation is to increase ethernet packet header on the basis after the PW encapsulation process, is used for transmitting at double layer network; Can deliver to the Ethernet crosspoint through the Ethernet data bag after the Ethernet encapsulation process and carry out two layers of exchange processing of Ethernet, perhaps send to the wavelength cross unit and carry out the Wavelength dispatching processing.
Below promptly finish the ATM business and carried out the process of pseudo wire emulation on based on the PSN of MPLS technology.
Accordingly, the invention allows for a kind of pseudo wire emulation method, please refer to Figure 15, this figure is the main realization principle flow chart of pseudo wire emulation method of the present invention, and its main implementation procedure is as follows:
Step S10 sets up the Linear Mapping relation between ATM cell head sign, connection identifier LID and the pseudo line tag PW Label three; Wherein ATM head sign can adopt user-network interface (UNI, User-Network Interface) control of the universal flow in cell sign (GFC, Generic FlowControl) combination with VCI (VPI, Virtual Path Identifier) identifies; Or the VCI VPI in employing Network-Network interface (NNI, the Network Network Interface) cell; Also can adopt the combination sign of the GFC+VPI+VCI in the UNI cell; Or adopt the combination of the VPI+VCI in the NNI cell to identify;
Step S20, the Linear Mapping relation according to the above-mentioned foundation of head identification index that receives ATM cell obtains corresponding LID; And
Using the LID that obtains to replace the head that receives ATM cell in step S30 identifies;
Like this in step S40, when pseudo-line encapsulation process,, can obtain corresponding ATM cell head sign and pseudo line tag PWLabel according to the Linear Mapping relation that receives the above-mentioned foundation of LID index in the ATM cell; And
Use the ATM cell head sign that obtains to replace the LID that receives in the ATM cell in step S50, the head that promptly recovers ATM cell is designated GFC+VPI (or the head that recovers ATM cell is designated GFC+VPI+VCI); And
In step S60, use the PW Label that obtains that the ATM cell of replacing after handling among the step S50 is carried out the PW encapsulation process, the ATM business is mapped on the corresponding PW thereby finish.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (13)

1, a kind of pseudo wire emulation device is characterized in that, comprising:
The mapping table memory cell is used to store the Linear Mapping relation table between ATM cell head sign, connection identifier and the pseudo line tag three;
Atm switching element is connected with the mapping table memory cell, is used for the Linear Mapping relation table according to the head identification index mapping table cell stores of the ATM cell that receives, and obtains corresponding connection identifier; And the head of replacing the ATM cell of reception with the connection identifier that obtains identifies;
Pseudo-line map unit, be connected with atm switching element with the mapping table memory cell respectively, the Linear Mapping relation table that is used for the connection identifier index mapping table cell stores of the ATM cell sent according to atm switching element obtains corresponding ATM cell head sign and pseudo line tag; And replace connection identifier in the ATM cell that receives, and the ATM cell of replacing after handling is carried out pseudo-line encapsulation with the pseudo line tag that obtains with the ATM cell head that obtains sign.
2, pseudo wire emulation device as claimed in claim 1 is characterized in that, also comprises:
The Generic Framing Procedure encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the encapsulation of Generic Framing Procedure;
VC Virtual Concatenation encapsulation unit is connected with the Generic Framing Procedure encapsulation unit, is used for that the Generic Framing Procedure data envelope after the processing of Generic Framing Procedure encapsulation unit is put into virtual container and forms the SDH frame;
The SDH cross unit is connected with VC Virtual Concatenation encapsulation unit, is used for the SDH frame after the VC Virtual Concatenation encapsulation unit encapsulation process is carried out the time slot cross processing.
3, pseudo wire emulation device as claimed in claim 1 is characterized in that, also comprises:
The Generic Framing Procedure encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the encapsulation of Generic Framing Procedure;
ODU Virtual Concatenation encapsulation unit is connected with the Generic Framing Procedure encapsulation unit, is used for that the Generic Framing Procedure packet encapsulation after the processing of Generic Framing Procedure encapsulation unit is advanced at least one light data cell and forms OTN frame;
The OTN cross unit is connected with ODU Virtual Concatenation encapsulation unit, is used for the OTN frame after the ODU Virtual Concatenation encapsulation unit encapsulation process is carried out the time slot cross processing.
4, pseudo wire emulation device as claimed in claim 1 is characterized in that, also comprises:
The Ethernet encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the Ethernet encapsulation;
The Ethernet crosspoint is connected with the Ethernet encapsulation unit, is used for that the Ethernet data bag after the Ethernet encapsulation unit encapsulation process is carried out the Ethernet exchange and handles.
5, pseudo wire emulation device as claimed in claim 1 is characterized in that, also comprises:
The Ethernet encapsulation unit is connected with pseudo-line map unit, is used for the pseudo-line after the pseudo-line map unit encapsulation is carried out the Ethernet encapsulation;
The wavelength cross unit is connected with the Ethernet encapsulation unit, is used for the Ethernet data bag after the Ethernet encapsulation unit encapsulation process is carried to wavelength, and the wavelength that carries the Ethernet data bag is carried out cross processing.
6, pseudo wire emulation device as claimed in claim 1 is characterized in that, described atm switching element specifically comprises:
The first index subelement is connected with described mapping table memory cell, is used for the Linear Mapping relation table according to the head identification index mapping table cell stores of ATM cell, obtains corresponding connection identifier;
The first sign commutator unit is connected with the first index subelement, and the connection identifier that is used for that the first index subelement index is obtained is replaced the head sign of ATM cell.
7, pseudo wire emulation device as claimed in claim 1 is characterized in that, described pseudo-line map unit specifically comprises:
The second index subelement, be connected with atm switching element with the mapping table memory cell respectively, the Linear Mapping relation table that is used for the connection identifier index mapping table cell stores of the ATM cell sent according to atm switching element obtains corresponding ATM cell head sign and pseudo line tag;
The second sign commutator unit is connected with the second index subelement, and the ATM cell head sign that is used for the second index subelement index is obtained is replaced the connection identifier of ATM cell;
Pseudo-line encapsulation subelement is connected with the second sign commutator unit with the second index subelement respectively, and the ATM cell that the pseudo line tag that is used for obtaining based on the second index subelement index is replaced after handling the second sign commutator unit is carried out pseudo-line encapsulation.
8, pseudo wire emulation device as claimed in claim 7 is characterized in that, described pseudo-line encapsulation subelement specifically comprises:
Control word encapsulation subelement is connected with the second sign commutator unit, is used to the ATM cell encapsulation control word after processing is replaced in the second sign commutator unit;
Pseudo line tag encapsulation subelement is connected with the second index subelement and control word encapsulation subelement respectively, and the ATM cell that is used to control word to encapsulate after the subelement encapsulation process encapsulates the pseudo line tag that the second index subelement index obtains;
Tunnel label encapsulation subelement is connected with pseudo line tag encapsulation subelement, is used to the ATM cell encapsulation tunnel label after pseudo line tag encapsulates the subelement encapsulation process.
As the described pseudo wire emulation device of the arbitrary claim of claim 1~8, it is characterized in that 9, the universal flow that described ATM cell head is designated in the user-network interface cell is controlled the combination sign that identifies with VCI; Or be VCI in the Network-Network interface cell.
As the described pseudo wire emulation device of the arbitrary claim of claim 1~8, it is characterized in that 10, described ATM cell head is designated the combination sign of universal flow control sign, VCI and VPI in the user-network interface cell; Or be the combination sign of VCI in the Network-Network interface cell and VPI.
11, a kind of pseudo wire emulation method is characterized in that, comprises step:
Set up the Linear Mapping relation between ATM cell head sign, connection identifier and the pseudo line tag three;
According to the described Linear Mapping relation of the head identification index of the ATM cell that receives, obtain corresponding connection identifier; And
Replace the head sign of the ATM cell that receives with the connection identifier that obtains;
In pseudo-line encapsulation process process,, obtain corresponding ATM cell head sign and pseudo line tag according to the described Linear Mapping relation of the connection identifier index in the ATM cell that receives; And
With the connection identifier in the ATM cell of the ATM cell head sign replacement reception that obtains; And
With the pseudo line tag that obtains the ATM cell of replacing after handling is carried out pseudo-line encapsulation.
12, pseudo wire emulation method as claimed in claim 11 is characterized in that, the universal flow that described ATM cell head is designated in the user-network interface cell is controlled the combination sign that identifies with VCI; Or be VCI in the Network-Network interface cell.
13, pseudo wire emulation method as claimed in claim 11 is characterized in that, described ATM cell head is designated the combination sign of universal flow control sign, VCI and VPI in the user-network interface cell; Or be the combination sign of VCI in the Network-Network interface cell and VPI.
CNB2005100839455A 2005-07-14 2005-07-14 The pseudo wire emulation devices and methods therefor Expired - Fee Related CN100563262C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2005100839455A CN100563262C (en) 2005-07-14 2005-07-14 The pseudo wire emulation devices and methods therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2005100839455A CN100563262C (en) 2005-07-14 2005-07-14 The pseudo wire emulation devices and methods therefor

Publications (2)

Publication Number Publication Date
CN1897592A CN1897592A (en) 2007-01-17
CN100563262C true CN100563262C (en) 2009-11-25

Family

ID=37609964

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005100839455A Expired - Fee Related CN100563262C (en) 2005-07-14 2005-07-14 The pseudo wire emulation devices and methods therefor

Country Status (1)

Country Link
CN (1) CN100563262C (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101316260B (en) * 2007-05-30 2012-04-25 华为技术有限公司 Packaging conversion method and packaging conversion equipment
WO2012167655A1 (en) * 2011-06-09 2012-12-13 中兴通讯股份有限公司 Packet transmit network device and method for asynchronous transfer mode switching

Also Published As

Publication number Publication date
CN1897592A (en) 2007-01-17

Similar Documents

Publication Publication Date Title
US7406518B2 (en) Method and system for connecting virtual circuits across an ethernet switch
CN1761219B (en) Method for implementing automatic discovery of topological structure in MPLS ring net
CN107438028B (en) Method and equipment for processing customer service
US20020027905A1 (en) Method for transmitting data packets and network element for carrying out the method
US20020176450A1 (en) System and methods for selectively transmitting ethernet traffic over SONET/SDH optical network
JP2002198994A (en) Method and device for gfp frame transfer
JP4685326B2 (en) Transparent transport overhead mapping
US6947427B1 (en) Transmission method and network system for accommodating a plurality of kinds of traffic in a common network
CN100563215C (en) A kind of packet routing switch device and method thereof
CN101009633A (en) A data transfer method and transfer system with the route information
ES2654842T3 (en) Service transmission method in an optical transport network and device and system for the implementation of said method
CN100493075C (en) Method for hybrid transmission of variable-length data packet and fixed length cell, and adaptation device
CN113557696B (en) Routing FlexE data in a network
US6658006B1 (en) System and method for communicating data using modified header bits to identify a port
CN109450875A (en) MAC layer packaging method and device
CN102137008B (en) Quality of service (QoS) keeping method, device and system
CN102055727A (en) Data encapsulation method, encapsulation equipment and branch unit in multi-service transport network
US8929366B2 (en) Method and apparatus for transporting packets with specific traffic flows having strict packet ordering requirements over a network using multipath techniques
EP1701495B1 (en) Hybrid digital cross-connect for switching circuit and packet based data traffic
CN100563262C (en) The pseudo wire emulation devices and methods therefor
CN102480408A (en) Scheduling method and device for pseudo wire emulation system
CN100508475C (en) Multi-service transmitting method, node device and multi-service transmitting platform
JP2000049791A (en) Ip datagram encapsulation method and ip processor
CN100525241C (en) Method of implementing data message transmission supported by multiprotocol
Hamad et al. SONET over Ethernet

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091125

Termination date: 20170714