CN100553289C - Green synchronous signal detection circuit - Google Patents
Green synchronous signal detection circuit Download PDFInfo
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- CN100553289C CN100553289C CNB2007100055146A CN200710005514A CN100553289C CN 100553289 C CN100553289 C CN 100553289C CN B2007100055146 A CNB2007100055146 A CN B2007100055146A CN 200710005514 A CN200710005514 A CN 200710005514A CN 100553289 C CN100553289 C CN 100553289C
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Abstract
A kind of green synchronously (SOG) signal detection circuit comprises: a clamped circuit, the voltage clamping of a video and graphic signals is exported the input signal of strangulation after a preset range; One first programmable gain amplifier receives the input signal of strangulation and its amplitude is amplified and produces first gain signal behind one first yield value; One first low pass filter receives and produces first filtering signal behind first gain signal; One second programmable gain amplifier receives the input signal of strangulation and its amplitude is amplified and produces second gain signal behind one second yield value, and wherein, second yield value is different with first yield value; One second low pass filter receives and produces second filtering signal behind second gain signal; One programmable voltage offset units receives first filtering signal and adjusts its DC level, exports a level deviation signal; One comparator produces a comparison signal as a SOG signal behind the incoming level shifted signal and second filtering signal.
Description
Technical field
The invention relates to green (SOG, Sync On Green) signal detection circuit synchronously, particularly about utilizing programmable gain amplifier and low pass filter (PGA/LPF) to improve the SOG signal detection circuit that antinoise is disturbed.
Background technology
Figure 1A is the schematic diagram of general video and graphic signals (Video graphics signal).Shown in Figure 1A, video and graphic signals comprises three parts such as synchronizing signal A1, white space A2 and data area A3.According to specification, about 300mV between synchronizing signal A1 and the white space A2; And about 700mV between white space A2 and the data area A3.Video display devices generally is to utilize a SOG signal detection circuit to detect synchronizing signal A1, uses as the Control Parameter that shows.
Figure 1B is known SOG signal detection circuit.Shown in Figure 1B, SOG signal detection circuit 10 comprises a clamped circuit (clamping circuit) 11, one triggering level and produces circuit (Triggeringlevel generating circuit) 12 and one comparator (comparator) 13.Video and graphic signals is input to clamped circuit 11 via a capacitor C, and this clamped circuit 11 is clamped to video and graphic signals in the one setting voltage scope, and produces the input signal of strangulation.Triggering level produces the trigger voltage that circuit 12 produces fixing (fixed) level.This SOG signal detection circuit 10 utilizes comparator 13 input signal and the trigger voltage of strangulation more again, and exports a SOG signal.
Because the SOG signal packet contains the content (content) of video and graphic signals, that is data area A3, above-mentioned method is difficult for detecting synchronizing information (synchronization information).And power supply noise and input noise are disturbed the signal that can detect through regular meeting.And video and graphic signals is to be coupled (AC coupling) to chip with exchange way, and its strangulation voltage (clamping level) can be subjected to noise jamming, produces bigger shake (jitter).Simultaneously, this chip generally also provides the function of hot plug (hotplugging), so this chip also must keep normal action in the blink of hot plug.
In the above-mentioned prior art, because approximately have only 300mV between the synchronizing signal A1 of video and graphic signals and the white space A2, (noise margin) is less for the noise margin value, that is antinoise is disturbed bad.Produce a fixing comparative voltage if only utilize triggering level to produce circuit 12, then can't effectively produce the SOG signal.
Fig. 2 is that U.S. Patent application discloses the 2005/0270421st A1 number SOG signal detection circuit in early days.As shown in Figure 2, this SOG signal detection circuit 20 also comprises a control unit 24 except comprising a clamped circuit (clampingcircuit) 11, triggering level generation circuit (Triggering level generating circuit) 22 and one comparator (comparator) 13.Though this SOG signal detection circuit 20 can utilize control unit 24 to adjust triggering level according to the SOG signal and produce the comparative voltage that circuit 22 is produced, but because approximately have only 300mV between the synchronizing signal A1 of video and graphic signals and the white space A2, the noise margin value is still less, and the antinoise effects of jamming is also bad.
Summary of the invention
Because the problems referred to above the objective of the invention is to propose a kind of SOG signal detection circuit that improves the noise margin value and improve the antinoise effects of jamming.
Another object of the present invention is to propose a kind of SOG signal detection circuit that comprises programmable gain amplifier/low pass filter.
For reaching above-mentioned purpose, SOG signal detection circuit of the present invention comprises: a clamped circuit, this clamped circuit is used to receive a video and graphic signals as input signal, and the voltage clamping of this video and graphic signals is exported the input signal of strangulation after a preset range; One first programmable gain amplifier, this first programmable gain amplifier be used to receive strangulation input signal and with this amplitude of the input signal of strangulation amplify and produce one first gain signal behind one first yield value; One first low pass filter, this first low pass filter produce one first filtering signal after being used to receive first gain signal; One second programmable gain amplifier, this one second programmable gain amplifier be used to receive strangulation input signal and with this amplitude of the input signal of strangulation amplify and produce one second gain signal behind one second yield value, wherein, second yield value is different with first yield value; One second low pass filter, this second low pass filter produce one second filtering signal after being used to receive second gain signal; One variation unit, the DC level that this variation unit is used to receive first filtering signal and adjusts first filtering signal is exported a level deviation signal; And a comparator, after this comparator is used for incoming level shifted signal and second filtering signal and compares, and then produce a comparison signal as a SOG signal.
Wherein when first yield value during greater than second yield value, the variation unit offsets downward the voltage of first filtering signal, make the maximum of the maximum of this level deviation signal, and make the minimum value of this level deviation signal be lower than the minimum value of second filtering signal greater than second filtering signal; And when first yield value during less than second yield value, the variation unit is with the upwards skew of voltage of first filtering signal, make the maximum of this level deviation signal be lower than the maximum of second filtering signal, and make the minimum value of this level deviation signal be higher than the minimum value of second filtering signal.
The present invention also proposes a kind of SOG signal detection circuit, and this circuit for detecting comprises: a clamped circuit is to receive a video and graphic signals as input signal, and the voltage clamping of this video and graphic signals is exported the input signal of strangulation after a preset range; One programmable gain amplifier, be receive aforementioned strangulation input signal and with this amplitude of the input signal of strangulation produce a gain signal after amplifying a yield value; One low pass filter is to produce a filtering signal after receiving aforementioned gain signal; One programmable level generation unit is to produce a comparative level signal; One comparator is to produce a comparison signal as an output signal after receiving aforementioned comparative level signal and aforementioned filtering signal; And a non-overlapped timing generation unit and a control unit, this non-overlapped timing generation unit and control unit are after receiving aforementioned comparison signal, produce a control signal and control the frequency range of aforementioned low pass filter, the comparative level signal of the aforementioned programmable level generation unit of control and the strangulation switching sequence of controlling aforementioned clamped circuit.
SOG signal detection circuit of the present invention utilizes one or a pair of programmable gain amplifier/low pass filter to produce comparison signal, and then can improve the antinoise effects of jamming.And SOG signal detection circuit of the present invention also can utilize non-overlapped timing generation unit/control unit to come the Auto-Sensing video mode, and the gain of adjusting programmable gain amplifier/low pass filter automatically makes the detecting of SOG signal more accurate.
Description of drawings
Figure 1A is the schematic diagram of general video and graphic signals (Video graphics signal).
Figure 1B is known SOG (Sync On Green) signal detection circuit.
Fig. 2 is known another kind of SOG (Sync On Green) signal detection circuit.
Fig. 3 A shows the circuit block diagram of SOG signal detection circuit first embodiment of the present invention.
Fig. 3 B shows the circuit block diagram of SOG signal detection circuit second embodiment of the present invention.
Fig. 4 A is the waveform of first filtering signal and second filtering signal.
Fig. 4 B is the waveform of first filtering signal and shifted signal.
Fig. 4 C is the waveform of SOG signal.
Fig. 5 shows the circuit block diagram of SOG signal detection circuit the 3rd embodiment of the present invention.
The strangulation switching sequence that Fig. 6 is exported for non-overlapped timing generation unit/control unit 56 and the graph of a relation of SOG signal.
Fig. 7 shows the circuit block diagram of SOG signal detection circuit the 4th embodiment of the present invention.
Graphic numbering:
10,20,30,30 ', 50,70 SOG signal detection circuit
11,35 clamped circuits
12 triggering levels produce circuit
13,34 comparators
24 control units
31,32,51,52,71 programmable gain amplifier/low pass filters
33,53 programmable voltage offset units
56,76 non-overlapped timing generation unit/control units
73 programmable level generation units
Embodiment
Below with reference to graphic detailed description SOG signal detection of the present invention circuit.
Fig. 3 A shows the circuit block diagram of SOG signal detection circuit first embodiment of the present invention.SOG signal detection circuit 30 of the present invention comprises one first programmable gain amplifier/low pass filter (Programmable Gain Amplifier/Low Pass Filter, PGA/LPF1) 31,1 second programmable gain amplifier/low pass filter (PGA/LPF2) 32, a programmable voltage offset units (Programmable Voltage Shifter) 33, one comparator 34 and a clamped circuit 35.First programmable gain amplifier/low pass filter 31 comprises one first programmable gain amplifier and one first low pass filter, and second programmable gain amplifier/low pass filter 32 comprises one second programmable gain amplifier and one second low pass filter.Comparator 34 is same as the prior art with the function and the framework of clamped circuit 35, no longer repeat specification.
Clamped circuit 35 receives via a capacitor C and produces the input signal of strangulation behind the video and graphic signals.In the present embodiment, first gain value settings of the first programmable gain amplifier of first programmable gain amplifier/low pass filter 31 is 2, and second gain value settings of the second programmable gain amplifier of second programmable gain amplifier/low pass filter 32 is 1, certainly first and second yield value is not limited to this, as long as two yield values have significant difference.
First programmable gain amplifier/low pass filter 31 and second programmable gain amplifier/low pass filter 32 all receive the input signal and a virtual DC of strangulation, and produce one first filtering signal 41 and one second filtering signal 42 respectively, shown in Fig. 4 A.Because the gain of the first programmable gain amplifier is that the gain of the 2 and second programmable gain amplifier is 1, so the amplitude of curve 41 is about the twice of the amplitude of curve 42.Because first programmable gain amplifier/low pass filter 31 and second programmable gain amplifier/low pass filter 32 all receive virtual DC, of short duration hot plug problem can be solved.Its reason is that the Amplifier Gain (Gain) of programmable gain amplifier/ low pass filter 31,32 is very big, so the voltage of positive input terminal and negative input end is almost equal.Because the input signal of strangulation is connected to the positive input terminal of amplifier via a resistance R 1, so not reason hot plug and change is too many up and down of the input signal of strangulation.Simultaneously, two inputs of comparator can change up and down together, so of short duration hot plug problem can effectively solve.
Programmable voltage offset units 33 receives second filtering signal 42, and with behind second filtering signal, 42 addings, one offset voltage, produces an offset voltage 42 ' that upwards is offset.Among Fig. 4 B, curve 41 is first filtering signal, and curve 42 ' is the level deviation signal that second filtering signal 42 upwards is offset through programmable voltage offset units 33.The purpose of programmable voltage offset units 33 is, when first yield value during less than second yield value, the programmable voltage offset units offsets downward the voltage of second filtering signal, and obtain a level deviation signal, make the maximum of the maximum of level deviation signal, and make the minimum value of level deviation signal be lower than the minimum value of first filtering signal greater than first filtering signal; And when first yield value during greater than second yield value, the programmable voltage offset units is with the upwards skew of voltage of second filtering signal, make the maximum of level deviation signal be lower than the maximum of first filtering signal, and make the minimum value of level deviation signal be higher than the minimum value of first filtering signal.
Fig. 3 B shows the circuit block diagram of SOG signal detection circuit second embodiment of the present invention.The SOG signal detection circuit 30 ' of this embodiment and the SOG signal detection circuit 30 of first embodiment are roughly the same, unique difference is that the programmable voltage offset units 33 of this SOG signal detection circuit 30 ' is skew first filtering signal, and the programmable voltage offset units 33 of SOG signal detection circuit 30 is skew second filtering signals.
Fig. 5 shows the circuit block diagram of SOG signal detection circuit the 3rd embodiment of the present invention.As shown in Figure 5, SOG signal detection circuit 50 of the present invention also comprises a non-overlapped timing generation unit/control unit 56 except comprising one first programmable gain amplifier/low pass filter 51, one second programmable gain amplifier/low pass filter 52, a programmable voltage offset units 53, a comparator 34 and a clamped circuit 35.
Under the unlike signal pattern, the bandwidth of SOG signal (bandwidth) difference therefore need be at the frequency range of different bandwidth design low pass filters.Wherein a kind of execution mode is to utilize register (register) to come the width of recording frequency band, and parameter is write register.So, in first embodiment and second embodiment, in the time will switching the unlike signal pattern, the parameter of conversion must be write in the register.And when the 3rd embodiment, then after the variation by non-overlapped timing generation unit/control unit 56 detecting SOG signals, the parameter with want conversion writes in the register automatically.Non-overlapped timing generation unit/control unit 56 mainly is the strangulation switching sequence of control clamped circuit 35, the offset voltage of control programmable voltage offset units 53 and the gain and the frequency bandwidth of control programmable gain amplifier/ low pass filter 51,52.
If the SOG signal does not have the variation of systematicness, promptly represent the mode detecting failure.At this moment, non-overlapped timing generation unit/control unit 56 must change the ratio of gains of programmable gain amplifier/ low pass filter 51,52, and the offset voltage of suitable control programmable voltage offset units 53 (for example ascending skew), can success detect the SOG signal.In addition, non-overlapped timing generation unit/control unit 56 can be adjusted the bandwidth of first and second low pass filter after the sense mode of success, further filter the noise of different mode.
Fig. 6 is the strangulation switching sequence exported of non-overlapped timing generation unit/control unit 56 and the graph of a relation of SOG signal.As shown in the drawing, (T1) falls within during the logical zero of SOG signal in (T2) during the activation of strangulation switching sequence.That is the strangulation switching sequence needs just can be enabled during the logical zero of SOG signal.
Fig. 7 shows the circuit block diagram of SOG signal detection circuit the 4th embodiment of the present invention.As shown in Figure 7, SOG signal detection circuit 70 of the present invention comprises a programmable gain amplifier/low pass filter 71, a programmable level generation unit 73, a comparator 34, one non-overlapped timing generation unit/control unit 76 and a clamped circuit 35.
After the variation of non-overlapped timing generation unit/control unit 76 detecting SOG signals, the parameter with want conversion writes in the register automatically.Non-overlapped timing generation unit/control unit 76 mainly is the strangulation switching sequence of control clamped circuit 35, the level voltage of programmable level generation unit 73 and the gain and the bandwidth of control programmable gain amplifier/low pass filter 71.
The difference of the 4th embodiment and the 3rd embodiment is that this embodiment only comprises a programmable gain amplifier/low pass filter, and utilizes programmable level generation unit 73 to produce required comparative level voltage.In addition, though programmable level generation unit 73 all is used for producing a comparative level voltage with programmable voltage offset units 53, but programmable voltage offset units 53 is to be offset back output according to the voltage that programmable gain amplifier/low pass filter is exported, programmable level generation unit 73 does not then receive the voltage that programmable gain amplifier/low pass filter is exported, directly according to parameter generating one comparative level voltage.If the SOG signal does not have the variation of systematicness, promptly represent the mode detecting failure.At this moment, non-overlapped timing generation unit/control unit 76 must change the gains of programmable gain amplifier/low pass filters 71, and the level voltage (for example ascending skew) of suitable control programmable level generation unit 73 can success detects the SOG signal.In addition, non-overlapped timing generation unit/control unit 76 can be adjusted the bandwidth of low pass filter after the sense mode of success, further filter the noise of different mode.
Therefore, SOG signal detection circuit of the present invention utilizes one or a pair of programmable gain amplifier/low pass filter to produce comparison signal, and then can improve the antinoise effects of jamming.And SOG signal detection circuit of the present invention also can utilize non-overlapped timing generation unit/control unit to come the Auto-Sensing video mode, and the gain of adjusting programmable gain amplifier/low pass filter automatically makes the detecting of SOG signal more accurate.
Though more than with embodiment the present invention is described, therefore do not limit scope of the present invention, only otherwise break away from main idea of the present invention, the sector person can carry out various distortion or change.
Claims (9)
1. a green synchronous signal detection circuit is characterized in that, this circuit for detecting comprises:
One clamped circuit is to receive a video and graphic signals as input signal, and with the voltage clamping of this video and graphic signals after a preset range, and then export the input signal of strangulation;
One first programmable gain amplifier is to receive the input signal of aforementioned strangulation and with this after amplitude of the input signal of strangulation has amplified one first yield value, and then produces one first gain signal;
One first low pass filter is to produce one first filtering signal after receiving aforementioned first gain signal;
One second programmable gain amplifier, be to receive the input signal of aforementioned strangulation and with this after amplitude of the input signal of strangulation has amplified one second yield value, and then produce one second gain signal, wherein, this second yield value and this first yield value are inequality;
One second low pass filter is to produce one second filtering signal after receiving aforementioned second gain signal;
One programmable voltage offset units is the DC level that receives aforementioned first filtering signal and adjust this first filtering signal, and then exports a level deviation signal; And
One comparator is after aforementioned level shifted signal of reception and aforementioned second filtering signal compare, and then produces a comparison signal as an output signal;
Wherein, when aforementioned first yield value during greater than aforementioned second yield value, the aforesaid voltage offset units offsets downward the voltage of aforementioned first filtering signal, make the maximum of the maximum of this level deviation signal, and make the minimum value of this level deviation signal be lower than the minimum value of aforementioned second filtering signal greater than aforementioned second filtering signal; When aforementioned first yield value during less than aforementioned second yield value, the aforesaid voltage offset units is with the upwards skew of voltage of aforementioned first filtering signal, make the maximum of this level deviation signal be lower than the maximum of aforementioned second filtering signal, and make the minimum value of this level deviation signal be higher than the minimum value of aforementioned second filtering signal.
2. green synchronous signal detection circuit as claimed in claim 1 is characterized in that, aforementioned second yield value is 2 times of aforementioned first yield value.
3. green synchronous signal detection circuit as claimed in claim 2 is characterized in that, aforementioned first yield value is 1.
4. green synchronous signal detection circuit as claimed in claim 1 is characterized in that, aforementioned second yield value is 1/2 times of aforementioned first yield value.
5. green synchronous signal detection circuit as claimed in claim 4 is characterized in that, aforementioned first yield value is 2.
6. green synchronous signal detection circuit as claimed in claim 1, it is characterized in that, this circuit for detecting also comprises a non-overlapped timing generation unit, and this non-overlapped timing generation unit is that generation one control signal is controlled the frequency range of aforementioned first low pass filter and aforementioned second low pass filter, the level deviation amount of control aforesaid voltage offset units and the strangulation switching sequence of controlling aforementioned clamped circuit after receiving aforementioned comparison signal.
7. green synchronous signal detection circuit as claimed in claim 1 is characterized in that, the positive input terminal of aforementioned comparator receives aforementioned level shifted signal, and negative input end receives aforementioned second filtering signal.
8. green synchronous signal detection circuit as claimed in claim 1 is characterized in that, the positive input terminal of aforementioned comparator receives aforementioned second filtering signal, and negative input end receives aforementioned level shifted signal.
9. a green synchronous signal detection circuit is characterized in that, this circuit for detecting comprises:
One clamped circuit is to receive a video and graphic signals as input signal, and the voltage clamping of this video and graphic signals is exported the input signal of strangulation after a preset range;
One programmable gain amplifier, be receive aforementioned strangulation input signal and with this amplitude of the input signal of strangulation produce a gain signal after amplifying a yield value;
One low pass filter is to produce a filtering signal after receiving aforementioned gain signal;
One programmable level generation unit is to produce a comparative level signal;
One comparator is to produce a comparison signal as an output signal after receiving aforementioned comparative level signal and aforementioned filtering signal; And
One non-overlapped timing generation unit and control unit, this non-overlapped timing generation unit and control unit are after receiving aforementioned comparison signal, produce a control signal and control the frequency range of aforementioned low pass filter, the comparative level signal of the aforementioned programmable level generation unit of control and the strangulation switching sequence of controlling aforementioned clamped circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100055146A CN100553289C (en) | 2007-02-09 | 2007-02-09 | Green synchronous signal detection circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100055146A CN100553289C (en) | 2007-02-09 | 2007-02-09 | Green synchronous signal detection circuit |
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| Publication Number | Publication Date |
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| CN101242485A CN101242485A (en) | 2008-08-13 |
| CN100553289C true CN100553289C (en) | 2009-10-21 |
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| CNB2007100055146A Expired - Fee Related CN100553289C (en) | 2007-02-09 | 2007-02-09 | Green synchronous signal detection circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102118544B (en) * | 2009-12-30 | 2013-05-01 | 晨星软件研发(深圳)有限公司 | SOG (Sync on Green) signal correction system and method |
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Granted publication date: 20091021 Termination date: 20170209 |