CN100553167C - A method and device for detecting uplink and downlink directions of TD-SCDMA system time slots - Google Patents

Abstract

The invention provides a detection method for the uplink and downlink directions of time slots in a TD-SCDMA system, comprising the steps of: obtaining the timing information of each time slot from TS0 to TS6; calculating the timing synchronization deviations of TS2 to TS6 relative to TS0; The timing synchronization deviation is compared with the decision threshold: if there is a time slot greater than the decision threshold, determine the time slot that is greater than the decision threshold and has the largest time slot number, then TS2 to this time slot are all uplink time slots, and the time slots of this time slot The next time slot to TS6 are all downlink time slots; if there is no time slot greater than the decision threshold, then TS2 to TS6 are all downlink time slots. The invention can simply and effectively judge the uplink and downlink directions of all time slots, and judge the position of the second conversion point according to the judgment result. In addition, the present invention also correspondingly provides a detection device, which enables the repeater applied to the TD-SCDMA system to accurately judge the uplink and downlink directions of all time slots, and well supports the dynamic change of the position of the second switching point.

Description

A method and device for detecting uplink and downlink directions of TD-SCDMA system time slots

technical field

The invention relates to the communication field, in particular to a method and a device for detecting the uplink and downlink directions of a TD-SCDMA system time slot.

Background technique

In a Time-Division Synchronization Code Division Multiple Access (TD-SCDMA, Time-Division Synchronization Code Division Multiple Access) system, a wireless frame is 10ms long and divided into two 5ms subframes. The structures of these two subframes are exactly the same. As shown in Figure 1, it is the subframe structure of the TD-SCDMA system. Each subframe includes 7 regular time slots (TS0~6) and 3 special time slots (DwPTS, GP and UpPTS). Among them: time slot 0 (TS0, Time Slot 0) and downlink pilot channel (DwPCH, Downlink PilotChannel) are fixed as downlink time slots; uplink pilot channel (UpPCH, Uplink Pilot Channel) and TS1 are fixed as uplink time slots; TS2 to Both TS6 can be configured as uplink time slots or downlink time slots, and the uplink and downlink time slots are separated by a Switch Point.

There are only two switching points in a subframe. The first switching point (Switch Point 1) is fixed between DwPCH and UpPCH, and the second switching point (Switch Point 2) can be at any time slot from TS1 to TS6. end. Since the position of the second conversion point is variable, the number of uplink and downlink time slots can be flexibly allocated symmetrically or asymmetrically as required. However, precisely because the position of the second conversion point is variable, if the position of the second conversion point cannot be known accurately, the uplink and downlink directions of TS2 to TS6 cannot be judged.

At present, the existing scheme cannot obtain the uplink and downlink directions of all time slots, unless the air interface signaling of the wireless network is analyzed to know that two adjacent time slots happen to be uplink in the previous time slot and downlink in the latter time slot, then the second conversion can be concluded The point is between the adjacent time slots, and the time slots from TS1 to the switching point are all in the uplink direction, and from the switching point to TS6 are in the downlink direction.

In addition, as an effective network optimization product, repeaters have made great contributions to the development of mobile communication networks in the past ten years. Similarly, for the optimization of the TD-SCDMA system, the repeater also plays a very important role. However, the existing repeater cannot know the position of the second conversion point, and can only support the situation that the position of the second conversion point is fixed. In this way, the existing repeater used in the TD-SCDMA system not only cannot reflect the important feature of the system itself that the uplink and downlink services can be allocated flexibly; but also for the network that supports the variable second switching point position, it will also have a negative impact on the system performance. limit.

Contents of the invention

The technical problem to be solved by the present invention is to provide a method for detecting the uplink and downlink directions of time slots in a TD-SCDMA system, which can simply and effectively judge the uplink and downlink directions of all time slots, and judge the position of the second switching point according to the judgment results.

In addition, the technical problem to be solved by the present invention is to provide a detection device for the uplink and downlink directions of time slots in the TD-SCDMA system, so that repeaters applied to the TD-SCDMA system can accurately judge the uplink and downlink directions of all time slots, which is very good. ground to support the dynamic change of the position of the second switching point.

The technical scheme that realizes the object of the present invention is as follows:

A detection method for the uplink and downlink direction of a TD-SCDMA system time slot, comprising the steps:

Obtain the timing information of each time slot from TS0 to TS6;

Calculate the timing synchronization deviations of TS2 to TS6 relative to TS0 respectively;

Compare the timing synchronization deviations from TS2 to TS6 with the decision threshold respectively:

If there is a time slot greater than the decision threshold, determine the time slot that is greater than the decision threshold and has the largest time slot number, then TS2 to this time slot are all uplink time slots, and the next time slot to TS6 of this time slot are all downlink time slots gap;

If there is no time slot greater than the decision threshold, TS2 to TS6 are all downlink time slots.

Among them: Obtain the timing information of each time slot from TS0 to TS6 according to the following steps:

extract the midamble data of the corresponding time slot;

Obtain the channel impulse response through channel estimation;

The peak position with 1/8 chip accuracy is obtained by interpolation near the peak position of the channel impulse response, so as to obtain the timing position of the corresponding time slot.

The decision threshold is a certain time advance determined according to the actual environment.

Preferably, the timing advance is 3/8 chip.

In addition, the present invention also provides a detection device for the uplink and downlink directions of TD-SCDMA system time slots, including:

An information processing unit, configured to obtain timing information of each time slot from TS0 to TS6 from the received signal;

A synchronization deviation calculation unit, configured to use the obtained timing information to calculate the timing synchronization deviation of TS2 to TS6 relative to TS0;

The direction judging unit is used to compare the synchronization deviation of TS2 to TS6 with the judgment threshold, and judge the uplink and downlink directions of each time slot:

If there is a time slot greater than the decision threshold, determine the time slot that is greater than the decision threshold and has the largest time slot number, then TS2 to this time slot are all uplink time slots, and the next time slot to TS6 of this time slot are all downlink time slots gap;

If there is no time slot greater than the decision threshold, TS2 to TS6 are all downlink time slots.

Preferably, the information processing unit further includes:

The radio frequency receiving unit is used for receiving the radio frequency signal and converting it into an analog baseband signal;

A baseband receiving unit, configured to convert the analog baseband signal into a digital baseband signal, and send them to the channel estimation unit and the downlink synchronization unit respectively;

The channel estimation unit is used to extract the midamble data of the corresponding time slot according to the digital baseband signal, perform channel estimation to obtain the channel impulse response, and obtain the peak position with 1/8 chip precision by interpolation near the peak position of the channel impulse response , so as to obtain the timing information of the corresponding time slot;

The downlink synchronization unit is used to obtain and maintain downlink synchronization with the base station.

The decision threshold is a certain time advance determined according to the actual environment.

Preferably, the timing advance is 3/8 chip.

Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects:

The invention makes full use of the inherent timing difference characteristics of the uplink and downlink time slots of the TD-SCDMA system, and simply and effectively judges the uplink and downlink directions of all time slots. By obtaining the timing information of each time slot from TS0 to TS6, it is used to calculate the timing synchronization deviation of TS2 to TS6 relative to TS0; and then compare the timing synchronization deviation of TS2 to TS6 with the judgment threshold, so as to effectively judge each time slot The uplink and downlink directions of each time slot can also accurately determine that the second switching point is between the uplink time slot with the largest time slot number and the downlink time slot with the smallest time slot number according to the judgment results of the uplink and downlink directions of each time slot.

In addition, the TD-SCDMA system repeater applying the technical solution of the present invention can not only support the situation that the position of the second conversion point is fixed, but also support the dynamic change of the position of the second conversion point, so as to better meet the requirements of TD-SCDMA The requirement for the important characteristic that the uplink and downlink services of the system can be configured asymmetrically.

The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

Description of drawings

Fig. 1 is a schematic diagram of a subframe structure of a TD-SCDMA system;

Figure 2 is a schematic diagram of the timing difference between uplink and downlink time slots in a TD-SCDMA system;

Fig. 3 is the detection flowchart of uplink and downlink direction of TD-SCDMA system time slot of the present invention;

Fig. 4 is the architecture diagram of the repeater of the TD-SCDMA system of the present invention;

Fig. 5 is a structural schematic diagram of the control device of the repeater of the present invention.

Detailed ways

For the TD-SCDMA system, the position of the first switching point is fixed, TS0 is fixed as the downlink time slot, TS1 is fixed as the uplink time slot, and only the position of the second switching point is variable. Therefore, as long as it is judged or known that TSn is the uplink time slot, Then TS2 to TSn are all uplink time slots; or as long as it is judged or known that TSm is a downlink time slot, then TSm to TS6 are all downlink time slots, and the possible values of n and m are all [2, 3, 4, 5, 6].

Currently, only the network side can accurately know the location of the second switching point, and therefore also know the uplink and downlink directions from TS2 to TS6. The network side is the uplink and downlink common channels, such as physical random access channel (PRACH, Physical Random Access Channel), forward physical access channel (FPACH, Forward Physical Access Channel), paging indicator channel (PCH, Paging Indicator Channel), etc. The time slots can be obtained from the system information broadcast by the base station. If these time slots are not allocated in TS0 and TS1, the corresponding time slot direction can be regarded as known information.

Without loss of generality, the following descriptions all assume that the time slots allocated for common channels are not within the range of TS2 to TS6, that is, the network side allocates TS2 to TS6 as business time slots, and uses the technical solution of the present invention to detect the uplink and downlink of these time slots direction.

The invention utilizes the inherent timing difference of the uplink and downlink time slots to judge the uplink and downlink directions of the time slots. The basic principles are as follows:

The TD-SCDMA system has very strict requirements on timing, and the synchronization accuracy of uplink and downlink should be kept within 1/8 chip. Generally, the TD-SCDMA system takes the starting position of TS0 as the frame timing reference point. After the repeater obtains downlink synchronization with the base station, the timing of each downlink time slot and frame timing are completely synchronized, that is, the relative position of each downlink time slot is completely fixed, and the timing deviation is constant at 0. However, in practical applications, there is always a certain propagation distance between the repeater and the base station, so the timing of the uplink time slot always has a certain time relative to the standard uplink time slot position with reference to the downlink time slot timing Advance (0...255.875chips, refer to 3GPP TS25.123).

The timing difference between the uplink and downlink time slots of the TD-SCDMA system is shown in Figure 2: TS3 and TS4 are uplink time slots, and TS5 is downlink time slots. According to the downlink timing, the starting position of TS4 is at t0, and the actual sending time of TS4 is at t1 , there is a certain amount of advance compared to the standard time t0 with the following timing as a reference. That is, there is an inherent deviation (sending advance) in the timing of the uplink and downlink time slots, and the farther the propagation distance between the repeater and the base station is, the larger the uplink transmission advance is, that is, the larger the uplink and downlink timing deviation, the present invention makes full use of This characteristic of the uplink and downlink signals of the TD-SCDMA system is used to distinguish the uplink and downlink directions of each time slot.

Next, in conjunction with Figure 3, the process of detecting the uplink and downlink directions of time slots in the TD-SCDMA system is described in detail, as follows:

Step 301, obtaining the timing information of each time slot from TS0 to TS6:

Specifically, the timing information of each time slot from TS0 to TS6 can be obtained through a channel impulse response (CIR, Channel Impulse Response), which can be obtained according to the following steps:

First, extract the midamble data of the corresponding time slot;

Then, perform channel estimation to obtain a channel impulse response;

Finally, interpolation is performed near the peak position of the channel impulse response to obtain a peak position with 1/8 chip precision, which is the calculated timing position information with 1/8 chip precision.

Step 302. According to the obtained timing information of each time slot, respectively calculate the timing synchronization deviations of TS2 to TS6 relative to TS0;

Step 303, respectively comparing the timing synchronization deviations of TS2 to TS6 with the decision threshold: if there is a time slot greater than the decision threshold, continue to step 304, otherwise go to step 305;

Step 304, determine the time slot that is greater than the decision threshold and has the largest time slot number, then TS2 to this time slot are all uplink time slots, and this time slot to TS6 are all downlink time slots;

Step 305, if there is no time slot greater than the decision threshold, then only TS1 is an uplink time slot, and the remaining TS2 to TS6 are all downlink time slots.

Among them, in the above steps 303 to 305, if the calculated timing position has a certain amount of time advance relative to the standard position of the downlink frame timing as a reference, then the time slot is uplink, so TS2 to this time slot are all uplink time slots. If there is no time advance or basically the same, the time slot is downlink, so TS2 to TS6 are all downlink time slots. Considering the possible impact of measurement errors, a certain amount of time advance is taken as the decision threshold, and the decision threshold can be obtained from simulation or field tests. The larger the judgment threshold, the more reliable the judgment result, but the farther the propagation distance between the detection point (such as the position of the repeater) and the base station is required. Generally, the judgment threshold can be set as 3/8chip. In the TD-SCDMA system, 1/8chip corresponds to a propagation distance of 29.3m, and 3/8chip corresponds to a propagation distance of 87.9m.

In addition, according to the determination result of the uplink and downlink directions of the above time slots, it can be concluded that the second conversion point is between the uplink time slot with the largest time slot number and the downlink time slot with the smallest time slot number. If there is a time slot without a signal between the uplink time slot of the largest time slot number and the downlink time slot of the smallest time slot number judged, it is assumed that the downlink time slot has no influence on the performance of the repeater, so the present invention assumes All time slots after the uplink time slot with the largest time slot number to TS6 are downlink time slots.

The architecture of the repeater adopting the judging method of the present invention is as shown in Figure 4, including:

Control unit (CU, Control Unit) 401 is the core component of the repeater, and the uplink and downlink direction judgment of the time slot of the present invention is mainly realized in the control unit of the repeater; the control unit can multiplex the donor antenna, or can Two-way signals are received using a separate detection antenna 405, which is assumed to be used in the figure.

and SPDT switches 402, denoted as SW1 and SW2 in the figure;

The unidirectional amplifying circuit 403 is represented as P1 and P2 in the figure.

After the control unit 401 detects the uplink and downlink directions of the time slot, it controls two switches 402 and two amplifying circuits 403 to complete bidirectional signal forwarding.

As shown in FIG. 5 , it is a schematic diagram of the internal main structure of the control unit 401 . The control unit 401 includes: a radio frequency receiver 501 , a baseband receiver 502 , a channel estimation unit 503 , a downlink synchronization unit 504 , a synchronization deviation calculation unit 505 , a direction determination unit 506 , and a control signal generation unit 507 .

Among them: firstly, the radio frequency receiver 501 down-converts the radio frequency signal received by the detection antenna 405 into an analog baseband signal, and converts it into a digital baseband signal via the baseband receiver 502; then, it is sent to the channel estimation unit 503 and the downlink synchronization unit 504 to obtain Downlink synchronization and maintenance of downlink synchronization with the base station; time slot synchronization deviation calculation unit 505 uses channel estimation and downlink synchronization results to calculate the synchronization deviation of each time slot, and judges the uplink and downlink propagation direction of each time slot through the direction judgment unit 506, and finally by The control signal generation unit 507 generates control signals to control the switches and amplifier circuits of the repeater to work.

The switch and amplifier circuit of the control repeater are working:

For the downlink signal, the switches SW1 and SW2 are both connected to the P1 side, and the repeater receives the downlink signal sent by the base station through the donor antenna 404, and sends it to the terminal by the retransmission antenna 406 after being amplified by P1;

For the uplink signal, both switches SW1 and SW2 are connected to the P2 side, and the repeater receives the uplink signal from the terminal through the retransmission antenna 406, and sends it to the base station by the donor antenna 404 after being amplified by P2.

Since these two switches are always activated simultaneously, the two SPDT switches can also be replaced by one DPDT switch.

In addition, the timing information of each time slot is obtained through the channel impulse response. Specifically, through the above-mentioned channel estimation unit 503, the midamble data of the corresponding time slot is extracted according to the digital baseband signal, and the channel estimation is performed to obtain the channel impulse response. The channel impulse response peak position is interpolated to obtain the peak position with 1/8 chip accuracy, so as to obtain the timing position information of the corresponding time slot.

In addition, the detection method of the present invention can also be applied to a TD-SCDMA terminal module, and then the terminal module can be used as a control unit in a TD-SCDMA repeater.

The detection method of the present invention can also be applied to other Time Division Duplex (TDD, Time Division Duplex) systems, such as the high chip rate option TD-CDMA system defined by the third generation mobile communication standard.

The embodiments of the present invention described above are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the claims of the present invention.

Claims (8)

1, a kind of detection method of TD-SCDMA system time gap up-downlink direction is characterized in that, comprises the steps:

Obtain the timing information of each time slot of TS0 to TS6;

Calculate the timing synchronism deviation of TS2 to TS6 respectively with respect to TS0;

Timing synchronism deviation and decision threshold with TS2 to TS6 compares respectively:

If there is time slot greater than decision threshold, then determine greater than decision threshold and have the time slot of maximum timeslot number, TS2 is ascending time slot to this time slot so, and the next time slot of this time slot is descending time slot to TS6;

If there is no greater than the time slot of decision threshold, then TS2 to TS6 is descending time slot.

2, the method for claim 1 is characterized in that: the timing information that obtains each time slot of TS0 to TS6 according to following steps:

Extract the intermediate code data of corresponding time slot;

Obtain channel impulse response by channel estimating;

Near the channel impulse response peak by interpolation obtaining the peak of 1/8 chip precision, thereby obtain the timing position of corresponding time slot.

3, the method for claim 1 is characterized in that: described decision threshold is the regular hour lead of determining according to actual environment.

4, method as claimed in claim 3 is characterized in that: described Timing Advance is 3/8 chip.

5, a kind of checkout gear of TD-SCDMA system time gap up-downlink direction is characterized in that, comprising:

Information process unit is used for obtaining from received signal the timing information of each time slot of TS0 to TS6;

The synchronism deviation computing unit is used for the timing information that utilization obtains and calculates the timing synchronism deviation of TS2 to TS6 with respect to TS0;

The direction judging unit is used for respectively synchronism deviation and the decision threshold of TS2 to TS6 are compared, and judges the up-downlink direction of each time slot:

If there is time slot greater than decision threshold, then determine greater than decision threshold and have the time slot of maximum timeslot number, TS2 is ascending time slot to this time slot so, and the next time slot of this time slot is descending time slot to TS6;

If there is no greater than the time slot of decision threshold, then TS2 to TS6 is descending time slot.

6, checkout gear as claimed in claim 5 is characterized in that, described information process unit further comprises:

Rf receiver unit is used for received RF signal and it is down-converted to analog baseband signal;

The base band receiving element is used for described analog baseband signal is converted to digital baseband signal, and delivers to channel estimating unit and down-going synchronous unit respectively;

Channel estimating unit, be used for extracting the intermediate code data of corresponding time slot according to digital baseband signal, carry out channel estimating and obtain channel impulse response, and near the channel impulse response peak by interpolation obtaining the peak of 1/8 chip precision, thereby obtain the timing information of corresponding time slot;

The down-going synchronous unit is used to obtain and keeps down-going synchronous with the base station.

7, checkout gear as claimed in claim 5 is characterized in that: described decision threshold is the regular hour lead of determining according to actual environment.

8, checkout gear as claimed in claim 7 is characterized in that: described Timing Advance is 3/8 chip.

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