CN100550656C - Channel decoding method, device and low-density parity code transcoder - Google Patents

Abstract

Disclose channel decoding method, device and low-density parity code transcoder, belonged to the encoding and decoding technique field.Described channel decoding method comprises: the initializing variable node, carry out check-node according to the initialization result of described variable node and upgrade processing, carry out described variable node and upgrade processing according to described check-node renewal result, correction function, described correction function is: φ (x)=log (e ^x+ n)/(e ^x-1), wherein :-1＜n＜1; Upgrade result according to the initialization result of described variable node, described variable node and decipher processing.For existing SPA decoding, the present invention can avoid the interchannel noise variance to estimate inaccurate influence to the SPA decoding performance under the situation that does not increase the decoding operand to a certain extent, thereby has improved the stability of decoding performance.

Description

Channel decoding method, device and low-density parity code transcoder

Technical field

The present invention relates to the network communications technology field, be specifically related to channel decoding method, device and low-density parity code transcoder.

Background technology

The interpretation method that LDPC (Low Density Parity Check, low density parity check code) decoder adopts comprises: SPA (Sum Product Algorithm, sum-product algorithm).SPA also can be called log-domain SPA.

Utilize Tanner figure expression, the SPA decode procedure is as follows:

At first, carry out initialization process, promptly calculate the posteriority log-likelihood ratio of each variable node:

$L\left(q_{\mathrm{ij}}\right)=\log \frac{{(1+e^{-2y_i/{\mathrm{\σ}}^2})}^{-1}}{{(1+e^{2y_i/{\mathrm{\σ}}^2})}^{-1}}\≈{2y}_i/{\mathrm{\σ}}^2=L\left(c_i\right);$

Wherein: i represents i variable node, and j represents j branch of this variable node, q _IjThe probability of expression variable node, L represents to ask log-likelihood ratio, c _iThe expression initial information.

Then, check-node upgrades processing, and promptly variable node carries out iterative process:

$L\left(q_{\mathrm{ij}}\right)=\log \left(\frac{1-P_i}{P_i}\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Π}}\frac{r_{j^{\′}i}\left(0\right)}{r_{j^{\′}i\left(1\right)}}\right)=L\left(c_i\right)+\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Σ}}L\left(r_{j^{\′}i}\right);$

Wherein: C _i={ j:h _Ji=1}, the expression check matrix is in the set of the position of the row at i column element 1 place; In Tanner figure expression, be that all come C _iThe set on the complete verification node limit of variable node; C _iJ={j ': h _{J ' i}=1} j}, the expression check matrix is in the set of the row at i column element 1 place other the capable position except j is capable;

Secondly, variable node upgrades processing, and promptly check-node carries out iterative process:

$L\left(r_{\mathrm{ji}}\right)=\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Π}}{\mathrm{\α}}_{i^{\′}j}\right)\mathrm{\φ}\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Σ}}\mathrm{\φ}\left({\mathrm{\β}}_{i^{\′}j}\right)\right);$

Wherein: R _j={ i:h _Ji=1}, the expression check matrix is in the set of the position of j row element 1 column; In Tanner figure expression, be that all come Q _iThe set on whole variable nodes limit of check-node; R _jI={i ': h _{Ji '}=1} { i}, the expression check matrix is at the set of the position of the row at j row element 1 place other row except the i row, wherein correction function $\mathrm{\φ}\left(x\right)=-\log \tanh \left(\frac{1}{2}x\right)=\log \frac{e^x+1}{e^x-1},$ α _i′j＝sign(L(q _i′j))，β _i′j＝|L(q _i′j)|；

At last, carry out trial and error decoding: $L\left(Q_i\right)=L\left(c_i\right)+\underset{j\∈C_i}{\mathrm{\Σ}}L\left(r_{\mathrm{ji}}\right);$

If L is (Q _i)＜0, then c _i=1, otherwise c _iBe 0.

After decoding is finished, judge that check matrix verification decoding code word is whether correct or whether reach maximum iteration time, determine whether withdrawing from iterative process and output decoding code word according to judged result.

In realizing process of the present invention, the inventor finds above-mentioned prior art, and there are the following problems at least:

In the ideal case, SPA can obtain optimum decoding performance, but, in actual applications, SPA need face the problem that the interchannel noise variance estimates that accuracy is brought, and that is to say, estimate that accurately the interchannel noise variance need spend bigger cost, and the interchannel noise variance is estimated to be forbidden, and can have a strong impact on the SPA decoding performance, i.e. the poor stability of SPA decoding performance.

Summary of the invention

Embodiment of the present invention provides a kind of channel decoding method, device and ldpc decoder, for existing SPA decoding, can be under the situation that does not increase the decoding operand, avoid the interchannel noise variance to estimate inaccurate influence to a certain extent, thereby improved the stability of decoding performance the SPA decoding performance.

A kind of channel decoding method that embodiment of the present invention provides, described method comprises:

The initializing variable node;

Carry out check-node according to the initialization result of described variable node and upgrade processing;

Upgrade result, correction function according to described check-node $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out described variable node and upgrade processing, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Upgrade result according to the initialization result of described variable node, described variable node and decipher processing.

Embodiment of the present invention also provides a kind of channel code translator, and described device comprises:

First module is used for the initializing variable node, and the output initialization result;

Second module is used for carrying out the iterative processing of described variable node according to the initialization result of described first module output, and output iterative processing result;

Three module is used for iterative processing result, correction function according to the variable node of described second module output $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out the iterative processing of check-node, and output iterative processing result, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Four module is used for deciphering processing according to the iterative processing result of the initialization result of described first module output, the output of described three module, and the output decode results.

Embodiment of the present invention also provides a kind of low-density parity code transcoder, comprises channel code translator, and described channel code translator comprises:

First module is used for the initializing variable node, and the output initialization result;

Second module is used for carrying out the iterative processing of described variable node according to the initialization result of described first module output, and output iterative processing result;

Three module is used for iterative processing result, correction function according to the variable node of described second module output $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out the iterative processing of check-node, and output iterative processing result, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Four module is used for deciphering processing according to the iterative processing result of the initialization result of described first module output, the output of described three module, and the output decode results.

Description by technique scheme as can be known, embodiment of the present invention is improved correction function, for existing SPA decoding, the channel decoding technical scheme that embodiment of the present invention is improved correction function does not increase the decoding operand, therefore, the channel decoding technical scheme of embodiment of the present invention does not have special requirement to the software and hardware applied environment; Estimate under the inaccurate situation influence that the improved correction function of embodiment of the present invention can avoid the interchannel noise variance to bring for the SPA decoding performance to a certain extent in the interchannel noise variance; Thereby can improve decoding performance stability deciphering under the equal applied environment with existing SPA by technical scheme provided by the invention.

Description of drawings

Fig. 1 is that the fair curve of correction function compares schematic diagram;

Fig. 2 is a relatively schematic diagram one of decoding performance;

Fig. 3 is a relatively schematic diagram two of decoding performance;

Fig. 4 is a relatively schematic diagram of convergence rate.

Embodiment

The channel decoding method that embodiment of the present invention is provided describes below.

At first, need carry out initialization process to variable node, the initialization process process can be for calculating the posteriority log-likelihood ratio of each variable node.For example, can adopt formula (1) to carry out the initialization process process of variable node:

$L\left(q_{\mathrm{ij}}\right)=\log \frac{{(1+e^{-2y_i/{\mathrm{\σ}}^2})}^{-1}}{{(1+e^{2y_i/{\mathrm{\σ}}^2})}^{-1}}\≈{2y}_i/{\mathrm{\σ}}^2=L\left(c_i\right)$ Formula (1)

Wherein: i represents i variable node, and j represents j branch of this variable node, q _IjThe probability of expression variable node, L represents to ask log-likelihood ratio, c _iThe expression initial information.

After having carried out the variable node initialization process, embodiment of the present invention need be utilized the initialization result of above-mentioned variable node to carry out the check-node renewal and handle.For example, can adopt formula (2) to carry out check-node and upgrade processing procedure:

$L\left(q_{\mathrm{ij}}\right)=\log \left(\frac{1-P_i}{P_i}\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Π}}\frac{r_{j^{\′}i}\left(0\right)}{r_{j^{\′}i\left(1\right)}}\right)=L\left(c_i\right)+\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Σ}}L\left(r_{j^{\′}i}\right);$ Formula (2)

Wherein: i represents i variable node, and j represents j branch of this variable node, r _{J ' i}Expression check-node probability, P _iThe expression probability, L (q _Ij) expression variable node probability log-likelihood ratio, c _iThe expression initial information.

After having carried out check-node renewal processing, embodiment of the present invention need be utilized above-mentioned check-node renewal result to carry out the variable node renewal and handle.For example, can adopt formula (3) to carry out variable node and upgrade processing procedure:

$L\left(r_{\mathrm{ji}}\right)=\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Π}}{\mathrm{\α}}_{i^{\′}j}\right)\mathrm{\φ}\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Σ}}\mathrm{\φ}\left({\mathrm{\β}}_{i^{\′}j}\right)\right)$ Formula (3)

Wherein: α _{I ' j}=sign (L (q _{I ' j})), β _{I ' j}=| L (q _{I ' j}) |, $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1},$ X is the absolute value of variable node branch, and the value of n can be between-1 to 1, as when the n=0, $\mathrm{\φ}\left(x\right)=\log \frac{e^x}{e^x-1}.$

After having carried out variable node renewal processing, embodiment of the present invention need utilize the initialization result of above-mentioned variable node and variable node renewal result to decipher processing.For example, can utilize formula (4) to realize decoding treatment process, promptly utilize formula (4) to calculate earlier:

$L\left(Q_i\right)=L\left(c_i\right)+\underset{j\∈C_i}{\mathrm{\Σ}}L\left(r_{\mathrm{ji}}\right)$ Formula (4)

Then, judge L (Q _i) result of calculation, if L (Q _i)＜0, then c _i=1, otherwise, c _i=0.(c _iRepresent final hard decision result).After decoding is finished, utilize check matrix to come verification decoding code word whether correct and judge whether to reach maximum iteration time, if verification decoding code word correctly or reaches maximum iteration time, then iterative process is withdrawed from decision, and exports above-mentioned decoding code word; If verification decoding code word is incorrect and also do not reach maximum iteration time, then can proceed iterative process, till withdrawing from iterative process and output decoding code word.

As can be seen, it is the different correction function of existing SPA that embodiment of the present invention has adopted with the SPA of classics from the description of above-mentioned execution mode, and the change of this correction function does not bring the variation of operand.When n=0, the channel decoding method of embodiment of the present invention can be called the SPA of simplification.When n=0, the fair curve schematic diagram of the correction function of the SPA of correction function in the embodiment of the present invention and classics as shown in Figure 1.As can be seen from Figure 1, the difference of the fair curve of two correction functions is very little.

To get with n below 0 be example, by concrete experimental data, in conjunction with the accompanying drawings the channel decoding performance of embodiment of the present invention is described.

The setting simulated conditions is the floating-point emulation under the awgn channel, adopting the LDPC sign indicating number and the code length of DVB-S standard code is 64800, code check is 0.9, and maximum iteration time is 50 times, then the decoding performance of embodiment of the present invention and classical SPA decoding performance more as shown in Figure 2.

The setting simulated conditions is the floating-point emulation under the awgn channel, adopting the LDPC sign indicating number and the code length of DVB-S standard code is 64800, code check is 0.5, and maximum iteration time is 50 times, then the decoding performance of embodiment of the present invention and classical SPA decoding performance more as shown in Figure 3.

In Fig. 2, Fig. 3, there is the line segment of triangle sign to represent the SPA decoding performance that embodiment of the present invention is simplified, there is the line segment of circular sign to represent classical SPA decoding performance.

Among Fig. 2, if according to line segment the ascending order of the distance of an end of close horizontal axis and horizontal axis with line segment called after the 1st line segment among Fig. 2, the 2nd line segment ..., the 7th line segment, then under the situation that the accurate SNR of channel can learn, classical SPA decoding performance is shown in the 2nd line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 3rd line segment; Lack than accurate SNR under the situation of 1dB at the estimation SNR of channel, classical SPA decoding performance is shown in the 5th line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 4th line segment; The estimation SNR of channel manyed the situation of 1dB than accurate SNR under, classical SPA decoding performance was shown in the 6th line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 7th line segment.The decoding performance that the 1st line segment among Fig. 2 represents to adopt existing Min-sum (minimum and) algorithm to decipher.

Among Fig. 3, if according to line segment the ascending order of the distance of an end of close horizontal axis and horizontal axis with line segment called after the 1st line segment among Fig. 3, the 2nd line segment ..., the 7th line segment, then under the situation that the accurate SNR of channel can learn, classical SPA decoding performance is shown in the 1st line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 2nd line segment; Lack than accurate SNR under the situation of 1dB at the estimation SNR of channel, classical SPA decoding performance is shown in the 3rd line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 5th line segment; The estimation SNR of channel manyed the situation of 1dB than accurate SNR under, classical SPA decoding performance was shown in the 7th line segment, and the SPA decoding performance of the simplification of embodiment of the present invention is shown in the 6th line segment.The 4th line segment among Fig. 3 is represented the decoding performance that adopts existing Min-sum algorithm to decipher.

From Fig. 2, Fig. 3 as can be seen, under the situation that the accurate SNR of channel can learn and under the situation of the estimation SNR of channel than the high 1dB of accurate SNR, the SPA decoding performance of the simplification of embodiment of the present invention is lower than classical SPA decoding performance, but, be lower than under the situation of accurate SNR1dB at the estimation SNR of channel, the SPA decoding performance of the simplification of embodiment of the present invention is higher than classical SPA decoding performance.Therefore, in actual applications, can make as far as possible and estimate that SNR is lower than accurate SNR, thereby make decoding system have decoding performance as well as possible, and can effectively avoid the fluctuation of decoding performance, to improve the stability of decoding performance.And the decoding performance of embodiment of the present invention is better than the decoding performance that adopts Min-sum (minimum and) algorithm to decipher.The Min-sum algorithm is linearisation fully on the basis of SPA, though the anti-interchannel noise variance of Min-sum algorithm interference performance is very strong, does not need to carry out the interchannel noise variance and estimates, decoding performance stability is strong,, the information of loss is more.With respect to the SPA and the Min-sum algorithm of classics, the SPA of the simplification of embodiment of the present invention is the SPA of classics and the compromise algorithm of Min-sum algorithm.That is to say that the channel decoding technical scheme of embodiment of the present invention is firm certain decoding performance and certain decoding stability simultaneously, and is with respect to the SPA of classics, lower to the susceptibility of interchannel noise estimate of variance error.

At the LDPC sign indicating number that adopts the DVB-S prescribed by standard, code length is 64800, and code check is that the convergence rate of the classical SPA and the SPA of simplification as shown in Figure 4 under 0.5 the situation.

Among Fig. 4, the curve that is designated xu is promptly represented the iterations of the SPA that simplifies, and the curve that is designated SPA is promptly represented the iterations of classical SPA.

As can be seen from Figure 4, the SPA of simplification is very little with the classical difference of SPA on convergence rate, and promptly the SPA of Jian Huaing is consistent substantially with the convergence rate of the SPA of classics.Under the condition of identical iterations, both BER performances differ also very little.

As can be seen from the above experimental data, the SPA decoding technique scheme of the simplification that embodiment of the present invention provides is basic identical with the decoding performance of the SPA of classics on overall decoding performance, convergence rate in the SPA decode procedure of simplifying and the convergence rate in the classical SPA decode procedure also are consistent substantially, but, on decoding performance stability, the SPA decoding stability of simplifying is higher than classical SPA decoding stability, and promptly the SPA of Jian Huaing has the stability of stronger anti-SNR evaluated error.Therefore, the SPA of simplification decoding has good actual application and is worth, and promptly has the important engineering more practical value.The SPA that simplifies is the important supplement of the SPA algorithm of classics.

The channel code translator that embodiment of the present invention is provided describes below.

The channel code translator that embodiment of the present invention provides comprises: first module, second module, three module, four module.This channel code translator can be arranged in the ldpc decoder, also can be arranged in other decoding equipment, so long as the channel code translator that the decoding equipment of decoded operation all can use embodiment of the present invention to provide need be provided.

First module is used for the initializing variable node, and the output initialization result.First module is carried out initialized process to variable node can be the process of the posteriority log-likelihood ratio that calculates each variable node.For example, first module can adopt formula (1) to carry out the initialization process process of variable node:

$L\left(q_{\mathrm{ij}}\right)=\log \frac{{(1+e^{-2y_i/{\mathrm{\σ}}^2})}^{-1}}{{(1+e^{2y_i/{\mathrm{\σ}}^2})}^{-1}}\≈{2y}_i/{\mathrm{\σ}}^2=L\left(c_i\right)$ Formula (1)

Wherein: i represents i variable node, and j represents j branch of this variable node, q _IjThe probability of expression variable node, L represents to ask log-likelihood ratio, c _iThe expression initial information.

Second module is used for carrying out the iterative processing of variable node according to the initialization result of first module output, and output iterative processing result, that is to say, the initialization result of the variable node of second module, first module output is carried out check-node and upgraded processing.For example, second module can adopt formula (2) to carry out check-node renewal processing procedure:

$L\left(q_{\mathrm{ij}}\right)=\log \left(\frac{1-P_i}{P_i}\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Π}}\frac{r_{j^{\′}i}\left(0\right)}{r_{j^{\′}i\left(1\right)}}\right)=L\left(c_i\right)+\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Σ}}L\left(r_{j^{\′}i}\right);$

Wherein: i represents i variable node, and j represents j branch of this variable node, r _{J ' i}Expression check-node probability, P _iThe expression probability, L (q _Ij) expression variable node probability log-likelihood ratio, c _iThe expression initial information.

Three module is used for iterative processing result, the correction function according to the variable node of second module output $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out the iterative processing of check-node, and output iterative processing result, wherein: x is the absolute value of variable node branch ,-1＜n＜1.For example, three module can adopt formula (3) to carry out variable node renewal processing procedure:

$L\left(r_{\mathrm{ji}}\right)=\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Π}}{\mathrm{\α}}_{i^{\′}j}\right)\mathrm{\φ}\left(\underset{i^{\′}\∈R_j\backslash i}{\mathrm{\Σ}}\mathrm{\φ}\left({\mathrm{\β}}_{i^{\′}j}\right)\right)$ Formula (3)

Wherein: α _{I ' j}=sign (L (q _{I ' j})), β _{I ' j}=| L (q _{I ' j}) |, $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1},$ X is the absolute value of variable node branch, and the value of n can be between-1 to 1, as when the n=0, $\mathrm{\φ}\left(x\right)=\log \frac{e^x}{e^x-1}.$

Four module is used for deciphering processing according to the iterative processing result of the initialization result of first module output, three module output, and the output decode results.For example, four module can utilize formula (4) to realize decoding treatment process, and promptly four module utilizes formula (4) to calculate earlier:

$L\left(Q_i\right)=L\left(c_i\right)+\underset{j\∈C_i}{\mathrm{\Σ}}L\left(r_{\mathrm{ji}}\right)$ Formula (4)

Then, judge L (Q _i) result of calculation, if L (Q _i)＜0, then four module is provided with c _i=1, otherwise four module is provided with c _i=0.(c _iRepresent final hard decision result).Then, whether four module utilizes check matrix to come verification decoding code word correct and judge whether to reach maximum iteration time, if verification decoding code word correctly or reaches maximum iteration time, then iterative process is withdrawed from the four module decision, and exports above-mentioned decoding code word; If verification decoding code word is incorrect and also do not reach maximum iteration time, then four module can notify second module to proceed iterative process, till iterative process and output decoding code word are withdrawed from the four module decision.The iterations here can be added up by second module, also can be added up by three module, can also be added up by four module, and the maximum iteration time here can be stored in the four module, also can be stored in second module or the three module.

The ldpc decoder that embodiment of the present invention is provided describes below.

Be provided with the channel code translator of describing in the above-mentioned execution mode in the ldpc decoder that embodiment of the present invention provides, promptly be provided with the channel code translator that comprises first module, second module, three module and four module in the ldpc decoder.Operation that each module is carried out such as the description in the above-mentioned execution mode are in this no longer repeat specification.

Though described the present invention by embodiment, those of ordinary skills know, the present invention has many distortion and variation and do not break away from spirit of the present invention, and the claim of application documents of the present invention comprises these distortion and variation.

Claims (10)

1, a kind of channel decoding method is characterized in that, described method comprises:

The initializing variable node;

Carry out check-node according to the initialization result of described variable node and upgrade processing;

Upgrade result, correction function according to described check-node $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out described variable node and upgrade processing, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Upgrade result according to the initialization result of described variable node, described variable node and decipher processing.

2, the method for claim 1 is characterized in that, described initializing variable node comprises:

Calculate the posteriority log-likelihood ratio of each variable node.

3, the method for claim 1 is characterized in that, described initialization result according to described variable node is carried out check-node renewal processing and comprised:

According to $L\left(q_{\mathrm{ij}}\right)=\log \left(\frac{1-P_i}{P_i}\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Π}}\frac{r_{j^{\′}i}\left(0\right)}{r_{j^{\′}i}\left(1\right)}\right)=L\left(c_i\right)+\underset{j^{\′}\∈C_i\backslash j}{\mathrm{\Σ}}L\left(r_{j^{\′}i}\right)$ Carry out check-node and upgrade processing;

Wherein: i represents i variable node, and j represents j branch of variable node, r _{J ' i}Expression check-node probability, P _iThe expression probability, L (q _Ij) expression variable node probability log-likelihood ratio, c _iThe expression initial information.

4, the method for claim 1 is characterized in that, describedly upgrades result, correction function according to described check-node and carries out described variable node and upgrade to handle and comprise:

According to Carry out described variable node and upgrade processing;

Described α _{I ' j}=sign (L (q _{I ' j})), described β _{I ' j}=| L (q _{I ' j}) |.

5, as the described method of arbitrary claim in the claim 1 to 4, it is characterized in that described correction function is: $\mathrm{\φ}\left(x\right)=\log \frac{e^x}{e^x-1}.$

As the described method of arbitrary claim in the claim 1 to 4, it is characterized in that 6, described initialization result according to described variable node, described variable node renewal result are deciphered to handle and comprised:

Calculate $L\left(Q_i\right)=L\left(c_i\right)+\underset{j\∈C_i}{\mathrm{\Σ}}L\left(r_{\mathrm{ji}}\right);$

At L (Q _i)＜0 o'clock, c _i=1, otherwise, c _iBe 0; c _iRepresent final hard decision result;

According to check matrix verification decoding code word whether correctly or whether reach maximum iteration time and determine whether withdrawing from iteration and output decoding code word.

7, a kind of channel code translator is characterized in that, described device comprises:

First module is used for the initializing variable node, and the output initialization result;

Second module is used for carrying out the iterative processing of described variable node according to the initialization result of described first module output, and output iterative processing result;

Three module is used for iterative processing result, correction function according to the variable node of described second module output $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out the iterative processing of check-node, and output iterative processing result, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Four module is used for deciphering processing according to the iterative processing result of the initialization result of described first module output, the output of described three module, and the output decode results.

8, device as claimed in claim 7 is characterized in that, described correction function is: $\mathrm{\φ}\left(x\right)=\log \frac{e^x}{e^x-1}.$

9, a kind of low-density parity code transcoder is characterized in that, comprises channel code translator, and described channel code translator comprises:

First module is used for the initializing variable node, and the output initialization result;

Second module is used for carrying out the iterative processing of described variable node according to the initialization result of described first module output, and output iterative processing result;

Three module is used for iterative processing result, correction function according to the variable node of described second module output $\mathrm{\φ}\left(x\right)=\log \frac{e^x+n}{e^x-1}$ Carry out the iterative processing of check-node, and output iterative processing result, wherein: x is the absolute value of variable node branch ,-1＜n＜1;

Four module is used for deciphering processing according to the iterative processing result of the initialization result of described first module output, the output of described three module, and the output decode results.

10, the described low-density parity code transcoder of claim 9 is characterized in that, correction function is: $\mathrm{\φ}\left(x\right)=\log \frac{e^x}{e^x-1}.$

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