CN100542153C - Modulation and demodulation system, modulator, demodulator and phase modulated and demodulation method - Google Patents

Abstract

The invention provides the modulation and demodulation system that can minimize the bit error rate in the six phase phase modulating methods.Is that modulator is changed binary signal before by the modulator phase modulated of first embodiment and the senary signal of output by reception of destination demodulator and phase demodulating.Modulator will be as senary signal (b _i, t _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.The senary signal that demodulator for example sends by storage also is converted to the binary signal of length b so that export them with each senary signal sequence of length m, carries out the conversion process from the senary signal to binary signal.The processing of demodulator will be as senary signal (b _i, t _i) first to the 6th phase place distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0).

Description

Modulation and demodulation system, modulator, demodulator and phase modulated and demodulation method

Technical field

The present invention relates to modulation and demodulation system, modulator, demodulator and be used for its phase modulating method and phase demodulating method; More specifically, relate to the minimized coding of bit error that is used for making the every symbol error of following modulation and demodulation method, described modulation and demodulation method is at the predetermined integers value N except 2 underworld, send the binary signal of predetermined length b accordingly with the senary phase signal of predetermined length m, and relates to and be used for making the minimized coding of bit error of the every symbol error of modulation and demodulation method that sends the binary signal of length " 5 " at the senary phase signal with length " 2 " accordingly.

Background technology

Traditionally, 2 ⁿPhase modulated is used in two-phase phase modulated (binary phase shift keying: BPSK), four phase phase modulated (Quadrature Phase Shift Keying: QPSK), in the eight phase phase modulated etc., especially in the digital phase modulation situation that is used for digital microwave telecommunication, satellite communication, mobile communication etc. under n is the situation of positive integer.

For digital microwave telecommunication, satellite communication, mobile communication etc., for circuit reduction and with the conforming reason of binary signal, 2 ⁿPhase modulated is used in two-phase phase modulated, four phase phase modulated, the eight phase phase modulated etc. under n is the situation of positive integer.

In order to satisfy the requirement that effectively utilizes through-put power and frequency, 2 ⁿPhase modulating method (for example is often used as modulation technique, with reference to " Modulation and Demodulation of Digital WirelessCommunication " (Yoichi Saito, Institute of Electronics, Information andCommunication Engineers, in February, 1996)).For these modulator approaches, the coding that is known as Gray code by use can make the bit error of every symbol error minimize.

Because the realization difficulty that complicated circuit causes is alleviated gradually by the progress in integrated circuit technique in recent years.In addition, the requirement that effectively utilizes frequency and through-put power is just being become stronger.

For number of phases is not 2 ⁿThe phase shift keying technology, to three-phase, five phases, six mutually with seven mutually the structure of phase shift keying modulation (for example carried out proposition research, with reference to S.Noda, " the Performance and application of PSK modulation whose number ofphases is not a power of 2 " of K.Nakamura and K.Koga, Proceeding of ISITA ' 02, Xi'an, the 239th to 242 page, in October, 2002).Under the situation of three-phase phase modulation, to its building method (for example, with reference to Japanese Patent Laid Open Publication No.53-147454,2003-060721,2003-110644) and (for example be used to make the minimized coding method of bit error, with reference to Japanese Patent Laid Open Publication No.2004-129013 and S.Noda, " the Performance and application of PSK modulation whose number of phases isnot a power of 2 " of K.Nakamura and K.Koga, Proceeding of ISITA ' 02, Xi'an, the the 239th to 242 page, in October, 2002) disclose.Also the technology of the error correction coding that relates to six phase phase modulated has been carried out open (for example, with reference to Japanese Patent Laid Open Publication No.2003-204365 and 2003-204316).

In addition, modulate about three-phase phase, to building method (for example, with reference to Japanese Patent Laid Open Publication No.53-147454,2003-060721,2003-110644) and (for example be used to make the minimized coding method of bit error, with reference to Japanese Patent Laid Open Publication No.2004-129013 and S.Noda, " the Performance and application of PSKmodulation whose number of phases is not a power of 2 " of K.Nakamura and K.Koga, Proceeding ofISITA ' 02, Xi'an, the the 239th to 242 page, in October, 2002) disclose.Its applicant has also made subject study to the coding method of the error rate that is used to improve six phase phase modulated.

For this reason, for example 2 ⁿUnder the situation of n=2, it is four phase phase modulated in the phase modulated.For the bit error that makes every symbol error minimizes,, therefore need be used to make the minimized coding of Hamming distance between the adjacent signaling point in view of mistake under the thermal noise environment mainly occurs in the adjacent signaling point place.In order to satisfy this requirement, Gray code is known.

But, Gray code is being applied under the situation of six phase phase modulated the problem that exists the bit error in every symbol error not to be minimized.This is because when the physics mistake occurred between the adjacent signaling point, the Hamming distance between the signaling point of symbol depended on other symbols of related symbol.As a result, there is the problem that the six phase phase modulated of encoding such as the tradition of Gray code have inferior error rate characteristic of using.For six phase phase modulated, do not illustrate the minimized coding method of bit error that is used to make every symbol error as yet.

Therefore, an object of the present invention is to provide can head it off and make the minimized modulation and demodulation of bit error rate system, modulator, the demodulator in the six phase phase modulating methods and be used for its phase modulating method and phase demodulating method.

Another object of the present invention provides modulation and demodulation system, modulator, the demodulator that can simplify the circuit structure in the six phase phase modulating methods and is used for its phase modulating method and phase demodulating method.

Summary of the invention

According to modulation and demodulation of the present invention system is a kind of like this modulation and demodulation systems, the phase shift keying demodulation that it is used to realize the phase shift keying modulation of senary transmission binary signal and restores binary signal, wherein:

Modulator has the DTU (Data Transfer unit) that is used for the binary signal of length b is converted to the senary signal of length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase place to be expressed as (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

According to another kind of modulation and demodulation of the present invention system is a kind of like this modulation and demodulation systems, the phase shift keying demodulation that it is used to realize the phase shift keying modulation of senary transmission binary signal and restores binary signal, wherein:

It is the DTU (Data Transfer unit) of the binary signal of length b that demodulator has the senary conversion of signals that is used for length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being represented as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

Modulator according to the present invention is a kind of like this modulator, and it is used for the binary signal phase modulated is the senary signal and exports this signal, comprising:

Be used for the binary signal of length b is converted to the DTU (Data Transfer unit) of the senary signal of length m; Wherein:

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

First to the 6th phase place is expressed as by using binary signal B and ternary signal T that (B T), and is respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

Demodulator according to the present invention is a kind of like this demodulator, and it is used to receive by the senary signal of phase modulated and with its phase demodulating and is the binary signal before being changed by modulator, wherein:

It is the DTU (Data Transfer unit) of the binary signal of length b that described demodulator has the senary conversion of signals that is used for length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being expressed as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

Phase modulating method according to the present invention is a kind of phase modulating method that is used for the modulation and demodulation system, the phase shift keying demodulation that described modulation and demodulation system is used to realize the phase shift keying modulation of senary transmission binary signal and restores binary signal, wherein:

Modulator is carried out the data conversion treatment that the binary signal of length b is converted to the senary signal of length m;

Described data conversion treatment comprises the conversion process that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase meter to be shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

Phase demodulating method according to the present invention is a kind of phase demodulating method that is used for the modulation and demodulation system, the phase shift keying demodulation that described modulation and demodulation system is used to realize the phase shift keying modulation of senary transmission binary signal and restores binary signal, wherein:

It is the data conversion treatment of the binary signal of length b that demodulator is carried out the senary conversion of signals that is used for length m;

Described data conversion treatment comprises the conversion process that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being represented as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

Another kind of phase modulating method according to the present invention is a kind of like this phase modulating method, and it is used at b as integer and m as approximating and greater than b/log ₂Under the situation of 6 integer, the binary signal of length b is converted to the senary signal of length m and sends binary signal accordingly with the senary phase signal, wherein:

Be used for the data conversion treatment that binary signal with length b is converted to the senary signal of length m and comprise the processing that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase meter to be shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

More specifically, be a kind of like this modulation and demodulation systems according to modulation and demodulation of the present invention system, it is used at b as integer and m as approximating and greater than b/log ₂Under the situation of 6 integer, the binary signal of length b is converted to the senary signal of length m and sends binary signal accordingly with the senary phase signal, wherein:

Be used for the ternary signal that data transaction part that binary signal with length b is converted to the senary signal of length m is converted to the binary signal of length b-m length m; And

Use binary signal B and ternary signal T first to the 6th phase meter to be shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

When the binary signal with length b-m is converted to the ternary signal of length m, its binary signal with length b-m is associated with the ternary signal of length m, reducing the average error rate of every bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake, thereby the binary signal of length b is converted to the senary signal of length m.

When at b=5, when under the situation of m=2 the binary signal of length b-m being converted to the ternary signal of length m, the data transaction part is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following four set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1)),

((0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1)),

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,0)) and

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0)).

In addition, be used for the binary signal of length 3 being converted to the data transaction part of ternary signal of length 2 with binary signal (v2, the v1 of length 3 according to the transformation rule of these four set, v0) [(v2, v1 v0) are (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1,1) one of] adds binary signal (b2, the b1 of length 3 respectively to, b0), with will be as (b2+v2, b1+v1, b0+v0) each Bit Allocation in Discrete of (operator+expression XOR) is given the ternary signal ((0,0) of length 2, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), so that the binary signal of length 3 is converted to the ternary signal of length 2.

In addition, for according to the transformation rule of these four set transformation rule between the binary signal of the ternary signal of length 2 and length 3, described data transaction part is for 32 set replacement binary signal (b2 that will above-mentioned four set be transformed into the ternary signal of length 2 from the binary signal of length 3, b1, each bit b0) is with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b1, b2) and (each Bit Allocation in Discrete b1) is given the ternary signal ((0 of length 2 for b0, b2,0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), thereby the binary signal of length 3 is converted to the ternary signal of length 2.

In six phase phase modulated, be used for the data transaction that binary signal with length b is converted to the senary signal of length m and partly comprise the device that is used for the binary signal of length b-m is converted to the ternary signal of length m, and use binary signal B and ternary signal T that first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0), so that between (0,2) and (1,2) and (1,0) and the Hamming distance between (0,0) be 1.So in six phase phase modulated, with (0,0), (0,1), (0,2), (1,0), it is littler that the situation of (1,1) and (1,2) is compared Hamming distance, therefore can reduce bit error rate.

Be used for the device that binary signal with length b-m is converted to the ternary signal of length m the binary signal of length b-m is associated with the ternary signal of length m, to reduce the average error rate of every bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake.Therefore, between (0,0) and (0,1), between (0,1) and (0,2), between (1,2) and (1,1) and the Hamming distance between (1,1) and (1,0) littler respectively, can reduce bit error rate thus.

According to modulation and demodulation of the present invention system is a kind of like this modulation and demodulation systems, it is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

The device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase place is expressed as (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of the described device that is used to carry out described data transaction by using length 3.

Modulator according to the present invention is a kind of modulator that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

The device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of the described device of carrying out described data transaction by using length 3.

Demodulator according to the present invention is a kind of demodulator that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

Be used for that the senary phase modulated signal is reversed the device that is changed to binary signal and comprise the conversion equipment that is used for the ternary signal of length 2 is converted to the binary signal of length 3;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Being used for that the senary phase modulated signal is reversed the device be changed to binary signal binary signal and the correspondence between the ternary signal of length 2 by using length 3 reverses the senary phase modulated signal and is changed to the binary signal of described modulator before changing.

Phase modulating method according to the present invention is a kind of phase modulating method that is used for the modulation and demodulation system, described modulation and demodulation system be used to that the destination demodulator is received and phase demodulating by the senary signal of modulator phase modulated and output, change binary signal before to become by described modulator, wherein:

Described modulator is carried out the data conversion treatment that the binary signal of length 5 is converted to the senary signal of length 2;

Described data conversion treatment comprises the conversion process that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of described data conversion treatment by using length 3.

Phase demodulating method according to the present invention is a kind of phase demodulating method that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

Described demodulator is carried out and is used for senary phase modulated signal inverse conversion is handled for the inverse conversion of the binary signal before being changed by described modulator;

Described inverse conversion is handled and is comprised the conversion process that is used for the ternary signal of length 2 is converted to the binary signal of length 3;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Correspondence between the binary signal of described inverse conversion processing use length 3 and the ternary signal of length 2 is changed to described modulator with the reverse of senary phase modulated signal and changes binary signal before.

More specifically, according to modulation and demodulation of the present invention system is a kind of like this modulation and demodulation systems, it is used to make modulator to carry out binary signal with length " 5 " to be converted to the data transaction of senary signal of length " 2 " so that signal is sent as the senary phase modulated signal, and be used to make demodulator to receive and this senary phase modulated signal of inverse conversion is changed binary signal before to become by described modulator, wherein: the device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length " 3 " is converted to the ternary signal of length " 2 "; Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); The ternary signal of length " 2 " is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length " 3 " is 1 with the ternary signal of length " 2 "; And binary signal and the correspondence ternary signal of length " 2 " between the senary signal that the binary signal of length " 5 " be converted to length " 2 " of the described device of carrying out described data transaction by using length " 3 ".

Modulator according to the present invention is a kind of modulator that is used for following system, described system is used to make modulator to carry out binary signal with length " 5 " to be converted to the data transaction of senary signal of length " 2 " so that signal is sent as the senary phase modulated signal, and be used to make demodulator to receive and this senary phase modulated signal of inverse conversion is changed binary signal before to become by described modulator, wherein: the device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length " 3 " is converted to the ternary signal of length " 2 "; Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); The ternary signal of length " 2 " is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length " 3 " is 1 with the ternary signal of length " 2 "; And the described device of carrying out described data transaction is converted to the binary signal of length " 5 " the senary signal of length " 2 " by using this correspondence.

Demodulator according to the present invention is a kind of demodulator that is used for following system, described system is used to make modulator to carry out binary signal with length " 5 " to be converted to the data transaction of senary signal of length " 2 " so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein: described demodulator is carried out and is used for the senary phase modulated signal is reversed the inverse conversion processing that is changed to binary signal; Described inverse conversion is handled and is comprised the conversion process that the ternary signal of length " 2 " is converted to the binary signal of length " 3 "; Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); The ternary signal of length " 2 " is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length " 3 " is 1 with the ternary signal of length " 2 "; And described inverse conversion is handled by using this correspondence that the senary phase modulated signal is reversed and is changed to conversion binary signal before.

Phase modulating method according to the present invention is a kind of phase modulating method that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length " 5 " to be converted to the data transaction of senary signal of length " 2 " so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein: described modulator is carried out the data conversion treatment that the binary signal of length " 5 " is converted to the senary signal of length " 2 "; Described data conversion treatment comprises the conversion process that is used for the binary signal of length " 3 " is converted to the ternary signal of length " 2 "; Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); The ternary signal of length " 2 " is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length " 3 " is 1 with the ternary signal of length " 2 "; And described data conversion treatment is converted to the binary signal of length " 5 " the senary signal of length " 2 " by using this correspondence.

Phase demodulating method according to the present invention is a kind of phase demodulating method that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length " 5 " to be converted to the data transaction of senary signal of length " 2 " so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein: described demodulator is carried out and is used for the senary phase modulated signal is reversed the inverse conversion processing that is changed to binary signal; Described inverse conversion is handled and is comprised the conversion process that is used for the ternary signal of length " 2 " is converted to the binary signal of length " 3 "; Use binary signal B and ternary signal T that first to the 6th phase meter is shown B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); The ternary signal of length " 2 " is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length " 3 " is 1 with the ternary signal of length " 2 "; And described inverse conversion is handled and is used this correspondence the senary phase modulated signal to be reversed the binary signal that is changed to before changing.

In conversion, the binary signal of length " 3 " is converted into the ternary signal of length " 2 " according to following transformation rule, with as the correspondence between the ternary signal of the binary signal of length " 3 " and length " 2 ", described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,2), (2,2), (2,1), (2,0) and (1,0)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

In addition, according to described transformation rule, described conversion equipment is with the binary signal (v2 of length 3, v1, v0) [(v2, v1, v0) be (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and one of (1,1,1)] add the binary signal (b2 of length 3 respectively to, b1, b0), with will be as (b2+v2, b1+v1, b0+v0) each Bit Allocation in Discrete of (operator+expression XOR) is given the ternary signal (0,0) of length 2, (0,1), (0,2), (1,2), (2,2), (2,1), (2,0) and (1,0), so that the binary signal of length 3 is converted to the ternary signal of length 2 or the ternary signal of length 2 is converted to the binary signal of length 3 according to described transformation rule.

In addition, according to described transformation rule, described conversion equipment is replaced binary signal (b2, b1, b0) each bit is with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b1 is b2) with (b0, b2, b1) each Bit Allocation in Discrete is given 16 set that are transformed into the ternary signal of length 2 by the binary signal from length 3, according to described transformation rule the binary signal of length 3 be converted to the ternary signal of length 2 or the ternary signal of length 2 be converted to the binary signal of length 3.

Therefore, modulation and demodulation of the present invention system can make bit error rate in the six phase phase modulating methods minimize and can simplify circuit structure in the six phase phase modulating methods.

Modulation and demodulation of the present invention system can have and makes six minimized effects of bit error rate in the phase modulating method mutually by having the structure that hereinafter will describe and operation.

Other modulation and demodulation systems of the present invention can have and simplify six effects of the circuit structure in the phase modulated mutually by having following structure and operation.

Description of drawings

Fig. 1 is the block diagram of structure that the modulation and demodulation system of first and second embodiment according to the present invention is shown;

Fig. 2 A to 2C is the diagrammatic sketch that illustrates according to the encoding process of first embodiment of the invention;

Fig. 3 be illustrated in according in the coding of first embodiment of the invention from the diagrammatic sketch of the Hamming distance of adjacent signaling point;

Fig. 4 illustrates according to first embodiment of the invention diagrammatic sketch from the Hamming distance of adjacent signaling point in Gray code;

Fig. 5 is the diagrammatic sketch that illustrates according to the comparison of the error rate characteristic of first embodiment of the invention;

Fig. 6 is the block diagram that the structure of the modulator of example according to the present invention is shown;

Fig. 7 is the block diagram that the structure of the demodulator of example according to the present invention is shown;

Fig. 8 is the flow chart that the operation of the modulator of example according to the present invention is shown;

Fig. 9 is the flow chart that the operation of the demodulator of example according to the present invention is shown;

Figure 10 A to 10C is the diagrammatic sketch that illustrates according to the encoding process of second embodiment of the invention;

Figure 11 A to 11D be illustrated in according in the coding of second embodiment of the invention from the diagrammatic sketch of the Hamming distance of adjacent signaling point;

Figure 12 A and 12B are the diagrammatic sketch that is illustrated in the coding of correlation technique from the Hamming distance of adjacent signaling point;

Figure 13 A and 13B illustrate according to second embodiment of the invention diagrammatic sketch from the Hamming distance of adjacent signaling point in Gray code; With

Figure 14 is the diagrammatic sketch that illustrates according to the comparison of the error rate characteristic of second embodiment of the invention.

Embodiment

Below, the first embodiment of the present invention is described with reference to the accompanying drawings.Fig. 1 is the block diagram that illustrates according to the structure of the modulation and demodulation system (communication system) of first embodiment of the invention.In Fig. 1, constitute by transmitter 10 that modulator 1 is installed on it and receiver 20 that demodulator 2 is installed on it according to the communication system 3 of this embodiment.

Senary signal through modulator 1 phase modulated and output is received and phase modulated by demodulator 2, changes binary signal before finally to become by modulator 1.In this processing of modulator 1, as mentioned above, as senary signal (b _i, t _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) is distributed to first to the 6th phase place respectively.

The senary signal that is undertaken by demodulator 2 can be realized as the modulator 1 that utilizes first embodiment of the invention to the conversion of binary signal.For example, can store the senary signal that is sent out and convert them the binary signal of length b in proper order, thus the senary signal output by length m they.

In this processing of demodulator 2, first to the 6th phase place is as senary signal (b _i, t _i) distribute to (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) respectively.

Fig. 2 A to 2C is the diagrammatic sketch that illustrates according to the encoding process of first embodiment of the invention, Fig. 3 be illustrated in according in the coding of first embodiment of the invention from the diagrammatic sketch of the Hamming distance of adjacent signaling point, Fig. 4 is that illustrating according to first embodiment of the invention is diagrammatic sketch according to the comparison of the error rate characteristic of first embodiment of the invention from the diagrammatic sketch of the Hamming distance of adjacent signaling point and Fig. 5 in Gray code.Describe with reference to Fig. 1 to 5 pair of operation according to the communication system 3 of first embodiment of the invention.

Fig. 2 C shows in that (b2, b1 b0) are encoded to relevant ternary signal (T1, T0) correspondence table under the situation of two symbols with input signal.Fig. 2 B shows in that (b4 b3) is encoded to the irrelevant binary signal B1 of two symbols, the correspondence table under the B0 situation with input signal.Fig. 2 A show the ternary signal of will being correlated with (T1, T0) and irrelevant binary signal B1, B0 be encoded to correspondence table under the senary phase place situation.

Then, in the correspondence table shown in Fig. 2 A, between the phase place 2 and 3 and the Hamming distance between phase place 5 and 0 be 1 because the binary signal difference of 1 bit is only arranged.In the correspondence table shown in Fig. 2 A, between phase place 0 and 1, between the phase place 1 and 2, the ternary signal difference of 1 bit is only arranged between between the phase place 3 and 4 and phase place 4 and 5, wherein Hamming distance is encoded as minimum.

Fig. 3 shows under the situation of application according to the coding of first embodiment of the invention, the mean value of the Hamming distance between the adjacent signaling point.It is the Hamming distance of about mistake of binary signal under the situation of each senary signal h1, h0 generation ± 1 mistake.The mean value of Hamming distance is 19/16.

Fig. 4 shows under the situation of using Gray code, the mean value of the Hamming distance between the adjacent signaling point.It is the Hamming distance of about mistake of binary signal under the situation of each senary signal h1, h0 generation ± 1 mistake.The mean value of Hamming distance is 2.

In another example of first embodiment of the invention, its essential structure is illustrated as above situation for b=5, m=2 in the six phase phase modulated.Be converted to the data transaction part of the senary signal of length m for the binary signal with length b, other structures also are fine.For example, for the minimum errors rate, the technology of this embodiment of the present invention also can be applied to (18,7), (23,9) and (31,12) as (b, m) Zu He situation.

The bit error rate of N phase phase modulated is represented by following equation usually.

$P=\frac{\mathrm{\β}}{\mathrm{\η}}\mathrm{erfc}\left(\sin (\mathrm{\π}/N)\sqrt{\mathrm{\η\γ}}\right)...\left(1\right)$

$\mathrm{erfc}\left(x\right)=\frac{2}{\sqrt{\mathrm{\&pi;}}}{\&Integral;}_x^{\&infin;}{e}^{-{\mathrm{<figure-callout\; id="2"\; label="t"\; filenames="C20051011479700431.png,C20051011479700441.png"\; state="\{\{state\}\}">t</figure-callout>}}^2}\mathrm{dt}...\left(2\right)$

Herein, β is the errored bit coefficient and also is average Hamming distance from adjacent signaling point.The errored bit factor beta has different values according to the coding of binary signal.η is a transmitting efficiency, and it is b/m when utilizing the m symbol to send the b bit.γ is the signal energy of every bit and the ratio (Eb/No) of the Carrier To Noise Power Density of every bit.N is a number of phases, and this embodiment is N=6 according to the present invention.Erfc (x) is complementary error function.

In six phase phase modulated, use under the situation of Gray code β=2.Under the situation of application according to the coding of first embodiment of the invention, β=19/16.So, under situation about using, the quantity of bit error can be reduced about percent 40 according to the coding of first embodiment of the invention.More specifically, this embodiment can minimize the bit error rate characteristic according to the present invention.

Fig. 5 shows and is using according to the error rate characteristic under the coding situation of first embodiment of the invention using the comparison of the error rate characteristic under the Gray code situation.Coding according to first embodiment of the invention is BER=10 ^-3And be better than the about 0.4dB of desired Eb/No.

For the first embodiment of the present invention, the situation that converts the senary signal of two symbols with binary signal with 5 bits to is compared, and it can be converted to ternary signal of two symbols by the binary signal with 3 bits in 5 bits and just the binary signal of 2 bits in 5 bits be changed to connect realizes this conversion.Therefore, can simplify circuit.

[example]

Below, example of the present invention is described with reference to the accompanying drawings.The modulation and demodulation system (communication system) of example has and communication system 3 identical construction according to the above embodiment of the present invention shown in Figure 1 and operation according to the present invention.

Fig. 6 is the block diagram that the structure of the modulator of example according to the present invention is shown.In Fig. 6, the modulator 1 of example is made of to ternary transducer 12, parallel-to-serial transducer (multiplexer) 13 and senary modulation circuit 14 serial parallel converters 11, binary system according to the present invention.

The serial binary signal data of serial parallel converters 11 input b bits and the parallel binary signal data of output (b-m) bit and m bit.Binary system converts ternary signal to the ternary transducer 12 parallel binary signal datas with (b-m) bit.

Parallel-to-serial transducer 13 will get up with the m bit ternary signal data combination of 12 outputs from binary system to the ternary transducer from the m bit binary signal data of serial parallel converters 11 outputs, they are converted to a serial signal.Senary modulation circuit 14 will be modulated to the senary phase signal from the senary signal of parallel-to-serial transducer 13 order outputs.

In the case, the ternary signal (t of parallel-to-serial transducer 13 receptions length m of 12 outputs from binary system to the ternary transducer _M-1, t _M-2..., t ₁, t ₀) and from the binary signal (b of the length m of serial parallel converters 11 output _M-1, b _M-2..., b ₁, b ₀) to export them as senary signal (b _i, t _i) (i=0,1 ..., m-1).

Senary modulator 14 will be as senary signal (b _i, t _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of the senary signal that is sent, the average error rate of binary signal is minimized.

Fig. 7 is the block diagram that the structure of the demodulator of example according to the present invention is shown.In Fig. 7, the demodulator 2 of example is made of to binary translator 23 and parallel-to-serial transducer 24 senary demodulator circuit 21, serial parallel converters (split circuit) 22, ternary according to the present invention.

Senary demodulator circuit 21 demodulation senary phase signals, and serial parallel converters 22 will be converted to the combination of the binary signal data and the m position ternary signal data of m bit from a serial signal of senary demodulator circuit 21 inputs.Ternary is converted to m position ternary signal to binary translator 23 binary signal of (b-m) bit.

Parallel (b-m) bits of parallel-to-serial transducer 24 inputs 23 outputs from the ternary to the binary translator and from the binary signal data of the parallel m bit of serial parallel converters 22 outputs, and the serial binary signal data of output m bit.

In the case, senary demodulator circuit 2 will be as senary signal (b _i, t _i)-distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0) to the 6th phase place.

Serial parallel converters 22 input senary signal (b _i, t _i) (i=0,1 ..., m-1), and the ternary signal (t of output length m _M-1, t _M-2..., t ₁, t ₀) and the binary signal (b of length m _M-1, b _M-2..., b ₁, b ₀).

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

Fig. 8 is the flow chart that the modulator operation of example according to the present invention is shown.Operation with reference to Fig. 1,6 and 8 couples modulator 1 of example according to the present invention describes.

Modulator 1 is carried out in serial parallel converters 11 and is used for importing the serial binary signal data of b bit and the serial-to-parallel conversion process (the step S1 of Fig. 8) of output (b-m) bit and m bit parallel binary signal data.Subsequently, modulator 1 is carried out in the ternary transducer 12 at binary system and is used for (b-m) bit parallel binary signal data are converted to the binary system of ternary signal to ternary conversion process (the step S2 of Fig. 8).

Then, modulator 1 is carried out parallel-to-serial conversion process in parallel-to-serial transducer 13, this processing be used for will be from the binary system of the m bit binary signal data of the serial-to-parallel conversion process output of step S1 and step S2 to the output of ternary conversion process the ternary signal data combination of m position, they are converted to a serial signal (the step S3 among Fig. 8).

At last, modulator 1 is carried out the senary modulation treatment in senary modulation circuit 14, and the senary conversion of signals that this processing is used for exporting in proper order from the parallel-to-serial conversion process of step S3 is senary phase signal (S4 of Fig. 8).

In the case, the parallel-to-serial conversion process of step S3 receives the ternary signal (t from the binary system of step S2 to the length m of ternary conversion process output _M-1, t _M-2..., t ₁, t ₀) and from the binary signal (b of the length m of the serial-to-parallel conversion process output of step S1 _M-1, b _{M- 2}..., b ₁, b ₀), to export them as senary signal (b _i, t _i) (i=0,1 ..., m-1).

The senary modulation treatment of step S4 will be as senary signal (b _i, t _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

Fig. 9 is the flow chart of operation that the demodulator 2 of the example according to the present invention is shown.Operation with reference to Fig. 1,7 and 9 couples demodulator 2 of example according to the present invention describes.

Demodulator 2 is carried out the senary demodulation process (the step S11 of step 9) that is used for demodulation senary phase signal and carry out the serial-to-parallel conversion process (Fig. 9 step S12) that a serial signal that is used for exporting from the senary demodulation process of step S11 is converted to the combination of m bit binary signal data and m position ternary signal data in serial parallel converters 22 in senary demodulator circuit 21.

Subsequently, demodulator 2 is carried out in the binary translator 23 in ternary and is used for m position ternary signal is converted to the ternary of (b-m) bit binary signal to Binary Conversion processing (Fig. 9 step S13), and carry out parallel-to-serial processing at parallel-to-serial transducer 24, the ternary that the reform the sanction reason is used to import from step S12 is handled parallel (b-m) bit binary signal data of output and the parallel m bit binary signal data of exporting from the serial-to-parallel conversion process of step S11 to Binary Conversion, and output m bit serial binary signal data (the step S14 among Fig. 9).

In the case, the senary demodulation process of step S11 will be as senary signal (b _i, t _i) first to the 6th phase place distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0).

The serial-to-parallel conversion process input senary signal (b of step S12 _i, t _i) (i=0,1 ..., m-1) and export the ternary signal (t of length m _M-1, t _M-2..., t ₁, t ₀) and the binary signal (b of length m _M-1, b _M-2..., b ₁, b ₀).

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

Can in six phase phase modulating methods, have the effect that the bit error rate of making minimized and simplified circuit structure according to this example thus.

Then, the second embodiment of the present invention is described with reference to the accompanying drawings.Modulation and demodulation system (communication system) according to second embodiment of the invention has and the first embodiment identical construction (Fig. 1).In Fig. 1, constitute by transmitter 10 that modulator 1 is installed on it and receiver 20 that demodulator 2 is installed on it according to the communication system 3 of this embodiment.

Senary signal by modulator 1 phase modulated and output is received and phase modulated by demodulator 2, changes binary signal before finally to become by modulator 1.As mentioned above, this of modulator 1 is handled by making the senary signal be represented as (B _i, T _i) (wherein i=1 is as first symbol, and i=2 is as second symbol, binary signal as Bi and ternary signal as Ti) and with (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.

The senary signal that is undertaken by demodulator 2 can be realized as the modulator 1 that utilizes second embodiment of the invention to the conversion of binary signal.For example, can store the senary signal that is sent out and convert the senary signal sequence of each length 2 binary signal of length 5 to export them.This processing of demodulator 2 will be as senary signal (B _i, T _i) first to the 6th phase place distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0).

Figure 10 A to 10C is the diagrammatic sketch that illustrates according to the encoding process of second embodiment of the invention, Figure 11 A to 11D be illustrated in according in the coding of second embodiment of the invention from the diagrammatic sketch of the Hamming distance of adjacent signaling point, Figure 12 A and 12B are the diagrammatic sketch that is illustrated in the coding of correlation technique from the Hamming distance of adjacent signaling point, Figure 13 A and 13B are that being illustrated in the Gray code from the diagrammatic sketch of the Hamming distance of adjacent signaling point and Figure 14 is the diagrammatic sketch that illustrates according to the comparison of the error rate characteristic of second embodiment of the invention.Describe with reference to Fig. 1 and 10 to 14 pairs of operations according to the communication system 3 of second embodiment of the invention.

Figure 10 C shows in that (b2, b1 b0) are encoded to relevant ternary signal (T1, T2) correspondence table under the situation of two symbols with input signal.(T1, during T2) by annular array, the Lee distance between all adjacent signaling points (Lee distance) is 1 when the ternary signal of two symbols.More specifically, it is (0,0)-(0,1)-(0,2)-(1,2)-(2,1)-(2,0)-(2,1) ((0,0)).(b2, b1 b0) are (0,0,0)-(0,0,1)-(0,1,1)-(0,1,0)-(1,1,0)-(1,1,1)-(1,0,1) and (1,0,0) ((0,0,0)) corresponding to binary system 3 bit signals of the ternary signal of two symbols.

So, encoding process according to second embodiment of the invention, being the mistake of Lee distance 1 in each adjacent combination, and the binary signal of length " 3 " is associated so that the Hamming distance between the binary signal of length 3 is 1 with the ternary signal of length " 2 " ternary signal of length " 2 " by annular array.

Figure 10 B shows in that (b4 b3) is encoded to the irrelevant binary signal B1 of two symbols, the correspondence table under the B2 situation with input signal.Figure 10 A show the ternary signal of will being correlated with (T1, T2) and irrelevant binary signal (B1, B2) be encoded to correspondence table under the senary phase place situation.Subscript 1 and 2 is indicated first bis and second symbol respectively.

Then, according to the correspondence table shown in Figure 10 A, between the phase place 2 and 3 and the Hamming distance between phase place 5 and 0 be 1 because the binary signal difference of 1 bit of Bi is only arranged.According to the correspondence table shown in Figure 10 A, respectively between phase place 0 and 1, between the phase place 1 and 2, Hamming distance is encoded as minimum between between the phase place 3 and 4 and phase place 4 and 5, because the ternary signal difference of a Ti is only arranged.

Figure 11 A to Figure 11 D shows the Hamming distance between the adjacent signaling point under using according to the second embodiment of the invention situation.When ± 1 mistake took place each senary signal, the mistake of Hamming distance 1 took place in binary signal Bi.Ternary signal Ti has the mistake of Lee distance 1, and for example 0 → 1,1 → 2 and 2 → 1, and for example 0 → 2 and 2 → 0 mistake does not take place.

For the coding shown in Figure 11 A, be three kinds of situations of 0,1 and 2 when there is second symbol when being 1 in first symbol from 0 mistake, wherein the Hamming distance of deviation mismark is respectively 1,2 and 1.When second symbol from 0 mistake when being 1, having first symbol is three kinds of situations of 0,1 and 2, wherein the Hamming distance of deviation mismark is respectively 1,2 and 1.Therefore, when ternary signal from 0 mistake when being 1 average Hamming distance be 4/3.Similarly, average Hamming distance is 1,1 and 1 when 1 → 0,1 → 2 and 2 → 1 mistake for example takes place respectively ternary signal.

So, when the senary phase place takes place as during 0 → 1,1 → 2,2 → 3,3 → 4,4 → 5 and 5 → 0 error, the error as ternary signal 0 → 1, ternary signal 1 → 2, binary signal 0 → 1, ternary signal 2 → 1, ternary signal 1 → 0 and binary signal 1 → 0 takes place.The probability of considering senary signal 0,2,3 and 5 be 6/32 and the probability of senary signal 1 and 4 be 4/32, the average Hamming distance of whole senary signal is (4/3+1+1+1) * 6/32+ (1+1) * 4/32=17/16.In Figure 11 A to 11D, the binary signal of the ternary signal of Fa Songing (2,2) is not (1,1,1).But average in other cases Hamming distance also is 17/16.

With reference to Figure 11 A to 11D, under the situation of application according to the coding of second embodiment of the invention, the Hamming distance mean value when ± 1 mistake takes place each senary signal between the adjacent signaling point is 17/16.

Figure 12 A and 12B show the mean value of the Hamming distance between the adjacent signaling point under using according to the coding situation of correlation technique embodiment.Take place at each senary signal under the situation of ± 1 mistake, before the mistake of binary signal and Hamming distance mean value afterwards be 19/16.

Figure 13 A and 13B show the mean value of the Hamming distance between the adjacent signaling point under using according to the situation of the coding of second embodiment of the invention.It is before the mistake at binary signal under each senary signal h1, h0 generation ± 1 error situation and Hamming distance afterwards.The mean value of Hamming distance is 19/16.

Figure 13 A and 13B show at the mean value of using the Hamming distance between the adjacent signaling point under the Gray code situation.Take place under ± 1 error situation before the mistake at binary signal and Hamming distance mean value afterwards is 2 at each senary signal.

Usually, the bit error rate P of N phase phase modulated can be expressed by aforesaid equation (1) and (2).Herein, β represents the average Hamming distance sum of adjacent signaling point.This factor beta has different values according to the coding of binary signal.η is a transmitting efficiency, and it is 5/2 when utilizing two symbols to send 5 bits.γ is the signal energy of every bit and the ratio (Eb/No) of Carrier To Noise Power Density.N is a number of phases, and this embodiment is N=6 according to the present invention.Erfc (x) is complementary error function.

Under the situation of the Gray code in using six phase phase modulated, β=2.Under the situation of the coding of using correlation technique, β=19/16.Under the situation of application according to the coding of second embodiment of the invention, β=17/16.So under situation about using according to the coding of second embodiment of the invention, Gray code can reduce the quantity of bit error approximately percent 7 relatively, and the coding of correlation technique can reduce about percent 10 relatively.More specifically, this embodiment can minimize the bit error rate characteristic according to the present invention.

Figure 14 shows and is using according to the error rate characteristic under the coding situation of second embodiment of the invention using the comparison of the error rate characteristic under the Gray code situation.Coding according to second embodiment of the invention is BER=10 ^-3And be better than the about 0.4dB of desired Eb/No.

For the second embodiment of the present invention, compare with the situation that 5 bit binary signal is converted to the senary signal of two symbols, its ternary signal that can be converted to two symbols by the binary signal with 3 bits in 5 bits is also just realized this conversion to the binary signal change connection of 2 bits in 5 bits.Therefore, can simplify circuit.

[example]

Then, embodiments of the invention are described with reference to the accompanying drawings.Have and communication system 3 identical construction and the operation of above-mentioned second embodiment according to the present invention shown in Figure 1 according to the modulation and demodulation system (communication system) of the embodiment of the invention.

Structure according to the modulator of the embodiment of the invention is identical with the structure (Fig. 6) of first embodiment.In Fig. 6, modulator 1 is made of to ternary transducer 12, parallel-to-serial transducer (multiplexer) 13 and senary modulation circuit 14 serial parallel converters 11, binary system.

The serial binary signal data of serial parallel converters 11 inputs 5 bits is also exported 3 bits and the parallel binary signal data of 2 bits.Binary system converts the parallel binary signal data of 3 bits to ternary signal to ternary transducer 12.Parallel-to-serial transducer 13 will get up with 2 ternary signal data combinations of 12 outputs from binary system to the ternary transducer from 2 bit binary signal data of serial parallel converters 11 outputs, they are converted to a serial signal.Senary modulation circuit 14 will be modulated to the senary phase signal from the senary signal of parallel-to-serial transducer 13 order outputs.

In the case, the ternary signal (T of parallel-to-serial transducer 13 receptions length " 2 " of 12 outputs from binary system to the ternary transducer ₁, T ₂) and from the binary signal (B of the length 2 of serial parallel converters 11 output ₁, B ₂) to export them as senary signal (B _i, T _i) (i=1,2).

Senary modulator 14 will be as senary signal (B _i, T _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.Herein, i=1 is first symbol, and i=2 is second symbol.

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

The structure of the demodulator of example is identical with the structure (Fig. 7) of first embodiment according to the present invention.In Fig. 7, demodulator 2 is made of to binary translator 23 and parallel-to-serial transducer 24 senary demodulator circuit 21, serial parallel converters (split circuit) 22, ternary.

Senary demodulator circuit 21 demodulation senary phase signals, and serial parallel converters 22 will be converted to the combination of binary signal data and 2 ternary signal data of 2 bits from a serial signal of senary demodulator circuit 21 inputs.Ternary is converted to 2 ternary signals to binary translator 23 binary signal of 3 bits.Parallel-to-serial transducer 24 inputs are the 23 binary signal data of exporting of 2 bits that walk abreast that walk abreast 3 bits and export from serial parallel converters 22 from the ternary to the binary translator, and export the serial binary signal data of 5 bits.

In the case, senary demodulator circuit 2 will be as senary signal (B _i, T _i) first to the 6th phase place distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0).Herein, i=1 is first symbol, and i=2 is second symbol.

Serial parallel converters 22 input senary signal (B _i, T _i) (i=1,2), and the ternary signal (T of output length " 2 " ₁, T ₂) and the binary signal (B of length 2 ₁, B ₂).In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

The operation of the modulator 1 of example is identical with the operation (Fig. 8) of first embodiment according to the present invention.Operation with reference to Fig. 1,6 and 8 couples modulator 1 of example according to the present invention describes.

Modulator 1 is carried out in serial parallel converters 11 and is used for importing the serial binary signal data of 5 bits and exports 3 bits and the serial-to-parallel conversion process of 2 bit parallel binary signal data (the step S1 of Fig. 8).Subsequently, modulator 1 is carried out in the ternary transducer 12 at binary system and is used for 3 bit parallel binary signal data are converted to the binary system of ternary signal to ternary conversion process (the step S2 of Fig. 8).

Then, modulator 1 is carried out parallel-to-serial conversion process in parallel-to-serial transducer 13, this processing is used for will be from 2 bit binary signal data of the serial-to-parallel conversion process output of step S1 and 2 ternary signal data combinations from the binary system of step S2 to the output of ternary conversion process, they are converted to a serial signal (the step S3 among Fig. 8).

At last, modulator 1 is carried out the senary modulation treatment in senary modulation circuit 14, and the senary conversion of signals that this processing is used for exporting in proper order from the parallel-to-serial conversion process of step S3 is senary phase signal (the step S4 of Fig. 8).

In the case, the parallel-to-serial conversion process of step S3 receives the ternary signal (T from the binary system of step S2 to the length 2 of ternary conversion process output ₁, T ₂) and from the binary signal (B of the length 2 of the serial-to-parallel conversion process output of step S1 ₁, B ₂), to export them as senary signal (B _i, T _i) (i=1,2).

The senary modulation treatment of step S4 will be as senary signal (B _i, T _i) (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0) distributes to first to the 6th phase place respectively.Herein, i=1 is first symbol, and i=2 is second symbol.

In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

The operation of the demodulator 2 of example is identical with the operation (Fig. 9) of first embodiment according to the present invention.Operation with reference to Fig. 1,7 and 9 couples demodulator 2 of example according to the present invention describes.

Demodulator 2 is carried out the senary demodulation process (the step S11 of step 9) that is used for demodulation senary phase signal and carry out the serial-to-parallel conversion process (Fig. 9 step S12) that a serial signal that is used for importing from the senary demodulation process of step S11 is converted to the combination of 2 bit binary signal data and 2 ternary signals in serial parallel converters 22 in senary demodulator circuit 21.

Subsequently, demodulator 2 is carried out in the binary translator 23 in ternary and is used for 2 ternary signals are converted to the ternary of 3 bit binary signal to Binary Conversion processing (Fig. 9 step S13), and carry out parallel-to-serial processing at parallel-to-serial transducer 24, the ternary that this processing is used to import from step S12 is handled parallel 3 bits of output and the parallel 2 bit binary signal data of exporting from the serial-to-parallel conversion process of step S11 to Binary Conversion, and exports 2 bit serial binary signal data (the step S14 among Fig. 9).

In the case, the senary demodulation process of step S11 will be as senary signal (B _i, T _i) first to the 6th phase place distribute to (0,0), (0,1), (0,2), (1,2) respectively, (1,1) and (1,0).Herein, i=1 is first symbol, and i=2 is second symbol.

The serial-to-parallel conversion process input senary signal (B of step S12 _i, T _i) (i=1,2) and export the ternary signal (T of length 2 ₁, T ₂) and the binary signal (B of length 2 ₁, B ₂₎In the case, think that mistake mainly occurs in the adjacent signaling point place under the thermal noise environment.Mistake in the wrong and ternary signal is minimized because binary signal or ternary signal are at the adjacent signaling point place, and therefore corresponding with whole mistakes of transmission senary signal, the average error rate of binary signal is minimized.

Can in six phase phase modulating methods, have the effect that the bit error rate of making minimized and simplified circuit structure according to this example thus.

Claims (49)

1. a modulation and demodulation system is used to realize the phase shift keying modulation of senary transmission binary signal and the phase shift keying demodulation of recovery binary signal, wherein:

Modulator has the DTU (Data Transfer unit) that is used for the binary signal of length b is converted to the senary signal of length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase place to be expressed as (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

2. modulation and demodulation as claimed in claim 1 system, wherein said DTU (Data Transfer unit) is associated the binary signal of length b-m with the ternary signal of length m, reducing the average mistake of each bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake, thereby the binary signal of length b is converted to the senary signal of length m.

3. modulation and demodulation as claimed in claim 1 or 2 system, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

4. modulation and demodulation as claimed in claim 1 system, wherein:

When according to described DTU (Data Transfer unit) b=5, m=2,

Described DTU (Data Transfer unit) is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following four set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1)),

((0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1)),

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,0)) and

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0)).

5. modulation and demodulation as claimed in claim 4 system, wherein, according to described transformation rule, described DTU (Data Transfer unit) is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the ternary signal ((0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), so that the binary signal of length 3 is converted to the ternary signal of length 2, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

6. modulation and demodulation as claimed in claim 5 system, wherein, according to described transformation rule, (each bit b0) is replaced binary signal for b2, b1, with will as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0 is b2) with (b0, b2, each Bit Allocation in Discrete b1) is transformed into 32 set of the ternary signal of length 2 by the binary signal from length 3, thereby the binary signal of length 3 is converted to the ternary signal of length 2.

7. a modulation and demodulation system is used to realize the phase shift keying modulation of senary transmission binary signal and the phase shift keying demodulation of recovery binary signal, wherein:

It is the DTU (Data Transfer unit) of the binary signal of length b that demodulator has the senary conversion of signals that is used for length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being represented as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

8. modulation and demodulation as claimed in claim 7 system, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

9. modulator, to be used for the binary signal phase modulated be the senary signal and export this signal, comprising:

Be used for the binary signal of length b is converted to the DTU (Data Transfer unit) of the senary signal of length m; Wherein:

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

First to the 6th phase place is represented as by using binary signal B and ternary signal T that (B T), and is respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

10. modulator as claimed in claim 9, wherein said DTU (Data Transfer unit) is associated the binary signal of length b-m with the ternary signal of length m, reducing the average error rate of every bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake, thereby the binary signal of length b is converted to the senary signal of length m.

11. modulator as claimed in claim 9, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

12. modulator as claimed in claim 9, wherein:

When according to described DTU (Data Transfer unit) b=5, m=2,

Described DTU (Data Transfer unit) is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following four set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1)),

((0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1)),

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,0)) and

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0)).

13. modulator as claimed in claim 12, wherein, according to described transformation rule, described DTU (Data Transfer unit) is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the ternary signal ((0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), thereby the binary signal of length 3 is converted to the ternary signal of length 2, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

14. modulator as claimed in claim 13, wherein, according to described transformation rule, (each bit b0) is replaced binary signal for b2, b1, with will as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0 is b2) with (b0, b2, each Bit Allocation in Discrete b1) is given 32 set that are transformed into the ternary signal of length 2 by the binary signal from length 3, so that the binary signal of length 3 is converted to the ternary signal of length 2.

15. a demodulator is used to receive by the senary signal of phase modulated and is binary signal with its phase demodulating, wherein:

It is the DTU (Data Transfer unit) of the binary signal of length b that described demodulator has the senary conversion of signals that is used for length m;

Described DTU (Data Transfer unit) comprises the conversion equipment that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being represented as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

16. demodulator as claimed in claim 15, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

17. a phase modulating method that is used for the modulation and demodulation system, the phase shift keying demodulation that described modulation and demodulation system is used to realize the phase shift keying modulation of senary transmission binary signal and restores binary signal, wherein:

Modulator is carried out the data conversion treatment that is used for the binary signal of length b is converted to the senary signal of length m;

Described data conversion treatment comprises the conversion process that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase meter to be shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

18. phase modulating method as claimed in claim 17, wherein said data conversion treatment is associated the binary signal of length b-m with the ternary signal of length m, reducing the average mistake of every bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake, thereby the binary signal of length b is converted to the senary signal of length m.

19. phase modulating method as claimed in claim 17, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

20. phase modulating method as claimed in claim 17, wherein:

When according to described data conversion treatment b=5, m=2,

Described data conversion treatment is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following four set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1)),

((0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1)),

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,0)) and

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0)).

21. phase modulating method as claimed in claim 20, wherein, according to described transformation rule, described data conversion treatment is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the ternary signal ((0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), so that the binary signal of length 3 is converted to the ternary signal of length 2, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

22. phase modulating method as claimed in claim 21, wherein, according to described transformation rule, (each bit b0) is replaced binary signal for b2, b1, with will as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0 is b2) with (b0, b2, b 1) each Bit Allocation in Discrete give 32 set that are transformed into the ternary signal of length 2 by binary signal from length 3 so that the binary signal of length 3 is converted to the ternary signal of length 2.

23. the phase shift keying demodulation that a phase demodulating method that is used for the modulation and demodulation system, described modulation and demodulation system are used to realize the phase shift keying modulation of senary transmission binary signal and restore binary signal, wherein:

It is the data conversion treatment of the binary signal of length b that demodulator is carried out the senary conversion of signals that is used for length m;

Described data conversion treatment comprises the conversion process that is used for the ternary signal of length m is converted to the binary signal of length b-m; And

First to the 6th phase place is distributed to respectively as being represented as (B, senary signal (0,0) T), (0,1), (0,2), (1,2), (1,1) and (1,0) by use binary signal B and ternary signal T.

24. phase demodulating method as claimed in claim 23, wherein b is that integer and m approximate and greater than b/log ₂6 integer.

25. a phase modulating method is used at b as integer and m as approximating and greater than b/log ₂Under the situation of 6 integer, the binary signal of length b is converted to the senary signal of length m and sends binary signal accordingly with the senary phase signal, wherein:

Be used for the data conversion treatment that binary signal with length b is converted to the senary signal of length m and comprise the processing that is used for the binary signal of length b-m is converted to the ternary signal of length m; And

Use binary signal B and ternary signal T first to the 6th phase meter to be shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0).

26. phase modulating method as claimed in claim 25, wherein, in the processing that is used for the binary signal of length b-m is converted to the ternary signal of length m, the binary signal of length b-m is associated with the ternary signal of length m, reducing the average error rate of every bit that whole Lee distances with the ternary signal of length m are the binary signal of 1 the corresponding length b-m of mistake, thereby the binary signal of length b is converted to the senary signal of length m.

27. phase modulating method as claimed in claim 25, wherein:

When being used for binary signal with length b-m and being converted to processing b=5, the m=2 of ternary signal of length m,

Be used for the ternary signal that data conversion treatment that binary signal with length 3 is converted to the ternary signal of length 2 is converted to the binary signal of length 3 according to following transformation rule length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following four set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (1,1,0), (1,1,1), (0,1,0), (1,0,0) and (1,0,1)),

((0,0,0), (0,0,1), (0,1,0), (1,1,0), (1,1,1), (0,1,1), (1,0,0) and (1,0,1)),

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (0,1,0) and (1,1,0)) and

((0,0,0), (0,1,1), (0,0,1), (1,0,0), (1,1,1), (1,0,1), (1,1,0) and (0,1,0)).

28. phase modulating method as claimed in claim 27 wherein, according to the transformation rule of described four set, is used for binary signal with length 3 and is converted to the data conversion treatment of ternary signal of length 2 with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the ternary signal ((0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), so that the binary signal of length 3 is converted to the ternary signal of length 2, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

29. phase modulating method as claimed in claim 28, wherein, for the described transformation rule that is used between the binary signal of the ternary signal of length 2 and length 3, changing according to the transformation rule of described four set, described data conversion treatment is transformed into 32 set of the ternary signal of length 2 and replaces binary signal (b2, b1, each bit b0) for the binary signal that utilizes described four set from length 3, with will as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0 is b2) with (b0, b2, b1) each Bit Allocation in Discrete is given the ternary signal ((0,0) of length 2, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)), thus the binary signal of length 3 is converted to the ternary signal of length 2.

30. modulation and demodulation system, be used to make modulator to carry out binary signal with length 5 and be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

The device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0); And

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of the described device that is used to carry out described data transaction by using length 3.

31. modulation and demodulation as claimed in claim 30 system, wherein said conversion equipment is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,2), (2,2), (2,1), (2,0) and (1,0)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

32. modulation and demodulation as claimed in claim 31 system, wherein, according to described transformation rule, described conversion equipment is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the senary signal (0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,2), (2,2), (1,2), (0,2) and (0,1), so that the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

33. modulation and demodulation as claimed in claim 32 system, wherein, according to described transformation rule, described conversion equipment is replaced binary signal (b2, b1, each bit b0), with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0, b2) and (b0, b2, each Bit Allocation in Discrete b1) is given 16 set that are transformed into the ternary signal of length 2 by the binary signal from length 3, the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule.

34. modulator that is used for the modulation and demodulation system, described modulation and demodulation system makes modulator carry out binary signal with length 5 and is converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

The device that is used to carry out described data transaction has the conversion equipment that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of the described device that is used to carry out described data transaction by using length 3.

35. modulator as claimed in claim 34, wherein said DTU (Data Transfer unit) is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,2), (2,2), (2,1), (2,0) and (1,0)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

36. modulator as claimed in claim 35, wherein, according to described transformation rule, described DTU (Data Transfer unit) is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the senary signal (0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,2), (2,2), (1,2), (0,2) and (0,1), so that the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

37. modulator as claimed in claim 36, wherein, according to described transformation rule, described conversion equipment is replaced binary signal (b2, b1, each bit b0), with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0, b2) and (b0, b2, each Bit Allocation in Discrete b1) is transformed into 16 set of the ternary signal of length 2 by the binary signal from length 3, thereby the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule.

38. demodulator that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

Be used for that the senary phase modulated signal is reversed the device that is changed to binary signal and comprise the conversion equipment that is used for the ternary signal of length 2 is converted to the binary signal of length 3;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Being used for that the senary phase modulated signal is reversed the device be changed to binary signal binary signal and the correspondence between the ternary signal of length 2 by using length 3 reverses the senary phase modulated signal and is changed to the binary signal of described modulator before changing.

39. demodulator as claimed in claim 38, the conversion equipment that the wherein said ternary signal that is used for length 2 is converted to the binary signal of length 3 is converted to the ternary signal of length 2 according to following transformation rule the binary signal of length 3, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,2), (2,2), (2,1), (2,0) and (1,0)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

40. demodulator as claimed in claim 39, wherein, according to described transformation rule, the described ternary signal that is used for length 2 is converted to the conversion equipment of binary signal of length 3 with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the senary signal (0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,2), (2,2), (1,2), (0,2) and (0,1), so that the ternary signal of length 2 is converted to the binary signal of length 3 according to described transformation rule, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

41. modulator as claimed in claim 40, wherein, according to described transformation rule, described conversion equipment replacement binary signal (b2, b1, each bit b0) that is used for the ternary signal of length 2 is converted to the binary signal of length 3, with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0, b2) and (b0, b2, b 1) each Bit Allocation in Discrete be transformed into 16 set of the ternary signal of length 2 by binary signal from length 3, thereby the ternary signal of length 2 is converted to the binary signal of length 3 according to described transformation rule.

42. phase modulating method that is used for the modulation and demodulation system, described modulation and demodulation system be used to that the destination demodulator is received and phase demodulating by the senary signal of modulator phase modulated and output, change binary signal before to become by described modulator, wherein:

Described modulator is carried out the data conversion treatment that the binary signal of length 5 is converted to the senary signal of length 2;

Described data conversion treatment comprises the conversion process that is used for the binary signal of length 3 is converted to the ternary signal of length 2;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Binary signal and the correspondence ternary signal of length 2 between the senary signal that the binary signal of length 5 be converted to length 2 of described data conversion treatment by using length 3.

43. phase modulating method as claimed in claim 42, wherein said data conversion treatment is converted to the binary signal of length 3 according to following transformation rule the ternary signal of length 2, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

44. phase modulating method as claimed in claim 43, wherein, according to described transformation rule, described data conversion treatment is with the binary signal (v2 of length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the senary signal (0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1), so that the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

45. phase modulating method as claimed in claim 44, wherein, according to described transformation rule, described data conversion treatment is replaced binary signal (b2, b1, each bit b0), with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0, b2) and (b0, b2, each Bit Allocation in Discrete b1) is transformed into 16 set of the ternary signal of length 2 by the binary signal from length 3, thereby the binary signal of length 3 is converted to the ternary signal of length 2 according to described transformation rule.

46. phase demodulating method that is used for the modulation and demodulation system, described modulation and demodulation system is used to make modulator to carry out binary signal with length 5 to be converted to the data transaction of senary signal of length 2 so that signal is sent as the senary phase modulated signal, and be used to make demodulator reception and this senary phase modulated signal of inverse conversion to change binary signal before to become by described modulator, wherein:

Described demodulator is carried out and is used for senary phase modulated signal inverse conversion is handled for the inverse conversion of the binary signal before being changed by described modulator;

Described inverse conversion is handled and is comprised the conversion process that is used for the ternary signal of length 2 is converted to the binary signal of length 3;

Use binary signal B and ternary signal T first to the 6th phase meter is shown (B, T), they are respectively (0,0), (0,1), (0,2), (1,2), (1,1) and (1,0);

The ternary signal of length 2 is 1 mistake by annular array to have a Lee distance in each adjacent combination, and the binary signal of length 3 is associated with the ternary signal of length 2 so that the Hamming distance between the binary signal of length 3 is 1; And

Correspondence between the binary signal of described inverse conversion processing use length 3 and the ternary signal of length 2 is changed to described modulator with the reverse of senary phase modulated signal and changes binary signal before.

47. phase demodulating method as claimed in claim 46, wherein said inverse conversion is handled the binary signal that the ternary signal of length 2 is converted to length 3 according to following transformation rule, with as the correspondence between the ternary signal of the binary signal of length 3 and length 2, described transformation rule is being distributed to the set ((0 of ternary signal with eight length 2 with one of following two set with the binary signal of eight length 3 under as the situation of a set, 0), (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1)):

((0,0,0), (0,0,1), (0,1,1), (0,1,0), (1,1,0), (1,1,1), (1,0,1) and (1,0,0)) and

((0,0,0), (1,0,0), (1,0,1), (1,1,1), (1,1,0), (0,1,0), (0,1,1) and (0,0,1)).

48. phase demodulating method as claimed in claim 47, wherein, according to described transformation rule, described inverse conversion is handled the binary signal (v2 with length 3, v1, v0) add to respectively length 3 binary signal (b2, b1, b0), with will be as (each Bit Allocation in Discrete b0+v0) is given the senary signal (0,0) of length 2 for b2+v2, b1+v1, (0,1), (0,2), (1,0), (1,1), (1,2), (2,0) and (2,1), so that the ternary signal of length 2 is converted to the binary signal of length 3 according to described transformation rule, wherein, (v2, v1 v0) is (0,0,1), (0,1,0), (0,1,1), (1,0,0), (1,0,1), (1,1,0) and (1,1, one of 1), and wherein, operator+expression XOR.

49. phase demodulating method as claimed in claim 48, wherein, according to described transformation rule, described inverse conversion is handled and is replaced binary signal (b2, b1, each bit b0), with will be as (b2, b0, b1), (b1, b0, b2), (b1, b2, b0), (b0, b0, b2) and (b0, b2, each Bit Allocation in Discrete b1) is given 16 set that are transformed into the ternary signal of length 2 by the binary signal from length 3, the ternary signal of length 2 is converted to the binary signal of length 3 according to described transformation rule.

Images