CN100541581C - Semiconductor device and driving method thereof - Google Patents

Abstract

A kind of semiconductor devices, wherein marking current is fast in the imported current source circuit of write current.Owing to carry out precharge operation write signal electric current afterwards, therefore can write fast.In precharge operation, electric current is provided to a plurality of circuit.The size of electric current is set according to the quantity of the circuit that is provided this electric current, this means to obtain stable state fast.Attention is provided electric current in precharge operation circuit can not be to be transfused to the circuit of signal.

Description

Semiconductor device and driving method thereof

technical field

The present invention relates to a semiconductor device having a function of controlling power supply to a load by using a transistor, and more particularly to a semiconductor device including a pixel composed of a current-driven light-emitting element whose luminance changes with current , and a signal driving circuit for driving the pixel, and also relates to a driving method of the semiconductor device.

Background technique

In recent years, display devices whose pixels are composed of light-emitting elements such as light-emitting diodes (LEDs), ie, self-luminous display devices, have been used in point light sources. Among the above-mentioned light-emitting elements for self-luminous display devices, organic light-emitting diodes (OLEDs), organic EL elements, and electroluminescence (EL elements) have attracted attention and are widely used in organic EL displays.

Since the light-emitting element emits light by itself, it has higher pixel visibility than an LCD and does not require a backlight. In addition, it exhibits a high response speed and can control the luminance of the light emitting element according to the value of the current flowing into the light emitting element.

Passive matrix driving and active matrix driving are known as driving methods of display devices using self-luminous elements. Although the structure of passive matrix driving is simple, there are problems such as difficulty in realizing a large-sized and high-brightness display. Therefore, an active matrix drive in which current flowing in a light emitting element is controlled by a thin film transistor (TFT) provided in a pixel circuit is actively developed.

The problem with the active matrix display device is that the current flowing through the light-emitting elements changes due to the change of the current characteristics of the driving TFT, and thus the brightness of each light-emitting element constituting the display screen changes. That is, an active matrix display device has a driving TFT for driving a light emitting element into which current flows in a pixel circuit, and the current flowing through the light emitting element changes due to a change in the characteristic of the driving TFT, and thus the luminance changes.

In consideration of the above-mentioned problems, different circuits have been proposed so that the current flowing in the light emitting element does not change even when the characteristics of the driving TFT in the pixel circuit change, and thus suppresses the change in luminance (see, for example, Patent Documents 1 to 20). 4).

[Patent Document 1]

Japanese Patent Unexamined Publication No. 2002-517806

[Patent Document 2]

International Publication No.01/06484 Pamphlet (pamphlet)

[Patent Document 3]

Japanese Patent Unexamined Publication No. 2002-514320

[Patent Document 4]

International publication No.02/39420 pamphlet

The structure of the active matrix display device is disclosed in Patent Documents 1 to 4, and in particular, the circuit structure is disclosed in Patent Documents 1 to 3 in which the change in the characteristics of the driving TFT in the pixel circuit does not cause a change in the current flowing through the light emitting element . This structure is called a current writing type pixel or a current input type pixel. Disclosed in Patent Document 4 is a circuit structure for suppressing a change in signal current due to a change in TFT in a source driver circuit.

The structure of a conventional active matrix display device disclosed in Patent Document 1 is shown in FIG. 6 . The pixel in FIG. 6 includes a source signal line 601, first to third gate signal lines 602 to 604, a power supply line 605, TFTs 606 to 609, a storage capacitor 610, an EL element 611 and a current source for inputting a video signal 612.

The gate electrode of the TFT 606 is connected to the first gate signal line 602, the first electrode thereof is connected to the source signal line 601, and the second electrode thereof is connected to the first electrodes of the TFTs 607, 608 and 609. The gate electrode of the TFT 607 is connected to the second gate signal line 603, and the second electrode thereof is connected to the gate electrode of the TFT 608. The second electrode of the TFT 608 is connected to the power supply line 605. The gate electrode of the TFT 609 is connected to the third gate signal line 604, and the second electrode thereof is connected to the anode of the EL element 611. The storage capacitor 610 is connected between the gate electrode of the TFT 608 and the power supply line 605 to store the voltage between the gate electrode and the source electrode of the TFT 608. The power supply line 605 and the cathode of the EL element 611 are respectively input with predetermined voltages so as to have a potential difference therebetween.

The operation of writing light emission by a signal current will be explained using FIGS. 7A to 7E. The reference numerals representing the respective components are the same as those shown in FIG. 6 . 7A to 7C schematically show the flow of current. FIG. 7D shows the relationship between the currents flowing in the respective paths at the time of signal current writing. FIG. 7E shows the voltage stored in the storage capacitor 610, that is, the voltage between the gate and the source of the TFT 608 when the signal current is written.

First, a pulse is input into the first gate signal line 602 and the second gate signal line 603 and the TFTs 606 and 607 are turned on. The current flowing through the source signal line 601, that is, the signal current is denoted here as Idata.

As shown in FIG. 7A, since the signal current Idata flows through the source signal line 601, the current flows through the current paths I1 and I2 in the pixel, respectively. Fig. 7D shows the relationship between currents. Needless to say, this relationship is expressed as Idata=I1+I2.

The charge has not been stored in the storage capacitor 610 at the instant when the TFT 606 is turned on, so the TFT 608 is turned off. Therefore, I2=0 and Idata=I1. That is, only one kind of current flows due to charge accumulation in the storage capacitor 610 during this period.

Then the charges in the storage capacitor 610 are gradually accumulated, and a potential difference begins to be generated between the two electrodes of the storage capacitor 610 (see FIG. 7E ). When the potential difference between the two poles reaches Vth (point A in FIG. 7E ), the TFT 608 is turned on, and I2 is generated. Since Idata=I1+I2 as described above, I1 gradually decreases. However, current still flows and the charge in the storage capacitor 610 is further accumulated.

Charge accumulation in the storage capacitor 610 continues until the potential difference between the two electrodes of the storage capacitor 610, that is, the voltage between the gate and the source of the TFT 608 reaches a desired voltage, which is a voltage (VGS) such that The current Idata can flow through the TFT 608 under the voltage. When the charge accumulation is completed (point B in FIG. 7E ), the current I1 stops flowing and a current corresponding to VGS starts flowing into the TFT 608 at this time, thus satisfying Idata=I2 (see FIG. 7B ). In this way, a steady state is obtained. The signal write operation is thus completed. When the selection of the first gate signal line 602 and the second gate signal line 603 is completed, the TFTs 606 and 607 are turned off.

In the next light emission operation, a pulse is input into the third gate signal line 604 and the TFT 609 is turned on. Since the previously written VGS is stored in the storage capacitor 610, the TFT 608 is turned on and the current Idata flows from the power supply line 605. Therefore, the EL element 611 emits light. In the case where the TFT 608 can operate in the saturation region, even if the voltage between the source and drain of the TFT 608 changes, Idata can continue to flow without change at this point.

The operation for outputting the set current as described above is referred to here as an output operation. The advantage of the above-mentioned current writing type pixel is that a desired current can be accurately supplied to the EL element, and even when the TFT 608 has a characteristic variation or the like, since the voltage between the gate and the source required for the current Idata to flow can be Since it is stored in the storage capacitor 610, it is possible to suppress a change in luminance due to a change in the characteristics of the TFT.

The above-described embodiments relate to a technique for correcting current variations caused by variations in driving TFTs in pixel circuits; however, the same problem occurs in source driver circuits. Patent Document 4 discloses a circuit structure for preventing variations in signal current caused by manufacturing variations of TFTs in a source driver circuit.

A conventional current drive circuit and a display device employing the circuit are constructed in such a manner that the relationship between the signal current and the current driving the TFT or the relationship between the signal current and the current flowing in the light emitting element during light emission can be equalized Or keep them proportional to each other.

In the case where the driving current of the driving TFT for driving the light emitting element is small or the light emitting element shows dark gradation, the signal current decreases accordingly. Since the parasitic capacitance of the wiring for supplying the signal current to the driving TFT and the light emitting element is very large, when the signal current is small, the charging time constant of the parasitic capacitance in the wiring becomes large, which reduces the signal writing speed. That is, the rate at which current is supplied to a transistor to generate a voltage at the gate terminal of the transistor that the transistor needs in order for the current to flow is slowed down.

Based on the aforementioned problems, a technique for increasing the signal writing speed has been studied (for example, see Patent Documents 5 and 6).

[Patent Document 5]

Japanese Patent Examined Publication No.2003-50564

[Patent Document 6]

Japanese Patent Examined Publication No.2003-76327

Patent Document 5 discloses a display device having a current control means through which a data line current supplied by a data line driving means is divided into a data current for writing luminance information to each pixel circuit and a data current for drive bypass current. For example, as shown in FIG. 33, a pixel circuit in which no luminance data is written is used as a data current control circuit (bypass current).

34 and 35 show driving timings. Simultaneously select consecutive x pixel circuits (x=2 in FIG. 33). When two pixel circuits are selected at the same time, part of the data line current used to drive the data line is written into one pixel circuit as the luminance data current. The luminance data current is not written in another part of the pixel circuit, but it is used as a data current control circuit (bypass current) into which the remaining data line current flows.

In particular, in FIG. 35, consecutive x pixel circuits (x=2 in FIG. 33) in the same column are divided into one unit. When data current is written to one pixel circuit in the cell, no data current is written to the other pixel circuit in the cell and the pixel circuit is used as a bypass current. At the same time, the first scan line WS and the second scan line ES are selected in the pixel circuit where the data current is written. In FIG. 33, for example, assuming that the pixel circuit 11-k-1 is a pixel circuit for writing data current, both WSk-1 and Esk-1 are selected.

On the other hand, in a pixel circuit in which no data current is written and used as a bypass current, only the first scanning line WS is selected. WSk is selected in FIG. 33 and the second scan line ESk is not selected. Therefore, the pixel circuit functions as a data current control circuit in which the TFTs 24 and 25 are used as bypass currents. That is, in the pixel circuit shown in FIG. 33, since the second scanning line ESk is not selected and the TFT 26 is turned off, the charge corresponding to the luminance data stored in the capacitor 23 is prevented from being discharged through the TFT 26 and remain stored. Meanwhile, a part of the circuit, that is, only the TFTs 24 and 25 functions as a data current control circuit (bypass current).

As described above, in the active matrix organic EL display device using the current writing type pixel circuit, consecutive two pixel circuits of the same column are selected at the same time, and a part of the data line current Iw0 is supplied to the pixel circuit to The luminance data is written, and the remaining current is supplied to another part of the pixel circuit as a bypass current. Thus, the data line current Iw0 can be set larger than the data current Iw1 flowing through the TFTs 24 and 25 while suppressing the size of the TFTs 24 and 25 in the pixel circuit. Therefore, it is possible to greatly reduce the data writing time, thus contributing to the realization of an organic EL display device having a large size and high definition.

Patent Document 6 discloses a circuit shown in FIG. 36 . That is, the driving transistor 7 is connected in parallel with the auxiliary transistor 12, wherein the current driving capability of the auxiliary transistor 12 is n times that of the driving transistor 7, so that the leakage current also flows to this auxiliary transistor 12 and the signal current flowing through the signal line 3 is at The partial selection period (acceleration period) becomes (n+1) times. Therefore, the charging and discharging of the storage capacitor and the parasitic capacitor can be performed at a high speed, and the gate potential of the drive transistor reaches a predetermined potential without failing during selection, so even at a small signal current (input signal) In the case of the current drive element can also be driven with an appropriate drive current. Therefore, when the current driving element is an organic EL element, the organic EL element can be driven by a predetermined driving current and thus prevent deterioration of display image quality.

Contents of the invention

As described above, although techniques for increasing the signal writing speed have been studied, several problems still remain.

For example, in Patent Document 5, although two consecutive pixel circuits (x=2) in the same column are selected while writing the data current, the number of pixel circuits is not limited to two and more pixels can be selected at the same time. circuit. When more pixel circuits are selected and multiple pixel circuits are used as data current pulses, smaller-sized transistors in the pixel circuits, ie, larger data line current Iw0 can be realized.

However, the pitch between transistors constituting the current mirror circuit becomes farther in consideration of trade-offs, thereby reducing the effect of correcting variations in transistor characteristics.

Therefore, the number of pixel circuits that can be simultaneously selected is limited and the magnitude of the data line current is also limited. Therefore, the signal writing speed is lowered. Furthermore, when a plurality of pixel circuits are selected at the same time, the current is equally divided into the current flowing through each pixel circuit. It prevents accurate current from being input into the pixel circuit into which data current is input. The effect of correcting deviations in transistor characteristics is therefore reduced.

In Patent Document 6, the driving transistor 7 is connected in parallel with the auxiliary transistor 12, wherein the current driving capability of the auxiliary transistor 12 is n times that of the driving transistor 7, so that the leakage current also flows to the auxiliary transistor 12 and flows through the signal of the signal line 3 The current becomes (n+1) times during a part of the selection period (acceleration period).

However, if the number of n is increased too much, the area occupied by the auxiliary transistor 12 will become extremely large and thus reduce the opening ratio. Furthermore, the number of n is limited by the layout area. Therefore, the amplification factor of the signal current flowing through the signal line 3 during a part of the partial selection period (acceleration period) is lowered. As a result, the signal writing speed is reduced.

In order to solve the above-mentioned problems, an object of the present invention is to provide a technique that can sufficiently increase the signal writing speed even when the signal current is small, without being limited by layout area, without lowering the aperture ratio, and without lowering the transistor density. The effect of correcting bias in properties.

According to the present invention, a precharge period is provided before the set period to quickly complete the set operation. In the precharge operation, current flows not only to a transistor to which a signal is to be input but also to other transistors. The magnitude of this current increases according to the number of transistors to be supplied with this current. Therefore, a large current can flow, and thus a steady state can be quickly obtained. Note that the state at this time is almost equivalent to the state where the set operation is completed (when a steady state is obtained). Next, perform the setting operation. Since the state almost equivalent to the completion of the setting operation is obtained before the setting operation is performed, the setting operation can be quickly completed.

Note that the set operation is an operation that supplies a current to a transistor to which a signal is to be input, thereby generating a voltage at the gate terminal of the transistor that the transistor requires for current to flow.

Also, an operation for causing current to flow not only to a transistor to which a signal is input but also to other transistors to quickly complete a set operation is called a precharge operation, and a circuit having such a function is called a precharge device.

A feature of the present invention is a semiconductor device including a signal line; a current source circuit connectable to the signal line through a switch; a plurality of unit circuits respectively including a switch and a current source circuit; and a power supply device which provides A first current is supplied to current source circuits selected from M unit circuits of the plurality of unit circuits, and a second current is supplied to current source circuits selected from N unit circuits of the plurality of unit circuits during setting.

A current source circuit includes at least one transistor and, in many cases, a capacitor.

When a setting operation is performed on a unit circuit (transistor constituting a current source circuit) with a small current, it takes a long time to reach a steady state and complete the current writing operation. To solve this problem, a precharge operation is performed before the set operation. By this precharge operation, a state almost equivalent to a steady state can be obtained before this setting operation. That is, the precharge operation makes it possible to quickly charge to a potential at the gate terminal of the transistor constituting the current source circuit. With this precharge operation, the potential at the gate terminal of the transistor constituting the current source circuit is almost equal to the potential at the time of the set operation. Therefore, the setting operation can be completed more quickly by performing the setting operation after the precharging operation.

Another feature of the present invention is a semiconductor device including: a signal line; a current source circuit connectable to the signal line through a switch; a plurality of unit circuits respectively including a switch and a current source circuit; During the period, the first current is supplied to the current source circuits of the M unit circuits selected from the plurality of unit circuits, and during the setting period, the second current is supplied to the selected from the plurality of unit circuits except the M unit circuits. A current source circuit of N unit circuits other than.

In other words, generally, it is desirable to perform a precharge operation on those circuits including unit circuits to which a set operation is to be performed in consideration of characteristic deviation, however, the present invention is not limited thereto. The unit circuit on which the precharging operation is performed may be different from the unit circuit on which the setting operation is performed.

According to the above structure, the present invention provides a semiconductor device in which N=1.

Although the set operation is generally performed on one unit circuit, the present invention is not limited thereto and current may be supplied to a plurality of unit circuits in the set operation.

Furthermore, according to the above structure, the present invention provides a semiconductor device in which the magnitude ratio of the first current to the second current is M:N.

Any type of transistor can be used for the transistor of the present invention. For example, it may be a thin film transistor (TFT) using an amorphous, polycrystalline or single crystalline semiconductor film. Transistors formed on a single crystal substrate, SOI substrate, or glass substrate may also be used. Alternatively, a transistor formed of an organic material, carbon nanotube, or the like may be used. Furthermore, the transistors may be MOS transistors or bipolar transistors.

Note that in this specification, connection refers to electrical connection. Accordingly, other elements or switches may be interposed between the elements shown.

According to the present invention, the precharging operation is performed before the setting operation. Therefore, a setting operation can be quickly performed even with a small current, and an accurate current can be output in an output operation.

Description of drawings

Fig. 1 is a block diagram showing the structure of a semiconductor device of the present invention.

FIG. 2 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 3 is a block diagram showing an operation of the semiconductor device of the present invention.

FIG. 4 is a block diagram showing an operation of the semiconductor device of the present invention.

FIG. 5 is a block diagram showing an operation of the semiconductor device of the present invention.

Fig. 6 is a block diagram showing a structural example of a conventional pixel.

Figures 7A to 7E are block diagrams showing the operation of conventional pixels.

FIG. 8 is a block diagram showing a structural example of a unit circuit of the present invention.

Fig. 9 is a block diagram showing the structure of the semiconductor device of the present invention.

Fig. 10 is a block diagram showing the structure of the semiconductor device of the present invention.

FIG. 11 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 12 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 13 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 14 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 15 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 16 is a block diagram showing the operation of the semiconductor device of the present invention.

Fig. 17 is a block diagram for explaining the operation of the semiconductor device of the present invention.

FIG. 18 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 19 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 20 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 21 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 22 is a block diagram showing the operation of the semiconductor device of the present invention.

FIG. 23 is a block diagram showing a structural example of a unit circuit of the present invention.

Fig. 24 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 25 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 26 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 27 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 28 is a block diagram showing a structural example of a unit circuit of the present invention.

FIG. 29 is a block diagram showing the structure of the display device of the present invention.

FIG. 30 is a block diagram showing the structure of the display device of the present invention.

FIG. 31 is a block diagram showing the structure of the gate driver circuit of the present invention.

32A to 32H are views of electronic devices to which the present invention can be applied.

Fig. 33 is a block diagram showing the structure of a conventional pixel.

Fig. 34 is a timing chart of a conventional pixel.

Fig. 35 is a timing chart of a conventional pixel.

Fig. 36 is a block diagram showing the structure of a conventional pixel.

FIG. 37 is a block diagram showing the structure of the semiconductor device of the present invention.

FIG. 38 is a block diagram showing the structure of the semiconductor device of the present invention.

Detailed ways

[Embodiment 1]

According to the present invention, a pixel is formed of an element capable of controlling the luminance of light emission according to the value of the current flowing into the light emitting element. Typically, EL elements can be used. Although various structures of the EL element are known, any structure can be employed as long as it can control the luminance of light emission according to the current value. That is, an EL element including an arbitrary combination of a light-emitting layer, a charge transport layer and a charge injection layer using a low-molecular-weight organic material, a medium-molecular-weight organic material (having no sublimation property and the number of molecules in it) can be used. 20 or less or organic light-emitting materials with a molecular chain length of 10 μm or less), or high molecular weight organic materials. In addition, inorganic materials may be mixed or dispersed into these organic materials.

The present invention can also be applied to various analog circuits each including a current source in addition to pixels respectively including light emitting elements such as EL elements. Therefore, the principle of the present invention is described in this embodiment mode.

A structure based on the basic principle of the invention is shown in FIG. 1 . The main current source 101 is connected to the signal line 108 through the switch 102 , and the auxiliary current source 103 is connected in parallel with the main current source 101 through the switch 104 . The power supply device is constructed in this way. Needless to say, the structure of the power supply device is not limited to that shown in FIG. 1, and any structure may be employed as long as it can supply predetermined current to the following unit circuits according to the operation timing. For example, a switch can be omitted and a current source whose output varies as desired can be used. The number of current sources is not limited to two, or more current circuits or one current circuit may be employed.

A plurality of unit circuits 105 a to 105 e are connected to a signal line 108 . In Figure 1, five unit circuits are connected. Each unit circuit includes at least one switch circuit and one current source circuit, so the unit circuit 105a, for example, includes a switch circuit 106a and a current source circuit 107a. The same applies to the remaining unit circuits 105b to 105e. A current source circuit includes at least one transistor and, in most cases, a capacitor. The switch circuit includes at least one switch.

The unit circuit can take various structures. According to the present embodiment, a unit circuit using a circuit similar to that of FIG. 6 is shown in FIG. 2 . The switch circuit 106 in the unit circuit 105 corresponds to the TFT 606 in FIG. 6 . The current source circuit 107 in the unit circuit 105 includes a current source transistor 208 , a capacitor 210 , and switches 207 and 209 . The load 201 is connected to a switch 209 . The transistor 208 in the current source circuit 107 corresponds to the TFT 608 in FIG. 6, the capacitor 210 corresponds to the storage capacitor 610, and the switches 207 and 209 correspond to the TFTs 607 and 609, respectively. The load 201 corresponds to the EL element 611 in FIG. 6 .

The operation of the circuit shown in Fig. 1 is now explained. First, a precharge operation is performed as shown in FIG. 3 . Current is supplied not only to the unit circuit to which a signal is to be input but also to other unit circuits in the precharge operation. The magnitude of the total current increases with an increasing number of unit circuits to be supplied with current.

That is, switch 104 is on and switch 102 is off so that current flows from auxiliary current source 103 . Next, each switch circuit among the plurality of unit circuits is turned on and current starts to flow to these switch circuits. In FIG. 3, the switch circuits 106a to 106e are turned on, so current flows into these five unit circuits. Therefore, the current from the auxiliary current source 103 is five times that of the main current source 101 . In this way, since a large current can be supplied to the circuit, a steady state is quickly obtained. In the precharge operation, the potential of the signal line 108 when a steady state is obtained is expressed as Vp.

Note that during the precharge operation, it is preferable that the gate terminal and the drain terminal of the current source transistor in each current source circuit be connected to each other. In FIG. 2, for example, switch 207 is preferably turned on. In addition, it is preferable that the switch 209 in FIG. 2 is turned off to prevent current from flowing into the load 201 . However, the present invention is not limited to these.

Next, as shown in FIG. 4, a setting operation is performed. It is assumed here that only the unit circuit 105a will be input with a signal. That is, current is supplied only to the unit circuit 105a and not to the unit circuits 105b to 105e. Therefore, the switch circuit 106a is turned on and the switch circuits 106b to 106e are turned off. Switch 104 is off and switch 102 is on so that current flows from the main current source 101 . However, it conventionally takes a long time to obtain a steady state because the current flowing from the main current source 101 is small. Whereas in the case of FIG. 4, since the precharge operation is performed before the set operation, the potential of the signal line 108 is equal to Vp. This potential Vp is almost equal to the potential of the signal line 108 when the setting operation is completed. Therefore, it is possible to quickly complete the set operation and reach a steady state quickly.

As described above, a large current is supplied in the precharge operation (during precharge). For example, when an A-fold current is supplied, it is supplied to an A piece of the unit circuit. With this large current, a steady state can be quickly obtained. In other words, the influence on the flowing current line due to parasitic loads (line impedance, crossover capacitance, etc.) can be reduced and thus a steady state can be achieved quickly. During the next set period, double the current is supplied to a unit circuit for a set operation. However, the potential of the flowing current line is almost equal to the potential when the setting operation is completed. This is because the amplification ratio (A times) of the current in the precharge operation corresponds to the number (A) of the unit circuits to which the current is supplied. As described above, the precharging operation enables the setting operation to be completed quickly.

Therefore, for example, when the load 201 is an EL element, even in the case where the writing signal for the light emission of the EL element is a low gradation, that is, even if a small current is supplied in the setting operation, the signal can be quickly write.

Furthermore, the potential of the signal line at the completion of the precharge operation is almost equal to the potential at the completion of the set operation. When they are exactly equal to each other, it means that the set operation is completed simultaneously when the precharge operation is completed. In other words, when they are not exactly equal to each other, the potential difference is controlled by the set operation. Therefore, the change in the potential in the signal line from the start of the set operation to the end thereof can be suppressed to be small, and thus a steady state can be obtained quickly.

Whether the potential of the signal line at the completion of the precharge operation is equal to the potential of the signal line at the completion of the set operation depends on the deviation of the current characteristic of each current source transistor in the current source circuits 107a to 107e. When there is no change in the current characteristics, the voltage between the gate and the source of the current source transistor in the precharge operation is equal to the voltage between the two in the set operation. However, when the current characteristics vary, the voltage between the gate and the source of the current source transistor in the charge operation differs from the voltage between the two in the set operation. Therefore, the potential in the signal line 108 is not the same when the precharge operation is completed and when the set operation is completed. It is therefore desirable that each current source transistor in the current source circuits 107a to 107e have the same current characteristic. This enables rapid attainment of steady state in set operation. Uniformity of current characteristics among current source transistors can be obtained by irradiating the semiconductor layer of each transistor with the same laser emission in crystallization.

Note that although five unit circuits are employed in FIG. 1, the number of unit circuits is not limited to this.

In addition, although current is input into the five unit circuits of FIG. 3 in the precharge operation, the present invention is not limited thereto. For example, current can be input to four unit circuits as shown in FIG. 5 . In this case, preferably, the current of the auxiliary current source 103 is four times that of the main current source 101 . Furthermore, although the switch circuits 106b to 106e are turned on and the switch circuit 106a is turned off in FIG. 5, the present invention is not limited thereto. Since it is assumed that only the unit circuit 105a is input with a signal, it is preferable to input current to the unit circuit 105a in the precharge operation in consideration of deviations in current characteristics of transistors. However, as shown in FIG. 5, the precharge operation may be performed with the switch circuit 106a turned off so that current is not input into the unit circuit 105a.

Although current is input to one unit circuit in FIG. 4 in the set operation, the present invention is not limited thereto. For example, current may be input to a plurality of unit circuits. In this way, the current magnitude of the main current source 101 needs to be increased according to the number of unit circuits.

Furthermore, although the signal line 108 is connected to each of the current source circuits 107a to 107e through the switch circuits 106a to 106e respectively in FIG. 1, the present invention is not limited thereto. Any structure may be adopted as long as it can control the selection of the current input from the signal line 108 to each of the unit circuits 105a to 105e. Although current is input to each unit circuit through the signal line 108 in FIG. 1 , alternatively, for example, a voltage signal may be input to the unit circuit through other lines, for example.

Although the switch 102 is turned off and the switch 104 is turned on in the precharge operation in FIG. 3, the present invention is not limited thereto. If the magnitude of the current is controlled, current can be supplied from the main current source 101 and the auxiliary current source 103 simultaneously by turning on the switch 102 .

In FIG. 1 , for ease of description, the signal line 108 is connected to the main current source 101 through the switch 102 and connected to the auxiliary current source 103 through the switch 104 , but the present invention is not limited thereto. Any structure may be adopted as long as it can control the magnitude of the current supplied to the signal line 108 in the precharge operation and the set operation. Therefore, the switches 102 and 104 can be set at any position as long as they can control the magnitude of the current supplied from the main current source 101 and the auxiliary current source 103 . When each of the main current source 101 and the auxiliary current source 103 has the function of switching current output, the switches 102 and 104 can be omitted. Furthermore, if the main current source 101 and the auxiliary current source 103 have a function of switching the magnitude of the current between the precharge operation and the set operation, they can be integrated into one current source.

In addition, although the current flows from the unit circuit to the main current source 101 or the auxiliary current source 103 in FIGS. 1 to 4, the present invention is not limited thereto. Current can flow from the main current source 101 and the auxiliary current source 103 to the unit circuits. However, in this case, it is necessary to consider the current source circuit in each unit circuit. For example, when the structure of the current source circuit shown in FIG. 2 is adopted, it is necessary to change the polarity of the current source transistor 208 from the P-channel type to the N-channel type. This is because the source and drain terminals of the transistor correspond to the switching of the current flow. In the case where current flows from the main current source 101 or the auxiliary current source 103 to the unit circuit, and the polarity of the current source transistors is of the P-channel type, the structure shown in FIG. 8 must be adopted. In FIG. 8 , capacitor 810 is connected between the gate and source of current source transistor 808 . Since the amount of current flowing in the transistor depends on the voltage between the gate and source of the transistor, it is necessary to store the voltage between the gate and source of the transistor. Therefore, capacitor 810 needs to be connected between the gate and source of current source transistor 808 . Furthermore, a switch 807 is connected between the gate and drain of the current source transistor 808 . In this way, since the gate terminal and the source terminal of the transistor depend on the direction of current flow, that is, the potential level, it is necessary to determine the structure of the circuit accordingly.

The load 201 in FIG. 2 or FIG. 8 may be any element or circuit, such as a resistor, a transistor, an EL element, a light emitting element other than an EL element, a current source circuit including a transistor, a capacitor, and a switch, or a circuit connected to a circuit. Also, it may be a signal line, or a signal line connected to a pixel. Incidentally, a pixel may include any display element such as an EL element or an element used as a FED (Field Emission Display). It may also be a current source circuit in a signal driver circuit for supplying current to a pixel.

Capacitor 210 in FIG. 2 or capacitor 810 in FIG. 8 may be replaced by the gate capacitor of current source transistor 208 or the like, in which case capacitors 210 and 810 may be omitted.

Although capacitor 210 is connected to the gate and source terminals of current source transistor 208, the invention is not so limited. Most desirably, capacitor 210 is connected between the gate and source terminals of current source transistor 208 . This is because the operation of the transistor depends on the voltage between the gate and the source, so when a voltage is stored between the gate terminal and the source terminal, the transistor is less susceptible to other effects (such as voltage drops due to line resistance). If capacitor 210 is placed between the gate terminal of current source transistor 208 and other lines, then the potential of the gate terminal of current source transistor 208 will change due to the voltage drop in the line.

Although five current source circuits 107a to 107e are shown in FIG. 1, the current capacity of each current source circuit, that is, the gate width W and gate length L of each current source transistor in all unit circuits may be the same or different . When the current capacity of each current source in the unit circuit is different, it is necessary to set the potentials of the signal line 108 when a steady state is obtained to be almost equal to each other in the precharge operation and the set operation.

The switches shown in Fig. 1 etc. may be any switches such as electrical switches or mechanical switches. It can be any component or circuit as long as it can control the current. It can be a transistor, a diode, or a logic circuit that includes transistors and diodes. Therefore, in the case of using a transistor as a switch, its polarity (conductivity) is not particularly limited since it is only used as a switch. However, when it is preferable to have a small off-current, it is better to use a polar transistor with a small off-current. For example, a transistor providing an LDD region has a small off-current. In addition, it is desirable to use an n-channel transistor when the potential of the source terminal of the transistor used as a switch is close to the power supply potential on the low potential side (Vss, Vgnd, 0V, etc.), and when the potential of the source terminal is close to the high potential When the power supply potential of the side (Vdd, etc.) is used, a p-channel transistor is used. This contributes to efficient operation of the switch, since the absolute value of the voltage between the gate and source of the transistor can be increased. CMOS switches can also be employed by utilizing n-channel and p-channel transistors.

The circuit configurations of the present invention are not limited to those shown in FIGS. 1, 2 and 8. Various circuit structures can be provided by changing the number of unit circuits, the number of current sources, the number and structure of switches, the polarity of each transistor, the number and structure of current source transistors, the potential of each line, the flow direction of current, etc. . Also, by combining these changes, other various circuit configurations can be provided.

In the case of FIG. 1, the precharging operation as shown in FIG. 3 or FIG. 5 is performed, and then the setting operation as shown in FIG. 4 is performed, but the present invention is not limited thereto.

For example, the precharging operation as shown in FIG. 3 or FIG. 5 may be performed multiple times. For example, in the first precharge operation, five times the current is input to the five unit circuits shown in Figure 3, and in the second precharge operation, three times the current is input to the five unit circuits shown in Figure 9 Of the three unit circuits shown, finally, a current of one size is input to one unit circuit when the set operation is performed.

By performing a plurality of precharge operations in this way, it is possible to efficiently continue the next set operation.

Alternatively, other pre-charging operations can be combined.

For example, as shown in FIG. 10 , an additional precharge operation may be performed before the precharge operation shown in FIG. 3 . In FIG. 10 , a voltage is supplied from a terminal 1001 through a switch 1002 . This potential is set to a potential at which a steady state is obtained in the precharge operation and the set operation. That is, as shown in FIG. 10 , the switch 1002 is turned on to supply a potential at the terminal 1001 . By applying a voltage, a large current can flow instantaneously, and therefore, a precharge operation can be quickly performed. Next, the switch 1002 is turned off to perform the pre-charging operation as shown in FIG. 3 . Note that a method of performing a precharge operation using a voltage source is disclosed in Japanese Patent Application No. 2003-019240 of the same applicant. Various precharging methods are disclosed therein and the content thereof may be incorporated into this application.

In addition, for example, a precharge operation in which the magnitude of the current flowing in each unit circuit (current source circuit) is changed in steps may be combined with the precharge circuit as shown in FIG. 3 . A structure in which the current flowing in the current source circuit 107 can be converted into a plurality of levels is shown in FIGS. 11 and 12, respectively.

In the case of FIG. 11 , the second current source transistor 1111 is connected in series to the current source transistor 1108 . Furthermore, a switch 1112 for short-circuiting the source and drain of the second current source transistor 1111 is provided. When the switch 1112 is off, since the gate terminals of the current source transistor 1108 and the second current source transistor 1111 are connected to each other, each of the current source transistor 1108 and the second current source transistor 1111 acts as a multi-gate transistor. The gate length L of the multi-gate transistor is larger than the gate length of the current source transistor 1108, so the current flowing through the multi-gate transistor is very small. On the other hand, when the switch 1112 is turned on, no current flows between the source and the drain of the second current source transistor 1111 because they are short-circuited. That is, only current source transistor 1108 is actually active. In this way, the magnitude of the current flowing in the current source transistor 1108 can be changed by turning on/off the switch 1112 . By performing such operations before and after or during the operations shown in FIG. 3 or FIG. 4 , the precharge operation can be completed more quickly.

In FIG. 12 , the second current source transistor 1211 is connected in parallel with the current source transistor 1208 although they are connected in series with each other in FIG. 11 . Also in this case, when a large current is supplied to the current source circuit 107 , it is possible to cause the current to flow into the second current source transistor 1211 by turning on the switch 1212 .

Note that the structure shown in FIGS. 11 and 12 is disclosed in Japanese Patent Application No. 2003-055018 of the same applicant, in which the current flowing in the current source circuit 107 is converted into a plurality of levels. Various structures are disclosed in this application and the contents thereof can be combined with the present application.

Ideally, the transistors used in the precharge operation and the transistors used in the set operation have the same characteristics as possible. For example, in the case of FIG. 1 , it is desirable that the current source transistors 208 , 808 , 1108 , 1208 and the second current source transistors 1111 and 1211 in the current source circuits 107 a to 107 e have the same current characteristics. Therefore, in the step of forming the current source transistor and the second current source transistor, it is desirable to give each transistor the same current characteristics as possible. For example, in the case of irradiating the semiconductor lasers of the current source transistor and the second current source transistor with laser light, it is preferable that the current source transistor and the second current source transistor have the same current characteristics by irradiation of the laser light. Therefore, in the case of irradiating linear laser light, it is preferable to irradiate the laser light in a direction parallel to the signal line 108 and scan the laser light in a direction perpendicular to the signal line 108 .

Note that in the case where each of the main current source 101 and the auxiliary current source 103 is constituted by a transistor operating in a saturation region, each gate electrode is preferably connected to each other. In addition, the current magnitude of each current source is preferably controlled by adjusting the ratio of the gate width W and the gate length L of each transistor.

As described above, by changing the number and structure of switches, the polarity of each transistor, the number and structure of current source transistors, the type, number and structure of main current sources, the number and structure of unit circuits, the current source circuits in unit circuits The structure of the precharge operation, the number of precharge operations, combined or not combined with other precharge methods, the flow of current, etc., the present invention provides various circuit structures. Also, by combining these changes, more kinds of circuit structures can be provided.

[Example 2]

This is the case in Embodiment 1 described with reference to FIGS. 1 to 4 , and the unit circuit to which a signal is input, that is, the unit circuit that performs the setting operation is the unit circuit 105a. The operation described in this embodiment is in which the unit performing the setting operation changes continuously over time.

Although the operation described here employs the structure shown in FIG. 1, the structure and operation are not limited to these. In addition, Embodiment 1 can be combined with this embodiment.

For convenience of description, it is assumed that the number of unit circuits to which signals are input in the precharge operation is three, however, the number of unit circuits to which signals are input in the precharge operation is not limited to these.

First, it is assumed here that a unit circuit to which a signal is input, that is, a unit circuit that performs a setting operation is the unit circuit 105a. A precharge operation is performed on the unit circuit 105a prior to the set operation. Here, for convenience of description, the precharge operation is performed by flowing current to three unit circuits. Therefore, as shown in FIG. 13, the precharge operation is performed by flowing current to the unit circuits 105b, 105c, 105d.

The reason for inputting current to the unit circuits 105b, 105c, 105d as a precharge operation to the unit circuit 105a before the setting operation is as follows: the first unit circuit performing the setting operation is the unit circuit 105a, and the second unit circuit is the unit circuit 105b, the third unit circuit is the unit circuit 105c, and the fourth unit circuit is the unit circuit 105d. This means that when a set operation is performed after a current is input to the unit circuit as a precharge operation, the state of the unit circuit can be changed depending on the structure. Therefore, if the set operation is performed immediately after the precharge, the current can be supplied as the precharge operation.

On the other hand, in the case where the state of the unit circuit does not change even when the set operation is performed after the input current to the unit circuit as the precharge operation, the unit circuit may be precharged instead of the unit circuits 105b, 105c, 105d operate.

It is preferable that the state of the signal line 108 does not change between the set operation and the precharge operation. For this reason, the unit circuit (current source circuit) for the setting operation and the unit circuit (current source circuit) for the precharge operation are desirably to have the same current characteristics. Therefore, it is desirable to perform the precharging operation with a unit circuit disposed close to the unit circuit 105a (the unit circuit performing the setting operation). It goes without saying that the precharge operation can be performed using the unit circuit 105a (unit circuit that performs the setting operation).

As described above, in the case where the state of the unit circuit changes when the set operation is performed after the precharge operation is supplied with current to the unit circuit, it is preferable to select the unit circuit for performing the set operation after the precharge operation. In the case where the state of the unit circuit does not change when the setting operation is performed, it is preferable to select a unit circuit arranged close to the unit circuit for performing the setting operation. However, the present invention is not limited thereto.

Next, a setting operation as shown in FIG. 14 is performed on the unit circuit 105 a after the precharge operation shown in FIG. 13 .

Assuming that the unit circuit to which the signal is to be input, that is, the unit circuit that is now performing the setting operation, is the unit circuit 105b, a precharge operation is performed before performing the setting operation on the unit circuit 105b. The precharge operation is performed as shown in FIG. 15 by flowing current to the unit circuits 105c, 105d, and 105e. Note that a current is made to flow to the unit circuit 105a immediately after the setting operation is performed as a precharge operation.

Next, a setting operation as shown in FIG. 16 is performed on the unit circuit 105b.

As described above, the cell on which the setting operation is performed changes continuously with time, so the precharge operation and the setting operation are performed as shown in FIGS. 17 and 18 .

Note that in the case where the precharge operation is performed before the set operation on the unit circuit 105c, there is no unit circuit after the unit circuit 105e. In this case, the first unit circuit may have a current flow as a precharge operation for the unit circuits 105d, 105e, and 105a. The operation at this time is shown in Figs. 17 and 18 .

Similarly, in the case of performing the setting operation on the unit circuit 105d over time, the precharging operation is performed by causing current to flow to the unit circuits 105e, 105a, and 105b as shown in FIG. 19 . After that, a setting operation is performed on the unit circuit 105d as shown in FIG. 20 . The precharge operation and the set operation are performed in a similar manner as shown in FIGS. 21 and 22 .

By performing the above-mentioned operations on the circuits, it is possible to sequentially perform setting operations on each unit circuit. By performing the precharging operation before the setting operation, the setting operation can be quickly performed even with a small current.

In the case of performing a precharge operation, current flows to a unit circuit other than a unit circuit to perform a set operation after precharge, however, the present invention is not limited thereto. For example, in the case where a set operation is performed on the unit circuit 105a as shown in FIG. setting operation.

Note that what is described in this embodiment corresponds to a specific description of a certain operation performed according to the structure described in Embodiment 1, however, the present invention is not limited thereto. Accordingly, various changes may be made, other than those departing from the scope herein. Therefore, Embodiment 1 can also be applied to this embodiment.

【Embodiment 3】

As shown in FIGS. 2, 8, 11, 12, etc. in Embodiment Mode 1, various structures can be employed for the unit circuits. In this embodiment mode, other examples and operations of unit circuits will be described.

An example of a circuit is shown in FIG. 23 . In the circuit shown in FIG. 23, the voltage between the gate and source of the transistor 2309 becomes zero when the switch 207 is turned on. Therefore, the transistor 2309 is turned off and no current flows to the load 201 . Therefore, the switches 106 and 207 may be turned on during the precharging operation. Note that in the circuit shown in FIG. 23, when a current flows to a unit circuit for a precharge operation, the state of the unit circuit changes when a set operation is performed. Therefore, it is preferable not to supply current to the load until a set operation is performed after precharging. In this case, switch 207 can be turned on when switch 106 is off. When the switch 106 is turned off, current does not flow to the unit circuit. On the other hand, the current does not flow to the load 201 because the switch 207 is turned on. With current flowing to the load 201, the switches 106 and 207 may be turned off. In addition, the switches 106 and 207 may be turned on when the setting operation is performed.

Fig. 24 shows another example. In the circuit shown in FIG. 24, the voltage between the gate and source of the transistor 2409 becomes zero when the switch 2407 is turned on. Therefore, transistor 2409 is off and current does not flow from power line 2413 to load 201 . Therefore, the switches 106 and 2407 can be turned on during the precharge operation. However, switch 2411 needs to be turned on so that current flows to wire 2412 and not to load 201 . Current hardly flows to the load 201 when the potential of the wire 2412 is controlled. However, switch 209 may be turned off in case current still flows. In the circuit shown in Fig. 24, the state of the unit circuit changes when the set operation is performed after the current is supplied to the unit circuit for the precharge operation. Therefore, it is preferable not to cause current to flow to the load after precharging until the setting operation is performed. Therefore, in this case, the switch 106 can be turned off and the switch 2407 can be turned on, and the switch 209 can also be turned off. By turning off the switch 106, current does not flow to the unit circuit. Meanwhile, current does not flow from the power line 2413 to the load 201 when the switch 2407 is turned on. When current flows to load 201, switches 106, 2407 and 2411 may be turned off and switch 209 may be turned on. The switches 106, 2407, and 2411 can be turned on when the setting operation is performed.

Note that the structure shown in FIGS. 23 and 24 is disclosed by Japanese Patent Application No. 2002-274680 of the same applicant. Its content can be combined with the present invention.

Figures 25 and 26 show examples using current mirror circuits. In FIG. 25, when the current flows to the unit circuit for the precharge operation, the state of the unit circuit changes when the set operation is performed. Therefore, the switch 2509 needs to be used to control the current flow to the load 201 . However, in FIG. 26, even when the current is supplied to the unit circuit for the precharge operation, the state of the unit circuit does not change when the switch 2601 is turned off for the set operation. That is, the signal stored in capacitor 2510 has not changed. Therefore, current can flow to the load 201 even when the precharge operation is performed.

Fig. 27 shows another example. FIG. 28 shows a specific example of the circuit of FIG. 27 . The structure and mode of operation shown in Figures 27 and 28 are disclosed by the same applicant's International Publication No. 03/027997 pamphlet. Its content can be combined with the present invention.

Unit circuits of various structures have been described in the present embodiment mode, however, the present invention is not limited to these, and various changes may be made except those departing from the scope of this document. In addition, the content described in this embodiment mode can be freely combined with Embodiment modes 1 and 2.

【Embodiment 4】

This embodiment mode explains structures and operations of a display device, a signal drive circuit, and the like. The circuit of the present invention can be applied to signal drive circuits and components of pixels.

As shown in FIG. 29 , the display device includes a pixel array 2901 , a gate driver circuit 2902 and a signal driver circuit 2910 . The gate driver circuit 2902 outputs selection signals to the pixel array 2901 continuously. The signal driver circuit 2910 outputs video signals to the pixel array 2901 continuously. The pixel array 2901 controls brightness according to video signals to display images. The video signal output from the signal driver circuit 2910 to the pixel array 2901 is an electric current in most cases. That is, the state of the display element provided in each pixel and the elements for controlling the display element changes according to the video signal (current) input from the signal driver circuit 2910 . A typical representative of a display element provided in a pixel is an EL element or an element for FED (Field Emission Display) or the like.

The number of the gate signal driver circuit 2902 and the signal driver circuit 2910 may be more than one.

The signal driver circuit 2910 can be divided into multiple units, for example, into a shift register 2903 , a first latch circuit ( LAT1 ) 2904 , a second latch circuit ( LAT2 ) 2905 , and a digital-to-analog converter circuit 2906 . The digital-to-analog converter circuit 2906 has a function of converting voltage into current, and it may also have a γ (gamma) compensation function. That is, the digital-to-analog conversion circuit 2906 has a circuit that outputs a current (video signal) to a pixel, that is, a current source circuit, and the present invention can be applied to this circuit.

A pixel includes a display element such as an EL element, and the display element has a circuit that outputs a current (video signal), that is, a current source circuit, and the present invention can also be applied to the current source circuit.

The operation of the signal driver circuit 2910 will be briefly explained below. The shift register 2903 includes a plurality of lines of flip-flop circuits (FF) and the like, and inputs a clock signal (S-CLK), a start pulse (SP) and an inverted clock signal (S-CLKb). According to the timing of these signals, sampling pulses are sequentially output.

The sampling pulse output from the shift register 2903 is input to the first latch circuit ( LAT1 ) 2904 . In the first latch circuit (LAT1) 2904, a video signal is input from a video signal line 2908, and the video signal is stored in each line according to the timing of sampling signal input. The video signal has a digital value with the digital-to-analog converter circuit 2906 provided. The video signal at this stage is generally a voltage signal.

However, the digital-to-analog converter circuit 2906 may be omitted in the case where the first latch circuit (LAT1) 2904 and the second latch circuit (LAT2) 2905 are capable of storing analog values. In this case, the video signal is usually an electrical current. Likewise, when the data output to the pixel array 2901 has a binary value, that is, a digital value, the digital-to-analog converter circuit 2906 can be omitted in most cases.

When video signal storage is completed in the last line of the first latch circuit (LAT1) 2904, a latch pulse is input from the latch control line 2909 during horizontal retrace, and stored in the first latch circuit (LAT1) 2904 The video signals in are all transmitted to the second latch circuit (LAT2) 2905 at the same time. Next, video signals for one line stored in the second latch circuit (LAT2) 2905 are simultaneously input to the digital-to-analog converter circuit 2906 . Then, the signal output from the digital-to-analog conversion circuit 2906 is input to the pixel array 2901 .

While the video signal stored in the second latch circuit (LAT2) 2905 is input to the digital-analog converter circuit 2906 and input to the pixel array 2901, the sampling pulse is output in the shift register 2903 again. That is, two operations are performed simultaneously. Therefore, row sequential driving is enabled. Repeat the operation in the same way.

Note that in the case where the current source circuit of the digital-to-analog converter circuit 2906 performs a setting operation and an output operation, it is necessary for the current source circuit to have a circuit for outputting current. In this case, a reference current source circuit 2914 is provided.

Also, according to the present invention, the types of transistors and substrates on which the transistors are formed are not limited to those described above. Therefore, the entire circuit as shown in FIG. 29 or 30 can be formed on a glass substrate, a plastic substrate, a single crystal substrate, or an SOI substrate. Incidentally, not all components of the circuit shown in Fig. 29 or 30 are necessarily formed on the same substrate, and a part of the circuit may be formed on a different substrate. For example, in FIGS. 29 and 30, the pixel array 2901 and gate driver circuit 2902 may be formed together on a glass substrate using TFTs while the signal driver circuit 2910 (or portions thereof) are formed on a single crystal substrate, and then COG ( Chip-on-glass) bonding connects the IC chip to the glass substrate. TAB (Tape Automated Bonding), printed substrates, etc. can also be used instead of COG welding.

That is, the signal driver circuit and a part thereof may not be formed on the same substrate as the pixel array 2901, for example, it may be formed together with an external IC chip.

The structure of the signal driver circuit and the like is not limited to the structure shown in FIG. 29 .

For example, in the case where the first latch circuit (LAT1) 2904 and the second latch circuit (LAT2) 2905 can store an analog value, as shown in FIG. to the first latch circuit (LAT1) 2904. In some cases, the second latch circuit (LAT2) 2905 may not be provided in FIG. 30 . In this case, generally, a greater number of current source circuits are provided in the first latch circuit ( LAT1 ) 2904 .

For example, two current source circuits may be provided, one of which performs a set operation and the other performs a normal operation. These functions can also be transformed. Therefore, setting operations and normal operations can be performed simultaneously.

The specific structure of the current source circuit is disclosed in pamphlets of International Publication No. 03/038793 to No. 03/038797 and the like. They can be applied to the present invention or combined with the structure of the present invention.

For example, the present invention can be applied to the current source circuit of the digital-to-analog converter circuit 2906 in FIG. 103.

The present invention can also be applied to the current source circuit of the first latch circuit ( LAT1 ) 2904 shown in FIG. 30 . The first latch circuit ( LAT1 ) 2904 includes a plurality of unit circuits, and the reference current source circuit 2914 includes the main current source 101 and the auxiliary current source 103 .

Likewise, the present invention can be applied to a pixel (a current source in the pixel) in the pixel array 2901 of FIGS. 29 and 30 . The pixel array 2901 includes a plurality of unit circuits, and the signal driver circuit 2910 includes a main current source 101 and an auxiliary current source 103 .

An example of a gate driver circuit 2902 is shown in FIG. 31 . A plurality of switching units (switching units 106a to 106e in FIG. 1) in the unit circuit are turned on during precharging. During setting, one of these switching units is switched on. Next, as shown in FIG. 31, a signal for turning on pixels of a plurality of rows is input from the shift register 3101. On the other hand, a signal for turning on one row of pixels is input from the shift register 3102 . By controlling the control signal line 3103, the outputs of the shift registers 3101 and 3102 are switched to the respective gate lines.

Note that the on/off of other switches in the pixel (unit circuit) can also be controlled by the gate driver circuit using a similar technique.

In the case of applying the present invention to a pixel, current is not supplied to a load (such as a light-emitting element) during precharging according to the structure of the pixel (unit circuit). In this case, the light emitting element does not emit light. Thus, pulsed light emission in which light is emitted for a period of time within one frame period is obtained instead of continuous light emission in which light is continuously emitted during one frame period. In the case of continuous light emission, afterimages remain in human eyes due to the afterimage effect when a moving image is displayed, while in the case of pulsed light emission, it is impossible to retain an afterimage even if a moving image is displayed. Therefore, when the present invention is applied to a pixel, it is possible to suppress an afterimage when a moving image is displayed.

Note that this embodiment mode utilizes Embodiment Modes 1 to 3, and therefore, Embodiment Modes 1 to 3 can be used in this embodiment mode.

【Embodiment 5】

The previous embodiments have described the case of supplying current through the signal line, however, the present invention is not limited thereto. It can supply not only current but also voltage. For example, the present application may incorporate the technology disclosed in Japanese Patent Application No. 2003-123000 of the same applicant.

As shown in FIG. 37, according to Japanese Patent Application No. 2003-123000, not only current but also voltage can be supplied. The voltage is supplied by making up a feedback circuit using the amplifier circuit 3707 . A detailed description of its operation is omitted here.

FIG. 38 shows a case where a plurality of transistors 3808 are provided in the current source circuit shown in FIG. 37 . Here, an operational amplifier 3707 is used as an amplifier circuit. Although two transistors (or pixels) are provided in the current source circuit here for simplicity of description, the number is not limited thereto.

As shown in FIG. 38, unit circuits 105A and 105B are provided. Meanwhile, a signal line 108 for supplying current and a signal line 3803 for supplying voltage are provided. These signal lines are connected to a current source circuit in each unit circuit through a switch circuit (switches 106A and 3807A) or the like. By controlling the switch circuits (switches 106A and 3807A and switches 106B and 3807B) in each unit circuit, the precharge operation and the set operation are performed. Therefore, a signal can be written quickly.

Although only the current source 3701 is shown in FIG. 38 as a current source for simplicity of description, the magnitude of the current can be controlled during the precharge operation and the set operation. The current source 3701 may include the switches 102 and 104 shown in FIG. 1 , the main current source 101 , the auxiliary current source 103 and so on.

【Embodiment 6】

In FIGS. 13 to 21, five unit circuits 105a to 105e are connected to the signal line 108, and a precharge operation is performed by supplying current to the three unit circuits. In an actual display device, signal lines are connected to more pixels, ie, more unit circuits.

For example, in a display device of a mobile phone, a vertically long screen with QVGA is employed, so signal lines are connected to 320 pixels (unit circuits). Whereas, in the display device of the car navigation system, a horizontally long screen with VGA is used, so signal lines are connected to 480 pixels (unit circuits). Furthermore, in a display device of a personal computer, a horizontally long screen with XGA is employed, so signal lines are connected to 768 pixels (unit circuits).

Described below is the number of pixels (unit circuits) to be supplied with current in the precharge operation when signal lines are connected to a plurality of pixels (unit circuits).

It is desirable to have as many pixels (unit circuits) as possible to be supplied with current in the precharge operation. This is because, since the current flowing in the precharge operation becomes larger, the steady state can be obtained more quickly. However, when the current value increases too much, power loss also increases. Furthermore, when the number of pixels (unit circuits) to be supplied with current in the precharge operation increases, the number of pixels capable of causing current to flow to the light emitting element may decrease. That is, since the data stored by the setting operation may be destroyed by the precharging operation, current cannot be supplied to the light emitting element for a certain period in order to prevent erroneous data display. As a result, the duty ratio may decrease, resulting in shortened lifetime of the light emitting element. Therefore, the number of pixels to be supplied with current in the precharge operation can be determined based on these trade-offs.

For example, when the current is supplied to 50 pixels (unit circuits) in the precharge operation, the current value in the precharge operation may be 50 times larger. In a mobile phone using QVGA display, signal lines are connected to 320 pixels (unit circuits), and therefore, the ratio of pixels (unit circuits) to be supplied with current in the precharge operation is 50/320=16%. The duty ratio at this time is (320-50)/320=84%, which is within the allowable range. When the current value can reach 50 times the magnitude in the precharge operation, the time to reach the steady state can be shortened. In particular, in the case of a mobile phone including a small display section (pixel array section) and short signal lines, the load capacitance of the signal lines is small. Therefore, with a current value of 50 times or more, the time to reach a steady state can be sufficiently shortened. Therefore, it is preferable that the number of pixels (unit circuits) to be supplied with current in the precharge operation is 50 or more, and the ratio of pixels (unit circuits) to be supplied with current in the precharge operation be 16% or more, Duty cycle is 84% or less.

However, when the duty ratio is 5% or less, the lifetime of the light emitting element is shortened. Therefore, it is desirable to determine the number of pixels (unit circuits) to which current is to be supplied in the precharge operation so as to have a duty ratio of 5% or more, and more preferably 10% or more.

For example, when the current is supplied to 100 pixels (unit circuits) in the precharge operation, the current value in the precharge operation can be set to be 100 times larger. In the display device of the car navigation system using VGA display, signal lines are connected to 480 pixels (unit circuits), therefore, the ratio of the pixels (unit circuits) to be supplied with current in the precharge operation is 100/480= 20%. The duty ratio at this time is (480-100)/480=79%, which is within the allowable range. When the current value in the precharge operation can be set to 100 times larger, the time to reach a steady state can be shortened. In particular, in a display device for a car navigation system, since the display part (pixel array part) is not very large and the signal line is not very long, the load capacitance of the signal line is not very large. Therefore, the time to reach a steady state can be substantially shortened by using a current value 100 times or greater. Therefore, it is preferable that the number of pixels (unit circuits) to be supplied with current in the precharge operation is 100 or more, and the ratio of pixels (unit circuits) to be supplied with current in the precharge operation be 20% or higher, And the duty cycle is 79% or less.

However, when the duty ratio is 5% or less, the lifetime of the light emitting element may be shortened. Therefore, it is desirable to determine the number of pixels (unit circuits) to which current is to be supplied in the precharge operation such that the duty ratio is 5% or higher, preferably 10% or higher.

For example, when the current is supplied to 200 pixels (unit circuits) in the precharge operation, the current value in the precharge operation can be set to be 200 times larger. In a display device of a personal computer having an XGA display, signal lines are connected to 768 pixels (unit circuits), and therefore, the ratio of pixels (unit circuits) to be supplied with current in the precharge operation is 200/768=26 %. The duty ratio at this time is (768-200)/768=73%, which is within the allowable range. When the current value in the precharge operation can be set to be 200 times larger, the time to reach a steady state can be shortened. Therefore, it is preferable that the number of pixels (unit circuits) to be supplied with current in the precharge operation is 200 or more, and it is preferable that the ratio of pixels (unit circuits) to be supplied with current in the precharge operation is 26% or higher, and Duty cycle is 73% or less.

However, when the duty ratio is 5% or less, the lifetime of the light emitting element may be shortened. Therefore, it is desirable to determine the number of pixels (unit circuits) to which current is to be supplied in the precharge operation such that the duty ratio is 5% or higher, preferably 10% or higher.

Note that the number of pixels to be supplied with current in the precharge operation is not limited to the above. For example, the number of pixels to be supplied with current in the precharge operation may be increased to have a duty cycle of about 50%.

[Embodiment 7]

The present invention can be applied to electronic systems such as video cameras, digital cameras, goggle displays (head-mounted displays), navigation systems, sound reproduction equipment (car audio, audio components, etc.), laptop personal computers, game equipment, portable information Terminals (mobile computers, portable phones, mobile game devices or digital books, etc.), image reproduction devices with recording media (especially devices with displays that play recording media such as Digital Versatile Discs (DVD) and display the image) and so on. Specific examples of these electronic devices are shown in FIGS. 32A to 32H.

Fig. 32A shows a light emitting device, which includes a housing 13001, a support frame 13002, a display part 13003, a speaker part 13004, a video input terminal 13005 and so on. The present invention can be applied to the circuit of the display portion 13003. Further, according to the present invention, the light emitting device shown in Fig. 32A is completed. Since the light emitting device is a self-luminous type, a backlight is not required, and a thinner display portion than a liquid crystal display is obtained. Light emitting devices include all display devices for displaying information, such as display devices for personal computers, TV broadcast receivers, and advertising display boards.

Fig. 32B shows a digital camera including a main body 13101, a display portion 13102, an image receiving portion 13103, operation keys 13104, an external connection port 13105, a shutter 13106 and the like. The present invention can be applied to a circuit of the display portion 13102. Further, according to the present invention, the digital camera shown in Fig. 32B is completed.

FIG. 32C shows a laptop personal computer, which includes a main body 13201, a casing 13202, a display unit 13203, a keyboard 13204, an external connection port 13205, a pointer mouse 13206, and the like. The present invention can be applied to the circuit of the display portion 13203. Further, according to the present invention, a laptop personal computer shown in FIG. 32C is completed.

Fig. 32D shows a mobile computer, which includes a main body 13301, a display part 13302, a switch 13303, operation keys 13304, an infrared light interface 13305 and so on. The present invention can be applied to a circuit of the display portion 13302. Further, according to the present invention, the mobile computer shown in Fig. 32D is completed.

Fig. 32E shows a portable image reproducing device (specifically, a DVD reproducing device) with a recording medium, which includes a main body 13401, a housing 13402, a display part A 13403, a display part B13404, a recording medium (DVD, etc. ), a reading section 13405, an operation key 13406, a speaker section 13407, and the like. The display portion A 13403 mainly displays image data, and the display portion B 13404 mainly displays text data. The present invention can be applied to circuits in display sections A 13403 and B 13404. Note that image reproducing devices with recording media include home game devices and the like. Further, according to the present invention, the DVD reproducing apparatus shown in Fig. 32E is completed.

FIG. 32F shows a goggle display (head-mounted display), which includes a main body 13501, a display portion 13502, an arm portion 13503, and the like. The present invention can be applied to a circuit of the display portion 13502. Further, according to the present invention, the goggle display shown in FIG. 32F is completed.

Fig. 32G shows a video camera, which includes a main body 13601, a display portion 13602, a casing 13603, an external connection port 13604, a remote control receiving portion 13605, an image receiving portion 13606, a battery 13607, an audio input portion 13608, operation keys 13609, etc. . The present invention can be applied to a circuit of the display portion 13602. Further, according to the present invention, the video camera shown in Fig. 32G is completed.

32H shows a mobile phone including a main body 13701, a casing 13702, a display portion 13703, an audio input portion 13704, an audio output portion 13705, operation keys 13706, an external connection port 13707, an antenna 13708, and the like. The present invention can be applied to circuits in the display portion 13703 . Note that the mobile phone consumes less power when the display portion 13703 displays white letters on a black background. Further, according to the present invention, the mobile phone shown in Fig. 32H is completed.

If the higher brightness of photons emitted from organic light-emitting materials can be exploited later, the semiconductor device of the present invention can be applied to front or rear projectors in which light including output image data is amplified by a lens or the like.

The aforementioned electronic equipment is likely to be used for displaying data transmitted through telecommunication channels such as the Internet or CATV (Cable TV system), especially for displaying motion image data. Since the luminescent material has extremely high sensitivity, the light emitting device is suitable for moving image display.

Furthermore, since a light emitting device consumes power in its light emitting part, it is desirable to display data in as small a space as possible occupied by the light emitting part. Therefore, in the case of using a light emitting device in a display portion that mainly displays text data, such as a mobile phone, a sound reproduction device, it is desirable to drive the device so that the light emitting part displays text data on a non-emissive background.

As described above, the application range of the present invention is wide, and the present invention can be applied to electronic equipment in various fields. The electronic equipment in this embodiment can employ a semiconductor device having any of the structures shown in Embodiment Modes 1 to 6 above.

This application is based on Japanese Patent Application Serial No. 2003-131824 filed in Japan Patent Office on May 9, 2003, the contents of which are incorporated herein by reference.

Although the present invention has been fully described in the form of embodiments with reference to the accompanying drawings, it should be understood that various changes and modifications will be apparent to those skilled in the art. Therefore, unless otherwise such changes and modifications depart from the scope of the present invention defined hereinafter, they should be included therein.

Claims (10)

1. A semiconductor device, comprising: signal line; a plurality of unit circuits each including a switch and a transistor connectable to the signal line through the switch; and a power supply device that supplies a first current to transistors of M unit circuits selected from the plurality of unit circuits during precharging, and supplies a second current to transistors selected from M unit circuits among the plurality of unit circuits during a setting period. transistors of N unit circuits, where N and M are non-zero natural numbers, and Wherein, the M unit circuits include N unit circuits and unit circuits other than the N unit circuits. 2. A semiconductor device, comprising: signal line; a plurality of unit circuits each including a switch and a transistor connectable to the signal line through the switch; and a power supply device that supplies a first current to transistors of M unit circuits selected from the plurality of unit circuits during precharging, and supplies a second current to transistors selected from M unit circuits among the plurality of unit circuits during a setting period. transistors of N unit circuits other than the M unit circuits, Wherein, N and M are natural numbers that are not zero. 3. The semiconductor device according to claim 1, wherein N=1. 4. The semiconductor device according to claim 2, wherein N=1. 5. The semiconductor device according to claim 1, wherein the unit circuit includes a light emitting element connected to the transistor. 6. The semiconductor device according to claim 2, wherein the unit circuit includes a light emitting element connected to the transistor. 7. The semiconductor device according to claim 1, wherein a magnitude ratio of the first current to the second current is M:N. 8. The semiconductor device according to claim 2, wherein a magnitude ratio of the first current to the second current is M:N. 9. A driving method for a semiconductor device, the semiconductor device comprising a signal line; a plurality of unit circuits each comprising a switch and a transistor that can be connected to the signal line through the switch, the method comprising: supplying a first current to transistors of M unit circuits selected from the plurality of unit circuits; and supplying the second current to transistors selected from N unit circuits other than the M unit circuits among the plurality of unit circuits, Wherein, N and M are natural numbers that are not zero. 10. The driving method of a semiconductor device according to claim 9, wherein a magnitude ratio of the first current to the second current is M:N.

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