CN100533724C - Electronic device - Google Patents
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- CN100533724C CN100533724C CN 200710163074 CN200710163074A CN100533724C CN 100533724 C CN100533724 C CN 100533724C CN 200710163074 CN200710163074 CN 200710163074 CN 200710163074 A CN200710163074 A CN 200710163074A CN 100533724 C CN100533724 C CN 100533724C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Abstract
The invention provides an electronic means. Sn series solder containing Cu6Sn5 and Ni series solder are assembled from room temperature to 200 degree at solder interconnecting piece, thus the interfacial reaction is prevented to obtain reliability.
Description
Technical field
The present invention relates to a kind of electronic installation and manufacture method thereof that linkage interface worsens that suppress under hot environment.
Background technology
Along with the electronization of the such automobile of hybrid vehicle, fuel-cell vehicle, the vehicle electronics parts constantly increase.Particularly owing to be configured in electronic unit around the engine and will be in for a long time under the high temperature more than 150 ℃, so require to have reliability than under the stricter usually hot environment.As lead-free solder, be extensive use of warm scolder in the Sn system of the Sn-3Ag-0.5Cu of fusing point more than 200 ℃ etc., if but remain on environment for use more than 150 ℃ for a long time, because interfacial reaction progress on linkage interface, can form between space and growing metal compound layer etc., connection reliability is reduced.
In addition, along with the real dress of in recent years high density, along with the microminiaturization of the size of electronic unit, connecting portion is granular more.In this occasion, the intermetallic compounds layer that forms on linkage interface is higher at the connecting portion proportion, and the reliability of connecting portion, electrical characteristics, thermal characteristics can greatly worsen owing to interfacial reaction.In order to address these problems, each state is all carrying out suppressing the research of interfacial reaction.
As suppressing Sn is the method for the interfacial reaction of scolder, in patent documentation 1 (No. the 3152945th, Japan's special permission), reported that by using the Sn that is made of 0.1～2 weight %Cu, 0.002～1 weight %Ni, surplus Sn be scolder, can suppress to be connected the Cu corrosion of material by the interpolation of Cu, simultaneously, by adding Ni, can suppress the growth of the intermetallic compound of Cu6Sn5, Cu3Sn etc. on the linkage interface.In addition, in patent documentation 2 (TOHKEMY 2002-280417 number), report in the formation in solder bump, be connected material surface, be provided with Sn is 2 kinds of metal levels of solder reaction formation intermetallic compound, by connecting Sn at this is soldered ball, very unfertile land forms by 2～3 kinds of intermetallic compounds layers that element constitutes that contain Sn on linkage interface, thus, can suppress interfacial reaction.
Summary of the invention
But, in these prior aries, do not consider following problem, can not fully suppress the interfacial reaction of linkage interface.
Though patent documentation 1 suppresses interfacial reaction by adding Ni, but because Cu6Sn5, Cu3Sn are permanently connected to the Cu and the Sn that form compound layer is scolder, so the occasion under the high temperature that is in for a long time more than 150 ℃, the Cu-Sn compound is grown up, might be reduced reliability.
On the other hand, patent documentation 2 becomes the screen that Sn is scolder and the 2nd metal level that forms owing to close on the 1st intermetallic compounds layer that scolder forms most under the 1st intermetallic compounds layer, so it is big that interfacial reaction suppresses effect.But, for 2 kinds of metal levels are set, have following problem: increase electroplating work procedure, optionally carry out the structure that the parcel plating meeting makes cost uprise, can't be provided with electrode and be difficult to form metal level etc.In addition, because when the metal level of surperficial formation connects with joint face, need make itself and Sn is that solder reaction is as screen, so, if the metal bed thickness of surperficial formation, then following problem might take place: remaining unreacted surface metal-layer during connection can not fully obtain the screen effect; And make need the extend adjustment of program of connect hours etc. of surface metal-layer complete reaction.On the other hand,, be used to suppress the screen attenuation of interfacial reaction, under the high temperature more than 150 ℃, can not fully suppress interfacial reaction in the thin occasion of the most surperficial metal level.
The invention provides that a kind of carrying capacity of environment is little, cost is low, and long-time use also can be kept the electronic installation and the manufacture method thereof of connection reliability under the high temperature more than 150 ℃.
Be simply described as follows the summary of the invention of the representativeness in the invention disclosed among the application.
(1) a kind of electronic installation is characterized in that, comprising: the substrate that possesses electrode; The Ni system layer that on the electrode of aforesaid substrate, forms; Being configured in above-mentioned Ni is that the Sn that is electrically connected with above-mentioned electrode is a soldered ball on the layer; And do not contact mutually with above-mentioned Ni system layer for to make above-mentioned Sn be soldered ball, at above-mentioned Sn the compound layer that forms between soldered ball and the above-mentioned Ni system layer.
(2) according to (1) and described electronic installation, it is characterized in that: the above-claimed cpd layer is that layer directly contacts with above-mentioned Ni, does not comprise the metal level of other simple substance therebetween.
(3) according to (1) or (2) described electronic installation, it is characterized in that: the above-claimed cpd layer is the layer based on Cu-Sn compound or itself and Ni-Sn compound.
(4) according to (3) described electronic installation, it is characterized in that: above-mentioned Cu-Sn compound layer, be to be that scolder connects material and connects, make the above-mentioned Cu6Sn5 on above-mentioned Ni system layer, separate out or move and formation by the Sn that use contains the Cu6Sn5 phase of Duoing than eutectic composition.
Description of drawings
Fig. 1 is the cutaway view that model utility shows first execution mode of the electronic installation that the present invention relates to.
Fig. 2 is the cutaway view that model utility shows second execution mode of the electronic installation that the present invention relates to.
Fig. 3 is the cutaway view that model utility shows the scolder connecting portion that the mode of the soldered ball that basis the present invention relates to forms.
Fig. 4 is the cutaway view that model utility shows the scolder connecting portion that the chips welding of the electronic installation that basis the present invention relates to forms.
Fig. 5 be model utility be presented at formed the Cu layer on the Ni layer after, be the cutaway view of the scolder connecting portion of scolder when connecting by Sn.
Fig. 6 is the cutaway view that model utility shows the 3rd execution mode of the electronic installation that the present invention relates to.
Fig. 7 is the cutaway view that model utility shows the 4th execution mode of the electronic installation that the present invention relates to.
Fig. 8 is that model utility shows that first of scolder connecting portion of the present invention forms the figure of operation.
Fig. 9 is that model utility shows that second of scolder connecting portion of the present invention forms the figure of operation.
Figure 10 is that model utility shows that the 3rd of scolder connecting portion of the present invention forms the figure of operation.
Figure 11 is that model utility shows that the 4th of scolder connecting portion of the present invention forms the figure of operation.
Figure 12 is that model utility shows that the 5th of scolder connecting portion of the present invention forms the figure of operation.。
Figure 13 is that model utility shows that the 6th of scolder connecting portion of the present invention forms the figure of operation.
Figure 14 is the Cu-Sn binary constitutional diagram.
Figure 15 is the SEM photo that high temperature is placed the joint interface after testing.
Figure 16 is that model utility shows that the space of joint interface forms first cutaway view of situation.
Figure 17 is that model utility shows that the space of joint interface forms second cutaway view of situation.
Figure 18 is the 2nd SEM photo that high temperature is placed the joint interface after testing.
Figure 19 is the figure of the formation operation of the model utility scolder connecting portion that shows the electronic installation that the present invention relates to.
Embodiment
Below, will the present invention be described based on the record and the accompanying drawing of more detailed preferred implementation.
The electronic installation that the present invention relates to possesses the scolder connecting portion, can be connected the electrode that the Ni system layer of material is applied in to substrate etc., and the Sn that supplies with the composition that the Cu6Sn5 phase content Duos than eutectic composition is a scolder.
As concrete example, first execution mode of the electronic installation that the present invention relates to as shown in Figure 1, its formation comprises: substrate 5; The a plurality of first scolder connecting portions 1 that on first of aforesaid substrate, form by the mode of soldered ball; First reverse side at aforesaid substrate is situated between by surface real dress parts 101 and the semiconductor element 102 and the chip part 103 of scolder connecting portion 9 connections.
At this; the above-mentioned first scolder connecting portion 1 as shown in Figure 3; it is characterized in that: above as the Cu layer 4 of the electrode of substrate 5; the protective layer 7 that is provided with; make the part of above-mentioned Cu layer expose; is coating 3 in this exposed portions serve by the Ni that plating forms, and is that coating 3 and the Sn that constitutes soldered ball possess compound layer 2 between the scolder 8 at Ni.This compound layer 2 is based on Cu-Sn compound or itself and Ni-Sn compound, owing to can suppress interfacial reaction as screen, therefore, even if be in for a long time under the high temperature more than 150 ℃, also can suppress the growth of compound layer of linkage interface and the space that thereupon forms etc., can provide connection reliability high electronic installation.
This be because, be scolder when connecting material and connecting using the Sn that under room temperature to 200 ℃, contains the Cu6Sn5 phase of Duo than eutectic composition, in melt solder, when solidifying, the Cu6Sn5 in the scolder is initiatively to separate out on the coating or mobile at Ni, the formation screen.
In general, known is if the very thick growth of intermetallic compounds layer on soldered ball and the electrode interface, then can reduce owing to Ke Kendaer space etc. makes resistance to impact, but as mentioned above, the major part of the compound layer that the present invention forms can be separated out when solidifying or move, so, can access good resistance to impact along with interfacial reaction forms the space hardly.
In addition, in the present invention, owing to only use on the material at least that the Ni of Ni-P, Ni-B etc. is that coating gets final product being connected, so, do not need to be provided with 2 kinds of metal levels in the above-mentioned patent documentation 2, can realize few, the cost degradation of process number.And then, with (Cu, Ni)-the Sn compound is that the thickness of the screen of main body depends on the Cu-Sn compound amount that contains in the scolder, the many more screens of Cu-Sn compound amount that contain in the scolder are thick more.Therefore, can use the soldered ball of the composition that is fit to according to the size of soldered ball, can freely control (Cu, Ni)-thickness of the screen of Sn compound main body.In addition, also can the soldered ball after connection in residual Cu6Sn5 phase, when at high temperature using, the Ke Kendaer space can not take place, make screen thicker, realize the more superior electronic installation of connection reliability.
In addition, gimmick as patent documentation 2, be connected the further Cu of formation layer on the Ni coating of material surface in advance, though with Sn is that scolder is connected also and can forms the Cu-Sn compound layer, owing to be to form compound layer, so the problem in above-mentioned Ke Kendaer space etc. is arranged by reaction, in addition, also can be as shown in Figure 5, high temperature easily takes place and places the oxidation that causes, and the etching problem that causes of humidity in remaining Cu layer beyond the scolder connecting portion.In the present invention, owing to the Cu6Sn5 as the Cu-Sn compound is to be to separate out on the coating or move to form screen at Ni, so, need the Cu layer is not set wait other elemental metals layer being connected material surface, as shown in Figure 4, beyond other elemental metals layers of Cu layer after the connection etc. can not be exposed to the zone that has formed compound layer yet, so, the problems referred to above can not take place.
In addition, in the present embodiment, shown surface real dress parts 101, semiconductor element 102, all real example that is contained on the substrate 5 of chip part 103, but be not limited to this, also can lack any one, or respectively have a plurality of.
Second execution mode of the electronic installation that the present invention relates to is described with Fig. 2 below.The formation of present embodiment comprises: substrate 5; First a plurality of first scolder connecting portion 1 that form by the mode of soldered ball at aforesaid substrate; At first reverse side of aforesaid substrate, a plurality of second scolder connecting portion, the 9 real semiconductor elements of adorning 102 that are situated between and form by mode by soldered ball; Bury the lower membrane 6 of this second scolder connecting portion 9; And the mould resin 20 that covers first reverse side top of aforesaid substrate.
In the present embodiment, the first scolder connecting portion 1 also can be same with first execution mode, take formation shown in Figure 3, screen 2 by Cu-Sn compound or itself and Ni-Sn compound main body, even if can provide under the high temperature that is in for a long time more than 150 ℃, also can suppress the high electronic installation of connection reliability that the compound layer on the linkage interface is grown up.
At this, in first execution mode and second execution mode, put down in writing the example that has used such scolder connecting portion, promptly the Sn of the content of only the first scolder connecting portion 1 being supplied with the Cu6Sn5 phase composition of Duoing than eutectic composition is a scolder, but be not limited to this, also it can be used on the second scolder connecting portion 9.Certainly, on the second scolder connecting portion 9, general high-temperature solder can be used, also conductive adhesive can be used.
Below, as the 3rd execution mode of the electronic installation that the present invention relates to, as shown in Figure 6, the Sn that shows the composition that the content of Cu6Sn5 phase Duo than eutectic composition be scolder as soldering paste, the electronic unit reality is contained in example on the substrate.
The formation of present embodiment comprises: substrate 5; Jie is by the first scolder connecting portion 1 of supplying with and connecting with the form of soldering paste, and surface real dress parts 101, semiconductor element 103 and the insertion of adorning in fact respectively on first of aforesaid substrate be dress parts 104 in fact.Because it is also same with other real-time mode, the formation that adopts is to be the compound layer that forms between the coating based on Cu-Sn compound or itself and Ni-Sn compound in the scolder part of the first scolder connecting portion 1 with as the Ni on the Cu layer of the electrode of substrate 5, thereby generation screen, so, can realize the high electronic installation of connection reliability at high temperature.
But in the present embodiment, because the Sn of the composition that the content of Cu6Sn5 phase Duo than eutectic composition is that scolder provides as soldering paste, the reality of electronic unit is adorned and has been used reflow ovens etc.When the time comes, because above-mentioned soldering paste need can guarantee good wettability near liquidus temperature, so preferred the use contains below 20% not that the Sn of the Cu6Sn5 phase of fusion is a soldering paste.This is because if surpass, and the flowability of scolder worsens, and space, not wetting etc. might take place.
The formation of the 4th execution mode of the electronic installation that the present invention relates to as shown in Figure 7, comprises: having implemented Ni is the framework 17 of coating; On said frame, be situated between by the semiconductor element 102 of the first scolder connecting portion, the 1 real dress of supplying with the form of solder foil and connecting; Jie is by the electrode of above-mentioned semiconductor element 102 and the lead-in wire 16 of closing line 15 electrical connections; At least the plastotype resin 20 that covers above-mentioned semiconductor element 102 and be provided with.Same with other execution mode, because using the Sn that contains the Cu6Sn5 phase of Duoing than eutectic composition is that solder foil connects, so, Cu6Sn5 can be to separate out on the coating or move at Ni mutually, formation also can prevent the characteristic degradation that the interfacial reaction progress causes based on the screen of Cu-Sn compound or Ni-Sn compound under high temperature uses.Particularly on many products that dispels the heat as semiconductor element 102, connecting portion can become high temperature when heat radiation, so the structure that the present invention relates to is effective.
More than show the execution mode of several electronic installations that the present invention relates to, but be not limited to this, can also be applicable to the electronic installation of configuration around the engines such as power semiconductor of vehicle mounted, other electronic installation.In addition, owing to use compound growth can suppress to use when of the present invention the time at small connecting portion, so, can suppress reliability, conductivity, the heat conducting change of connecting portion.
In addition, in the above-described embodiment, Sn is a scolder so long as get final product in the Sn that contains the Cu6Sn5 phase of Duoing than eutectic composition is the scope of scolder, and also can use Sn-Cu is that scolder, Sn-Ag-Cu are that scolder, Sn-Ag-Cu-Bi-In are that scolder, Sn-Ag-Cu-In are that scolder, Sn-Zn are that scolder, Sn-Bi are that scolder, Sn-In are scolder etc.Can also carry out homogenizing (leveling) with them, the electronic installation that electronic unit has been installed is provided.Specifically, also they can be used aptly the thermal stratification in the structure shown in first execution mode or second execution mode to connect.In advance on installation base plate, by will being that scolder carries out homogenizing in advance at the Sn that under room temperature to 200 ℃, contains the Cu6Sn5 phase of Duoing than eutectic composition, even if with the general Sn-Ag-Cu that uses in the Reflow Soldering is that scolder etc. connects, also can on Ni coating, form screen, the effect of the interfacial reaction that can be inhibited based on the Cu-Sn compound.
And then in the above-described embodiment, being illustration all, Ni is a coating, but is not limited in this, also can be not by plating Ni system that other gimmick forms layer.In addition,, can use Ni, Ni-P, Ni-B etc., but be not limited to this as Ni system layer, also can be on this by being few formation such as coating among Au, Ag, the Pd.For example, by implementing Au coating or Ag coating, can improve wettability.In addition, this occasion, the coating by making Au or Ag when connecting is in the inner all diffusions of scolder, can be the screen that forms on the coating based on Cu-Sn compound or itself and Ni-Sn compound at bottom Ni, the effect of the interfacial reaction that is inhibited equally.
Below, the manufacture method that the is conceived to above-mentioned electronic installation particularly manufacture method of its scolder connecting portion describes.
Fig. 8, Fig. 9, Figure 10 are the manufacture methods that shows the scolder connecting portion 1 that forms as soldered ball.
Fig. 8 shows that supplying with scolder is the situation of soldered ball 10, by will under room temperature to 200 ℃, contain the Cu6Sn5 of Duoing than eutectic composition mutually 2 Sn be that the Ni of soldered ball 10 on Cu electrode 4 is that coating 3 is supplied with and heating, Cu6Sn5 mutually on one's own initiative Ni be coating 3 above separate out or move, form compound layer 2.Thus, can form the scolder connecting portion 1 as soldered ball, this soldered ball has formed the screen that at high temperature suppresses interfacial reaction.
Fig. 9 shows that supplying with scolder is the situation of soldering paste.The part of the above-mentioned Cu layer that the protective layer 7 that is provided with on the Cu of the electrode that becomes substrate 5 layer 4 makes is exposed, and forms Ni system layer by plating on this exposed portions serve.Thereafter, printing the Sn that contains the Cu6Sn5 phase of Duoing than eutectic composition on above-mentioned Ni coating is the soldering paste of scolder, by adding the Cu-Sn compound layer 2 of thermosetting as screen.
Figure 10 shows the situation of scolder for welding plating 12 of supplying with, Ni on the Cu of substrate 5 electrode 4 is that the Sn that plating contains the Cu6Sn5 phase of Duoing than eutectic composition on the coating 3 is a scolder, thereafter by heating the scolder connecting portion 1 that can form as soldered ball, this soldered ball has formed the screen that is made of Sn-Cu compound 2.
In addition, Figure 11, Figure 12, Figure 13 are the manufacture methods of the scolder connecting portion 1 of display chip welding formation, supply with by solder foil 13, soldering paste 11, welding wire 14 respectively.Though supply mode is different, but all manufacture methods all are by being that the Sn that heating contains the Cu6Sn5 phase of Duoing than eutectic composition on the coating is a scolder at Ni, at this Ni is to form the screen that Cu-Sn compound or itself and Ni-Sn compound constitute on the coating, be common in this, the high electronic installation of connection reliability under the high temperature can both be provided.In addition, the supply mode of these scolders can be selected according to JA(junction ambient) is suitable.
Below, illustrate when having used the Sn that contains the Cu6Sn5 phase of Duoing to be scolder than eutectic composition, at Ni the mechanism that forms on the coating as the Cu-Sn compound layer of screen.
As Sn-3Ag-0.5Cu or Sn-0.7Cu, comparing the mutually few occasion of Cu6Sn5 with eutectic composition, do not form in the present invention being that the Cu-Sn that forms on the coating is the screen of the compound of main component at Ni.In Figure 14, show the Sn-Cu binary constitutional diagram.In the composition that content lacks than Sn-0.9Cu, when melt solder is solidified, contain the Sn of Duoing and at first separate out as primary crystal than eutectic composition, last Sn and Cu6Sn5 solidify as eutectic structure.When the time comes, because Cu6Sn5 disperses to separate out in the crystal boundary of connecting portion inside etc., so, be not separate out into the shielding stratiform on the coating at Ni.Therefore, can not obtain thermal endurance.On the other hand, in the composition that Cu content is Duoed than Sn-0.9Cu, when melt solder was solidified, at first Cu6Sn5 separated out mutually.When the time comes, because Cu6Sn5 is preferentially to separate out on the coating at Ni, so, the screen of formation Cu-Sn compound main body.At last, Sn and Cu6Sn5 solidify as eutectic structure.Though in fact cold influence was arranged, in above-mentioned mechanism, formed the screen of Cu-Sn compound.Therefore, be the composition that scolder need select the content of Cu6Sn5 to Duo than eutectic composition at the Sn that under room temperature to 200 ℃, contains the Cu6Sn5 phase.In addition, when containing other elements in Sn-Cu system, the composition of eutectic composition is different because of alloy system.In addition, so far, be the phase that contains in the scolder as Sn, exemplify the Cu6Sn5 phase, but be not limited to this, form screen so long as can on Ni system layer, separate out or move by above-mentioned mechanism, also can be other compound.
Below show the result of the embodiment of concrete enforcement with comparative example.
1-6 embodiment: the real dress of soldered ball
With Fig. 8 embodiments of the invention 1-6 is described.Applying Electroless Plating Ni on Cu spacer layer 4 is coating 3, implemented flash distillation Au coating thereon, on such assembling substrates 5, apply flux, supply with diameter be 0.4mm φ, after the Sn that contains the Cu6Sn5 phase under room temperature to 200 ℃ is soldered ball 10, with reflow ovens at N
2Heat in the air-flow, on spacer layer, form soldered ball.
As above, the electronic installation (structure of Fig. 2) that has formed soldered ball is carried out high temperature place test under the condition of 200 ℃ * 1000h, measured the bonding strength of soldered ball/spacer layer connecting portion.Its result is presented in the table 1.The situation that will have the intensity more than 80% of initial stage bonding strength is expressed as zero, the situation usefulness * expression of the intensity less than 80%.In embodiment 1～6, the high temperature of all having confirmed 210 ℃ * 1000h is placed the intensity more than 80% of also keeping the initial stage bonding strength after the test.In Figure 15,, shown the section of the linkage interface the when sample that will use the Sn-1Ag-3Cu scolder to connect is placed on 210 ℃ * 1000h high temperature as an example.Owing to the screen of Cu-Sn compound, high temperature is placed back Ni layer, and disappearance is still not residual, does not observe the space formation that change in volume causes yet.
Comparative example 1,2
Joint construction is identical with embodiment 1-6.The high temperature of having measured this electronic installation is placed the bonding strength of the soldered ball/spacer layer connecting portion after testing.Its result is presented in the table 1 equally.The situation that will have the intensity more than 80% of initial stage bonding strength is expressed as zero, the situation usefulness * expression of the intensity less than 80%.In comparative example 1,2, after the high temperature of 200 ℃ * 1000h was placed test, comparative example 1,2 all was 80% a intensity less than the initial stage bonding strength.Observe the connection section, on linkage interface, formed space 200 as Figure 16, Figure 17.Place by high temperature, the interfacial reaction progress because the space of following the change in volume of the growth of compound layer 18 to cause forms, reduces bonding strength.In Figure 18, the section of the linkage interface when having shown that as an example will carry out 1000h high temperature with the sample that the Sn-3Ag-0.5Cu scolder connects under 200 ℃ places.Since do not form the screen of Cu-Sn compound, thus Sn and Ni reaction, the complete obiteration of Ni layer, and then until the Cu of lower floor also reacts with Sn, very heavy back has formed the Cu-Sn compound layer.Very big change in volume takes place in its result, and the space forms, and can not keep good connection state.
Table 1
| Embodiment | Scolder is formed (nass%) | Be connected material metalization | Structure | High temperature is placed 200 ℃ of 1000h of |
| 1 | Sn-2Cu | Ni | Fig. 2 | ○ |
| 2 | Sn-3Cu | Ni | Fig. 2 | ○ |
| 3 | Sn-5Cu | Ni | Fig. 2 | ○ |
| 4 | Sn-1Ag-3Cu | Ni | Fig. 2 | ○ |
| 5 | Sn-3Ag-0.51n-3Cu | Ni | Fig. 2 | ○ |
| 6 | Sn-3Ag-0.51n-0.5Ni-3Cu | Ni | Fig. 2 | ○ |
| Comparative example | ||||
| 1 | Sn-3Ag-0.5Cu | Ni | Fig. 2 | × |
| 2 | Sn-2Cu | Pure Cu | Fig. 2 | × |
7-12 embodiment: the real dress of substrate
With Fig. 6, Figure 19 embodiments of the invention 7-12 is described.On real dress substrate 5, print with metal mask the Sn that contains the Cu6Sn5 phase under the room temperature to 200 ℃ be soldering paste 11 and supply with after, heat in the N2 air-flow with reflow ovens, assembled the electronic unit 101 that band goes between.
The real dress substrate that has as above assembled electronic installation is carried out the temperature cycling test that high temperature is placed test and-55 ℃ of (30min.)/175 ℃ (30min.) 500 cycles under the condition of 200 ℃ * 1000h, measured the bonding strength of soldered ball/spacer layer connecting portion.Its result is presented in the table 2.The situation that will have the intensity more than 80% of initial stage bonding strength is expressed as zero, the situation usefulness * expression of the intensity less than 80%.In embodiment 1～6, the high temperature of all having confirmed 200 ℃ * 1000h is placed the intensity more than 80% of also keeping the initial stage bonding strength after the test.
Comparative example 3,4
Joint construction is identical with embodiment 7-12.The high temperature of having measured this electronic installation is placed the bonding strength of the soldered ball/spacer layer connecting portion after testing.Its result is presented in the table 2.The situation that will have the intensity more than 80% of initial stage bonding strength is expressed as zero, the situation usefulness * expression of the intensity less than 80%.In comparative example 3,4, confirmed the temperature cycling test in-40 ℃ of (30min.)/200 ℃ (30min.) 500 cycles after, keep the intensity more than 80% of initial stage bonding strength.But, same with comparative example 1,2 after the high temperature of 200 ℃ * 1000h is placed test in comparative example 3,4, all do not reach 80% intensity of initial stage bonding strength.Observe the connection section, on linkage interface, formed space 200 as Figure 16, Figure 17.Place by high temperature, the interfacial reaction progress, because the space of following the change in volume of the growth of compound layer 18 to cause forms, bonding strength descends.
Table 2
| Embodiment | Scolder is formed (mass%) | Be connected material metalization | Joint construction | High temperature is placed 200 ℃ of 1000h of test | Temperature cycle test-55 ℃/175 ℃ of 500 |
| 7 | Sn-2Cu | Ni | Fig. 6 left side | ○ | ○ |
| 8 | Sn-3Cu | Ni | Fig. 6 left side | ○ | ○ |
| 9 | Sn-5Cu | Ni | Fig. 6 left side | ○ | ○ |
| 10 | Sn-1Ag-3Cu | Ni | Fig. 6 left side | ○ | ○ |
| 11 | Sn-3Ag-0.51n-3Cu | Ni | Fig. 6 left side | ○ | ○ |
| 12 | Sn-3Ag-0.51n-0.5Ni-3Cu | Ni | Fig. 6 left side | ○ | ○ |
| Comparative example | |||||
| 3 | Sn-3Ag-0.5Cu | Ni | Fig. 6 left side | × | × |
| 4 | Sn-2Cu | Pure Cu | Fig. 6 left side | C | × |
13-18 embodiment: the real dress of chip
With Fig. 7, Figure 11 embodiments of the invention 13-18 is described.Above the Cu framework 17 of having implemented Ni coating, supplying with at the Sn that contains the Cu6Sn5 phase under room temperature to 200 ℃ is solder foil 13, after being heated to 260 ℃ of fusions on the hot plate, welds semiconductor element 102 thereon., electrode semiconductor element above and lead-in wire 16 carried out wire-bonded, under 180 ℃, pass film, made electronic installation thereafter.
The temperature cycling test of this electronic installation and the thermal resistance change after the high temperature placement have been measured.Its result is presented in the table 3.To be 30% to represent with zero with interior occasion since initial stage thermal resistance change, be the occasion usefulness * expression more than 20%.In embodiment 13-18, all confirmed the temperature cycling test in-40 ℃ of (30min.)/200 ℃ (30min.) 500 cycles after, thermal resistance change is in 20%.In addition, after the high temperature of 200 ℃ * 1000h is placed test, confirmed in embodiment 13-18 that the thermal resistance change all is in 20%.
Comparative example 5,6
Joint construction is identical with embodiment 13-18.Measured the thermal resistance change after temperature cycle test and high temperature are placed test.Its result is presented in the table 3 equally.To be 30% to represent with zero with interior occasion since initial stage thermal resistance change, be the occasion usefulness * expression more than 20%.In embodiment 13-18, all confirmed the temperature cycling test in-40 ℃ of (30min.)/200 ℃ (30min.) 500 cycles after, thermal resistance change is in 20%.But in comparative example 5,6, after the high temperature of 200 ℃ * 1000h was placed test, the thermal resistance change was more than 20%.Observe the connection section, on linkage interface, formed space 200 as Figure 16, Figure 17.Can think and place the interface progress,, produce very big thermal resistance change owing to follow the change in volume of compound layer 18 growths to cause the space to form by high temperature.
Table 3
| Embodiment | Scolder is formed (mass%) | Be connected material metalization | Joint construction | High temperature is placed 200 ℃ of 1000h of test | Temperature cycle test-40 ℃/200 ℃ of 500 |
| 13 | Sn-2Cu | Ni | Fig. 7 | ○ | ○ |
| 14 | Sn-3Cu | Ni | Fig. 7 | ○ | ○ |
| 15 | Sn-5Cu | Ni | Fig. 7 | ○ | ○ |
| 16 | Sn-1Ag-3Cu | Ni | Fig. 7 | ○ | ○ |
| 17 | Sn-3Ag-0.51n-3Cu | Ni | Fig. 7 | ○ | ○ |
| 18 | Sn-3Ag-0.51n-0.5Ni-3Cu | Ni | Fig. 7 | ○ | ○ |
| Comparative example | |||||
| 5 | Sn-3Ag-0.5Cu | Ni | Fig. 6 left side | × | ○ |
| 6 | Sn-2Cu | Pure Cu | Fig. 7 | × | ○ |
According to the present invention, can provide that carrying capacity of environment is little, cost is low, long-time use also can be kept the electronic installation and the manufacture method thereof of connection reliability under the high temperature more than 150 ℃.
Claims (25)
1. an electronic installation is characterized in that, comprising:
The substrate that possesses electrode;
The Ni system layer that on the electrode of described substrate, forms;
Being configured in described Ni is that the Sn that is electrically connected with described electrode is the scolder connecting portion on the layer; And,
At described Sn is the compound layer that forms between scolder connecting portion and the described Ni system layer, it makes described Sn, and to be the scolder connecting portion do not contact mutually with described Ni system layer, and this compound layer comprises the phase of the compound identical with at described Sn being the composition that comprises in the scolder connecting portion.
2. electronic installation according to claim 1 is characterized in that, described compound layer is that layer directly contacts with described Ni, does not comprise the metal level of other simple substance therebetween.
3. electronic installation according to claim 1 is characterized in that, described compound layer is the layer that comprises Cu-Sn compound or itself and Ni-Sn compound.
4. electronic installation according to claim 3 is characterized in that, described Cu-Sn compound is Cu6Sn5.
5. electronic installation according to claim 1 is characterized in that, described compound be the Cu6Sn5 phase mutually.
6. electronic installation according to claim 3, it is characterized in that, described Cu-Sn compound is to be that scolder connects material and connects by the Sn that use contains the Cu6Sn5 phase of Duoing than eutectic composition, and making described Sn is that scolder connects Cu6Sn5 in the material and separates out or move on described Ni system layer and formation.
7. electronic installation according to claim 6 is characterized in that, is remaining in the scolder connecting portion described Cu6Sn5 phase to be arranged at described Sn.
8. electronic installation according to claim 6 is characterized in that, described Sn is that scolder connection material is to provide with any form in soldered ball, soldering paste, the welding plating.
9. electronic installation according to claim 1 is characterized in that, described Ni is that layer is any among Ni, Ni-P, the Ni-B.
10. electronic installation according to claim 9 is characterized in that, described Ni is that layer forms by plating.
11. electronic installation according to claim 1, it is characterized in that described Sn is that the scolder connecting portion is that Sn-Ag-Cu is that scolder, Sn-Zn are that scolder, Sn-Ag-Cu-Bi-In are that scolder, Sn-Ag-Cu-In are that scolder, Sn-Bi are that scolder, Sn-In are any in the scolder.
12. electronic installation according to claim 1 is characterized in that, has adorned the reverse side that described Sn is the face of scolder connecting portion in the reality of described substrate, and in surface real dress parts, semiconductor element, the chip part any is housed at least in fact.
13. electronic installation according to claim 12, it is characterized in that, described Sn is that the scolder connecting portion is that Sn-Ag-Cu is a scolder, Sn-Zn is a scolder, Sn-Ag-Cu-Bi-In is a scolder, Sn-Ag-Cu-In is a scolder, Sn-Bi is a scolder, Sn-In is any in the scolder, and any in described surface real dress parts or described semiconductor element or the described chip part and the connection of described substrate are to use that to have the Cu6Sn5 Sn-Ag-Cu mutually of Duoing than eutectic composition be scolder, Sn-Zn is a scolder, Sn-Ag-Cu-Bi-In is a scolder, Sn-Ag-Cu-In is a scolder, Sn-Bi is a scolder, Sn-In is that in the scolder any connects.
14. an electronic installation is characterized in that, comprising:
The substrate that possesses electrode;
The Ni system layer that on the electrode of described substrate, forms;
Being configured in described Ni is on the layer, is the connecting portion that scolder forms by the Sn that is electrically connected with described electrode;
At described connecting portion and the described Ni that by Sn is scolder forms is the compound layer that forms between the layer, it makes described is that the connecting portion that scolder forms is that layer does not contact mutually with described Ni by Sn, this compound layer comprises the phase of the compound identical with at described Sn being the composition that comprises in the connecting portion that forms of scolder, and
By described Ni system layer, described be the connecting portion that forms of scolder, described compound layer and the reality that is electrically connected with the electrode of described substrate is adorned parts by Sn.
15. electronic installation according to claim 14 is characterized in that, described compound layer is that layer directly contacts with described Ni, does not comprise the metal level of other simple substance therebetween.
16. electronic installation according to claim 14 is characterized in that, described real dress parts are any in surface real dress parts, chip part, the real dress of the insertion parts.
17. electronic installation according to claim 14 is characterized in that, described compound layer is the layer that comprises Cu-Sn compound or itself and Ni-Sn compound.
18. electronic installation according to claim 17 is characterized in that, described Cu-Sn compound is Cu6Sn5.
19. electronic installation according to claim 14 is characterized in that, described compound be the Cu6Sn5 phase mutually.
20. electronic installation according to claim 17, it is characterized in that, described Cu-Sn compound layer is to be that scolder connects material and connects by the Sn that use contains the Cu6Sn5 phase of Duoing than eutectic composition, and making described Sn is that scolder connects Cu6Sn5 in the material and separates out or move on described Ni system layer and formation.
21. electronic installation according to claim 20 is characterized in that, described be remaining in the connecting portion that forms of scolder described Cu6Sn5 phase to be arranged by Sn.
22. electronic installation according to claim 20 is characterized in that, described Sn is that scolder connection material is to provide by any form in weldering paper tinsel, soldering paste, bonding wire, the welding plating.
23. electronic installation according to claim 14 is characterized in that, described Ni is that layer is any among Ni, Ni-P, the Ni-B.
24. electronic installation according to claim 23 is characterized in that, described Ni is that layer forms by plating.
25. electronic installation according to claim 14, it is characterized in that described Sn is that the connecting portion of scolder is that Sn-Ag-Cu is that scolder, Sn-Zn are that scolder, Sn-Ag-Cu-Bi-In are that scolder, Sn-Ag-Cu-In are that scolder, Sn-Bi are that scolder, Sn-In are any in the scolder.
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| JP2010110790A (en) * | 2008-11-06 | 2010-05-20 | Miyachi Technos Corp | Fusing method |
| JP2011005542A (en) * | 2009-06-23 | 2011-01-13 | Nihon Superior Co Ltd | In-CONTAINING LEAD-FREE SOLDER ALLOY, AND SOLDERED JOINT USING THE SOLDER |
| TWI430377B (en) * | 2011-08-09 | 2014-03-11 | Univ Nat Chiao Tung | Method for inhibiting growth of intermetallic compounds |
| JP5929722B2 (en) * | 2011-11-30 | 2016-06-08 | Tdk株式会社 | Terminal structure, printed wiring board, module substrate, electronic device, and manufacturing method of terminal structure |
| JP6154110B2 (en) * | 2012-01-20 | 2017-06-28 | 京セラ株式会社 | Mounting board |
| TWI476878B (en) * | 2012-05-10 | 2015-03-11 | Univ Nat Chiao Tung | Electric connecting structure comprising preferred oriented cu5sn5 grains and method of fabricating the same |
| JP2013252548A (en) * | 2012-06-08 | 2013-12-19 | Nihon Almit Co Ltd | Solder paste for joining micro component |
| JP5938390B2 (en) | 2012-12-25 | 2016-06-22 | 三菱マテリアル株式会社 | Power module |
| US9642275B2 (en) | 2012-12-25 | 2017-05-02 | Mitsubishi Materials Corporation | Power module |
| US20160260679A1 (en) * | 2014-03-27 | 2016-09-08 | Intel Corporation | Hybrid interconnect for low temperature attach |
| JP6387522B2 (en) | 2014-12-03 | 2018-09-12 | パナソニックＩｐマネジメント株式会社 | Mounting structure |
| JP6330786B2 (en) * | 2015-11-16 | 2018-05-30 | トヨタ自動車株式会社 | Manufacturing method of semiconductor device |
| JP6784053B2 (en) * | 2016-04-20 | 2020-11-11 | 富士通株式会社 | Manufacturing method of electronic device |
| CN110026705A (en) * | 2019-03-08 | 2019-07-19 | 南昌大学 | A kind of coating and its preparation process of enhancing Sn base solder/Kovar alloy interconnection welding spot reliability |
| JP7371407B2 (en) * | 2019-09-13 | 2023-10-31 | 株式会社プロテリアル | cable |
| CN112743256A (en) * | 2020-12-09 | 2021-05-04 | 深圳市朝日电子材料有限公司 | Composite low-temperature lead-free soldering paste and preparation method thereof |
| JP2024026932A (en) * | 2022-08-16 | 2024-02-29 | 日立Astemo株式会社 | Electronic devices and electronic device manufacturing methods |
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| JP3796181B2 (en) * | 2002-02-14 | 2006-07-12 | 新日本製鐵株式会社 | Electronic member having lead-free solder alloy, solder ball and solder bump |
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