CN100527100C - Method for writing data through buffer, buffer system and device - Google Patents
Method for writing data through buffer, buffer system and device Download PDFInfo
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- CN100527100C CN100527100C CNB2007101201845A CN200710120184A CN100527100C CN 100527100 C CN100527100 C CN 100527100C CN B2007101201845 A CNB2007101201845 A CN B2007101201845A CN 200710120184 A CN200710120184 A CN 200710120184A CN 100527100 C CN100527100 C CN 100527100C
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Abstract
A method for writing data through buffer storage includes dividing buffer storage block to be multiple logic region and setting relevant information bit for each logic region for labeling out whether there is data to be updated in logic region or not, setting information bit corresponding to said logic region to be mark presenting that there is data to be updated when data to be updated is written into logic region, making response of successful writing-in without data being red back for raising response speed and ensuring that there is no ineffective data to be written into object storage region when update is carried out.
Description
Technical field
The present invention relates to memory technology, particularly a kind of method, a kind of caching system and a kind of buffer storage by cache writing data.
Background technology
In the prior art, visit storage medium by buffer memory (Cache) usually, with the access times of minimizing to storage medium, thus the operational efficiency of raising application program.
Specifically, in certain system, application program in applied host machine/server is write data such as for example various instructions in the buffer memory earlier, refreshing when constantly arriving then, for example target storage medium situations such as relatively free time or data are in need of immediate treatment take place, by the refresh control unit of realizing refresh function in this system with the Refresh Data stored in the buffer memory in target storage medium.Wherein, buffer memory also can be described as intermediate storage medium, and its read or write speed usually will be far above target storage medium.
Suppose that application program elder generation stores a plurality of I/O (I/O) instruction in buffer memory, realize the polymerization of I/O instruction, the a plurality of I/O instructions that to store in buffer memory simultaneously then flush in the target storage medium, promptly for a plurality of I/O instructions, only visit target storage medium one time, just can realize the concurrent of I/O instruction, thereby improve the execution efficient of a plurality of I/O instructions.
In the practical application, common is a plurality of equal-sized with the spatial division in the buffer memory, i.e. cache blocks.Store a data in each cache blocks, generally including in the data: the corresponding relation of this cache blocks and target storage area, representing whether to remain in this cache blocks the zone bit of mark of refresh data.Wherein, the target storage area is meant storage space in the target storage medium.
Fig. 1 is existing synoptic diagram by cache writing data.As shown in Figure 1, each blockage in the buffer memory is represented a cache blocks respectively, and each blockage in the target storage medium is represented a target storage area respectively.Application program writes data into earlier in the corresponding cache blocks in the buffer memory, these data can be described as treats refresh data, promptly in the dark blockage in the buffer memory as shown in Figure 1, and be set to represent to remain the mark of refresh data by the zone bit that the refresh control unit in the system is written into the corresponding cache blocks for the treatment of refresh data; Refreshing when constantly arriving then, corresponding relation according to cache blocks and target storage area, is that the refresh data for the treatment of that expression remains in the cache blocks of mark of refresh data flushes in the corresponding target storage area by the refresh control unit with zone bit, promptly in the dark blockage in the target storage medium as shown in Figure 1, and the zone bit of this cache blocks correspondence is set to represent not treat the mark of refresh data.
Though each the cache blocks size in the buffer memory equates,, generally, be written to that data volume size in the buffer memory but not necessarily equates.For cache blocks, as long as it receives data and storage, its corresponding zone bit all can be set to represent to remain the mark of refresh data, but its data that receive may be not enough to take all storage spaces of this cache blocks.Like this, usually, can produce the invalid data in the cache blocks is flushed to situation in the target storage medium.
Fig. 2 a is for having now by in the process of cache writing data invalid data being flushed to the synoptic diagram of target storage area.Shown in Fig. 2 a, the data that application program is written to the target storage area with needs are first written in the corresponding cache blocks in the buffer memory, but the data volume size of these data is less than the size of cache blocks, wherein, the current interior data of cache blocks that are written to are shown in the dark part in the cache blocks among Fig. 2 a, and the data of having stored before in this cache blocks are shown in the light-colored part in the cache blocks among Fig. 2 a.Concerning the write operation of target storage medium, to refresh the data that the back keeps be invalid data last time in this cache blocks, the promptly non-refresh data for the treatment of for current.Yet, refreshing when constantly arriving, the refresh control unit can all flush to all data in this cache blocks in the corresponding target storage area, thereby make the invalid data in the cache blocks understand the interior valid data of target storage area that the cover part does not need to write data, the part target storage area that valid data are capped is shown in dark part in the target storage area among Fig. 2 a, thereby make application program work as in the process that the forward direction target storage medium writes data, appearance is to the maloperation of target storage medium, and then may produce the application program run-time error, operate in the system disorders on the target storage medium, potential faults such as the loss of effective data on the target storage medium.
In order to address the above problem, there is following scheme in the prior art:
Application program with the data volume size less than the cache blocks size treat that refresh data is written to cache blocks after, the refresh control unit is with in the target storage medium, the data corresponding with not writing the part for the treatment of refresh data in this cache blocks read back in this cache blocks, the process that data corresponding with invalid data position in the cache blocks in the target storage medium are read back into cache blocks is referring to Fig. 2 b, and the zone bit of this cache blocks correspondence is set to represent to remain the mark of refresh data then; Refreshing when constantly arriving, the refresh control unit all flushes to all data in this cache blocks in the corresponding target storage area again.
Like this, be actually the invalid data in the cache blocks is replaced with earlier in the target storage medium and may this be disabled the data that data cover, and then refresh, thereby can avoid maloperation the target storage area.
But there is following problem in such scheme:
After the cache blocks zone bit was set to represent to remain the mark of refresh data, the refresh control unit in the system just responded to the user of utility application, and expression is to the write operation success of buffer memory.And in the such scheme, the refresh control unit reads back into the data in the target storage medium after the cache blocks, and just the zone bit in the cache blocks is set to represent to remain the mark of refresh data, promptly can't respond the user immediately.
And, application program with the data volume size less than the cache blocks size treat that refresh data is written to cache blocks after, the refresh control unit might not be immediately read back corresponding data in the target storage medium, but is reading back may wait system idle the time.Like this, after just making that the user will treat that by application program refresh data is written in the cache blocks, may can't obtain representing to write the response of success for a long time, thereby make the user think by mistake to write success and initiate write operation again, increase unnecessary operation and increased system burden.
In the such scheme, also might be because system is busy for a long time, the positional information of its data that need from target storage medium, read back that made the refresh control unit loss, thereby at system recovery after the free time, the refresh control unit corresponding data of can't from target storage medium, reading back, thereby still invalid data may be flushed in the target storage medium, cause maloperation to target storage medium.
Because the response speed of such scheme is slow and can't avoid maloperation to target storage medium fully, makes certain customers have to abandon advantage, but utilize application program will treat that refresh data directly writes to target storage medium by cache writing data.
As seen, have now, can't take in data under the situation of cache blocks, can carry out maloperation to the target storage area, thereby produce various potential faults by the scheme of buffer memory to the target storage medium write data.And, since size of data usually can't with cache blocks size coupling, therefore, the probability that the maloperation of target storage medium is taken place is very big.
Summary of the invention
In view of this, the invention provides a kind of method, a kind of caching system and a kind of buffer storage, can in the maloperation probability of happening that reduces the target storage area, improve response speed by cache writing data.
A kind of method by cache writing data provided by the invention comprises:
A cache blocks in the buffer memory is divided at least two logic regions, and the corresponding relation of the target storage area in logic region and the exterior storage medium is set, the corresponding target storage area of a logic region in this corresponding relation; And each logic region correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data;
Will treat refresh data be cached to the corresponding informance position and do not treat in the logic region of refresh data mark for expression, and the information bit of this logic region correspondence is set to represent to remain the mark of refresh data;
The corresponding informance position is flushed to corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data.
Described the corresponding informance position is flushed to before the corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, this method further comprises: from the target storage area, read with information bit and do not treat the corresponding data of logic region of the mark of refresh data, and be written in this logic region for expression;
Described the corresponding informance position is remained to treat that refresh data flushes to corresponding target storage area and is in the logic region of refresh data mark for expression: with the Refresh Data in the cache blocks to corresponding target storage area.
The information bit that the corresponding relation of logic region and target storage area and described logic region are corresponding is arranged in the data of cache blocks.
Each described information bit is one in the default bitmap, the corresponding cache blocks of described bitmap.
Each logic region equal and opposite in direction.
Described division to logic region is to read and write unit according to the default minimum of target storage area to carry out.
A kind of caching system provided by the invention comprises: buffer storage and refresh control unit, be coupled between applied host machine/server and the target storage medium, and described buffer storage is made of cache blocks,
Comprise the logic region of division in each cache blocks of described buffer storage, and be provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding described target storage area of a logic region in this corresponding relation; And logic region also correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data;
Do not treat to have write in the logic region of refresh data for expression when the corresponding informance position and treat refresh data, the information bit of this logic region correspondence of described refresh control unit is set to represent to remain the mark of refresh data;
Described refresh control unit flushes to outside corresponding target storage area with the corresponding informance position for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data.
Described refresh control unit further from the external object storage area, read with the corresponding informance position and does not treat the pairing data of logic region of the mark of refresh data for expression, and be written in this logic region before carrying out described refreshing;
Described refresh control unit be by with the Refresh Data in the described cache blocks to outside corresponding target storage area, and the corresponding informance position is flushed to outside corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark.
Further comprise a data space in the described cache blocks, be used for a storage data;
The information bit that the corresponding relation of logic region and target storage area and described logic region are corresponding is arranged in the data of cache blocks.
Each described information bit is one in the default bitmap.
Each logic region equal and opposite in direction.The size of described logic region is the default minimum unit that reads and writes of corresponding target storage area.
A kind of buffer storage provided by the invention, this device is coupled between applied host machine/server and the target storage medium, comprising: this device comprises cache blocks,
Comprise the logic region of division in the cache blocks, and be provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding outside target storage area of a logic region in this corresponding relation; And logic region also correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data.
Each logic region equal and opposite in direction.The size of described logic region is the default minimum unit that reads and writes of corresponding target storage area.
The present invention also provides a kind of method by cache writing data, is used for by buffer memory data being write target storage medium, and this method comprises:
For write-once operation, carry out buffer memory as the unit of minimum to writing data with logic region, and the operating position of record logic region; Wherein, described logic region belongs to cache blocks, and a cache blocks comprises two logic regions at least, and is provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding described target storage area of a logic region in this corresponding relation;
When the data of depositing in need be with buffer memory write target storage medium,, be that minimum operating unit writes target storage medium with data from buffer memory with the cache blocks according to the operating position of the logic region of aforementioned this cache blocks.
Data write target storage medium from buffer memory before,, read from target storage medium and to carry out retaking of a year or grade operation to guarantee can not destroy the data of having stored of target storage medium for the unappropriated logic region of current write operation.
As seen from the above technical solution, the present invention is divided into a plurality of logic regions with cache blocks, and for each logic region is provided with corresponding information bit, is used for this logic region of mark and whether remains refresh data; When treating that refresh data is written to logic region, the pairing information bit of this logic region is set to represent to remain the mark of refresh data, do not need to wait for that data of corresponding positions is read back in the corresponding target storage space can represent to write the response of success, thereby can improve response speed; When refreshing, only corresponding informance position in the cache blocks is remained data in the annotated logic zone of refresh data for expression, treat that promptly refresh data flushes to the target storage area, and data in the annotated logic zone of refresh data can not treated for expression in corresponding informance position in the cache blocks, promptly the non-refresh data for the treatment of can be written in the target storage area, reduced probability of happening, and then reduced for example application program run-time error the maloperation of target storage medium, operate in the system disorders on the target storage medium, potential faults such as the loss of effective data on the target storage medium.
And, refresh and treat that refresh data still can be according to existing mode, data of corresponding positions in the target storage medium is read back into do not write in the logic region for the treatment of refresh data earlier, again with all Refresh Datas in the cache blocks in target storage medium.Based on aforesaid way, if be written to the data of cache blocks do not take this cache blocks the institute have living space and system busy for a long time, after system is returned to the free time, the data of corresponding positions of can from the target storage area, reading back exactly according to the mark of logic region corresponding informance position, replace corresponding invalid data, and corresponding informance position in the cache blocks remained data of reading back from the target storage area in data in the annotated logic zone of refresh data and other logic regions for expression, promptly treat refresh data and replaced Refresh Data in the non-target storage area for the treatment of refresh data to the target storage area.
The information bit of each logic region correspondence in the cache blocks, default logic region and the corresponding relation of target storage area are arranged in the data of this cache blocks.Like this,, only need stature data for a plurality of logic regions in the cache blocks, rather than all corresponding stature data of each logic region, when cache blocks is further divided, do not increase a large amount of data, saved the space in the cache blocks.
And, the logic region size can be the default minimum unit that reads and writes of target storage area, in this case, guarantee that the data that at every turn write in the buffer memory can take logic region, thereby can not take logic region and cause maloperation, avoided fully by buffer memory maloperation to target storage medium in the process of target storage medium write data owing to writing data in buffer to target storage medium.
Description of drawings
Fig. 1 is existing synoptic diagram by cache writing data.
Fig. 2 a is for having now by in the process of cache writing data invalid data being flushed to the synoptic diagram of target storage area.
Fig. 2 b is for having now by in the process of cache writing data data corresponding with invalid data position in the cache blocks in the target storage medium being read back into the synoptic diagram of cache blocks.
Fig. 3 is the synoptic diagram of logic region and information bit in the cache blocks in the embodiment of the invention.
Fig. 4 is the method flow synoptic diagram that passes through cache writing data in the embodiment of the invention.
Fig. 5 is the structural representation of buffer storage in the embodiment of the invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
In the embodiment of the invention, cache blocks in the buffer memory is divided into a plurality of logic regions, and an information bit is set respectively for each logic region, represent that whether this logic region is for remaining refresh data, and application program needs are written to the target storage area treat that refresh data is written in the cache blocks after, the pairing information bit of the logic region of this data occupancy is set to represent to remain the mark of refresh data.
In the present embodiment, the information bit of all the logic region correspondences in cache blocks can be expressed as a bitmap.
Fig. 3 is the synoptic diagram of logic region and information bit in the cache blocks in the embodiment of the invention.As shown in Figure 3, being expressed as bitmap with the information bit of all logic region correspondences is example, the logic region of dividing in the cache blocks shown in the blockage in the cache blocks, each in the bitmap shown in each blockage, a logic region in the corresponding cache blocks respectively; If stored in the logic region and treated refresh data, i.e. dark blockage in the cache blocks as shown in Figure 3, then corresponding position then can become expression and remains the mark of refresh data, i.e. dark blockage in the bitmap as shown in Figure 3 in the bitmap.
Like this, as long as treating refresh data has been written in the logic region in the cache blocks, then corresponding with this logic region position promptly can be set to represent to remain the mark of refresh data in the bitmap, thereby do not need to wait for that data of corresponding positions is read back in the corresponding target storage space can represent to write the response of success, improved response speed.And, even if be written to the data of cache blocks do not take this cache blocks the institute have living space, and system is busy for a long time, after system is returned to the free time, can be according to the data of corresponding positions of from target storage medium, reading back exactly of the mark of each in the bitmap, replace corresponding invalid data, and refreshing when constantly arriving, with the data of reading back from target storage medium that are set in the cache blocks to represent to remain in data in the pairing logic region in position of mark of refresh data and other logic regions, flush in the target storage area, thereby can be with the invalid data in the unappropriated space of these data in the cache blocks, promptly corresponding position is set to represent not treat the data in the logic region of mark of refresh data, flushes to the target storage area.
Fig. 4 is the method flow synoptic diagram that passes through cache writing data in the embodiment of the invention.As shown in Figure 4, the method by cache writing data may further comprise the steps in the present embodiment:
Step 401 is divided at least two logic regions with a cache blocks in the buffer memory, and corresponding target storage area of logic region, and for each logic region is provided with an information bit of correspondence is used for this logic region of mark and whether remains refresh data.
In this step, a bitmap can be set for each cache blocks in the buffer memory respectively, each in the bitmap is as the information bit of each the logic region correspondence in this cache blocks, and bitmap is arranged in the data of this cache blocks; Logic region also can be arranged in the data of corresponding cache blocks with the corresponding relation of target storage area; If comprise a data in the cache blocks,, only need stature data then for a plurality of logic regions in the cache blocks, rather than all corresponding stature data of each logic region, when cache blocks is further divided, do not increase a large amount of data, saved the space in the cache blocks.
Step 402 will treat that refresh data is cached to the corresponding informance position and does not treat for expression in the logic region of mark of refresh data, and the information bit of this logic region correspondence is set to represent to remain the mark of refresh data simultaneously.
Step 403 the corresponding informance position is remained Refresh Data in the logic region of mark of refresh data to corresponding target storage area for expression, and the information bit of correspondence is set to represent not treat the mark of refresh data.
Refreshing the process for the treatment of refresh data in this step can realize according to existing mode, for example, before refreshing, earlier from the target storage area, read the corresponding data of logic region of not treating the mark of refresh data with information bit for expression, and be written to information bit and do not treat for expression in the logic region of correspondence of mark of refresh data, to replace the invalid data in these logic regions, and then with the Refresh Data in the cache blocks in the target storage area of correspondence, be about to the corresponding informance position and remain Refresh Data in the logic region of mark of refresh data to corresponding target storage area for expression, thereby realized the corresponding informance position is remained Refresh Data in the logic region of mark of refresh data to corresponding target storage area for expression, and the information bit of correspondence is set to represent not treat the mark of refresh data; Simultaneously, also the corresponding informance position is not treated the data in the logic region of mark of refresh data for expression, promptly the Refresh Data that reads back from corresponding target storage area is to the target storage area of correspondence, but do not change the information bit of these logic region correspondences.
Wherein, preferably, the idle operating process of carrying out constantly from target storage area readback data of system is arbitrarily carried out the operating process that refreshes refreshing when constantly arriving; Also can carry out again from the operating process of target storage area readback data refreshing when constantly arriving, and continue to carry out the operating process that refreshes.
So far, this flow process finishes.
That is to say,, carry out buffer memory as the unit of minimum to writing data with logic region for write-once operation, and the operating position of record logic region; Wherein, logic region belongs to cache blocks, and a cache blocks comprises two logic regions at least;
When the data of depositing in need be with buffer memory write target storage medium,, be that minimum operating unit writes target storage medium with data from buffer memory with the cache blocks according to the operating position of the logic region of aforementioned this cache blocks.
And, data write target storage medium from buffer memory before,, can also read from target storage medium and carry out the retaking of a year or grade operation, to guarantee can not destroy the data of having stored of target storage medium for the unappropriated logic region of current write operation.
In the practical application, after step 403, can also return step 402, continue by buffer memory to the target storage medium write data.
By above-mentioned flow process as seen, present embodiment will be when application program will treat that refresh data is written to counterlogic zone in the cache blocks, the pairing information bit of this logic region is set to represent to remain the mark of refresh data, thereby do not need to wait for that data of corresponding positions is read back in the corresponding target storage space can represent to write the response of success, thereby can improve response speed; When refreshing, only corresponding informance position in the cache blocks is remained data in the annotated logic zone of refresh data for expression, treat that promptly refresh data flushes to the target storage area, and data in the annotated logic zone of refresh data can not treated for expression in corresponding informance position in the cache blocks, promptly the non-refresh data for the treatment of can be written in the target storage area, thereby not can by buffer memory in the process of target storage medium write data, other invalid datas are flushed in the target storage area.
Refresh and treat that refresh data still can be according to existing mode, data of corresponding positions in the target storage medium is read back into do not write in the logic region for the treatment of refresh data earlier, again with all Refresh Datas in the cache blocks in target storage medium.Based on aforesaid way, if be written to the data of cache blocks do not take this cache blocks the institute have living space and system busy for a long time, after system is returned to the free time, the data of corresponding positions of can from the target storage area, reading back exactly according to the mark of logic region corresponding informance position, replace corresponding invalid data, and refreshing when constantly arriving, the corresponding informance position is remained Refresh Data in the logic region of mark of the refresh data data of reading back from the target storage area in target storage area and other logic regions for expression, be about to treat refresh data and the Refresh Data replaced in the non-target storage area for the treatment of refresh data arrives the target storage area.
Because the size of logic region is less than the size of cache blocks, data do not take the probability of logic region less than the probability that does not take cache blocks, thereby reduced probability of happening, and then for example reduced the application program run-time error, operate in the system disorders on the target storage medium, the potential faults such as loss of effective data on the target storage medium the maloperation of target storage medium.
In the present embodiment, logic region can equal and opposite in direction, also can be not identical entirely.
Wherein, for the equal-sized situation of logic region, only need according to the mode that has the corresponding relation that cache blocks and target storage area are set now, the corresponding relation that logic region and target storage area are set gets final product; And, then in the corresponding relation of logic region that is provided with and target storage area, also should comprise the size of each logic region, the relevant informations such as size of corresponding target storage area for the incomplete identical situation of logic region size.
No matter the logic region of dividing size is identical or different, logic region is more little, and it is big more to treat that refresh data takes the probability of logic region, and is more little to the probability of happening of the maloperation of target storage medium.
In the present embodiment, though the size of logic region is less than the size of cache blocks, data do not take the probability of logic region less than the probability that does not take cache blocks, thereby can reduce probability of happening to the maloperation of target storage medium, but, do not take in data under the situation of logic region, still have possibility the target storage medium maloperation.
Therefore, preferably, the logic region size equals the default minimum unit that reads and writes of target storage area.Like this, the data that can guarantee at every turn to write in the buffer memory can take logic region, thereby can not take logic region and cause maloperation, avoided fully by buffer memory maloperation to target storage medium in the process of target storage medium write data owing to writing data in buffer to target storage medium.
More than be detailed description to the method by cache writing data in the embodiment of the invention, below, the buffer storage in the embodiment of the invention is described.
Fig. 5 is the structural representation of buffer storage in the embodiment of the invention.As shown in Figure 5, the buffer storage in the present embodiment is coupled between applied host machine/server and the target storage medium, comprising: cache blocks 1～cache blocks n, wherein, n is the positive integer more than or equal to 2.
Each cache blocks in the buffer memory comprises logic region 1～logic region m of division, and m is the positive integer more than or equal to 2, and the corresponding information bit of each logic region, represents that whether this logic region is for remaining refresh data.
Application program in the system of buffer storage place will treat that refresh data is cached in the corresponding cache blocks, when the corresponding informance position was not treated in the logic region of mark of refresh data for expression, the information bit of the refresh control unit correspondence in this system was set to represent to remain the mark of refresh data.
Refresh control unit in the system of buffer storage place, the corresponding informance position is remained the refresh data for the treatment of in the logic region of mark of refresh data for expression, flush to corresponding target storage area, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data.
In the practical application, the refresh control unit can read in the target storage area earlier, do not treat the corresponding data of logic region of the mark of refresh data with information bit in the corresponding cache blocks for expression, and be written to information bit in the corresponding cache blocks and do not treat for expression in the logic region of correspondence of mark of refresh data; Refreshing when constantly arriving then, corresponding relation and the corresponding information bit of logic region according to target storage area in logic of propositions zone and the target storage medium, refresh control unit in this system remains the refresh data for the treatment of in the logic region of mark of refresh data with the corresponding informance position for expression, flush to corresponding target storage area, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data; Simultaneously, also the corresponding informance position is not treated the data in the logic region of mark of refresh data for expression, promptly the Refresh Data that reads back from corresponding target storage area is to the target storage area of correspondence, but do not change the information bit of these logic region correspondences.
Preferably, the refresh control unit is at the idle aforesaid operations of constantly carrying out of system arbitrarily; Refresh control also can be carried out aforesaid operations again refreshing when constantly arriving, promptly refresh refreshing the corresponding data of reading back earlier when constantly arriving from the target storage space again.
That is to say, for buffer storage:
If the corresponding informance position is not treated for expression that the logic region of mark of refresh data is written into and has stored and treated refresh data among the cache blocks i, then become expression and remain the mark of refresh data with this logic region corresponding informance position.Wherein, i is more than or equal to 1 and smaller or equal to n.
If the corresponding informance position remains the data of logic region storage of mark of refresh data for expression among the cache blocks i, be refreshed to the external object storage area according to the default logic region and the corresponding relation of target storage area, then corresponding with this logic region information bit becomes the mark that refresh data is not treated in expression.
In the practical application, if comprise a data in the cache blocks, then information bit and the logic region of presetting and the corresponding relation of target storage area can be arranged in the data of this cache blocks.Like this,, only need stature data for a plurality of logic regions in the cache blocks, rather than all corresponding stature data of each logic region, when cache blocks is further divided, do not increase a large amount of data, saved the space in the cache blocks.
As shown in Figure 5, in the present embodiment, further comprise a data space i among the cache blocks i, be used for the data of memory buffers piece i.Wherein, comprise in the data of storing in each cache blocks: the corresponding relation of the information bit of all logic region correspondences, default logic region and target storage area.
By said apparatus as seen, after the data that application program is written to needs the target storage area were written to counterlogic zone in the cache blocks, the pairing information bit of this logic region promptly became expression and remains the mark of refresh data.
Like this, when application program will treat that refresh data is written to counterlogic zone in the cache blocks, the pairing information bit of this logic region is set to represent to remain the mark of refresh data, thereby the system that makes does not need to wait for that data of corresponding positions is read back in the corresponding target storage space can represent to write the response of success, thereby can improve response speed; If be written to the data of cache blocks do not take this cache blocks the institute have living space and system busy for a long time, after system is returned to the free time, the data of corresponding positions of can from the target storage area, reading back exactly according to the mark of logic region corresponding informance position, replace corresponding invalid data, and guarantee to flush to data in the target storage medium and include only corresponding informance position in the cache blocks and remain data in the logic region of mark of refresh data for expression, and the data that correspondence position reads back from this target storage medium, thereby guaranteed that invalid data then can not be refreshed in the target storage area.
Because the size of logic region is less than the size of cache blocks, data do not take the probability of logic region less than the probability that does not take cache blocks, thereby reduced probability of happening, and then for example reduced the application program run-time error, operate in the system disorders on the target storage medium, the potential faults such as loss of effective data on the target storage medium the maloperation of target storage medium.
In the said apparatus, at least two logic regions in cache blocks can equal and opposite in direction, also can be not identical entirely.
Preferably, the size of the logic region in cache blocks is the default minimum read-write unit of corresponding target storage area.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of being done, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.
Claims (17)
1, a kind of method by cache writing data is characterized in that, comprising:
A cache blocks in the buffer memory is divided at least two logic regions, and the corresponding relation of the target storage area in logic region and the exterior storage medium is set, the corresponding described target storage area of a logic region in this corresponding relation; And each logic region also correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data;
Will treat refresh data be cached to the corresponding informance position and do not treat in the logic region of refresh data mark for expression, and the information bit of this logic region correspondence is set to represent to remain the mark of refresh data;
The corresponding informance position is flushed to corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data.
2, the method for claim 1, it is characterized in that, described the corresponding informance position is flushed to before the corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, this method further comprises: from the target storage area, read with information bit and do not treat the corresponding data of logic region of the mark of refresh data, and be written in this logic region for expression;
Described the corresponding informance position is remained to treat that refresh data flushes to corresponding target storage area and is in the logic region of refresh data mark for expression: with the Refresh Data in the cache blocks to corresponding target storage area.
3, method as claimed in claim 1 or 2 is characterized in that, the information bit that the corresponding relation of logic region and target storage area and described logic region are corresponding is arranged in the data of cache blocks.
4, method as claimed in claim 1 or 2 is characterized in that, each described information bit is one in the default bitmap, the corresponding cache blocks of described bitmap.
5, method as claimed in claim 1 or 2 is characterized in that, each logic region equal and opposite in direction.
6, method as claimed in claim 5 is characterized in that, described division to logic region is to read and write unit according to the default minimum of target storage area to carry out.
7, a kind of caching system comprises: buffer storage and refresh control unit, be coupled between applied host machine/server and the target storage medium, and described buffer storage is made of cache blocks, it is characterized in that,
Comprise the logic region of division in each cache blocks of described buffer storage, and be provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding described target storage area of a logic region in this corresponding relation; And logic region also correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data;
Do not treat to have write in the logic region of refresh data for expression when the corresponding informance position and treat refresh data, the information bit of this logic region correspondence of described refresh control unit is set to represent to remain the mark of refresh data;
Described refresh control unit flushes to outside corresponding target storage area with the corresponding informance position for the refresh data for the treatment of that expression remains in the logic region of refresh data mark, and the information bit of this logic region correspondence is set to represent not treat the mark of refresh data.
8, system as claimed in claim 7 is characterized in that,
Described refresh control unit further from the external object storage area, read with the corresponding informance position and does not treat the pairing data of logic region of the mark of refresh data for expression, and be written in this logic region before carrying out described refreshing;
Described refresh control unit be by with the Refresh Data in the described cache blocks to outside corresponding target storage area, and the corresponding informance position is flushed to outside corresponding target storage area for the refresh data for the treatment of that expression remains in the logic region of refresh data mark.
9, as claim 7 or 8 described systems, it is characterized in that, further comprise a data space in the described cache blocks, be used for a storage data;
The information bit that the corresponding relation of logic region and target storage area and described logic region are corresponding is arranged in the data of cache blocks.
As claim 7 or 8 described systems, it is characterized in that 10, each described information bit is one in the default bitmap.
11, as claim 7 or 8 described systems, it is characterized in that each logic region equal and opposite in direction.
12, system as claimed in claim 11 is characterized in that, the size of described logic region is the default minimum unit that reads and writes of outside corresponding target storage area.
13, a kind of buffer storage, this device is coupled between applied host machine/server and the target storage medium, comprises cache blocks, it is characterized in that,
Comprise the logic region of division in the cache blocks, and be provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding outside target storage area of a logic region in this corresponding relation; And logic region also correspondence is provided with an information bit, is used for this logic region of mark and whether remains refresh data.
14, device as claimed in claim 13 is characterized in that, each logic region equal and opposite in direction.
15, device as claimed in claim 14 is characterized in that, the size of described logic region is the default minimum unit that reads and writes of corresponding target storage area.
16, a kind of method by cache writing data is used for by buffer memory data being write target storage medium, it is characterized in that, comprising:
For write-once operation, carry out buffer memory as the unit of minimum to writing data with logic region, and the operating position of record logic region; Wherein, described logic region belongs to cache blocks, and a cache blocks comprises two logic regions at least, and is provided with the corresponding relation of the target storage area in logic region and the exterior storage medium, the corresponding described target storage area of a logic region in this corresponding relation;
When the data of depositing in need be with buffer memory write target storage medium,, be that minimum operating unit writes target storage medium with data from buffer memory with the cache blocks according to the operating position of the logic region of aforementioned this cache blocks.
17, method as claimed in claim 16, it is characterized in that, data write target storage medium from buffer memory before, for the unappropriated logic region of current write operation, read from target storage medium and to carry out retaking of a year or grade operation to guarantee can not destroy the data of having stored of target storage medium.
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| CN101887399A (en) * | 2010-06-28 | 2010-11-17 | 北京用友政务软件有限公司 | Method for accessibly accessing cache data at server side |
| CN102360338B (en) * | 2011-10-18 | 2013-07-24 | 中联重科股份有限公司 | Mixing plant as well as data storage method, server and system used in same |
| CN104331962A (en) * | 2014-10-27 | 2015-02-04 | 厦门博佳琴电子科技有限公司 | Fingerprint recognition system of cabinet |
| CN106959819B (en) * | 2016-01-08 | 2019-12-20 | 广州市动景计算机科技有限公司 | Data storage method, device and system and portable electronic equipment |
| EP3825857B1 (en) * | 2016-12-05 | 2023-05-03 | Huawei Technologies Co., Ltd. | Method, device, and system for controlling data read/write command in nvme over fabric architecture |
| EP3352086B1 (en) | 2016-12-05 | 2020-11-11 | Huawei Technologies Co., Ltd. | Control method, device and system for data reading-writing command in nvme over fabric architecture |
| WO2018102967A1 (en) * | 2016-12-05 | 2018-06-14 | 华为技术有限公司 | Control method, storage device and system for data read/write command in nvme over fabric architecture |
| CN107132996B (en) * | 2017-04-12 | 2020-02-21 | 杭州宏杉科技股份有限公司 | Intelligent thin provisioning-based storage method, module and system |
| CN110174991B (en) * | 2019-05-17 | 2021-01-22 | 广州视源电子科技股份有限公司 | Highlight pen processing method and device |
| CN110990302B (en) * | 2019-11-22 | 2021-11-02 | 北京云宽志业网络技术有限公司 | Data caching method and device, electronic equipment and storage medium |
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