CN100514868C - Reception device, integrated circuit, program, and reception method - Google Patents

Reception device, integrated circuit, program, and reception method Download PDF

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Publication number
CN100514868C
CN100514868C CNB2005800043078A CN200580004307A CN100514868C CN 100514868 C CN100514868 C CN 100514868C CN B2005800043078 A CNB2005800043078 A CN B2005800043078A CN 200580004307 A CN200580004307 A CN 200580004307A CN 100514868 C CN100514868 C CN 100514868C
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byte
unit
application data
faults
receiving system
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CN1918801A (en
Inventor
井口贺敬
森良辅
八木铁也
濑藤幸儿
林大介
神野一平
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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Abstract

A reception device performs reception processing during a service period of a broadcast signal and is set to a power saving mode during a time other than the service period. The service period includes a first period and a second period following the first period. During the first period, an application data table of am MPE-FEC frame is transmitted and during the second period, a parity data table of an MPE-FEC frame is transmitted. An error correction unit (12) executes an error correction by the MPE-FEC using the entire parity data table or a disappearance correction using the same number of parity data as the byte data where a bit error is caused. When the bit error is corrected by the error correction unit (12) which executes the disappearance correction, a power control unit (30) switches the reception circuit to the power saving mode even during the second period.

Description

Receiving system, integrated circuit and method of reseptance
Technical field
The invention belongs to the technical field of power-saving control in receiving operation.
Background technology
The power-saving control that receives in the operation is carried out in such a way.In digital broadcasting, launch under the situation of a plurality of programs, only during the needed program of emission, provide power supply, and during not launching needed program, stop to provide, to reduce electrical source consumption to demodulating unit and so on time division way.Along with being extensive use of of mobile receiving system in recent years, to the concern sustainable growth of this technology.
In the broadcast singal of a plurality of programs with time division multiplexing mode emission, launch needed program during be called " burst ".
For example, patent documentation 1 discloses the known technology of coming intermittently to provide power supply according to the arrival of this burst.
According to this technology described in patent documentation 1, the relative time interlude interval information that next burst is described is included in each burst, therefore based on this time interval information, receiving system can access notice when next burst arrived.Since told when the next burst of receiving system arrives, and this receiving system just can stop the power supply supply and arrive up to next burst.
So, stop supply power when not receiving burst according to this technology.Therefore, can reduce electrical source consumption in situation about being received by mobile device, the result can obtain longer battery life.
Patent documentation 1:U.S. patent application publication number 2003/0153369.
Summary of the invention
The problem that the present invention will solve
In the conventional method of in patent documentation 1, describing, in the cycle beyond the burst, stop power supply, but during burst, continue power supply.During arriving, just do not reduce burst the notion of electrical source consumption like this.
In this process of receiving system that moves reception of exploitation, perhaps the highest market demands are further to reduce electrical source consumption.Therefore yet because the burst in the broadcast singal has comprised the necessary full detail of reproduction broadcasted content basically, the receiving unit burst can not cause the partial loss of broadcasted content.Like this, between response power saving requirement and quality requirements, a difficult point is just arranged.
The present invention is devoted to provide a kind of receiving system, and it can further reduce electrical source consumption when satisfying quality requirements.
The means that address the above problem
In order further to reduce electrical source consumption, the present invention is primarily focused on the characteristic of the error correction method that uses in the broadcasting method at mobile device.This characteristic at the error correction method in the broadcasting method of mobile device is as follows: except the error correction at the broadcasting method of stationary apparatus, use stronger error correction.
A comparison is done in error correction among the DVB-H (digital video broadcasting-hand-held) and the error correction among the DVB-T (digital video broadcasting-land) here.DVB-T is a kind of digital broadcast method that Europe is used for stationary apparatus, and DVB-H then is the current a kind of digital broadcast method that is used for mobile device just under study for action.In DVB-T, transmitter uses code that signal is encoded, and for example is used for the convolution code or RS (Reed-Solomon) sign indicating number of TS (transport stream) bag, and receiver carries out error correction, for example Veterbi decoding and RS decoding, thus reproduce correct data.
Meanwhile, in DVB-H, except the TS in DVB-T wraps the RS coding and convolutional encoding that carries out, adopt IP (Internet Protocol) datagram is carried out the RS coding, be called a kind of error correction of MPE-FEC (multi-protocols encapsulation-forward error correction).
Like this, except the error correction of DVB-T, DVB-H uses the MPE-FEC error correction.In moving situation about receiving, there is the very poor situation of reception environment.In order to prevent the failure of error correction in this case, in DVB-H, additionally adopted this MPE-FEC error correction.
As the result who increases the MPE-FEC error correction, burst in DVB-H has a kind of like this structure, wherein launches corresponding to cycle (period 1) back of the data of application data sheet with the cycle (second round) of emission corresponding to the parity data of RS tables of data arranged.
Consider this burst structure, receiving system of the present invention is a kind of like this receiving system, it received in the seeervice cycle of broadcast singal, in the non-seeervice cycle, switch to battery saving mode, the described seeervice cycle comprises the period 1 of launching application data sheet and follows the second round of surface launching RS tables of data after the period 1, comprise: receiving circuit is used for receiving in the described period 1 obtaining described application data sheet, and receives in described second round; Error correction unit is used for using selectively first of whole described RS tables of data to correct and use second correction of a described RS tables of data part, to be corrected in the faults in the application data sheet that has obtained; And switch unit, when the result who carries out described second correction as described error correction unit corrects described faults, be used for before finishing described second round, switching to battery saving mode.
Effect of the present invention
According to above structure, use first second the correcting and carry out selectively of parity data of correcting and using part RS tables of data of the parity data of whole RS tables of data.When carrying out second correction, receiving system can switch to battery saving mode and need not to wait until that finish second round.Can further reduce electrical source consumption like this.
Only carry out when correcting carrying out second switching to battery saving mode during second round.Therefore, receiving system can not lose receiving quality.Therefore, receiving system of the present invention can further reduce electrical source consumption when satisfying quality requirements.
Here, application data sheet can be made up of a plurality of bytes that are arranged in the matrix, wherein receiving system further comprises: detecting unit, when described receiving circuit obtains described application data sheet, be used for each row at the described application data sheet that has obtained, detection has the position of each byte of faults, described second correction is to wipe correction, if described detecting unit detects the position of each byte of faults in described row, then correct faults by using with each parity byte that all has the byte of faults to have similar number, and switch to battery saving mode by described switch unit, be in described second round, describedly carry out when capable adding to each parity byte that all has the byte of faults to have similar number.
According to above structure, what faults the number of the parity byte that receive can have appear to increase or reduce in each row according to application data sheet.In case receive the parity byte that number is enough to wipe correction, receiving system just can switch to battery saving mode.Because quickened the switching of battery saving mode in this way, so receiving system can continue the long period in battery saving mode, so just can realize longer battery life.
Here, receiving system may further include: detecting unit, be used to detect the information of explanation broadcast singal reception environment, if wherein detected described information satisfies predetermined condition, then described switch unit switches to battery saving mode before beginning described second round, if and detected described information do not satisfy described predetermined condition, then described error correction unit carry out described first correct and described second correction in one.
Move in the situation that receives at receiving system, reception environment changed along with the translational speed of receiving system and the having this factor of peripheral obstacle.For example, if receiving system is positioned at the local of clear or slowly moves, just can obtain correct application data sheet and do not need to use any parity data of RS tables of data.In this case, the parity data of RS tables of data is unnecessary, so receiving system switches to battery saving mode and do not wait for that arrive in second round.So receiving circuit can stop the longer time in battery saving mode.
Description of drawings
Fig. 1 illustrates the structure of a system that uses receiving system 100.
Fig. 2 illustrates the corresponding relation between the state of the broadcast singal of broadcasting station 200 emission and receiving system.
Fig. 3 illustrates the structure of service burst pulse.
Fig. 4 illustrates the structure of MPE-FEC frame.
How Fig. 5 explanation is stored in a plurality of IP datagram in the IP data in the application data sheet.
Fig. 6 illustrates the process that produces the RS tables of data.
How Fig. 7 explanation launches application data sheet and RS tables of data.
Fig. 8 illustrates the internal structure of the receiving system relevant with first embodiment of the invention.
Fig. 9 illustrates the reception operation of receiving system 100.
Figure 10 illustrates the application data sheet that will wipe correction.
Figure 11 illustrates how correction is wiped in application data sheet execution shown in Figure 10.
Figure 12 illustrates the structure of one 191 byte row will wiping correction.
It is how in conjunction with to the MPE section of using CRC-32 or the error detection result of MPE-FEC section that Figure 13 A illustrates byte reliability determining unit 14, and the error correction result of the TS bag that constitutes the section of using RS (204,188,16) is determined reliability.
How Figure 13 B illustrates, and the sign of reliability information table is set to the result that byte reliability determining unit 14 is determined.
Figure 14 A to 14C shows increases the example that all bytes all have the MPE-FEC section of reliability A.
Figure 15 A to 15C shows increases an example that comprises the MPE-FEC section of reliability B byte data.
Figure 16 explanation is thinking that each of MPE-FEC frame walks in the situation that has 191 reliability A bytes less the switching of battery saving mode.
Figure 17 explanation received in the 2nd MPE-FEC section during second round, recognized in the situation that has 191 reliability A bytes existence at least, to the switching of battery saving mode.
Figure 18 is the flow chart of the program comprehensively controlled of explanation FEC control unit 15 and 30 pairs of receiving systems of power control unit.
Figure 19 illustrates the internal structure of the receiving system relevant with second embodiment of the invention.
Figure 20 is the flow chart of demodulator circuit 10 and power control unit 30 control programs among explanation second embodiment.
Figure 21 illustrates the internal structure of the receiving system relevant with third embodiment of the invention.
Figure 22 is the flow chart of the control program of FEC control unit 15 and power control unit 30 among explanation the 3rd embodiment.
Figure 23 is the flow chart of the control program of FEC control unit 15 and power control unit 30 in the explanation fourth embodiment of the invention.
Label is described
1 ... antenna
2 ... tuner
3 ... demodulating unit
4 ... the temporal information extraction unit
5 ... IP data reproduction unit
6 ... the reception environment detecting unit
10 ... demodulator circuit
11 ... the frame memory cell
12 ... error correction unit
13 ... reliability information table memory cell
14 ... section reliability determining unit
15 ... the FEC control unit
20 ... the MPE-FEC unit
30 ... power control unit
100 ... receiving system
200 ... the broadcasting station
Embodiment
Receiving system in the<system 〉
Fig. 1 shows the structure of the system that uses receiving system 100.This system is that portable terminal carries out digital broadcasting.Receiving system 100 is to receive a kind of mobile device of broadcasting in portable terminal, and also has the function as mobile phone.Just because of this, receiving system 100 200 receives the DVB-H broadcast singals and reproduces video and/or audio from the broadcasting station.
According to DVB-H, the program data of same channel is with the appropriate frequency bands emission of time-multiplexed mode by about every programs 7MHz.DVB-H adopts OFDM (OFDM).OFDM is a kind of multicarrier lift-off technology, and it uses a plurality of orthogonal sub-carriers in emission band.According to this technology, emission band is cut apart by a plurality of subcarrier, so the duration of each code element can be longer, do like this have very strong to the anti-multipath interference capability.OFDM with this specific character not only is widely used among DVB-T and the DVB-H, also be used in Japan terrestrial digital broadcasting format ISDB-T (integrated service digital broadcasting-land), WLAN, the 4th generation mobile phone and other similar field in.
Relation between<broadcast singal and the mode switch 〉
Fig. 2 shows the broadcast singal of broadcasting station 200 emissions and the corresponding relation between receiving system 100 states.On the first order, n the service burst in broadcast singal by time division multiplexing.Suppose that receiving system 100 receives the burst of service 1 in n the service.Receiving system 100 is in the general mode in service 1 burst so, is in battery saving mode in other cycle beyond the burst of service 1, as shown on the second level.
<burst structure 〉
Fig. 3 illustrates the burst structure of a service.In this drawing, the first order shows a burst of service 1, and the second level shows the internal structure of this burst.The burst of service 1 was made up of the period 1 of a plurality of MPE sections of emission and the second round of 64 MPE-FEC sections of emission.These MPE sections and MPE-FEC section are replaced by TS bag (the third level), RS-16 (16 byte RS sign indicating number) is added in each TS bag (at the fourth stage), then the TS bag that is added with RS-16 is carried out the OFDM modulation.The result 200 is transmitted to receiving system 100 from the broadcasting station.
Fig. 4 shows the structure of MPE-FEC frame.The MPE-FEC frame is to be used for coding schedule that IP datagram is encoded.The MPE-FEC frame by m capable * 256 row form.Line number m is variable, can be up to 1024.The preceding m of MPE-FEC frame is capable * and 191 row are called application data sheet, have wherein stored IP datagram.The back m of MPE-FEC frame is capable * 64 row are called RS tables of data or parity data table, wherein stored the m that is used for IP datagram capable * 64 row (the parity byte section of being loaded in 0,1,2 ..., last FEC section) parity data.In this standard, IP datagram and m be capable * and the combination of the parity datas of 64 row is called " IP data ".
RS (255,191,64) coding is carried out in broadcasting station 200 in the scope of the RS tables of data of 191 application data sheets that are listed as and 64 row, to produce the parity datas of 64 row.Produce m capable * parity datas of 64 row after, broadcasting station 200 can determine whether to launch parity data.This processing of a part of omitting the 64 row parity datas that produce in emission is called " perforation (puncturing) ".
A plurality of IP datagram that Fig. 5 explanation is included in the IP data are how to be stored in the application data sheet.Shown in Fig. 5 A, constitute the byte data of first IP datagram (first IP datagram) in the beginning of a plurality of IP datagram, from the top to the bottom, be stored in Far Left one row of application data sheet.In case be filled with leftmost row, all the other byte datas of first IP datagram (the first IP datagram content) are stored in left side secondary series from the top to the bottom.After the storage of finishing first IP datagram, constitute the byte data of next IP datagram (second IP datagram), from the top to the bottom, be stored in the remainder of left side secondary series, shown in Fig. 5 B.In case left side secondary series is filled with, all the other byte datas in the next IP datagram (continuation of second IP datagram) are stored in the left side the 3rd row of application data sheet from the top to the bottom.The last IP datagram (last IP datagram) that this operation repeats up to the IP data is stored finish (Fig. 5 C).
Like this, be included in IP datagram in the IP data be stored in m capable * application data sheets of 191 row in, begin storage from the top of leftmost row, between them without any the gap.Do not have anyly when being stored in the application data sheet with gap when IP datagram, have a white space at the end of application data sheet.A static value (being generally " 00H ") is inserted this white space as byte of padding, shown in Fig. 5 D.
Fig. 6 illustrates the process that produces the RS tables of data.
After filling whole application data sheet, carry out RS (255,191,64) coding to obtain 64 byte parity data, as shown in Figure 6A corresponding to this delegation in application data sheet each capable (forming) by 191 bytes.Each row as the application data table carries out the result that RS (255,191,64) encodes, and obtains the parity data (Fig. 6 B) that m organizes 64 bytes.Suppose that the parity data of 64 bytes constitutes the delegation of RS tables of data.So obtained m capable * 64 row RS tables of data (Fig. 6 C).
Fig. 7 illustrates how application data sheet and RS tables of data launch.The first order shows application data sheet and RS tables of data.Shown in the second level, each IP datagram in the application data sheet is all passed through to add header and is encapsulated for the end of IP datagram for the beginning of IP datagram and interpolation CRC-32 (32 byte cyclic redundancy code).As a result, produced the MPE section.Equally, each row of RS tables of data all pass through to add header and encapsulate to the end of these row to the beginning of these row and interpolation CRC-32 (32 byte cyclic redundancy code).As a result, produce the MPE-FEC section.The header of each section has all comprised temporal information Δ T, and it shows the time between beginning to begin to next burst from the reception of section.Equally, the header of each MPE-FEC section comprises that also information shows the columns of used byte of padding when producing application data sheet.
Do not launch the data punctured string in the byte of padding and the parity data in the RS tables of data in the application data sheet here.
The MPE section of utilizing above method to produce and MPE-FEC section are converted to TS bag shown in the third level.The TS header is added the bag to TS, the TS bag is carried out RS (204,188,16) coding, then the DVB-H modulated applications is wrapped in TS, shown in the fourth stage.The result 200 is transmitted to receiving system 100 from the broadcasting station.Here, will launch as a burst corresponding to the data of a MPE-FEC frame.In the following description, suppose that the MPE-FEC frame that will launch does not have byte of padding, does not have data punctured yet.
Like this, according to DVB-H, data are carried by the first of burst, and the back part of burst is carried parity data.In the first embodiment of the present invention, this characteristic of DVB-H is used to reduce electrical source consumption.
The internal structure of the receiving system that Fig. 8 explanation is relevant with first embodiment.In the accompanying drawings, this receiving system comprises three building blocks, and they are demodulator circuit 10, MPE-FEC unit 20 and power control unit 30.
The internal structure of<demodulator circuit 10 〉
The internal structure of demodulator circuit 10 at first is described.Demodulator circuit 10 is integrated circuits, comprises antenna 1, tuner 2, demodulating unit 3, temporal information extraction unit 4 and IP data reproduction unit 5.When the internal cell of receiving system is accepted electric power, demodulator circuit 10 receives the DVB-H broadcast singals and also exports the MPE section and the MPE-FEC section.The power supply supply of demodulator circuit 10 begins when burst begins, and the power supply supply finishes when power control unit 30 determines to stop the power supply supply.In the present embodiment, power supply is supplied to power control unit 30 and is not supplied to the state of demodulator circuit 10 to be called " battery saving mode ".
Antenna 1 receives the DVB-H broadcast singal, and the signal that receives is exported to tuner 2.
Tuner 2 is selected needed channel for the reception of antenna 1, and is the conversion of signals of selected channel intermediate-freuqncy signal.
Demodulating unit 3 uses A/D converter to be converted to digital signal from the intermediate-freuqncy signal of tuner 2 outputs, by quadrature demodulation this digital signal is converted to the OFDM baseband signal then.This OFDM baseband signal is a time-domain signal.Demodulating unit 3 further is converted to frequency-region signal by FFT (fast fourier transform) with the baseband signal that this belongs to time-domain signal.In the transition period, reproduce clock and other synchronizing information.The baseband signal that is converted to frequency-region signal is through the emission line conditioning.After this, 3 pairs of frequency-region signals of demodulating unit carry out error correction, for example Viterbi decoding and RS (204,188,16) decoding.The TS that demodulating unit 3 outputs are obtained in this way wraps to temporal information extraction unit 4.Temporal information extraction unit 3 transmits this TS and wraps to IP data reproduction unit 5.Whether demodulating unit 3 also notifies byte reliability determining unit 14 to be corrected fully as the byte errors in the TS bag of RS decoded result.
Temporal information extraction unit 4 extracting time information Δ T, it shows the time from the header of MPE section or MPE-FEC section to next burst beginning.The temporal information Δ T that 4 outputs of temporal information extraction unit are extracted gives power control unit 30.
The encapsulation of transmitting a plurality of TS bags that come from temporal information extraction unit 4 is removed in IP data reproduction unit 5.Removing encapsulation is to reproduce IP datagram and reproduce the operation that parity data column is carried out from the TS bag of forming the MPE-FEC section from the TS bag of forming the MPE section.IP data reproduction unit 5 is with the IP datagram input MPE-FEC unit 20 that reproduces.Whether when removing encapsulation, IP data reproduction unit 5 utilizes CRC-32 that each section is carried out error detection, and have mistake to exist in notice byte reliability determining unit 14 these sections.
The internal structure of<MPE-FEC unit 20 〉
Be through with so far to demodulator circuit 10 in-built explanations.The following describes the internal structure of MPE-FEC unit 20.
MPE-FEC unit 20 is integrated circuits, comprises frame memory cell 11, error correction unit 12, reliability information table memory cell 13, byte reliability determining unit 14 and FEC control unit 15.When the internal cell of receiving system is accepted electric power, MPE-FEC unit 20 carries out error correction and exports IP datagram.Power supply supply to MPE-FEC unit 20 when burst begins begins, and finishes when error correction unit 12 is finished error correction.
The MPE section and the MPE-FEC section of 11 storage 5 outputs from IP data reproduction unit of frame memory cell are to rebuild the MPE-FEC frame.
MPE-FEC frame with behavior unit in 12 pairs of frame memory cell 11 of error correction unit carries out RS (255,191,64) decoding.Also have, error correction unit 12 is wiped correction under predetermined condition.It is such operation that wiping of here being mentioned corrected, it is when receiving application data sheet, the position of each byte that faults is arranged be can detected situation in, correct byte by using with the parity byte of the same number of byte with faults with faults.
64 row parity datas are added in the row of application data sheet with horizontal direction.In each row, if do not have the faults existence in 64 row parity datas with in the parity byte of the same quantity of byte with faults, the byte that has faults so is repairable.
That is to say, if identify 191 in the byte data that combines each row of MPE-FEC frame and 255 bytes of parity data (=255-64) byte does not have faults, the byte that has faults so can be corrected by wiping.
Reliability information table memory cell 13 is the memories that are used for the memory reliability information table.The reliability information table by m capable * 255 row signs form.Each sign corresponding to the m of MPE-FEC frame capable * 255 row in different byte or parity byte.When this was masked as " opening ", this showed that perhaps corresponding byte or parity byte have faults.When this was masked as " pass ", this showed that corresponding byte or parity byte do not have faults.Detailed says, each sign in the reliability information table illustrates that by showing whether corresponding byte or parity byte have faults corresponding byte or parity byte are to have reliability A (no faults) that reliability B (faults is arranged) is still arranged.Make that x is a Any Digit from 1 to m, y is from 1 to 255 Any Digit.So the signs capable and the y row of the x in the reliability information table show whether the x in the MPE-FEC frame byte or parity bytes capable and the y row have faults.
Based on towards the reliability of bag with towards the reliability of section, byte reliability determining unit 14 is determined the reliability of each byte of MPE-FEC frame, described bag reliability is to use RS (204 as wrapping at each TS, 188,16) carry out that the result of error correction obtains, and be the notice that obtains from described demodulator unit 3, described section reliability obtains as the result who uses CRC-32 to carry out error detection on each section, and is the notice that obtains from IP data reproduction unit 5.Byte reliability determining unit 14 determines that according to this result produces the reliability information table in reliability information table memory cell 13.
FEC control unit 15 determines whether have at least 191 bytes not have faults in each row of application data sheet.If find to have faults in 191 row of application data sheet, FEC control unit 15 is carried out RS (255,191,64) or is wiped correction.If do not find faults in 191 row of application data sheet, FEC control unit 15 just determines to there is no need to carry out error correction.If the number of the byte of no faults lacks than 191 in each row of MPE-FEC frame, FEC control unit 15 just determines that error correction is impossible.In other words, with reference to not only relevant with application data sheet, also the reliability information table relevant with the RS tables of data if in each row, has at least 191 row not have faults in 255 row, and then error correction is possible.Even when having 190 bytes not have faults in each row of application data sheet, if all 64 bytes in each row of RS tables of data all have faults, then error correction is impossible.
power control unit 30 〉
Based on the definite result and the temporal information Δ T of byte reliability determining unit 14, power control unit 30 controls are to the power supply supply of demodulator circuit 10 and MPE-FEC unit 20.Power control unit 30 calculates the time of next burst from temporal information Δ T, and considers lock in time and so on, calculates the reception time started of next burst.Power control unit 30 provides the power supply supply for demodulator circuit 10 and MPE-FEC circuit 20 based on this reception time started.When byte reliability determining unit 14 determines in each row at the MPE-FEC frame that when having at least 191 bytes to have reliability A, power control unit 30 decisions stop the power supply supply to demodulator circuit 10.
<receive and operate
Fig. 9 shows the reception operation of carrying out by receiving system 100.First order explanation is carried out TS bag (each all is 204 byte longs) behind the Veterbi decoding by demodulating unit 3.The result that second level explanation uses RS (204,188,16) to carry out error correction.Result as this error correction of using RS (204,188,16) to carry out by demodulating unit 3 obtains TS bag (each all is 188 byte longs).
It is later MPE section of unit and MPE-FEC section that third level explanation converts the TS bag with the section to.The internal structure of fourth stage explanation MPE section and MPE-FEC section.Each MPE section and MPE-FEC section all comprise header and CRC-32.IP data reproduction unit 5 removes header from each section, and uses CRC-32 to carry out error detection.As IP data reproduction unit 5 order input wherein each MPE section and the MPE-FEC section on carry out the result of this operation, on memory, once obtain row of all IP datagram and the RS tables of data of application data sheet, shown in level V.Here, will be worth " 00H " and compose, and a suitable value will be composed to the perforation byte to each byte of padding.
After application data sheet that obtains the MPE-FEC frame and RS tables of data, based on the RS tables of data of MPE-FEC frame, use the error correction of carrying out of RS (255,191,64), as the acquisition m shown in the 6th grade capable * result of the byte datas of 191 row.
The following describes which type of criterion of byte reliability determining unit 14 usefulness and determine the reliability of each byte.
<wipe the details of correction 〉
Be used for wiping correction and how carrying out of RS decoding below with reference to Figure 10 to 12 explanation.
Figure 10 shows the application data sheet that will wipe correction.
In the accompanying drawings, the shadow region shows that the faults in the second, the 4th and the 6th MPE section that is listed as can not be by demodulating unit 3 by correcting by the error detection towards section of using CRC-32 towards error correction of wrapping and IP data reproduction unit 5, therefore faults still is present in the MPE section of the second, the 4th and the 6th row (being noted that here the MPE section is not with the unit's of classifying as layout).
How Figure 11 explanation is carried out on application data sheet shown in Figure 10 is wiped correction.In the accompanying drawings, horizontal arrow shows that wiping correction is to carry out on each row (191 byte datas) of application data sheet.
The structure that Figure 12 explanation will be wiped 191 byte row of correction.Suppose to draw in the accompanying drawing row (data of 191 bytes) of circle and will wipe correction.Because the second, the 4th and the 6th of application data sheet is shown faults, as shown in figure 10, can think that second, the 4th and the 6th byte of 191 bytes forming this delegation has faults.Therefore, if will add to application data sheet with the byte of those similar numbers that faults is arranged in the horizontal direction, then the faults in this delegation can be corrected by wiping.All row by the application data table repeat this correction of wiping, and can correct the faults in the application data sheet and do not use whole RS tables of data.
Relation between<error correction result and reliability are determined 〉
As mentioned above, wipe correction, whether just can correctly determine in each MPE section and MPE-FEC section the presence bit mistake based on such prerequisite.Describe how to determine whether faults exists, and that is to say, how to determine the reliability of each byte in detail below.
Figure 13 A explanation is according to the result who uses CRC-32 to carry out error detection on section under the byte, and TS wraps the two the combination as a result that use RS (204,188,16) carries out error correction under byte, and byte reliability determining unit 14 is done determining of what kind.
If to carry out the result of error detection be reliability A to the CRC-32 of section under the use byte, and the result who uses the RS (204,188,16) of TS bag under the byte to carry out error correction is reliability A, just determines that this byte has reliability A.
If it is reliability B that the CRC-32 of the affiliated section of use byte carries out the result of error detection, be reliability A but the RS (204,188,16) that is to use the affiliated TS of byte to wrap carries out the result of error correction, just definite this byte has reliability A.
If it is reliability A that the CRC-32 of the affiliated section of use byte carries out the result of error detection, be reliability B but the RS (204,188,16) that is to use the affiliated TS of byte to wrap carries out the result of error correction, just definite this byte has reliability A.
On the other hand, if the result who uses the CRC-32 of section under the byte to carry out error detection is reliability B, and the result who uses the RS (204,188,16) of TS bag under the byte to carry out error correction is reliability B, just determines that this byte has reliability B.
Like this, if carry out the result of error detection and use the RS (204,188,16) of this TS bag to carry out not detecting mistake among the result of error correction, just determine that this byte has reliability A at the CRC-32 that uses this section.
<determine to indicate setting according to reliability 〉
How Figure 13 B explanation is provided with the sign of reliability information table according to definite result of byte reliability determining unit 14.As the result who determines shown in Figure 13 A, when determining that byte has reliability A, the sign corresponding to this byte in the reliability information table is set to reliability A.Mark o in Figure 13 B shows that corresponding byte has reliability A.
The process of<renewal reliability information table 〉
The following describes the result who receives as to the MPE-FEC section, upgrade the process of reliability information table.
In Figure 14 A to 14C, the explanation that on the left side provides show application data sheet first to fourth the row each the row in have what.Sign (byte of what reliability A just).Figure 14 A relates to the stage of reproducing all IP datagram of application data sheet.Can see that from accompanying drawing first row has 191 reliability A bytes, second row has 190 reliability A bytes, and each all has 189 reliability A bytes the third line and fourth line.
Figure 14 B explanation is as the result who increases by a MPE-FEC section, and how the reliability information table upgrades.When the composition increase had reliability A for the MPE-FEC section of the parity data of MPE-FEC frame, first number that walks to reliability A byte in the fourth line adds 1, becomes 192,191,190 and 190 respectively, and was indicated as the note on the left side.
Figure 14 C explanation is as the result who increases by the 2nd MPE-FEC section, and how the reliability information table upgrades.When the composition increase had reliability A for the MPE-FEC section of the parity data of MPE-FEC frame, first number that walks to reliability A byte in the fourth line adds 1, becomes 193,192,191 and 191 respectively, and was indicated as the note on the left side.
Figure 14 A to 14C shows increases the example that all bytes all have the MPE-FEC section of reliability A.Figure 15 A to 15C shows increases an example that comprises the MPE-FEC section of reliability B byte data.
Figure 15 A is identical with Figure 14 B.That is to say, be respectively 192,191,190 and 190 at first number that walks to reliability A byte in the fourth line.
Figure 15 B explanation is as the result who increases by the 2nd MPE-FEC section, and how the reliability information table upgrades.When the MPE-FEC section in being increased to application data sheet comprised reliability B byte in the third line, first row number of reliability A byte in the fourth line was respectively 193,192,190 and 191, shown in the note on the left side.
Figure 15 C explanation is as the result who increases by the 3rd MPE-FEC section, and how the reliability information table upgrades.When the MPE-FEC section of increase giving application data sheet is made up of the byte that all has reliability A, first capable in the fourth line number of reliability A byte add 1, be respectively 194,193,191 and 192, shown in the note on the left side.
In Figure 14 and above process shown in Figure 15, if the number of reliability A byte is at least 191 in each row of MPE-FEC frame, then the faults in the MPE-FEC frame can be wiped by execution and be corrected.So just needn't wait for 64 whole MPE-FEC sections of reception in second round.Therefore can quicken to switch to battery saving mode.
Figure 16 explanation is thinking that each of MPE-FEC frame walks in the situation that has 191 reliability A bytes less the switching of battery saving mode.
If recognized to have at least 191 reliability A bytes to exist before beginning second round, then power control unit 30 can switch to battery saving mode before beginning second round.
Figure 17 explanation received in the 2nd MPE-FEC section during second round, recognized in the situation that has 191 reliability A bytes existence at least, to the switching of battery saving mode.If during second round, recognize, power control unit 30 even can in second round, switch to battery saving mode.
<realize FEC control unit 15 and power control unit 30 by software 〉
The following describes by software and realize FEC control unit 15 and power control unit 30.By producing the control program shown in the flow chart that a program is used for Figure 18, and have a CPU to carry out this program in receiving system, FEC control unit 15 and power control unit 30 can be realized in receiving system.
Figure 18 is the flow chart of explanation FEC control unit 15 and the whole control procedure of 30 pairs of receiving systems of power control unit.In this flow chart, repeat following process.Receiving system is set to (step S21) behind the battery saving mode, and whether the burst that detects destination service begins (step S22).If the burst of destination service has begun (step S22: be), just receiving system is arranged to normal mode (step S23), and before returning step S21 execution in step S24 to S23.
Step S24 to S32 comprises first circulation of being made up of step S24 and S25 and second circulation of being made up of step S28 to S30.
First circulation repeats to obtain a MPE section, and it is arranged to the part of application data sheet or the processing of whole row (step S25), up to obtaining all MPE sections (step S24: be).
Whether all bytes all have reliability A in each row of the definite application data sheet that obtains in this way of step S26.If all bytes all have reliability A, this process is got back to step S21 so, switches to battery saving mode.
If any delegation includes the byte with reliability A, then construct application data sheet (step S27), carry out second circulation of forming by step S28 to S30 then.
Second circulation repeats to obtain a MPE-FEC section, and it is arranged to the processing of row (step S29) of RS tables of data, up to any one result of step S28 and S30 for being.
Step S28 determines whether have at least 191 bytes to have reliability A in each row of MPE-FEC frame.If at least 191 bytes have reliability A, then carry out and wipe correction (step S31), process is got back to step S21 then, switches to battery saving mode.
Step S30 has determined whether to obtain all MPE-FEC sections of RS tables of data.If obtained all MPE-FEC sections, then carry out the error correction (step S32) of using RS (255,191,64), process is got back to step S21 then, switches to battery saving mode.
If the result of step S28 just switches to battery saving mode with receiving system for being, do not receive all MPE-FEC sections and do not wait.Therefore receiving system can be in the battery saving mode in the longer time.
Like this, according to present embodiment, can be according to the number that the parity byte what faults adjustment will receive can take place in each row of application data sheet.That is to say, enough wipe the parity byte of correction, just receiving system can be switched to battery saving mode in case receive quantity.Can quicken to switch to battery saving mode in this way because make, so receiving system can be in the longer time in the battery saving mode, so just can facilitate battery life longer.
This effect that reduces electrical source consumption depends on the component ratio of application data sheet and RS tables of data in a burst.Suppose that application data sheet has 191 row, and the RS tables of data is made up of the parity data table of 64 row that do not have the data punctured table.In this case, if reception environment is good, power cycle can shorten about 25% (=64/255) at most so.
Equally, according to present embodiment, if use part RS tables of data just can correct faults, even so in second round, receiving system also can switch to battery saving mode.This that is to say, can not correct faults by the same error correction that is had with DVB-T, but there is no need to use in the situation of whole RS tables of data error correction, receiving system can be wiped to correct and switch to battery saving mode by execution, and need not wait for that finish second round.Need not wait for second round because receiving system can switch to battery saving mode and finish, so receiving system can be in the battery saving mode in the longer time.
Here be noted that when the power supply supply that depends on demodulator circuit 10 stops, have the row received after the row of determining to stop the power supply supply or the possibility of multiple row.Even receive extra row in this case, receiving system still can switch to battery saving mode and need not wait for and receive whole RS tables of data.Therefore still can reach the effect that reduces electrical source consumption.
(second embodiment)
Figure 19 shows the internal structure of a receiving system relevant with the second embodiment of the present invention.The receiving system of second embodiment different with shown in Fig. 8, difference has been to provide the reception environment detecting unit 6 in the demodulator circuit 10 to replace reliability information table memory cell 13 and byte reliability determining unit 14.
Reception environment detecting unit 6 detects reception environments, and exports a value (assessed value) and be used to assess detected reception environment.Reception environment assessed value input FEC control unit 15 with output.In the present embodiment, AGC level, C/N value, received signal error rate and receiving system translational speed are used as this reception environment assessed value.
<reception environment assessed value 〉
Above each reception environment assessed value is described as follows.
The AGC level is the signal level of automatic gain control (AGC) in the demodulating unit 3.When the signal level of this AGC was lower than designated value, FEC control unit 15 just thought that reception environment is bad.
The C/N value of received signal is the ratio of signal power with the noise power of received signal, and is to calculate in the transmission path that estimates of the pilot signal that comprises from received signal.When the C/N value was lower than designated value, FEC control unit 15 just thought that reception environment is bad.
The time of estimated transmission path changes and calculates the receiving system translational speed in the pilot signal from be included in received signal.When receiving system translational speed during greater than designated value, FEC control unit 15 just thinks that reception environment is bad.
The error counts that wraps in RS decoding front and back according to TS is come detection error rate.When error rate was higher, FEC control unit 15 just thought that reception environment is poorer.
Also use in the situation of for example WLAN, mobile phone, bluetooth or this communication function of infrared communication in terminal, the reception environment of broadcast singal since radio communication disturb and so on may be bad.Therefore, when the reception period of burst detects emission or reception by communication function, think that reception environment is bad.Here, based on the announcement information of the outer CPU that comes self terminal, whether ongoing communication is possible to sense terminals.
(FEC control unit 15, power control unit 30)
Finished so far receiving the explanation of environmental assessment value.Introduce the control program of FEC control unit 15 and power control unit 30 among second embodiment below.
Figure 20 is a flow chart, and it illustrates the control program of FEC control unit 15 and power control unit 30 among second embodiment.In this flow chart, provide step S35 to S36 to replace step S26 to S30 and S32 among Figure 18.Step S35 uses the reception environment assessed value to judge whether reception environment is good.If reception environment is good, process is got back to step S21.If reception environment is bad, after receiving all MPE-FEC sections (step S36), carry out error correction (step S32) with RS (255,191,64).
Like this,, for example when receiving system keeps almost static, not receive the RS tables of data, so just can reduce about 25% electrical source consumption according to present embodiment.For example, in case receiving system begins to move, carry out the error correction identical to guarantee receiving quality with DVB-H.So just can realize the receiving system of high mobility.
Equally, according to present embodiment,, just keep stopping to 20 power supplies of part MPE-FEC unit if reception environment is good or received content does not have faults.So just can further reduce electrical source consumption.
(the 3rd embodiment)
The third embodiment of the present invention relates in a receiving system improvement in conjunction with the reception environment detecting unit 6 of the byte reliability determining unit 14 of first embodiment and the FEC control unit 15 and second embodiment.
Figure 21 shows the internal structure of the receiving system that the third embodiment of the present invention relates to.The receiving system of the 3rd embodiment different with shown in Fig. 8, difference is that byte reliability determining unit 14, reliability information table memory cell 13 and reception environment detecting unit 6 all are included in the receiving system.
Figure 22 is a flow chart, and it illustrates the control program of FEC control unit 15 and power control unit 30 among the 3rd embodiment.In this flow chart, provide step S35 between step S24 in Figure 18 and the S26.Step S35 judges whether reception environment is good.If reception environment is good, then process turns back to step S21.If reception environment is bad, then use method execution in step S26 to S32 same shown in Figure 18.
Like this,,, just do not receive the RS tables of data, do like this and can reduce about 25% electrical source consumption if reception environment is good according to present embodiment.If reception environment is moderate, then carries out and wipe correction.If reception environment is bad, just carry out error correction with RS (255,191,64).In this way, even reception environment is changing all the time, also can reach minimum electrical source consumption.
(the 4th embodiment)
The fourth embodiment of the present invention relates in the receiving system in the 3rd embodiment the improvement that for the reception environment assessed value different level is set and carries out error correction according to level.Be reception environment detecting unit 6 detected reception environment assessed value specified level 1 (well), level 2 (moderate) and these three level of level 3 (bad) here.
Figure 23 is a flow chart, and it illustrates the control program of FEC control unit 15 and power control unit 30 among the 4th embodiment.In this flow chart, provide step S35 between step S24 in Figure 18 and the S26.Step S35 judges that reception environment is level 1 (well), level 2 (moderate) or level 3 (bad).If reception environment is level 1 (well), then process turns back to step S21.If reception environment is level 2 (moderate), then use method execution in step S26 to S32 same shown in Figure 18.If reception environment is level 3 (bad), then use method execution in step S36 same shown in Figure 20.
Like this,,, then not receive the RS tables of data, do like this and can reduce about 25% electrical source consumption if reception environment is good according to present embodiment.If reception environment is moderate, then carries out and wipe correction.If reception environment is bad, then use RS (255,191,64) to carry out error correction.In this way, even reception environment is changing all the time, also can reach minimum electrical source consumption.
(comment)
Although more than described when submitting to and implemented the best mode that applicant of the present invention thinks, further improve and change to be applied to following technical elements.Be noted that whether to adopt these improvement and variation by implementing people's arbitrary decision of the present invention.
(definition of battery saving mode)
When implementing the time of the present invention, for example how to control to the power supply supply of demodulator circuit 10 and MPE-FEC unit 20 reducing electrical source consumption, and which state of receiving system can think that the such thing of battery saving mode can determine arbitrarily.Therefore, battery saving mode can with in the above-described embodiments different are shown.For example, be supplied as low state for the power supply of demodulator circuit 10 and can think battery saving mode.
(in the MPE-FEC error correction and wipe between the correction switch)
Can carry out the MPE-FEC error correction to the MPE-FEC frame in order to following method.
At first, the number of each in computed reliability A byte and the reliability B byte in each row of application data sheet.If all bytes in the delegation all have reliability A, this delegation does not need error correction so.If the number of reliability B byte is 1 to 32, just this row is carried out normal error correction or wipes correction.
If the number of reliability B byte is 33 to 64, then can only uses to wipe and correct mistake, so wipe correction in this delegation's execution.
If the number of reliability B byte greater than 64, is then wiped and corrected is impossible, so carry out normal error correction in this delegation.Here, even the number of reliability B byte is 64, in fact perhaps certain in these reliabilities B byte some be free from mistakes, and this just still might use normal error correction to correct this delegation.
(wiping the sequential of correction)
By as long as the number of reliability A byte becomes and is at least 191 in the delegation, just in this delegation, wipe correction, can realize real-time processing.When according to the number of Calculation of Reliability byte, if in delegation reliability B byte outnumbered 64, concerning this delegation, just can not carry out error correction so according to reliability.In this case, must receive complete data and carry out normal error correction.When processing like this, can reduce amount of calculation by storage and the calculating that stops reliability information.
(the judgement sequential of reception environment)
When implementing the time of the present invention, judgement sequential that can the arbitrary decision reception environment.For example, during receiving unit MPE section, or during receiving the MPE-FEC section, can carry out the judgement of reception environment.
If reception environment is very good, not only can omits the MPE-FEC error correction, but also can omit RS (204,188, the 16) decoding of TS bag.
(reception environment being classified) according to level
The 4th embodiment can make following modification.Based on the condition of acceptance of front, before obtaining the MPE section, implement the classification that reception environment is pressed level.If reception environment is judged as level 3 (bad), does not then carry out reliability and determine.Like this, can ignore that reliability is determined and the storage of reliability information.
(DVB-H)
Above embodiment has described a kind of receiving system of the multicarrier form that is called DVB-H, but the present invention is suitable for adopting the single carrier receiving system of similar frame structure equally.
Above embodiment has described a kind of receiving system of the time division multiplexing emission system that is called DVB-H, the system of wrapping emission continuously but the present invention is suitable for not carrying out the time division multiplexing emission equally, the first that needs only data structure is that the part of the back of data and data structure is an odd and even data.
(realization of control program)
In fact the control program that control program in the foregoing description shown in the flow chart and functional structure parts are carried out can be realized with hardware resource.Like this, can think that these control programs are the innovations that utilize the technological thought of the natural law.Therefore these control programs satisfy the requirement as " program invention ".
The generation of<program of the present invention 〉
Can produce with the following methods according to program of the present invention.At first, the software developer uses the programming language establishment to realize the source program of above flow chart and functional structure parts.When doing like this, the software developer is according to the such program of the grammer of programming language establishment, uses class formation, variable, aray variable and to outside function calls, realizes above flow chart and functional structure member.
The source program of establishment is offered compiler with the form of file.Compiler is translated these source programs to generate target program.
The translation of compiler is made up of a plurality of steps, and for example syntactic analysis, optimization, resource allocation and code generate.In syntactic analysis, source program is carried out lexical analysis, syntactic analysis and semantic analysis, so that source program is converted to interlude.In optimization, middle program is carried out for example basic piecemeal, control flow analysis, the such operation of data-flow analysis.In resource allocation, in order to be fit to the instruction set of target processor, the variable in the interlude is distributed to register or memory in the target processor.In code generates, each intermediate command in the interlude is converted to program code, thereby obtains target program.
The target program that is produced is made up of one or more program code like this, is used for making the flow chart of computer execution the foregoing description or each step of functional structure parts.There is polytype program code, for example the code of processor itself or JAVA (registered trade mark) syllabified code.Equally, there is several different methods to be used for realizing each step by program code.If can use external function to realize each step, just serve as program code with the call statement of calling this external function.Equally, existence is used to realize that the program code of a step belongs to the situation of different target program.For risc processor, can instruct by combination arithmetic instruction, logical order, branch instruction and other and realize each step in the above-mentioned flow chart with limited instruction set.
After producing target program, the programmer activates the connector that is used for target program.Connector distributes target program to give memory area with relevant library, and they are linked at together to produce loading module.Read this loading module that is produced by computer, and make computer carry out the process of flow chart in the foregoing description and the process of functional structure parts.As the result of above-mentioned processing, can produce program according to the invention.
<use is according to the example of program of the present invention 〉
Program according to the invention can be made following purposes.
(i) as embedded program
Program according to the invention when the embedded program, will be write as the loading module of program and basic input/output procedure (BIOS) and various middleware (operating system) and instruct among the ROM.To instruct ROM to be attached in the control unit and by CPU then carries out.Like this, can be with the control program of program according to the invention as receiving system.
(ii) as application program
When receiving system was equipped with hard disk, basic input/output procedure (BIOS) was included among the instruction ROM, and polytype middleware (operating system) is installed in the hard disk in advance.Equally, also in receiving system, be provided for bootstrapping ROM from the hard disk activation system.
In this case, by potable recording media or network, only loading module is offered receiving system, and be installed in the hard disk as application program.As a result, receiving system is booted by bootstrapping ROM and is started the operating system, and allows CPU carry out this application program.Like this, program of the present invention has obtained application.
Be equipped with the receiving system of hard disk to be used as application program to program of the present invention.Therefore, program of the present invention can be distributed independently, hired out or provides by network.(realization of demodulator circuit 10 and MPE-FEC unit 20)
In demodulator circuit 10 in the foregoing description, MPE-FEC unit 20 and the power control unit 30 each can realize separately as a system LSI.As a kind of selection, the combination of demodulator circuit 10, MPE-FEC unit 20 and power control unit 30 can be realized as a system LSI.
System LSI is by nude film being installed on high-density base board and being encapsulated the circuit that they produce.By a plurality of nude films being installed on high-density base board and being encapsulated their (such system LSI are called multi-chip module), system LSI comprises such structure, and a plurality of nude films have the external structure that resembles a LSI in this structure.
For system LSI two types encapsulation is arranged, i.e. QFP (four line flat packaging) and PGA (pin grid array).QFP is the system LSI that pin is connected to four limits of encapsulation.PGA is the system LSIs of a lot of pins in whole lower surface.
These pins serve as the interface of other circuit.Because the pin in system LSI has this interface function, so when other circuit was connected to the pin of system LSI, system LSI can serve as the core of receiving system.
The nude film that is encapsulated in the system LSI forms one " fore-end ", one " rear end part " and one " digital processing part ".Fore-end is with analog signal digital.Rear end part will be converted to analog signal as the data that digital processing results obtains, and export this analog signal.
Each structure member shown in the cut-away view of the foregoing description all is included in the digital processing part.
As mentioned the same in the section of above-mentioned " using " previously, will write as the loading module of program, basic input/output procedure (BIOS) and polytype middleware (operating system) and instruct among the ROM as embedded program.Because the foregoing description is relevant especially with generation as the loading module of program, therefore system LSI of the present invention can be by encapsulation as nude film, and the instruction ROM that stores as the loading module of program produces.
In reality is implemented, can use SoC or SiP.The technology that SoC (SOC (system on a chip)) is a kind of integrated a plurality of circuit to a slice single-chip.SiP (encapsulation in system) is that a kind of resin or other similar substance of using merges the technology of multi-plate chip in the encapsulation.Through above-mentioned processing, the cut-away view based on the receiving system among above-mentioned each embodiment can produce system LSI of the present invention.
Integrated circuit with said method Cheng Sheng is called IC, LSI, super LSI or super LSI according to integrated level.
And some or all structure members of receiving system can be realized on a chip.Equally, integrated above-mentioned SoC and the SiP of being not limited to, but can be undertaken by using special circuit or common treatment.After producing LSI, can use the reconfigurable processor that circuit block connects and is provided with among the FPGA (field programmable gate array) that can programme or the restructural LSI.Equally, if the integrated circuit technique that appearance can be replaced LSI from the progress of semiconductor technology and other deriving technology so also can be this technology of integrated use of functional block.For example, can make in this way and get rid of biotechnology.
Industrial applicibility
The foregoing description has been announced the internal structure of receiving system related to the present invention separately, and based on disclosed internal structure, can produce this receiving system in a large number.In other words, this receiving system can be by industrialized use.Therefore receiving system of the present invention has industrial applicibility.

Claims (8)

1. receiving system, it received in the seeervice cycle of broadcast singal, switch to battery saving mode in the non-seeervice cycle, the described seeervice cycle comprises the period 1 of launching application data sheet and follows the second round of launching the parity data table after the period 1, comprising:
Receiving circuit is used for receiving in the described period 1 obtaining described application data sheet, and receives in described second round;
Error correction unit is used for using selectively first of whole described parity data table to correct and use second correction of a described parity data table part, to be corrected in the faults in the application data sheet that has obtained; And
Switch unit when the result who carries out described second correction as described error correction unit corrects described faults, is used for switching to battery saving mode before finishing described second round.
2. receiving system as claimed in claim 1, wherein said application data sheet is made up of a plurality of bytes that are arranged in the matrix,
Described receiving system further comprises:
Detecting unit when described receiving circuit obtains described application data sheet, is used for each row at the described application data sheet that has obtained, detects the position of each byte that faults is arranged,
Described second correction is to wipe correction, if described detecting unit detects the position of each byte of faults in described row, then corrects faults by using with each parity byte that all has the byte of faults to have similar number, and
Switching to battery saving mode by described switch unit, is in described second round, describedly carries out when capable adding to each parity byte that all has the byte of faults to have similar number.
3. receiving system as claimed in claim 2, the wherein said period 1 is emission by changing the cycle of a plurality of transmission package that a plurality of data segment produces,
In described a plurality of data segment each comprises that all one of described application data sheet is listed as and is used for the cyclic code of these row,
Described receiving circuit comprises:
Section is corrected the unit, by using described cyclic code, is used for correcting the faults of each data segment; With
Bag is corrected the unit, adds correction code in the described transmission package to by use, is used for correcting the faults of each transmission package of forming described data segment, and
The described detection of described detecting unit is the faults that can not correct at described section correction unit in the described data segment, which and when described bag is corrected the unit and can not be corrected faults in the described transmission package, undertaken by the row of specifying described data segment or described transmission package to belong to described application data sheet.
4. receiving system as claimed in claim 2 further comprises:
Counting unit, when described receiving circuit obtains described application data sheet, be used for to described application data sheet each the row each have the number of the byte of faults to count,
If wherein the number of the byte of being counted by described counting unit in each row of described application data sheet is 0, then described switch unit switches to battery saving mode before beginning described second round,
If the number of the byte of being counted by described counting unit in each row of described application data sheet is not more than predetermined number, then described error correction unit is carried out described second correction, and
If the number of the byte of being counted by described counting unit in any delegation of described application data sheet is greater than described predetermined number, then described error correction unit is carried out described first and is corrected.
5. receiving system as claimed in claim 1 further comprises:
Detecting unit is used to detect the information that the broadcast singal reception environment is described,
If wherein detected described information satisfies predetermined condition, then described switch unit switches to battery saving mode before beginning described second round, and
If detected described information does not satisfy described predetermined condition, then described error correction unit is carried out in described first correction and described second correction.
6. receiving system as claimed in claim 1 further comprises:
Detecting unit is used to detect the information that the broadcast singal reception environment is described,
If wherein detected described information is illustrated as the first order, then described switch unit switches to battery saving mode before beginning described second round,
If detected described information is illustrated as the second level, then described error correction unit is carried out described first correction, and
If detected described information is illustrated as the third level, then described error correction unit is carried out described second and is corrected.
7. integrated circuit that is included in the receiving system that receives in the seeervice cycle of broadcast singal, be used for switching to the control of battery saving mode in the non-seeervice cycle, the described seeervice cycle comprises the period 1 of launching application data sheet and follows the second round of launching the parity data table after the described period 1, it is characterized in that:
When described receiving system uses first of whole described parity data table to correct and uses second of a described parity data table part described second in correcting to correct, before finishing described second round, switch to battery saving mode.
8. method that in the seeervice cycle of broadcast singal, receives and in the non-seeervice cycle, switch to battery saving mode, the described seeervice cycle comprises the period 1 of launching application data sheet and follows the second round of launching the parity data table after the described period 1, comprising:
Receiving step receives in the described period 1 obtaining described application data sheet, and receives in described second round;
Error correction step uses first of whole described parity data table to correct and use second correction of a described parity data table part, to correct the faults in the described application data sheet that has obtained selectively; And
Switch step when correcting faults as the result who carries out described second error correction step of correcting, switched to battery saving mode before finishing described second round.
CNB2005800043078A 2004-12-08 2005-12-02 Reception device, integrated circuit, program, and reception method Expired - Fee Related CN100514868C (en)

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