CN100508607C - Block match method and device - Google Patents
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- CN100508607C CN100508607C CN 200410057549 CN200410057549A CN100508607C CN 100508607 C CN100508607 C CN 100508607C CN 200410057549 CN200410057549 CN 200410057549 CN 200410057549 A CN200410057549 A CN 200410057549A CN 100508607 C CN100508607 C CN 100508607C
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Abstract
Disclosed a area matching device comprises a plurality of operational modules while each operational module is used to calculate the pixel difference between the a plurality of target pixels of one target area and the a plurality of reference pixels of one reference area. Wherein, each operational module comprises several operational elements for calculating the pixel difference between one pixel of said target pixels and one reference pixel of said reference pixels, and several additive elements coupling connected to said operational modules while each additive element adds the results of several operational elements of relative operational module.
Description
Technical field
The present invention relates to a kind of area matching method and device, the method and apparatus of pixel difference between particularly a kind of calculation block.
Background technology
The process of many Video processing (for example motion estimation technique among the MPEG2/MPEG4 (motionestimation)) all needs to utilize the operation result of image block coupling (block matching).For example, during a target block (block) in the picture of encoding, need according to last picture on this target block and the time shaft or afterwards the most similar one encode in the picture with reference to the difference between macro zone block.Generally speaking, the block coupling can be mated the to be matched macro zone block of this target block to interior all the similar sizes of a search area of last picture or back one picture one by one, to find out the reference block the most similar to this target block.
The target block that different video standard specifications is allowed big or small different, for example 8 X 8,8 X, 16,16 X 8 or 16 X 16 or the like.Yet in known technology, the target block of different size needs different circuit to carry out the block coupling, thereby has increased cost and complexity when circuit is real to be done.Because block coupling need be carried out a large amount of computings, therefore, realize that as more efficient mode how the block matching algorithm is one of subject under discussion of paying close attention to of industry.
Summary of the invention
Therefore, one of purpose of the present invention is to provide a kind of block of pixel difference arithmetic unit, can handle the target block of different size.
According to embodiments of the invention, be to disclose a kind of block coalignment, it includes a plurality of computing modules, each computing module is used for calculating in the target block pixel difference between a plurality of reference pixels in a plurality of object pixels and a reference block, wherein each computing module includes a plurality of arithmetic elements, is used for calculating the pixel difference between one of one of these object pixels and these reference pixels respectively; And a plurality of adder units, be coupled in these computing modules respectively, each adder unit is the result of calculation that is used for adding up a plurality of arithmetic elements in the corresponding computing module, and each adder unit is to be used for adding up the result of calculation of corresponding computing module in a plurality of execution cycles.
According to embodiments of the invention, other discloses a kind of block of pixel difference arithmetic unit, be used for calculating the difference of one first reference block and one second reference block in a target block of a target picture and the reference picture, this target block includes one first pixel and one second pixel, this first reference block includes one first reference pixel and one second reference pixel, this second reference block includes this second reference pixel and one the 3rd reference pixel, this block of pixel difference arithmetic unit includes: one first arithmetic element is used for calculating the difference of this first pixel and this first reference pixel; One second arithmetic element is used for calculating the difference of this first pixel and this second reference pixel; One the 3rd arithmetic element is used for calculating the difference of this second pixel and this second reference pixel; One the 4th arithmetic element is used for calculating the difference of this second pixel and the 3rd reference pixel; One first adder unit is coupled in this first, the 3rd arithmetic element, is used for adding up the operation result of this first, the 3rd arithmetic element; And one second adder unit, be coupled in this second, the 4th arithmetic element, be used for adding up the operation result of this second, the 4th arithmetic element.
According to embodiments of the invention, disclose a kind of block of pixel difference operation method again, be used for calculating the difference of one first reference block and one second reference block in a target block of a target picture and the reference picture, this target block includes one first pixel and one second pixel, this first reference block includes one first reference pixel and one second reference pixel, this second reference block includes this second reference pixel and one the 3rd reference pixel, and this block of pixel difference operation method includes: the difference of (a) calculating this first pixel and this first reference pixel; (b) calculate the difference of this first pixel and this second reference pixel; (c) calculate the difference of this second pixel and this second reference pixel; (d) calculate the difference of this second pixel and the 3rd reference pixel; (e) add up step (a) and operation result (b); And (f) add up step (c) and (d) operation result.
Description of drawings
Fig. 1 is the schematic diagram of a target picture.
Fig. 2 is the schematic diagram of a reference picture.
Fig. 3 is the schematic diagram of the block of pixel difference arithmetic unit of one embodiment of the invention.
Fig. 4 mates the data flow diagram of embodiment of the target block of one 8 X 8 for the block of pixel difference arithmetic unit of Fig. 3.
Fig. 5 is the schematic diagram of the target block of one 16 X, 8 sizes.
Fig. 6 mates the data flow diagram of embodiment of the target block of one 16 X 8 for the block of pixel difference arithmetic unit of Fig. 3.
Fig. 7 is the schematic diagram of the target block of one 16 X, 16 sizes.
Fig. 8 mates the data flow diagram of embodiment of the target block of one 16 X 16 for the block of pixel difference arithmetic unit of Fig. 3.
The reference numeral explanation
| 100、500、700 | Target |
| 110、510、710 | Target block |
| 200 | Reference picture |
| 210 | Search Area |
| 300 | Block of pixel difference |
| 302、304、306、308、310、312、 314、316 | Computing |
| 322、324、326、328、330、332、 334、336 | Adder |
| 402、404、406、408 | |
| 512、514、712、714、716、718 | Sub-block |
Embodiment
Please refer to Fig. 1, it illustrates is the schematic diagram of a target picture 100.Including a size in the target picture 100 is the target block 110 of 8 X 8.For convenience of description, each pixel of being comprised of target block 110 all indicates the coordinate of a correspondence.In the following description, each pixel in the target block 110 is that (x y) is referred to as, and wherein (x y) is the coordinate of this pixel with C.
It is the schematic diagram of a reference picture 200 that Fig. 2 illustrates.As be familiar with known to this operator, reference picture 200 is the last picture or back one picture of target picture 100 normally, but is not limited to this.Reference picture 200 comprises a Search Area (search area) 210, and its size is n * m.In the following description, each pixel in the Search Area 210 is that (x y) is referred to as, and wherein (x y) is the coordinate of this pixel with R.
Fig. 3 is the schematic diagram according to the block of pixel difference arithmetic unit 300 of one embodiment of the invention.Block of pixel difference arithmetic unit 300 includes 8 computing modules (computing module) 302-316; And 8 adder units (adding unit) 322-336.Each computing module all includes 8 arithmetic elements, and (processing element PE), is used for calculating the difference between the pixel of pixel of target block 110 and Search Area 210.In the present embodiment, each arithmetic element (PE) be used between calculating pixel absolute difference (absolute difference, AD).As shown in Figure 3, all arithmetic elements in the same computing module all are coupled in corresponding adder unit.In the present embodiment, each adder unit is the operation result that is used for adding up all arithmetic elements in the corresponding computing module, promptly has the function of adder (adder).Again in the present embodiment, each adder unit also is used for adding up corresponding computing module resulting operation result in a plurality of execution cycles, that is has the function of accumulator (accumulator).
Please refer to Fig. 4, its illustrate is the data flow diagram 400 of an embodiment of a plurality of reference block (reference block) in the Search Area 210 of block of pixel difference arithmetic unit 300 coupling target block 110 and reference picture 200.For convenience of description, each reference block in the Search Area 210 is that coordinate with the pixel in its upper left corner defines.For example, a reference block in the upper left corner is defined as reference block RB in the Search Area 210
8 x 8(1,1), reference block RB
8 x 8(1,1) is to be defined as reference block RB toward a reference block of a pixel distance of right translation
8 x 8(2,1) or the like.In addition, too complicated for fear of diagram, thus in Fig. 4, block of pixel difference arithmetic unit 300 is simplified, and do not show its interior bonds mode.
In Fig. 4, eight horizontal dotted line (horizontaldotted line) by block of pixel difference arithmetic unit 300 are represented the data flow of eight pixels of same row (row) in the target block 110 respectively; And 15 oblique dotted lines (oblique dottedline) by block of pixel difference arithmetic unit 300 are then represented the data flow of 15 pixels of same row in the Search Area 210 respectively.Be noted that, in the present embodiment, each pixel data is that synchronously (promptly also in same execution cycle) inputs to all online arithmetic elements of corresponding void, thus, when loading pixel data, just can not cause the situation of delay (delay) to block of pixel difference arithmetic unit 300.
In first execution cycle, the first row pixel data in the target block 110, that is pixel C (1,1), C (2,1) ..., C (7,1) and C (8,1), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.For example, in first execution cycle, pixel C (1,1) can input to eight arithmetic elements such as arithmetic element 402,404 in the first column operations unit synchronously, and pixel C (2,1) can import eight arithmetic elements such as arithmetic element 406,408 in the secondary series arithmetic element synchronously, and the rest may be inferred.Simultaneously, preceding 15 pixels in the first row pixel of Search Area 210, that is pixel R (1,1), R (2,1) ..., R (14,1) and R (15,1), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.For example, in first execution cycle, pixel R (1,1) can input to arithmetic element 402 synchronously, and pixel R (2,1) can input to arithmetic element 404 and 406 synchronously, and the rest may be inferred.
In second execution cycle, the secondary series pixel data in the target block 110, that is pixel C (1,2), C (2,2) ..., C (7,2) and C (8,2), can input to empty all the online arithmetic elements of a corresponding level respectively synchronously.Simultaneously, preceding 15 pixels in the secondary series pixel of Search Area 210, that is pixel R (1,2), R (2,2) ..., R (14,2) and R (15,2), can input to all online arithmetic elements of corresponding one oblique void respectively synchronously.The rest may be inferred, in the 8th execution cycle, the 8th row pixel data in the target block 110, promptly pixel C (1,8), C (2,8) ..., C (7,8) and C (8,8), can input to empty all the online arithmetic elements of a corresponding level respectively synchronously.Simultaneously, preceding 15 pixels in the 8th row pixel of Search Area 210, that is pixel R (1,8), R (2,8) ..., R (14,8) and R (15,8), can input to all online arithmetic elements of corresponding one oblique void respectively synchronously.
In each execution cycle, each arithmetic element can be calculated the absolute difference (AD) of its two loaded pixel values synchronously.For example, in first execution cycle, arithmetic element 402 meeting calculating pixel C (1,1) in the computing module 302 and the absolute difference of pixel R (1,1), and the absolute difference of arithmetic element 406 meeting calculating pixel C (2,1) and pixel R (2,1).Simultaneously, arithmetic element 404 meeting calculating pixel C (1,1) in the computing module 304 and the absolute difference of pixel R (2,1), and the absolute difference of arithmetic element 408 meeting calculating pixel C (2,1) and pixel R (3,1).In second execution cycle, arithmetic element 402 meeting calculating pixel C (1,2) and pixel R (1,2) absolute difference, the absolute difference of arithmetic element 406 meeting calculating pixel C (2,2) and pixel R (2,2), arithmetic element 404 meeting calculating pixel C (1,2) with the absolute difference of pixel R (2,2), and arithmetic element 408 can calculating pixel C (2,2) with the absolute difference of pixel R (3,2).The rest may be inferred, in the 8th execution cycle, and arithmetic element 402 meeting calculating pixel C (1,8) with the absolute difference of pixel R (1,8), arithmetic element 406 can calculating pixel C (2,8) with pixel R (2,8) absolute difference, arithmetic element 404 meeting calculating pixel C (1,8) and pixel R (2,8) absolute difference, and the absolute difference of arithmetic element 408 meeting calculating pixel C (2,8) and pixel R (3,8).
By as can be known aforementioned, eight arithmetic elements of computing module 302 can be expressed as in the operation result summation of first execution cycle
And eight arithmetic elements of computing module 302 can be expressed as in the operation result summation of second execution cycle
The rest may be inferred, and eight arithmetic elements of computing module 302 can be expressed as in the operation result summation of the 8th execution cycle
In other words, adder unit 322 totallings and accumulating operation module 302 can be expressed as from the mathematical expression of the operation result of first execution cycle to the, eight execution cycles:
As be familiar with known to this operator, formula (1) D value is in target block 110 and the Search Area 210 the reference block RB in the upper left corner
8 x 8(1,1) absolute difference between the two and (sum of absolutedifference, SAD).
In like manner, eight of computing module 304 arithmetic elements can be expressed as in the operation result summation of first execution cycle
And eight arithmetic elements of computing module 304 can be expressed as in the operation result summation of second execution cycle
The rest may be inferred, and eight arithmetic elements of computing module 304 can be expressed as in the operation result summation of the 8th execution cycle
In other words, adder unit 324 totallings and accumulating operation module 304 can be expressed as from the mathematical expression of the operation result of first execution cycle to the, eight execution cycles:
The value of formula (2) is the reference block RB in target block 110 and the Search Area 210
8 x 8(2,1) absolute difference between the two and.
The rest may be inferred, and adder unit 336 adds up computing module 316 and can be expressed as from the mathematical expression of the operation result of first execution cycle to the, eight execution cycles:
The value of formula (3) is the reference block RB in target block 110 and the Search Area 210
8 x 8(8,1) absolute difference between the two and.
Therefore, through after the computing of the first eight execution cycle, the value of being accumulated in eight adder units promptly is respectively corresponding eight reference block (that is reference block RB in target block 110 and the Search Area 210
8 x 8(1,1), RB
8 x 8(2,1) ..., and RB
8 x 8(8,1)) between absolute difference and.
Next, in the 9th execution cycle, the first row pixel data in the target block 110, promptly pixel C (1,1), C (2,1) ..., C (7,1) and C (8,1), can input to empty all the online arithmetic elements of corresponding level respectively synchronously as previously mentioned.Simultaneously, in the first row pixel of Search Area 210, from 15 pixels of pixel R (9,1) beginning, that is pixel R (9,1), R (10,1) ..., R (22,1) and R (23,1), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.In the tenth execution cycle, the secondary series pixel data in the target block 110, promptly pixel C (1,2), C (2,2) ..., C (7,2) and C (8,2), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.Simultaneously, in the secondary series pixel of Search Area 210, from 15 pixels of pixel R (9,2) beginning, that is pixel R (9,2), R (9,2) ..., R (22,2) and R (23,2), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.The rest may be inferred, and after the computing through the 9th to the 16 execution cycle, the value of being accumulated in eight adder units is respectively follow-up eight reference block (that is reference block RB in target block 110 and the Search Area 210
8 x 8(9,1), RB
8 x 8(10,1) ..., and RB
8 x 8(16,1)) between absolute difference and.
From the above, block of pixel difference arithmetic unit 300 per eight execution cycles of present embodiment just can calculate in target block 110 and the Search Area 210 absolute difference and (SAD) between eight reference block.In other words, absolute difference between calculating target block 110 and single reference block and required time are on average as long as an execution cycle.In addition, its phenomenon that does not have to postpone when carrying out the block matching operation produces, so can reach best operation efficiency.
Aforesaid block of pixel difference arithmetic unit 300 is the pixel value of same row (row) in the loaded targets block 110 in same execution cycle, carries out computing with the pixel value of same row in the Search Area 210, and this only is one embodiment of the invention.On real the work, block of pixel difference arithmetic unit 300 is in same execution cycle, but the also pixel value of same delegation (column) in the loaded targets block 110, and the pixel value with delegation carries out computing in the Search Area 210.
In addition, block of pixel difference arithmetic unit 300 of the present invention also has the advantage of the target block of supporting the different size size.The size of hypothetical target block is 16 X 8, illustrate as Fig. 5, then 300 need of block of pixel difference arithmetic unit are with the target block 510 in the target picture 500 of Fig. 5, the sub-block (sub-block) 512 and 514 that to be divided into two sizes be 8 X 8 can utilize function mode as hereinbefore to carry out the block coupling.
Fig. 6 illustrate is the data flow diagram of an embodiment of a plurality of reference block in the Search Area 210 of block of pixel difference arithmetic unit 300 coupling target block 510 and reference picture 200.
In first execution cycle, the first row pixel data in the sub-block 512, that is pixel C (1,1), C (2,1) ..., C (7,1) and C (8,1), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.Simultaneously, preceding 15 pixels in the first row pixel of Search Area 210, that is pixel R (1,1), R (2,1) ..., R (14,1) and R (15,1), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.In second execution cycle, the secondary series pixel data in the sub-block 512, that is pixel C (1,2), C (2,2) ..., C (7,2) and C (8,2), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.Simultaneously, preceding 15 pixels in the secondary series pixel of Search Area 210, that is pixel R (1,2), R (2,2) ..., R (14,2) and R (15,2), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.
The rest may be inferred, in the 9th execution cycle, the first row pixel data in the sub-block 514, promptly pixel C (9,1), C (10,1) ..., C (15,1) and C (16,1), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.Simultaneously, in the first row pixel of Search Area 210, from 15 pixels of pixel R (9,1) beginning, that is pixel R (9,1), R (10,1) ..., R (22,1) and R (23,1), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.Next in the tenth execution cycle, the secondary series pixel data in the sub-block 514, promptly pixel C (9,2), C (10,2) ..., C (15,2) and C (16,2), can input to empty all the online arithmetic elements of corresponding level respectively synchronously.Simultaneously, in the secondary series pixel of Search Area 210, from 15 pixels of pixel R (9,2) beginning, that is pixel R (9,2), R (9,2) ..., R (22,2) and R (23,2), can input to all online arithmetic elements of corresponding oblique void respectively synchronously.
The rest may be inferred, and after the computing through 16 execution cycles, the value of being accumulated in eight adder units is respectively continuous eight reference block (that is reference block RB in target block 510 and the Search Area 210
16 x 8(1,1), RB
16 x 8(2,1) ..., and RB
16 x 8(8,1)) between absolute difference and.As long as absolute difference between calculating target block 510 and single reference block and required time are on average two execution cycles.On real the work, block of pixel difference arithmetic unit 300 also can load the pixel value of same delegation (column) in sub-block 512 or 514 in same execution cycle, and the pixel value with delegation carries out computing in the Search Area 210.
If the size of target block is 16 X 16, illustrate as Fig. 7.Block of pixel difference arithmetic unit 300 also only needs the target block 710 in the target picture 700 of Fig. 7, and the sub-block 712,714,716 and 718 that to be divided into four sizes be 8 X 8 can be carried out the block coupling.Fig. 8 illustrate is the data flow diagram of an embodiment of a plurality of reference block in the Search Area 210 of block of pixel difference arithmetic unit 300 coupling target block 710 and reference picture 200.Because the function mode of block of pixel difference arithmetic unit 300 is identical in fact with previous embodiment, so do not repeat them here.
In this embodiment, after the computing through 32 execution cycles, eight values that adder unit is accumulated of block of pixel difference arithmetic unit 300 are to be respectively continuous eight reference block (that is reference block RB in target block 710 and the Search Area 210
16 x 16(1,1), RB
16 x 16(2,1) ..., and RB
16 x 16(8,1)) between absolute difference and.In other words, as long as absolute difference between calculating target block 710 and single reference block and required time are on average four execution cycles.In like manner, on real the work, block of pixel difference arithmetic unit 300 also can load the pixel value of same delegation (column) in sub-block 712,714,716 or 718 in same execution cycle, and the pixel value with delegation carries out computing in the Search Area 210.
From the above, block of pixel difference arithmetic unit 300 of the present invention utilizes same set of arithmetic element (PE) matrix, can handle the target block of 8 X, 8,16 X, 8,8 X, 16,16 X 16 or the like different size, and the usability of circuit is significantly improved.
In addition, in the aforementioned embodiment, the arithmetic element matrix size of block of pixel difference arithmetic unit 300 is 8 X 8, and this only is a preferred embodiment of the present invention, and non-limiting range of application of the present invention.On real the work, only need utilize the arithmetic element matrix of 4 X, 4 sizes, or even the arithmetic element matrix of 2 X, 2 sizes, can realize the block matching operation of aforementioned different size.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (9)
1. block coalignment, it includes:
A plurality of computing modules, each computing module is used for calculating in the target block pixel difference between a plurality of reference pixels in a plurality of object pixels and a reference block, wherein, each computing module includes a plurality of arithmetic elements, and described arithmetic element is used for calculating the pixel difference between one of one of these object pixels and these reference pixels respectively; And
A plurality of adder units, be coupled in these computing modules respectively, each adder unit is the result of calculation that is used for adding up a plurality of arithmetic elements in the corresponding computing module, and each adder unit is to be used for adding up the result of calculation of corresponding computing module in a plurality of execution cycles.
2. block coalignment as claimed in claim 1, wherein, one of these object pixels are a plurality of first arithmetic elements that input to synchronously in these arithmetic elements.
3. block coalignment as claimed in claim 2, wherein, these first arithmetic elements are the computing modules that belong to different respectively.
4. block coalignment as claimed in claim 1, wherein, each arithmetic element is the absolute difference that is used for calculating between one of one of these object pixels and these reference pixels.
5. block coalignment as claimed in claim 1, wherein, these object pixels are same row or the same delegation that are arranged in this target block.
6. block coalignment as claimed in claim 1, wherein, these reference pixels are same row or the same delegation that are arranged in this reference block.
7. block of pixel difference operation method, be used for calculating in the target picture difference between one first reference block and one second reference block in the target block and a reference picture, this target block includes one first pixel and one second pixel, this first reference block includes one first reference pixel and one second reference pixel, this second reference block includes this second reference pixel and one the 3rd reference pixel, and this block of pixel difference operation method includes:
Calculate this first pixel and this first reference pixel, obtain one first difference value;
Calculate this first pixel and this second reference pixel, obtain one second difference value;
Calculate this second pixel and this second reference pixel, obtain one the 3rd difference value;
Calculate this second pixel and the 3rd reference pixel, obtain one the 4th difference value;
Add up this first difference value and this second difference value; And
Add up the 3rd difference value and the 4th difference value.
8. block of pixel difference operation method as claimed in claim 7, wherein, each calculation procedure is to carry out synchronously.
9. block of pixel difference operation method as claimed in claim 7, wherein, each calculation procedure is the absolute difference between calculating pixel.
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| CN 200410057549 CN100508607C (en) | 2004-08-16 | 2004-08-16 | Block match method and device |
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Non-Patent Citations (2)
| Title |
|---|
| Array Architectures for Block Matching Algorithms. THOMAS KOMAREK, PETER PIRSCH.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,Vol.36 No.10. 1989 |
| Array Architectures for Block Matching Algorithms. THOMAS KOMAREK, PETER PIRSCH.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,Vol.36 No.10. 1989 * |
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